rt2x00pci.c 9.2 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00pci.h"
  27. /*
  28. * Register access.
  29. */
  30. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  31. const unsigned int offset,
  32. const struct rt2x00_field32 field,
  33. u32 *reg)
  34. {
  35. unsigned int i;
  36. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  37. rt2x00pci_register_read(rt2x00dev, offset, reg);
  38. if (!rt2x00_get_field32(*reg, field))
  39. return 1;
  40. udelay(REGISTER_BUSY_DELAY);
  41. }
  42. ERROR(rt2x00dev, "Indirect register access failed: "
  43. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  44. *reg = ~0;
  45. return 0;
  46. }
  47. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  48. /*
  49. * TX data handlers.
  50. */
  51. int rt2x00pci_write_tx_data(struct queue_entry *entry)
  52. {
  53. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  54. struct queue_entry_priv_pci *entry_priv = entry->priv_data;
  55. struct skb_frame_desc *skbdesc;
  56. /*
  57. * This should not happen, we already checked the entry
  58. * was ours. When the hardware disagrees there has been
  59. * a queue corruption!
  60. */
  61. if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
  62. ERROR(rt2x00dev,
  63. "Corrupt queue %d, accessing entry which is not ours.\n"
  64. "Please file bug report to %s.\n",
  65. entry->queue->qid, DRV_PROJECT);
  66. return -EINVAL;
  67. }
  68. /*
  69. * Fill in skb descriptor
  70. */
  71. skbdesc = get_skb_frame_desc(entry->skb);
  72. skbdesc->desc = entry_priv->desc;
  73. skbdesc->desc_len = entry->queue->desc_size;
  74. return 0;
  75. }
  76. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  77. /*
  78. * TX/RX data handlers.
  79. */
  80. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  81. {
  82. struct data_queue *queue = rt2x00dev->rx;
  83. struct queue_entry *entry;
  84. struct queue_entry_priv_pci *entry_priv;
  85. struct skb_frame_desc *skbdesc;
  86. while (1) {
  87. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  88. entry_priv = entry->priv_data;
  89. if (rt2x00dev->ops->lib->get_entry_state(entry))
  90. break;
  91. /*
  92. * Fill in desc fields of the skb descriptor
  93. */
  94. skbdesc = get_skb_frame_desc(entry->skb);
  95. skbdesc->desc = entry_priv->desc;
  96. skbdesc->desc_len = entry->queue->desc_size;
  97. /*
  98. * Send the frame to rt2x00lib for further processing.
  99. */
  100. rt2x00lib_rxdone(rt2x00dev, entry);
  101. }
  102. }
  103. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  104. /*
  105. * Device initialization handlers.
  106. */
  107. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  108. struct data_queue *queue)
  109. {
  110. struct queue_entry_priv_pci *entry_priv;
  111. void *addr;
  112. dma_addr_t dma;
  113. unsigned int i;
  114. /*
  115. * Allocate DMA memory for descriptor and buffer.
  116. */
  117. addr = dma_alloc_coherent(rt2x00dev->dev,
  118. queue->limit * queue->desc_size,
  119. &dma, GFP_KERNEL | GFP_DMA);
  120. if (!addr)
  121. return -ENOMEM;
  122. memset(addr, 0, queue->limit * queue->desc_size);
  123. /*
  124. * Initialize all queue entries to contain valid addresses.
  125. */
  126. for (i = 0; i < queue->limit; i++) {
  127. entry_priv = queue->entries[i].priv_data;
  128. entry_priv->desc = addr + i * queue->desc_size;
  129. entry_priv->desc_dma = dma + i * queue->desc_size;
  130. }
  131. return 0;
  132. }
  133. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  134. struct data_queue *queue)
  135. {
  136. struct queue_entry_priv_pci *entry_priv =
  137. queue->entries[0].priv_data;
  138. if (entry_priv->desc)
  139. dma_free_coherent(rt2x00dev->dev,
  140. queue->limit * queue->desc_size,
  141. entry_priv->desc, entry_priv->desc_dma);
  142. entry_priv->desc = NULL;
  143. }
  144. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  145. {
  146. struct data_queue *queue;
  147. int status;
  148. /*
  149. * Allocate DMA
  150. */
  151. queue_for_each(rt2x00dev, queue) {
  152. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  153. if (status)
  154. goto exit;
  155. }
  156. /*
  157. * Register interrupt handler.
  158. */
  159. status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
  160. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  161. if (status) {
  162. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  163. rt2x00dev->irq, status);
  164. goto exit;
  165. }
  166. return 0;
  167. exit:
  168. queue_for_each(rt2x00dev, queue)
  169. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  170. return status;
  171. }
  172. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  173. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  174. {
  175. struct data_queue *queue;
  176. /*
  177. * Free irq line.
  178. */
  179. free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev);
  180. /*
  181. * Free DMA
  182. */
  183. queue_for_each(rt2x00dev, queue)
  184. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  185. }
  186. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  187. /*
  188. * PCI driver handlers.
  189. */
  190. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  191. {
  192. kfree(rt2x00dev->rf);
  193. rt2x00dev->rf = NULL;
  194. kfree(rt2x00dev->eeprom);
  195. rt2x00dev->eeprom = NULL;
  196. if (rt2x00dev->csr.base) {
  197. iounmap(rt2x00dev->csr.base);
  198. rt2x00dev->csr.base = NULL;
  199. }
  200. }
  201. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  202. {
  203. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  204. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  205. if (!rt2x00dev->csr.base)
  206. goto exit;
  207. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  208. if (!rt2x00dev->eeprom)
  209. goto exit;
  210. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  211. if (!rt2x00dev->rf)
  212. goto exit;
  213. return 0;
  214. exit:
  215. ERROR_PROBE("Failed to allocate registers.\n");
  216. rt2x00pci_free_reg(rt2x00dev);
  217. return -ENOMEM;
  218. }
  219. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  220. {
  221. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  222. struct ieee80211_hw *hw;
  223. struct rt2x00_dev *rt2x00dev;
  224. int retval;
  225. u16 chip;
  226. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  227. if (retval) {
  228. ERROR_PROBE("PCI request regions failed.\n");
  229. return retval;
  230. }
  231. retval = pci_enable_device(pci_dev);
  232. if (retval) {
  233. ERROR_PROBE("Enable device failed.\n");
  234. goto exit_release_regions;
  235. }
  236. pci_set_master(pci_dev);
  237. if (pci_set_mwi(pci_dev))
  238. ERROR_PROBE("MWI not available.\n");
  239. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  240. ERROR_PROBE("PCI DMA not supported.\n");
  241. retval = -EIO;
  242. goto exit_disable_device;
  243. }
  244. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  245. if (!hw) {
  246. ERROR_PROBE("Failed to allocate hardware.\n");
  247. retval = -ENOMEM;
  248. goto exit_disable_device;
  249. }
  250. pci_set_drvdata(pci_dev, hw);
  251. rt2x00dev = hw->priv;
  252. rt2x00dev->dev = &pci_dev->dev;
  253. rt2x00dev->ops = ops;
  254. rt2x00dev->hw = hw;
  255. rt2x00dev->irq = pci_dev->irq;
  256. rt2x00dev->name = pci_name(pci_dev);
  257. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  258. /*
  259. * Determine RT chipset by reading PCI header.
  260. */
  261. pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
  262. rt2x00_set_chip_rt(rt2x00dev, chip);
  263. retval = rt2x00pci_alloc_reg(rt2x00dev);
  264. if (retval)
  265. goto exit_free_device;
  266. retval = rt2x00lib_probe_dev(rt2x00dev);
  267. if (retval)
  268. goto exit_free_reg;
  269. return 0;
  270. exit_free_reg:
  271. rt2x00pci_free_reg(rt2x00dev);
  272. exit_free_device:
  273. ieee80211_free_hw(hw);
  274. exit_disable_device:
  275. if (retval != -EBUSY)
  276. pci_disable_device(pci_dev);
  277. exit_release_regions:
  278. pci_release_regions(pci_dev);
  279. pci_set_drvdata(pci_dev, NULL);
  280. return retval;
  281. }
  282. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  283. void rt2x00pci_remove(struct pci_dev *pci_dev)
  284. {
  285. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  286. struct rt2x00_dev *rt2x00dev = hw->priv;
  287. /*
  288. * Free all allocated data.
  289. */
  290. rt2x00lib_remove_dev(rt2x00dev);
  291. rt2x00pci_free_reg(rt2x00dev);
  292. ieee80211_free_hw(hw);
  293. /*
  294. * Free the PCI device data.
  295. */
  296. pci_set_drvdata(pci_dev, NULL);
  297. pci_disable_device(pci_dev);
  298. pci_release_regions(pci_dev);
  299. }
  300. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  301. #ifdef CONFIG_PM
  302. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  303. {
  304. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  305. struct rt2x00_dev *rt2x00dev = hw->priv;
  306. int retval;
  307. retval = rt2x00lib_suspend(rt2x00dev, state);
  308. if (retval)
  309. return retval;
  310. pci_save_state(pci_dev);
  311. pci_disable_device(pci_dev);
  312. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  313. }
  314. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  315. int rt2x00pci_resume(struct pci_dev *pci_dev)
  316. {
  317. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  318. struct rt2x00_dev *rt2x00dev = hw->priv;
  319. if (pci_set_power_state(pci_dev, PCI_D0) ||
  320. pci_enable_device(pci_dev) ||
  321. pci_restore_state(pci_dev)) {
  322. ERROR(rt2x00dev, "Failed to resume device.\n");
  323. return -EIO;
  324. }
  325. return rt2x00lib_resume(rt2x00dev);
  326. }
  327. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  328. #endif /* CONFIG_PM */
  329. /*
  330. * rt2x00pci module information.
  331. */
  332. MODULE_AUTHOR(DRV_PROJECT);
  333. MODULE_VERSION(DRV_VERSION);
  334. MODULE_DESCRIPTION("rt2x00 pci library");
  335. MODULE_LICENSE("GPL");