rt2800usb.h 4.7 KB

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  1. /*
  2. Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
  4. Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
  5. Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
  6. Copyright (C) 2009 Axel Kollhofer <rain_maker@root-forum.org>
  7. <http://rt2x00.serialmonkey.com>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the
  18. Free Software Foundation, Inc.,
  19. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. /*
  22. Module: rt2800usb
  23. Abstract: Data structures and registers for the rt2800usb module.
  24. Supported chipsets: RT2800U.
  25. */
  26. #ifndef RT2800USB_H
  27. #define RT2800USB_H
  28. /*
  29. * USB registers.
  30. */
  31. /*
  32. * USB_DMA_CFG
  33. * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
  34. * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
  35. * PHY_CLEAR: phy watch dog enable.
  36. * TX_CLEAR: Clear USB DMA TX path.
  37. * TXOP_HALT: Halt TXOP count down when TX buffer is full.
  38. * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
  39. * RX_BULK_EN: Enable USB DMA Rx.
  40. * TX_BULK_EN: Enable USB DMA Tx.
  41. * EP_OUT_VALID: OUT endpoint data valid.
  42. * RX_BUSY: USB DMA RX FSM busy.
  43. * TX_BUSY: USB DMA TX FSM busy.
  44. */
  45. #define USB_DMA_CFG 0x02a0
  46. #define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
  47. #define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
  48. #define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
  49. #define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
  50. #define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
  51. #define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
  52. #define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
  53. #define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
  54. #define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
  55. #define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
  56. #define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
  57. /*
  58. * USB_CYC_CFG
  59. */
  60. #define USB_CYC_CFG 0x02a4
  61. #define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
  62. /*
  63. * 8051 firmware image.
  64. */
  65. #define FIRMWARE_RT2870 "rt2870.bin"
  66. #define FIRMWARE_IMAGE_BASE 0x3000
  67. /*
  68. * DMA descriptor defines.
  69. */
  70. #define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
  71. #define RXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
  72. /*
  73. * TX Info structure
  74. */
  75. /*
  76. * Word0
  77. * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
  78. * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
  79. * 0:MGMT, 1:HCCA 2:EDCA
  80. * USB_DMA_NEXT_VALID: Used ONLY in USB bulk Aggregation, NextValid
  81. * DMA_TX_BURST: used ONLY in USB bulk Aggregation.
  82. * Force USB DMA transmit frame from current selected endpoint
  83. */
  84. #define TXINFO_W0_USB_DMA_TX_PKT_LEN FIELD32(0x0000ffff)
  85. #define TXINFO_W0_WIV FIELD32(0x01000000)
  86. #define TXINFO_W0_QSEL FIELD32(0x06000000)
  87. #define TXINFO_W0_SW_USE_LAST_ROUND FIELD32(0x08000000)
  88. #define TXINFO_W0_USB_DMA_NEXT_VALID FIELD32(0x40000000)
  89. #define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
  90. /*
  91. * RX descriptor format for RX Ring.
  92. */
  93. /*
  94. * Word0
  95. * UNICAST_TO_ME: This RX frame is unicast to me.
  96. * MULTICAST: This is a multicast frame.
  97. * BROADCAST: This is a broadcast frame.
  98. * MY_BSS: this frame belongs to the same BSSID.
  99. * CRC_ERROR: CRC error.
  100. * CIPHER_ERROR: 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid.
  101. * AMSDU: rx with 802.3 header, not 802.11 header.
  102. */
  103. #define RXINFO_W0_BA FIELD32(0x00000001)
  104. #define RXINFO_W0_DATA FIELD32(0x00000002)
  105. #define RXINFO_W0_NULLDATA FIELD32(0x00000004)
  106. #define RXINFO_W0_FRAG FIELD32(0x00000008)
  107. #define RXINFO_W0_UNICAST_TO_ME FIELD32(0x00000010)
  108. #define RXINFO_W0_MULTICAST FIELD32(0x00000020)
  109. #define RXINFO_W0_BROADCAST FIELD32(0x00000040)
  110. #define RXINFO_W0_MY_BSS FIELD32(0x00000080)
  111. #define RXINFO_W0_CRC_ERROR FIELD32(0x00000100)
  112. #define RXINFO_W0_CIPHER_ERROR FIELD32(0x00000600)
  113. #define RXINFO_W0_AMSDU FIELD32(0x00000800)
  114. #define RXINFO_W0_HTC FIELD32(0x00001000)
  115. #define RXINFO_W0_RSSI FIELD32(0x00002000)
  116. #define RXINFO_W0_L2PAD FIELD32(0x00004000)
  117. #define RXINFO_W0_AMPDU FIELD32(0x00008000)
  118. #define RXINFO_W0_DECRYPTED FIELD32(0x00010000)
  119. #define RXINFO_W0_PLCP_RSSI FIELD32(0x00020000)
  120. #define RXINFO_W0_CIPHER_ALG FIELD32(0x00040000)
  121. #define RXINFO_W0_LAST_AMSDU FIELD32(0x00080000)
  122. #define RXINFO_W0_PLCP_SIGNAL FIELD32(0xfff00000)
  123. #endif /* RT2800USB_H */