islpci_dev.c 27 KB

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  1. /*
  2. * Copyright (C) 2002 Intersil Americas Inc.
  3. * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
  4. * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/module.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/pci.h>
  24. #include <linux/sched.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/delay.h>
  27. #include <linux/if_arp.h>
  28. #include <asm/io.h>
  29. #include "prismcompat.h"
  30. #include "isl_38xx.h"
  31. #include "isl_ioctl.h"
  32. #include "islpci_dev.h"
  33. #include "islpci_mgt.h"
  34. #include "islpci_eth.h"
  35. #include "oid_mgt.h"
  36. #define ISL3877_IMAGE_FILE "isl3877"
  37. #define ISL3886_IMAGE_FILE "isl3886"
  38. #define ISL3890_IMAGE_FILE "isl3890"
  39. MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
  40. MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
  41. MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
  42. static int prism54_bring_down(islpci_private *);
  43. static int islpci_alloc_memory(islpci_private *);
  44. /* Temporary dummy MAC address to use until firmware is loaded.
  45. * The idea there is that some tools (such as nameif) may query
  46. * the MAC address before the netdev is 'open'. By using a valid
  47. * OUI prefix, they can process the netdev properly.
  48. * Of course, this is not the final/real MAC address. It doesn't
  49. * matter, as you are suppose to be able to change it anytime via
  50. * ndev->set_mac_address. Jean II */
  51. static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
  52. static int
  53. isl_upload_firmware(islpci_private *priv)
  54. {
  55. u32 reg, rc;
  56. void __iomem *device_base = priv->device_base;
  57. /* clear the RAMBoot and the Reset bit */
  58. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  59. reg &= ~ISL38XX_CTRL_STAT_RESET;
  60. reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
  61. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  62. wmb();
  63. udelay(ISL38XX_WRITEIO_DELAY);
  64. /* set the Reset bit without reading the register ! */
  65. reg |= ISL38XX_CTRL_STAT_RESET;
  66. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  67. wmb();
  68. udelay(ISL38XX_WRITEIO_DELAY);
  69. /* clear the Reset bit */
  70. reg &= ~ISL38XX_CTRL_STAT_RESET;
  71. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  72. wmb();
  73. /* wait a while for the device to reboot */
  74. mdelay(50);
  75. {
  76. const struct firmware *fw_entry = NULL;
  77. long fw_len;
  78. const u32 *fw_ptr;
  79. rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
  80. if (rc) {
  81. printk(KERN_ERR
  82. "%s: request_firmware() failed for '%s'\n",
  83. "prism54", priv->firmware);
  84. return rc;
  85. }
  86. /* prepare the Direct Memory Base register */
  87. reg = ISL38XX_DEV_FIRMWARE_ADDRES;
  88. fw_ptr = (u32 *) fw_entry->data;
  89. fw_len = fw_entry->size;
  90. if (fw_len % 4) {
  91. printk(KERN_ERR
  92. "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
  93. "prism54", priv->firmware);
  94. release_firmware(fw_entry);
  95. return -EILSEQ; /* Illegal byte sequence */;
  96. }
  97. while (fw_len > 0) {
  98. long _fw_len =
  99. (fw_len >
  100. ISL38XX_MEMORY_WINDOW_SIZE) ?
  101. ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
  102. u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
  103. /* set the card's base address for writing the data */
  104. isl38xx_w32_flush(device_base, reg,
  105. ISL38XX_DIR_MEM_BASE_REG);
  106. wmb(); /* be paranoid */
  107. /* increment the write address for next iteration */
  108. reg += _fw_len;
  109. fw_len -= _fw_len;
  110. /* write the data to the Direct Memory Window 32bit-wise */
  111. /* memcpy_toio() doesn't guarantee 32bit writes :-| */
  112. while (_fw_len > 0) {
  113. /* use non-swapping writel() */
  114. __raw_writel(*fw_ptr, dev_fw_ptr);
  115. fw_ptr++, dev_fw_ptr++;
  116. _fw_len -= 4;
  117. }
  118. /* flush PCI posting */
  119. (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
  120. wmb(); /* be paranoid again */
  121. BUG_ON(_fw_len != 0);
  122. }
  123. BUG_ON(fw_len != 0);
  124. /* Firmware version is at offset 40 (also for "newmac") */
  125. printk(KERN_DEBUG "%s: firmware version: %.8s\n",
  126. priv->ndev->name, fw_entry->data + 40);
  127. release_firmware(fw_entry);
  128. }
  129. /* now reset the device
  130. * clear the Reset & ClkRun bit, set the RAMBoot bit */
  131. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  132. reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
  133. reg &= ~ISL38XX_CTRL_STAT_RESET;
  134. reg |= ISL38XX_CTRL_STAT_RAMBOOT;
  135. isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
  136. wmb();
  137. udelay(ISL38XX_WRITEIO_DELAY);
  138. /* set the reset bit latches the host override and RAMBoot bits
  139. * into the device for operation when the reset bit is reset */
  140. reg |= ISL38XX_CTRL_STAT_RESET;
  141. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  142. /* don't do flush PCI posting here! */
  143. wmb();
  144. udelay(ISL38XX_WRITEIO_DELAY);
  145. /* clear the reset bit should start the whole circus */
  146. reg &= ~ISL38XX_CTRL_STAT_RESET;
  147. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  148. /* don't do flush PCI posting here! */
  149. wmb();
  150. udelay(ISL38XX_WRITEIO_DELAY);
  151. return 0;
  152. }
  153. /******************************************************************************
  154. Device Interrupt Handler
  155. ******************************************************************************/
  156. irqreturn_t
  157. islpci_interrupt(int irq, void *config)
  158. {
  159. u32 reg;
  160. islpci_private *priv = config;
  161. struct net_device *ndev = priv->ndev;
  162. void __iomem *device = priv->device_base;
  163. int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
  164. /* lock the interrupt handler */
  165. spin_lock(&priv->slock);
  166. /* received an interrupt request on a shared IRQ line
  167. * first check whether the device is in sleep mode */
  168. reg = readl(device + ISL38XX_CTRL_STAT_REG);
  169. if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
  170. /* device is in sleep mode, IRQ was generated by someone else */
  171. {
  172. #if VERBOSE > SHOW_ERROR_MESSAGES
  173. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  174. #endif
  175. spin_unlock(&priv->slock);
  176. return IRQ_NONE;
  177. }
  178. /* check whether there is any source of interrupt on the device */
  179. reg = readl(device + ISL38XX_INT_IDENT_REG);
  180. /* also check the contents of the Interrupt Enable Register, because this
  181. * will filter out interrupt sources from other devices on the same irq ! */
  182. reg &= readl(device + ISL38XX_INT_EN_REG);
  183. reg &= ISL38XX_INT_SOURCES;
  184. if (reg != 0) {
  185. if (islpci_get_state(priv) != PRV_STATE_SLEEP)
  186. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  187. /* reset the request bits in the Identification register */
  188. isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
  189. #if VERBOSE > SHOW_ERROR_MESSAGES
  190. DEBUG(SHOW_FUNCTION_CALLS,
  191. "IRQ: Identification register 0x%p 0x%x \n", device, reg);
  192. #endif
  193. /* check for each bit in the register separately */
  194. if (reg & ISL38XX_INT_IDENT_UPDATE) {
  195. #if VERBOSE > SHOW_ERROR_MESSAGES
  196. /* Queue has been updated */
  197. DEBUG(SHOW_TRACING, "IRQ: Update flag \n");
  198. DEBUG(SHOW_QUEUE_INDEXES,
  199. "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
  200. le32_to_cpu(priv->control_block->
  201. driver_curr_frag[0]),
  202. le32_to_cpu(priv->control_block->
  203. driver_curr_frag[1]),
  204. le32_to_cpu(priv->control_block->
  205. driver_curr_frag[2]),
  206. le32_to_cpu(priv->control_block->
  207. driver_curr_frag[3]),
  208. le32_to_cpu(priv->control_block->
  209. driver_curr_frag[4]),
  210. le32_to_cpu(priv->control_block->
  211. driver_curr_frag[5])
  212. );
  213. DEBUG(SHOW_QUEUE_INDEXES,
  214. "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
  215. le32_to_cpu(priv->control_block->
  216. device_curr_frag[0]),
  217. le32_to_cpu(priv->control_block->
  218. device_curr_frag[1]),
  219. le32_to_cpu(priv->control_block->
  220. device_curr_frag[2]),
  221. le32_to_cpu(priv->control_block->
  222. device_curr_frag[3]),
  223. le32_to_cpu(priv->control_block->
  224. device_curr_frag[4]),
  225. le32_to_cpu(priv->control_block->
  226. device_curr_frag[5])
  227. );
  228. #endif
  229. /* cleanup the data low transmit queue */
  230. islpci_eth_cleanup_transmit(priv, priv->control_block);
  231. /* device is in active state, update the
  232. * powerstate flag if necessary */
  233. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  234. /* check all three queues in priority order
  235. * call the PIMFOR receive function until the
  236. * queue is empty */
  237. if (isl38xx_in_queue(priv->control_block,
  238. ISL38XX_CB_RX_MGMTQ) != 0) {
  239. #if VERBOSE > SHOW_ERROR_MESSAGES
  240. DEBUG(SHOW_TRACING,
  241. "Received frame in Management Queue\n");
  242. #endif
  243. islpci_mgt_receive(ndev);
  244. islpci_mgt_cleanup_transmit(ndev);
  245. /* Refill slots in receive queue */
  246. islpci_mgmt_rx_fill(ndev);
  247. /* no need to trigger the device, next
  248. islpci_mgt_transaction does it */
  249. }
  250. while (isl38xx_in_queue(priv->control_block,
  251. ISL38XX_CB_RX_DATA_LQ) != 0) {
  252. #if VERBOSE > SHOW_ERROR_MESSAGES
  253. DEBUG(SHOW_TRACING,
  254. "Received frame in Data Low Queue \n");
  255. #endif
  256. islpci_eth_receive(priv);
  257. }
  258. /* check whether the data transmit queues were full */
  259. if (priv->data_low_tx_full) {
  260. /* check whether the transmit is not full anymore */
  261. if (ISL38XX_CB_TX_QSIZE -
  262. isl38xx_in_queue(priv->control_block,
  263. ISL38XX_CB_TX_DATA_LQ) >=
  264. ISL38XX_MIN_QTHRESHOLD) {
  265. /* nope, the driver is ready for more network frames */
  266. netif_wake_queue(priv->ndev);
  267. /* reset the full flag */
  268. priv->data_low_tx_full = 0;
  269. }
  270. }
  271. }
  272. if (reg & ISL38XX_INT_IDENT_INIT) {
  273. /* Device has been initialized */
  274. #if VERBOSE > SHOW_ERROR_MESSAGES
  275. DEBUG(SHOW_TRACING,
  276. "IRQ: Init flag, device initialized \n");
  277. #endif
  278. wake_up(&priv->reset_done);
  279. }
  280. if (reg & ISL38XX_INT_IDENT_SLEEP) {
  281. /* Device intends to move to powersave state */
  282. #if VERBOSE > SHOW_ERROR_MESSAGES
  283. DEBUG(SHOW_TRACING, "IRQ: Sleep flag \n");
  284. #endif
  285. isl38xx_handle_sleep_request(priv->control_block,
  286. &powerstate,
  287. priv->device_base);
  288. }
  289. if (reg & ISL38XX_INT_IDENT_WAKEUP) {
  290. /* Device has been woken up to active state */
  291. #if VERBOSE > SHOW_ERROR_MESSAGES
  292. DEBUG(SHOW_TRACING, "IRQ: Wakeup flag \n");
  293. #endif
  294. isl38xx_handle_wakeup(priv->control_block,
  295. &powerstate, priv->device_base);
  296. }
  297. } else {
  298. #if VERBOSE > SHOW_ERROR_MESSAGES
  299. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  300. #endif
  301. spin_unlock(&priv->slock);
  302. return IRQ_NONE;
  303. }
  304. /* sleep -> ready */
  305. if (islpci_get_state(priv) == PRV_STATE_SLEEP
  306. && powerstate == ISL38XX_PSM_ACTIVE_STATE)
  307. islpci_set_state(priv, PRV_STATE_READY);
  308. /* !sleep -> sleep */
  309. if (islpci_get_state(priv) != PRV_STATE_SLEEP
  310. && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
  311. islpci_set_state(priv, PRV_STATE_SLEEP);
  312. /* unlock the interrupt handler */
  313. spin_unlock(&priv->slock);
  314. return IRQ_HANDLED;
  315. }
  316. /******************************************************************************
  317. Network Interface Control & Statistical functions
  318. ******************************************************************************/
  319. static int
  320. islpci_open(struct net_device *ndev)
  321. {
  322. u32 rc;
  323. islpci_private *priv = netdev_priv(ndev);
  324. /* reset data structures, upload firmware and reset device */
  325. rc = islpci_reset(priv,1);
  326. if (rc) {
  327. prism54_bring_down(priv);
  328. return rc; /* Returns informative message */
  329. }
  330. netif_start_queue(ndev);
  331. /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
  332. * once the firmware receives a trap of being associated
  333. * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
  334. * should just leave the carrier on as its expected the firmware
  335. * won't send us a trigger. */
  336. if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
  337. netif_carrier_off(ndev);
  338. else
  339. netif_carrier_on(ndev);
  340. return 0;
  341. }
  342. static int
  343. islpci_close(struct net_device *ndev)
  344. {
  345. islpci_private *priv = netdev_priv(ndev);
  346. printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
  347. netif_stop_queue(ndev);
  348. return prism54_bring_down(priv);
  349. }
  350. static int
  351. prism54_bring_down(islpci_private *priv)
  352. {
  353. void __iomem *device_base = priv->device_base;
  354. u32 reg;
  355. /* we are going to shutdown the device */
  356. islpci_set_state(priv, PRV_STATE_PREBOOT);
  357. /* disable all device interrupts in case they weren't */
  358. isl38xx_disable_interrupts(priv->device_base);
  359. /* For safety reasons, we may want to ensure that no DMA transfer is
  360. * currently in progress by emptying the TX and RX queues. */
  361. /* wait until interrupts have finished executing on other CPUs */
  362. synchronize_irq(priv->pdev->irq);
  363. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  364. reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
  365. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  366. wmb();
  367. udelay(ISL38XX_WRITEIO_DELAY);
  368. reg |= ISL38XX_CTRL_STAT_RESET;
  369. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  370. wmb();
  371. udelay(ISL38XX_WRITEIO_DELAY);
  372. /* clear the Reset bit */
  373. reg &= ~ISL38XX_CTRL_STAT_RESET;
  374. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  375. wmb();
  376. /* wait a while for the device to reset */
  377. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  378. return 0;
  379. }
  380. static int
  381. islpci_upload_fw(islpci_private *priv)
  382. {
  383. islpci_state_t old_state;
  384. u32 rc;
  385. old_state = islpci_set_state(priv, PRV_STATE_BOOT);
  386. printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
  387. rc = isl_upload_firmware(priv);
  388. if (rc) {
  389. /* error uploading the firmware */
  390. printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
  391. priv->ndev->name, priv->firmware);
  392. islpci_set_state(priv, old_state);
  393. return rc;
  394. }
  395. printk(KERN_DEBUG "%s: firmware upload complete\n",
  396. priv->ndev->name);
  397. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  398. return 0;
  399. }
  400. static int
  401. islpci_reset_if(islpci_private *priv)
  402. {
  403. long remaining;
  404. int result = -ETIME;
  405. int count;
  406. DEFINE_WAIT(wait);
  407. prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
  408. /* now the last step is to reset the interface */
  409. isl38xx_interface_reset(priv->device_base, priv->device_host_address);
  410. islpci_set_state(priv, PRV_STATE_PREINIT);
  411. for(count = 0; count < 2 && result; count++) {
  412. /* The software reset acknowledge needs about 220 msec here.
  413. * Be conservative and wait for up to one second. */
  414. remaining = schedule_timeout_uninterruptible(HZ);
  415. if(remaining > 0) {
  416. result = 0;
  417. break;
  418. }
  419. /* If we're here it's because our IRQ hasn't yet gone through.
  420. * Retry a bit more...
  421. */
  422. printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
  423. priv->ndev->name);
  424. }
  425. finish_wait(&priv->reset_done, &wait);
  426. if (result) {
  427. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  428. return result;
  429. }
  430. islpci_set_state(priv, PRV_STATE_INIT);
  431. /* Now that the device is 100% up, let's allow
  432. * for the other interrupts --
  433. * NOTE: this is not *yet* true since we've only allowed the
  434. * INIT interrupt on the IRQ line. We can perhaps poll
  435. * the IRQ line until we know for sure the reset went through */
  436. isl38xx_enable_common_interrupts(priv->device_base);
  437. down_write(&priv->mib_sem);
  438. result = mgt_commit(priv);
  439. if (result) {
  440. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  441. up_write(&priv->mib_sem);
  442. return result;
  443. }
  444. up_write(&priv->mib_sem);
  445. islpci_set_state(priv, PRV_STATE_READY);
  446. printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
  447. return 0;
  448. }
  449. int
  450. islpci_reset(islpci_private *priv, int reload_firmware)
  451. {
  452. isl38xx_control_block *cb = /* volatile not needed */
  453. (isl38xx_control_block *) priv->control_block;
  454. unsigned counter;
  455. int rc;
  456. if (reload_firmware)
  457. islpci_set_state(priv, PRV_STATE_PREBOOT);
  458. else
  459. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  460. printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
  461. /* disable all device interrupts in case they weren't */
  462. isl38xx_disable_interrupts(priv->device_base);
  463. /* flush all management queues */
  464. priv->index_mgmt_tx = 0;
  465. priv->index_mgmt_rx = 0;
  466. /* clear the indexes in the frame pointer */
  467. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  468. cb->driver_curr_frag[counter] = cpu_to_le32(0);
  469. cb->device_curr_frag[counter] = cpu_to_le32(0);
  470. }
  471. /* reset the mgmt receive queue */
  472. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  473. isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
  474. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  475. frag->flags = 0;
  476. frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
  477. }
  478. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  479. cb->rx_data_low[counter].address =
  480. cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
  481. }
  482. /* since the receive queues are filled with empty fragments, now we can
  483. * set the corresponding indexes in the Control Block */
  484. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
  485. cpu_to_le32(ISL38XX_CB_RX_QSIZE);
  486. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
  487. cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
  488. /* reset the remaining real index registers and full flags */
  489. priv->free_data_rx = 0;
  490. priv->free_data_tx = 0;
  491. priv->data_low_tx_full = 0;
  492. if (reload_firmware) { /* Should we load the firmware ? */
  493. /* now that the data structures are cleaned up, upload
  494. * firmware and reset interface */
  495. rc = islpci_upload_fw(priv);
  496. if (rc) {
  497. printk(KERN_ERR "%s: islpci_reset: failure\n",
  498. priv->ndev->name);
  499. return rc;
  500. }
  501. }
  502. /* finally reset interface */
  503. rc = islpci_reset_if(priv);
  504. if (rc)
  505. printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
  506. return rc;
  507. }
  508. /******************************************************************************
  509. Network device configuration functions
  510. ******************************************************************************/
  511. static int
  512. islpci_alloc_memory(islpci_private *priv)
  513. {
  514. int counter;
  515. #if VERBOSE > SHOW_ERROR_MESSAGES
  516. printk(KERN_DEBUG "islpci_alloc_memory\n");
  517. #endif
  518. /* remap the PCI device base address to accessable */
  519. if (!(priv->device_base =
  520. ioremap(pci_resource_start(priv->pdev, 0),
  521. ISL38XX_PCI_MEM_SIZE))) {
  522. /* error in remapping the PCI device memory address range */
  523. printk(KERN_ERR "PCI memory remapping failed \n");
  524. return -1;
  525. }
  526. /* memory layout for consistent DMA region:
  527. *
  528. * Area 1: Control Block for the device interface
  529. * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
  530. * the number of supported stations in the AP determines the minimal
  531. * size of the buffer !
  532. */
  533. /* perform the allocation */
  534. priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
  535. HOST_MEM_BLOCK,
  536. &priv->
  537. device_host_address);
  538. if (!priv->driver_mem_address) {
  539. /* error allocating the block of PCI memory */
  540. printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
  541. "prism54");
  542. return -1;
  543. }
  544. /* assign the Control Block to the first address of the allocated area */
  545. priv->control_block =
  546. (isl38xx_control_block *) priv->driver_mem_address;
  547. /* set the Power Save Buffer pointer directly behind the CB */
  548. priv->device_psm_buffer =
  549. priv->device_host_address + CONTROL_BLOCK_SIZE;
  550. /* make sure all buffer pointers are initialized */
  551. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  552. priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
  553. priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
  554. }
  555. priv->index_mgmt_rx = 0;
  556. memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
  557. memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
  558. /* allocate rx queue for management frames */
  559. if (islpci_mgmt_rx_fill(priv->ndev) < 0)
  560. goto out_free;
  561. /* now get the data rx skb's */
  562. memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
  563. memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
  564. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  565. struct sk_buff *skb;
  566. /* allocate an sk_buff for received data frames storage
  567. * each frame on receive size consists of 1 fragment
  568. * include any required allignment operations */
  569. if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
  570. /* error allocating an sk_buff structure elements */
  571. printk(KERN_ERR "Error allocating skb.\n");
  572. skb = NULL;
  573. goto out_free;
  574. }
  575. skb_reserve(skb, (4 - (long) skb->data) & 0x03);
  576. /* add the new allocated sk_buff to the buffer array */
  577. priv->data_low_rx[counter] = skb;
  578. /* map the allocated skb data area to pci */
  579. priv->pci_map_rx_address[counter] =
  580. pci_map_single(priv->pdev, (void *) skb->data,
  581. MAX_FRAGMENT_SIZE_RX + 2,
  582. PCI_DMA_FROMDEVICE);
  583. if (!priv->pci_map_rx_address[counter]) {
  584. /* error mapping the buffer to device
  585. accessable memory address */
  586. printk(KERN_ERR "failed to map skb DMA'able\n");
  587. goto out_free;
  588. }
  589. }
  590. prism54_acl_init(&priv->acl);
  591. prism54_wpa_bss_ie_init(priv);
  592. if (mgt_init(priv))
  593. goto out_free;
  594. return 0;
  595. out_free:
  596. islpci_free_memory(priv);
  597. return -1;
  598. }
  599. int
  600. islpci_free_memory(islpci_private *priv)
  601. {
  602. int counter;
  603. if (priv->device_base)
  604. iounmap(priv->device_base);
  605. priv->device_base = NULL;
  606. /* free consistent DMA area... */
  607. if (priv->driver_mem_address)
  608. pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
  609. priv->driver_mem_address,
  610. priv->device_host_address);
  611. /* clear some dangling pointers */
  612. priv->driver_mem_address = NULL;
  613. priv->device_host_address = 0;
  614. priv->device_psm_buffer = 0;
  615. priv->control_block = NULL;
  616. /* clean up mgmt rx buffers */
  617. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  618. struct islpci_membuf *buf = &priv->mgmt_rx[counter];
  619. if (buf->pci_addr)
  620. pci_unmap_single(priv->pdev, buf->pci_addr,
  621. buf->size, PCI_DMA_FROMDEVICE);
  622. buf->pci_addr = 0;
  623. kfree(buf->mem);
  624. buf->size = 0;
  625. buf->mem = NULL;
  626. }
  627. /* clean up data rx buffers */
  628. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  629. if (priv->pci_map_rx_address[counter])
  630. pci_unmap_single(priv->pdev,
  631. priv->pci_map_rx_address[counter],
  632. MAX_FRAGMENT_SIZE_RX + 2,
  633. PCI_DMA_FROMDEVICE);
  634. priv->pci_map_rx_address[counter] = 0;
  635. if (priv->data_low_rx[counter])
  636. dev_kfree_skb(priv->data_low_rx[counter]);
  637. priv->data_low_rx[counter] = NULL;
  638. }
  639. /* Free the acces control list and the WPA list */
  640. prism54_acl_clean(&priv->acl);
  641. prism54_wpa_bss_ie_clean(priv);
  642. mgt_clean(priv);
  643. return 0;
  644. }
  645. #if 0
  646. static void
  647. islpci_set_multicast_list(struct net_device *dev)
  648. {
  649. /* put device into promisc mode and let network layer handle it */
  650. }
  651. #endif
  652. static void islpci_ethtool_get_drvinfo(struct net_device *dev,
  653. struct ethtool_drvinfo *info)
  654. {
  655. strcpy(info->driver, DRV_NAME);
  656. strcpy(info->version, DRV_VERSION);
  657. }
  658. static const struct ethtool_ops islpci_ethtool_ops = {
  659. .get_drvinfo = islpci_ethtool_get_drvinfo,
  660. };
  661. static const struct net_device_ops islpci_netdev_ops = {
  662. .ndo_open = islpci_open,
  663. .ndo_stop = islpci_close,
  664. .ndo_do_ioctl = prism54_ioctl,
  665. .ndo_start_xmit = islpci_eth_transmit,
  666. .ndo_tx_timeout = islpci_eth_tx_timeout,
  667. .ndo_set_mac_address = prism54_set_mac_address,
  668. .ndo_change_mtu = eth_change_mtu,
  669. .ndo_validate_addr = eth_validate_addr,
  670. };
  671. struct net_device *
  672. islpci_setup(struct pci_dev *pdev)
  673. {
  674. islpci_private *priv;
  675. struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
  676. if (!ndev)
  677. return ndev;
  678. pci_set_drvdata(pdev, ndev);
  679. #if defined(SET_NETDEV_DEV)
  680. SET_NETDEV_DEV(ndev, &pdev->dev);
  681. #endif
  682. /* setup the structure members */
  683. ndev->base_addr = pci_resource_start(pdev, 0);
  684. ndev->irq = pdev->irq;
  685. /* initialize the function pointers */
  686. ndev->netdev_ops = &islpci_netdev_ops;
  687. ndev->wireless_handlers = &prism54_handler_def;
  688. ndev->ethtool_ops = &islpci_ethtool_ops;
  689. /* ndev->set_multicast_list = &islpci_set_multicast_list; */
  690. ndev->addr_len = ETH_ALEN;
  691. /* Get a non-zero dummy MAC address for nameif. Jean II */
  692. memcpy(ndev->dev_addr, dummy_mac, 6);
  693. ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
  694. /* allocate a private device structure to the network device */
  695. priv = netdev_priv(ndev);
  696. priv->ndev = ndev;
  697. priv->pdev = pdev;
  698. priv->monitor_type = ARPHRD_IEEE80211;
  699. priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
  700. priv->monitor_type : ARPHRD_ETHER;
  701. /* Add pointers to enable iwspy support. */
  702. priv->wireless_data.spy_data = &priv->spy_data;
  703. ndev->wireless_data = &priv->wireless_data;
  704. /* save the start and end address of the PCI memory area */
  705. ndev->mem_start = (unsigned long) priv->device_base;
  706. ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
  707. #if VERBOSE > SHOW_ERROR_MESSAGES
  708. DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
  709. #endif
  710. init_waitqueue_head(&priv->reset_done);
  711. /* init the queue read locks, process wait counter */
  712. mutex_init(&priv->mgmt_lock);
  713. priv->mgmt_received = NULL;
  714. init_waitqueue_head(&priv->mgmt_wqueue);
  715. mutex_init(&priv->stats_lock);
  716. spin_lock_init(&priv->slock);
  717. /* init state machine with off#1 state */
  718. priv->state = PRV_STATE_OFF;
  719. priv->state_off = 1;
  720. /* initialize workqueue's */
  721. INIT_WORK(&priv->stats_work, prism54_update_stats);
  722. priv->stats_timestamp = 0;
  723. INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
  724. priv->reset_task_pending = 0;
  725. /* allocate various memory areas */
  726. if (islpci_alloc_memory(priv))
  727. goto do_free_netdev;
  728. /* select the firmware file depending on the device id */
  729. switch (pdev->device) {
  730. case 0x3877:
  731. strcpy(priv->firmware, ISL3877_IMAGE_FILE);
  732. break;
  733. case 0x3886:
  734. strcpy(priv->firmware, ISL3886_IMAGE_FILE);
  735. break;
  736. default:
  737. strcpy(priv->firmware, ISL3890_IMAGE_FILE);
  738. break;
  739. }
  740. if (register_netdev(ndev)) {
  741. DEBUG(SHOW_ERROR_MESSAGES,
  742. "ERROR: register_netdev() failed \n");
  743. goto do_islpci_free_memory;
  744. }
  745. return ndev;
  746. do_islpci_free_memory:
  747. islpci_free_memory(priv);
  748. do_free_netdev:
  749. pci_set_drvdata(pdev, NULL);
  750. free_netdev(ndev);
  751. priv = NULL;
  752. return NULL;
  753. }
  754. islpci_state_t
  755. islpci_set_state(islpci_private *priv, islpci_state_t new_state)
  756. {
  757. islpci_state_t old_state;
  758. /* lock */
  759. old_state = priv->state;
  760. /* this means either a race condition or some serious error in
  761. * the driver code */
  762. switch (new_state) {
  763. case PRV_STATE_OFF:
  764. priv->state_off++;
  765. default:
  766. priv->state = new_state;
  767. break;
  768. case PRV_STATE_PREBOOT:
  769. /* there are actually many off-states, enumerated by
  770. * state_off */
  771. if (old_state == PRV_STATE_OFF)
  772. priv->state_off--;
  773. /* only if hw_unavailable is zero now it means we either
  774. * were in off#1 state, or came here from
  775. * somewhere else */
  776. if (!priv->state_off)
  777. priv->state = new_state;
  778. break;
  779. };
  780. #if 0
  781. printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
  782. priv->ndev->name, old_state, new_state, priv->state_off);
  783. #endif
  784. /* invariants */
  785. BUG_ON(priv->state_off < 0);
  786. BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
  787. BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
  788. /* unlock */
  789. return old_state;
  790. }