iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define DRV_VERSION IWLWIFI_VERSION VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .sw_crypto = 1,
  79. .restart_fw = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /**
  83. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  84. * @priv: eeprom and antenna fields are used to determine antenna flags
  85. *
  86. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  87. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  88. *
  89. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  90. * IWL_ANTENNA_MAIN - Force MAIN antenna
  91. * IWL_ANTENNA_AUX - Force AUX antenna
  92. */
  93. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  94. {
  95. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  96. switch (iwl3945_mod_params.antenna) {
  97. case IWL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IWL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IWL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  110. iwl3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  114. struct ieee80211_key_conf *keyconf,
  115. u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == priv->hw_params.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&priv->sta_lock, flags);
  128. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  129. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  131. keyconf->keylen);
  132. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  133. keyconf->keylen);
  134. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  135. == STA_KEY_FLG_NO_ENC)
  136. priv->stations[sta_id].sta.key.key_offset =
  137. iwl_get_free_ucode_key_index(priv);
  138. /* else, we are overriding an existing key => no need to allocated room
  139. * in uCode. */
  140. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  141. "no space for a new key");
  142. priv->stations[sta_id].sta.key.key_flags = key_flags;
  143. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  144. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  145. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  146. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  147. spin_unlock_irqrestore(&priv->sta_lock, flags);
  148. return ret;
  149. }
  150. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  151. struct ieee80211_key_conf *keyconf,
  152. u8 sta_id)
  153. {
  154. return -EOPNOTSUPP;
  155. }
  156. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  157. struct ieee80211_key_conf *keyconf,
  158. u8 sta_id)
  159. {
  160. return -EOPNOTSUPP;
  161. }
  162. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  163. {
  164. unsigned long flags;
  165. spin_lock_irqsave(&priv->sta_lock, flags);
  166. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  167. memset(&priv->stations[sta_id].sta.key, 0,
  168. sizeof(struct iwl4965_keyinfo));
  169. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  170. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  171. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  172. spin_unlock_irqrestore(&priv->sta_lock, flags);
  173. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  174. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  175. return 0;
  176. }
  177. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  178. struct ieee80211_key_conf *keyconf, u8 sta_id)
  179. {
  180. int ret = 0;
  181. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  182. switch (keyconf->alg) {
  183. case ALG_CCMP:
  184. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  185. break;
  186. case ALG_TKIP:
  187. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_WEP:
  190. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. default:
  193. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  194. ret = -EINVAL;
  195. }
  196. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  197. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  198. sta_id, ret);
  199. return ret;
  200. }
  201. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  202. {
  203. int ret = -EOPNOTSUPP;
  204. return ret;
  205. }
  206. static int iwl3945_set_static_key(struct iwl_priv *priv,
  207. struct ieee80211_key_conf *key)
  208. {
  209. if (key->alg == ALG_WEP)
  210. return -EOPNOTSUPP;
  211. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  212. return -EINVAL;
  213. }
  214. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  215. {
  216. struct list_head *element;
  217. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  218. priv->frames_count);
  219. while (!list_empty(&priv->free_frames)) {
  220. element = priv->free_frames.next;
  221. list_del(element);
  222. kfree(list_entry(element, struct iwl3945_frame, list));
  223. priv->frames_count--;
  224. }
  225. if (priv->frames_count) {
  226. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  227. priv->frames_count);
  228. priv->frames_count = 0;
  229. }
  230. }
  231. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  232. {
  233. struct iwl3945_frame *frame;
  234. struct list_head *element;
  235. if (list_empty(&priv->free_frames)) {
  236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  237. if (!frame) {
  238. IWL_ERR(priv, "Could not allocate frame!\n");
  239. return NULL;
  240. }
  241. priv->frames_count++;
  242. return frame;
  243. }
  244. element = priv->free_frames.next;
  245. list_del(element);
  246. return list_entry(element, struct iwl3945_frame, list);
  247. }
  248. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  249. {
  250. memset(frame, 0, sizeof(*frame));
  251. list_add(&frame->list, &priv->free_frames);
  252. }
  253. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  254. struct ieee80211_hdr *hdr,
  255. int left)
  256. {
  257. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  258. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  259. (priv->iw_mode != NL80211_IFTYPE_AP)))
  260. return 0;
  261. if (priv->ibss_beacon->len > left)
  262. return 0;
  263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  264. return priv->ibss_beacon->len;
  265. }
  266. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  267. {
  268. struct iwl3945_frame *frame;
  269. unsigned int frame_size;
  270. int rc;
  271. u8 rate;
  272. frame = iwl3945_get_free_frame(priv);
  273. if (!frame) {
  274. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  275. "command.\n");
  276. return -ENOMEM;
  277. }
  278. rate = iwl_rate_get_lowest_plcp(priv);
  279. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  280. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  281. &frame->u.cmd[0]);
  282. iwl3945_free_frame(priv, frame);
  283. return rc;
  284. }
  285. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  286. {
  287. if (priv->shared_virt)
  288. pci_free_consistent(priv->pci_dev,
  289. sizeof(struct iwl3945_shared),
  290. priv->shared_virt,
  291. priv->shared_phys);
  292. }
  293. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  294. struct ieee80211_tx_info *info,
  295. struct iwl_device_cmd *cmd,
  296. struct sk_buff *skb_frag,
  297. int sta_id)
  298. {
  299. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  300. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  301. switch (keyinfo->alg) {
  302. case ALG_CCMP:
  303. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  304. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  305. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  306. break;
  307. case ALG_TKIP:
  308. break;
  309. case ALG_WEP:
  310. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  311. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  312. if (keyinfo->keylen == 13)
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  315. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  316. "with key %d\n", info->control.hw_key->hw_key_idx);
  317. break;
  318. default:
  319. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  320. break;
  321. }
  322. }
  323. /*
  324. * handle build REPLY_TX command notification.
  325. */
  326. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  327. struct iwl_device_cmd *cmd,
  328. struct ieee80211_tx_info *info,
  329. struct ieee80211_hdr *hdr, u8 std_id)
  330. {
  331. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  332. __le32 tx_flags = tx_cmd->tx_flags;
  333. __le16 fc = hdr->frame_control;
  334. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  335. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  336. tx_flags |= TX_CMD_FLG_ACK_MSK;
  337. if (ieee80211_is_mgmt(fc))
  338. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  339. if (ieee80211_is_probe_resp(fc) &&
  340. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  341. tx_flags |= TX_CMD_FLG_TSF_MSK;
  342. } else {
  343. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. }
  346. tx_cmd->sta_id = std_id;
  347. if (ieee80211_has_morefrags(fc))
  348. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  349. if (ieee80211_is_data_qos(fc)) {
  350. u8 *qc = ieee80211_get_qos_ctl(hdr);
  351. tx_cmd->tid_tspec = qc[0] & 0xf;
  352. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  353. } else {
  354. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  355. }
  356. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  360. if (ieee80211_is_mgmt(fc)) {
  361. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  362. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  363. else
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  365. } else {
  366. tx_cmd->timeout.pm_frame_timeout = 0;
  367. }
  368. tx_cmd->driver_txop = 0;
  369. tx_cmd->tx_flags = tx_flags;
  370. tx_cmd->next_frame_len = 0;
  371. }
  372. /*
  373. * start REPLY_TX command process
  374. */
  375. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  376. {
  377. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  378. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  379. struct iwl3945_tx_cmd *tx_cmd;
  380. struct iwl_tx_queue *txq = NULL;
  381. struct iwl_queue *q = NULL;
  382. struct iwl_device_cmd *out_cmd;
  383. struct iwl_cmd_meta *out_meta;
  384. dma_addr_t phys_addr;
  385. dma_addr_t txcmd_phys;
  386. int txq_id = skb_get_queue_mapping(skb);
  387. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  388. u8 id;
  389. u8 unicast;
  390. u8 sta_id;
  391. u8 tid = 0;
  392. u16 seq_number = 0;
  393. __le16 fc;
  394. u8 wait_write_ptr = 0;
  395. u8 *qc = NULL;
  396. unsigned long flags;
  397. int rc;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. /* drop all non-injected data frame if we are not associated */
  419. if (ieee80211_is_data(fc) &&
  420. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  421. (!iwl_is_associated(priv) ||
  422. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  423. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  424. goto drop_unlock;
  425. }
  426. spin_unlock_irqrestore(&priv->lock, flags);
  427. hdr_len = ieee80211_hdrlen(fc);
  428. /* Find (or create) index into station table for destination station */
  429. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  430. sta_id = priv->hw_params.bcast_sta_id;
  431. else
  432. sta_id = iwl_get_sta_id(priv, hdr);
  433. if (sta_id == IWL_INVALID_STATION) {
  434. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  435. hdr->addr1);
  436. goto drop;
  437. }
  438. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  439. if (ieee80211_is_data_qos(fc)) {
  440. qc = ieee80211_get_qos_ctl(hdr);
  441. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  442. if (unlikely(tid >= MAX_TID_COUNT))
  443. goto drop;
  444. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  445. IEEE80211_SCTL_SEQ;
  446. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  447. (hdr->seq_ctrl &
  448. cpu_to_le16(IEEE80211_SCTL_FRAG));
  449. seq_number += 0x10;
  450. }
  451. /* Descriptor for chosen Tx queue */
  452. txq = &priv->txq[txq_id];
  453. q = &txq->q;
  454. if ((iwl_queue_space(q) < q->high_mark))
  455. goto drop;
  456. spin_lock_irqsave(&priv->lock, flags);
  457. idx = get_cmd_index(q, q->write_ptr, 0);
  458. /* Set up driver data for this TFD */
  459. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  460. txq->txb[q->write_ptr].skb[0] = skb;
  461. /* Init first empty entry in queue's array of Tx/cmd buffers */
  462. out_cmd = txq->cmd[idx];
  463. out_meta = &txq->meta[idx];
  464. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  465. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  466. memset(tx_cmd, 0, sizeof(*tx_cmd));
  467. /*
  468. * Set up the Tx-command (not MAC!) header.
  469. * Store the chosen Tx queue and TFD index within the sequence field;
  470. * after Tx, uCode's Tx response will return this value so driver can
  471. * locate the frame within the tx queue and do post-tx processing.
  472. */
  473. out_cmd->hdr.cmd = REPLY_TX;
  474. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  475. INDEX_TO_SEQ(q->write_ptr)));
  476. /* Copy MAC header from skb into command buffer */
  477. memcpy(tx_cmd->hdr, hdr, hdr_len);
  478. if (info->control.hw_key)
  479. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  480. /* TODO need this for burst mode later on */
  481. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  482. /* set is_hcca to 0; it probably will never be implemented */
  483. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  484. /* Total # bytes to be transmitted */
  485. len = (u16)skb->len;
  486. tx_cmd->len = cpu_to_le16(len);
  487. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  488. iwl_update_stats(priv, true, fc, len);
  489. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  490. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  491. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  492. txq->need_update = 1;
  493. if (qc)
  494. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  495. } else {
  496. wait_write_ptr = 1;
  497. txq->need_update = 0;
  498. }
  499. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  500. le16_to_cpu(out_cmd->hdr.sequence));
  501. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  502. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  503. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  504. ieee80211_hdrlen(fc));
  505. /*
  506. * Use the first empty entry in this queue's command buffer array
  507. * to contain the Tx command and MAC header concatenated together
  508. * (payload data will be in another buffer).
  509. * Size of this varies, due to varying MAC header length.
  510. * If end is not dword aligned, we'll have 2 extra bytes at the end
  511. * of the MAC header (device reads on dword boundaries).
  512. * We'll tell device about this padding later.
  513. */
  514. len = sizeof(struct iwl3945_tx_cmd) +
  515. sizeof(struct iwl_cmd_header) + hdr_len;
  516. len_org = len;
  517. len = (len + 3) & ~3;
  518. if (len_org != len)
  519. len_org = 1;
  520. else
  521. len_org = 0;
  522. /* Physical address of this Tx command's header (not MAC header!),
  523. * within command buffer array. */
  524. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  525. len, PCI_DMA_TODEVICE);
  526. /* we do not map meta data ... so we can safely access address to
  527. * provide to unmap command*/
  528. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  529. pci_unmap_len_set(out_meta, len, len);
  530. /* Add buffer containing Tx command and MAC(!) header to TFD's
  531. * first entry */
  532. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  533. txcmd_phys, len, 1, 0);
  534. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  535. * if any (802.11 null frames have no payload). */
  536. len = skb->len - hdr_len;
  537. if (len) {
  538. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  539. len, PCI_DMA_TODEVICE);
  540. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  541. phys_addr, len,
  542. 0, U32_PAD(len));
  543. }
  544. /* Tell device the write index *just past* this latest filled TFD */
  545. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  546. rc = iwl_txq_update_write_ptr(priv, txq);
  547. spin_unlock_irqrestore(&priv->lock, flags);
  548. if (rc)
  549. return rc;
  550. if ((iwl_queue_space(q) < q->high_mark)
  551. && priv->mac80211_registered) {
  552. if (wait_write_ptr) {
  553. spin_lock_irqsave(&priv->lock, flags);
  554. txq->need_update = 1;
  555. iwl_txq_update_write_ptr(priv, txq);
  556. spin_unlock_irqrestore(&priv->lock, flags);
  557. }
  558. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  559. }
  560. return 0;
  561. drop_unlock:
  562. spin_unlock_irqrestore(&priv->lock, flags);
  563. drop:
  564. return -1;
  565. }
  566. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  567. #include "iwl-spectrum.h"
  568. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  569. #define BEACON_TIME_MASK_HIGH 0xFF000000
  570. #define TIME_UNIT 1024
  571. /*
  572. * extended beacon time format
  573. * time in usec will be changed into a 32-bit value in 8:24 format
  574. * the high 1 byte is the beacon counts
  575. * the lower 3 bytes is the time in usec within one beacon interval
  576. */
  577. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  578. {
  579. u32 quot;
  580. u32 rem;
  581. u32 interval = beacon_interval * 1024;
  582. if (!interval || !usec)
  583. return 0;
  584. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  585. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  586. return (quot << 24) + rem;
  587. }
  588. /* base is usually what we get from ucode with each received frame,
  589. * the same as HW timer counter counting down
  590. */
  591. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  592. {
  593. u32 base_low = base & BEACON_TIME_MASK_LOW;
  594. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  595. u32 interval = beacon_interval * TIME_UNIT;
  596. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  597. (addon & BEACON_TIME_MASK_HIGH);
  598. if (base_low > addon_low)
  599. res += base_low - addon_low;
  600. else if (base_low < addon_low) {
  601. res += interval + base_low - addon_low;
  602. res += (1 << 24);
  603. } else
  604. res += (1 << 24);
  605. return cpu_to_le32(res);
  606. }
  607. static int iwl3945_get_measurement(struct iwl_priv *priv,
  608. struct ieee80211_measurement_params *params,
  609. u8 type)
  610. {
  611. struct iwl_spectrum_cmd spectrum;
  612. struct iwl_rx_packet *pkt;
  613. struct iwl_host_cmd cmd = {
  614. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  615. .data = (void *)&spectrum,
  616. .flags = CMD_WANT_SKB,
  617. };
  618. u32 add_time = le64_to_cpu(params->start_time);
  619. int rc;
  620. int spectrum_resp_status;
  621. int duration = le16_to_cpu(params->duration);
  622. if (iwl_is_associated(priv))
  623. add_time =
  624. iwl3945_usecs_to_beacons(
  625. le64_to_cpu(params->start_time) - priv->last_tsf,
  626. le16_to_cpu(priv->rxon_timing.beacon_interval));
  627. memset(&spectrum, 0, sizeof(spectrum));
  628. spectrum.channel_count = cpu_to_le16(1);
  629. spectrum.flags =
  630. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  631. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  632. cmd.len = sizeof(spectrum);
  633. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  634. if (iwl_is_associated(priv))
  635. spectrum.start_time =
  636. iwl3945_add_beacon_time(priv->last_beacon_time,
  637. add_time,
  638. le16_to_cpu(priv->rxon_timing.beacon_interval));
  639. else
  640. spectrum.start_time = 0;
  641. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  642. spectrum.channels[0].channel = params->channel;
  643. spectrum.channels[0].type = type;
  644. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  645. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  646. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  647. rc = iwl_send_cmd_sync(priv, &cmd);
  648. if (rc)
  649. return rc;
  650. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  651. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  652. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  653. rc = -EIO;
  654. }
  655. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  656. switch (spectrum_resp_status) {
  657. case 0: /* Command will be handled */
  658. if (pkt->u.spectrum.id != 0xff) {
  659. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  660. pkt->u.spectrum.id);
  661. priv->measurement_status &= ~MEASUREMENT_READY;
  662. }
  663. priv->measurement_status |= MEASUREMENT_ACTIVE;
  664. rc = 0;
  665. break;
  666. case 1: /* Command will not be handled */
  667. rc = -EAGAIN;
  668. break;
  669. }
  670. iwl_free_pages(priv, cmd.reply_page);
  671. return rc;
  672. }
  673. #endif
  674. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  675. struct iwl_rx_mem_buffer *rxb)
  676. {
  677. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  678. struct iwl_alive_resp *palive;
  679. struct delayed_work *pwork;
  680. palive = &pkt->u.alive_frame;
  681. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  682. "0x%01X 0x%01X\n",
  683. palive->is_valid, palive->ver_type,
  684. palive->ver_subtype);
  685. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  686. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  687. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  688. sizeof(struct iwl_alive_resp));
  689. pwork = &priv->init_alive_start;
  690. } else {
  691. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  692. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  693. sizeof(struct iwl_alive_resp));
  694. pwork = &priv->alive_start;
  695. iwl3945_disable_events(priv);
  696. }
  697. /* We delay the ALIVE response by 5ms to
  698. * give the HW RF Kill time to activate... */
  699. if (palive->is_valid == UCODE_VALID_OK)
  700. queue_delayed_work(priv->workqueue, pwork,
  701. msecs_to_jiffies(5));
  702. else
  703. IWL_WARN(priv, "uCode did not respond OK.\n");
  704. }
  705. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  706. struct iwl_rx_mem_buffer *rxb)
  707. {
  708. #ifdef CONFIG_IWLWIFI_DEBUG
  709. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  710. #endif
  711. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  712. return;
  713. }
  714. static void iwl3945_bg_beacon_update(struct work_struct *work)
  715. {
  716. struct iwl_priv *priv =
  717. container_of(work, struct iwl_priv, beacon_update);
  718. struct sk_buff *beacon;
  719. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  720. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  721. if (!beacon) {
  722. IWL_ERR(priv, "update beacon failed\n");
  723. return;
  724. }
  725. mutex_lock(&priv->mutex);
  726. /* new beacon skb is allocated every time; dispose previous.*/
  727. if (priv->ibss_beacon)
  728. dev_kfree_skb(priv->ibss_beacon);
  729. priv->ibss_beacon = beacon;
  730. mutex_unlock(&priv->mutex);
  731. iwl3945_send_beacon_cmd(priv);
  732. }
  733. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  734. struct iwl_rx_mem_buffer *rxb)
  735. {
  736. #ifdef CONFIG_IWLWIFI_DEBUG
  737. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  738. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  739. u8 rate = beacon->beacon_notify_hdr.rate;
  740. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  741. "tsf %d %d rate %d\n",
  742. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  743. beacon->beacon_notify_hdr.failure_frame,
  744. le32_to_cpu(beacon->ibss_mgr_status),
  745. le32_to_cpu(beacon->high_tsf),
  746. le32_to_cpu(beacon->low_tsf), rate);
  747. #endif
  748. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  749. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  750. queue_work(priv->workqueue, &priv->beacon_update);
  751. }
  752. /* Handle notification from uCode that card's power state is changing
  753. * due to software, hardware, or critical temperature RFKILL */
  754. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  755. struct iwl_rx_mem_buffer *rxb)
  756. {
  757. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  758. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  759. unsigned long status = priv->status;
  760. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  761. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  762. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  763. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  764. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  765. if (flags & HW_CARD_DISABLED)
  766. set_bit(STATUS_RF_KILL_HW, &priv->status);
  767. else
  768. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  769. iwl_scan_cancel(priv);
  770. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  771. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  772. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  773. test_bit(STATUS_RF_KILL_HW, &priv->status));
  774. else
  775. wake_up_interruptible(&priv->wait_command_queue);
  776. }
  777. /**
  778. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  779. *
  780. * Setup the RX handlers for each of the reply types sent from the uCode
  781. * to the host.
  782. *
  783. * This function chains into the hardware specific files for them to setup
  784. * any hardware specific handlers as well.
  785. */
  786. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  787. {
  788. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  789. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  790. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  791. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  792. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  793. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  794. iwl_rx_pm_debug_statistics_notif;
  795. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  796. /*
  797. * The same handler is used for both the REPLY to a discrete
  798. * statistics request from the host as well as for the periodic
  799. * statistics notifications (after received beacons) from the uCode.
  800. */
  801. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  802. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  803. iwl_setup_spectrum_handlers(priv);
  804. iwl_setup_rx_scan_handlers(priv);
  805. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  806. /* Set up hardware specific Rx handlers */
  807. iwl3945_hw_rx_handler_setup(priv);
  808. }
  809. /************************** RX-FUNCTIONS ****************************/
  810. /*
  811. * Rx theory of operation
  812. *
  813. * The host allocates 32 DMA target addresses and passes the host address
  814. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  815. * 0 to 31
  816. *
  817. * Rx Queue Indexes
  818. * The host/firmware share two index registers for managing the Rx buffers.
  819. *
  820. * The READ index maps to the first position that the firmware may be writing
  821. * to -- the driver can read up to (but not including) this position and get
  822. * good data.
  823. * The READ index is managed by the firmware once the card is enabled.
  824. *
  825. * The WRITE index maps to the last position the driver has read from -- the
  826. * position preceding WRITE is the last slot the firmware can place a packet.
  827. *
  828. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  829. * WRITE = READ.
  830. *
  831. * During initialization, the host sets up the READ queue position to the first
  832. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  833. *
  834. * When the firmware places a packet in a buffer, it will advance the READ index
  835. * and fire the RX interrupt. The driver can then query the READ index and
  836. * process as many packets as possible, moving the WRITE index forward as it
  837. * resets the Rx queue buffers with new memory.
  838. *
  839. * The management in the driver is as follows:
  840. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  841. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  842. * to replenish the iwl->rxq->rx_free.
  843. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  844. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  845. * 'processed' and 'read' driver indexes as well)
  846. * + A received packet is processed and handed to the kernel network stack,
  847. * detached from the iwl->rxq. The driver 'processed' index is updated.
  848. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  849. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  850. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  851. * were enough free buffers and RX_STALLED is set it is cleared.
  852. *
  853. *
  854. * Driver sequence:
  855. *
  856. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  857. * iwl3945_rx_queue_restock
  858. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  859. * queue, updates firmware pointers, and updates
  860. * the WRITE index. If insufficient rx_free buffers
  861. * are available, schedules iwl3945_rx_replenish
  862. *
  863. * -- enable interrupts --
  864. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  865. * READ INDEX, detaching the SKB from the pool.
  866. * Moves the packet buffer from queue to rx_used.
  867. * Calls iwl3945_rx_queue_restock to refill any empty
  868. * slots.
  869. * ...
  870. *
  871. */
  872. /**
  873. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  874. */
  875. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  876. dma_addr_t dma_addr)
  877. {
  878. return cpu_to_le32((u32)dma_addr);
  879. }
  880. /**
  881. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  882. *
  883. * If there are slots in the RX queue that need to be restocked,
  884. * and we have free pre-allocated buffers, fill the ranks as much
  885. * as we can, pulling from rx_free.
  886. *
  887. * This moves the 'write' index forward to catch up with 'processed', and
  888. * also updates the memory address in the firmware to reference the new
  889. * target buffer.
  890. */
  891. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  892. {
  893. struct iwl_rx_queue *rxq = &priv->rxq;
  894. struct list_head *element;
  895. struct iwl_rx_mem_buffer *rxb;
  896. unsigned long flags;
  897. int write, rc;
  898. spin_lock_irqsave(&rxq->lock, flags);
  899. write = rxq->write & ~0x7;
  900. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  901. /* Get next free Rx buffer, remove from free list */
  902. element = rxq->rx_free.next;
  903. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  904. list_del(element);
  905. /* Point to Rx buffer via next RBD in circular buffer */
  906. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  907. rxq->queue[rxq->write] = rxb;
  908. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  909. rxq->free_count--;
  910. }
  911. spin_unlock_irqrestore(&rxq->lock, flags);
  912. /* If the pre-allocated buffer pool is dropping low, schedule to
  913. * refill it */
  914. if (rxq->free_count <= RX_LOW_WATERMARK)
  915. queue_work(priv->workqueue, &priv->rx_replenish);
  916. /* If we've added more space for the firmware to place data, tell it.
  917. * Increment device's write pointer in multiples of 8. */
  918. if ((rxq->write_actual != (rxq->write & ~0x7))
  919. || (abs(rxq->write - rxq->read) > 7)) {
  920. spin_lock_irqsave(&rxq->lock, flags);
  921. rxq->need_update = 1;
  922. spin_unlock_irqrestore(&rxq->lock, flags);
  923. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  924. if (rc)
  925. return rc;
  926. }
  927. return 0;
  928. }
  929. /**
  930. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  931. *
  932. * When moving to rx_free an SKB is allocated for the slot.
  933. *
  934. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  935. * This is called as a scheduled work item (except for during initialization)
  936. */
  937. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  938. {
  939. struct iwl_rx_queue *rxq = &priv->rxq;
  940. struct list_head *element;
  941. struct iwl_rx_mem_buffer *rxb;
  942. struct page *page;
  943. unsigned long flags;
  944. gfp_t gfp_mask = priority;
  945. while (1) {
  946. spin_lock_irqsave(&rxq->lock, flags);
  947. if (list_empty(&rxq->rx_used)) {
  948. spin_unlock_irqrestore(&rxq->lock, flags);
  949. return;
  950. }
  951. spin_unlock_irqrestore(&rxq->lock, flags);
  952. if (rxq->free_count > RX_LOW_WATERMARK)
  953. gfp_mask |= __GFP_NOWARN;
  954. if (priv->hw_params.rx_page_order > 0)
  955. gfp_mask |= __GFP_COMP;
  956. /* Alloc a new receive buffer */
  957. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  958. if (!page) {
  959. if (net_ratelimit())
  960. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  961. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  962. net_ratelimit())
  963. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  964. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  965. rxq->free_count);
  966. /* We don't reschedule replenish work here -- we will
  967. * call the restock method and if it still needs
  968. * more buffers it will schedule replenish */
  969. break;
  970. }
  971. spin_lock_irqsave(&rxq->lock, flags);
  972. if (list_empty(&rxq->rx_used)) {
  973. spin_unlock_irqrestore(&rxq->lock, flags);
  974. __free_pages(page, priv->hw_params.rx_page_order);
  975. return;
  976. }
  977. element = rxq->rx_used.next;
  978. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  979. list_del(element);
  980. spin_unlock_irqrestore(&rxq->lock, flags);
  981. rxb->page = page;
  982. /* Get physical address of RB/SKB */
  983. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  984. PAGE_SIZE << priv->hw_params.rx_page_order,
  985. PCI_DMA_FROMDEVICE);
  986. spin_lock_irqsave(&rxq->lock, flags);
  987. list_add_tail(&rxb->list, &rxq->rx_free);
  988. rxq->free_count++;
  989. priv->alloc_rxb_page++;
  990. spin_unlock_irqrestore(&rxq->lock, flags);
  991. }
  992. }
  993. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  994. {
  995. unsigned long flags;
  996. int i;
  997. spin_lock_irqsave(&rxq->lock, flags);
  998. INIT_LIST_HEAD(&rxq->rx_free);
  999. INIT_LIST_HEAD(&rxq->rx_used);
  1000. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1001. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1002. /* In the reset function, these buffers may have been allocated
  1003. * to an SKB, so we need to unmap and free potential storage */
  1004. if (rxq->pool[i].page != NULL) {
  1005. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1006. PAGE_SIZE << priv->hw_params.rx_page_order,
  1007. PCI_DMA_FROMDEVICE);
  1008. __iwl_free_pages(priv, rxq->pool[i].page);
  1009. rxq->pool[i].page = NULL;
  1010. }
  1011. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1012. }
  1013. /* Set us so that we have processed and used all buffers, but have
  1014. * not restocked the Rx queue with fresh buffers */
  1015. rxq->read = rxq->write = 0;
  1016. rxq->write_actual = 0;
  1017. rxq->free_count = 0;
  1018. spin_unlock_irqrestore(&rxq->lock, flags);
  1019. }
  1020. void iwl3945_rx_replenish(void *data)
  1021. {
  1022. struct iwl_priv *priv = data;
  1023. unsigned long flags;
  1024. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1025. spin_lock_irqsave(&priv->lock, flags);
  1026. iwl3945_rx_queue_restock(priv);
  1027. spin_unlock_irqrestore(&priv->lock, flags);
  1028. }
  1029. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1030. {
  1031. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1032. iwl3945_rx_queue_restock(priv);
  1033. }
  1034. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1035. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1036. * This free routine walks the list of POOL entries and if SKB is set to
  1037. * non NULL it is unmapped and freed
  1038. */
  1039. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1040. {
  1041. int i;
  1042. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1043. if (rxq->pool[i].page != NULL) {
  1044. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1045. PAGE_SIZE << priv->hw_params.rx_page_order,
  1046. PCI_DMA_FROMDEVICE);
  1047. __iwl_free_pages(priv, rxq->pool[i].page);
  1048. rxq->pool[i].page = NULL;
  1049. }
  1050. }
  1051. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1052. rxq->dma_addr);
  1053. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1054. rxq->rb_stts, rxq->rb_stts_dma);
  1055. rxq->bd = NULL;
  1056. rxq->rb_stts = NULL;
  1057. }
  1058. /* Convert linear signal-to-noise ratio into dB */
  1059. static u8 ratio2dB[100] = {
  1060. /* 0 1 2 3 4 5 6 7 8 9 */
  1061. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1062. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1063. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1064. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1065. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1066. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1067. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1068. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1069. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1070. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1071. };
  1072. /* Calculates a relative dB value from a ratio of linear
  1073. * (i.e. not dB) signal levels.
  1074. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1075. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1076. {
  1077. /* 1000:1 or higher just report as 60 dB */
  1078. if (sig_ratio >= 1000)
  1079. return 60;
  1080. /* 100:1 or higher, divide by 10 and use table,
  1081. * add 20 dB to make up for divide by 10 */
  1082. if (sig_ratio >= 100)
  1083. return 20 + (int)ratio2dB[sig_ratio/10];
  1084. /* We shouldn't see this */
  1085. if (sig_ratio < 1)
  1086. return 0;
  1087. /* Use table for ratios 1:1 - 99:1 */
  1088. return (int)ratio2dB[sig_ratio];
  1089. }
  1090. /**
  1091. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1092. *
  1093. * Uses the priv->rx_handlers callback function array to invoke
  1094. * the appropriate handlers, including command responses,
  1095. * frame-received notifications, and other notifications.
  1096. */
  1097. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1098. {
  1099. struct iwl_rx_mem_buffer *rxb;
  1100. struct iwl_rx_packet *pkt;
  1101. struct iwl_rx_queue *rxq = &priv->rxq;
  1102. u32 r, i;
  1103. int reclaim;
  1104. unsigned long flags;
  1105. u8 fill_rx = 0;
  1106. u32 count = 8;
  1107. int total_empty = 0;
  1108. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1109. * buffer that the driver may process (last buffer filled by ucode). */
  1110. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1111. i = rxq->read;
  1112. /* calculate total frames need to be restock after handling RX */
  1113. total_empty = r - rxq->write_actual;
  1114. if (total_empty < 0)
  1115. total_empty += RX_QUEUE_SIZE;
  1116. if (total_empty > (RX_QUEUE_SIZE / 2))
  1117. fill_rx = 1;
  1118. /* Rx interrupt, but nothing sent from uCode */
  1119. if (i == r)
  1120. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1121. while (i != r) {
  1122. rxb = rxq->queue[i];
  1123. /* If an RXB doesn't have a Rx queue slot associated with it,
  1124. * then a bug has been introduced in the queue refilling
  1125. * routines -- catch it here */
  1126. BUG_ON(rxb == NULL);
  1127. rxq->queue[i] = NULL;
  1128. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1129. PAGE_SIZE << priv->hw_params.rx_page_order,
  1130. PCI_DMA_FROMDEVICE);
  1131. pkt = rxb_addr(rxb);
  1132. trace_iwlwifi_dev_rx(priv, pkt,
  1133. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1134. /* Reclaim a command buffer only if this packet is a response
  1135. * to a (driver-originated) command.
  1136. * If the packet (e.g. Rx frame) originated from uCode,
  1137. * there is no command buffer to reclaim.
  1138. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1139. * but apparently a few don't get set; catch them here. */
  1140. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1141. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1142. (pkt->hdr.cmd != REPLY_TX);
  1143. /* Based on type of command response or notification,
  1144. * handle those that need handling via function in
  1145. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1146. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1147. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1148. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1149. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1150. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1151. } else {
  1152. /* No handling needed */
  1153. IWL_DEBUG_RX(priv,
  1154. "r %d i %d No handler needed for %s, 0x%02x\n",
  1155. r, i, get_cmd_string(pkt->hdr.cmd),
  1156. pkt->hdr.cmd);
  1157. }
  1158. /*
  1159. * XXX: After here, we should always check rxb->page
  1160. * against NULL before touching it or its virtual
  1161. * memory (pkt). Because some rx_handler might have
  1162. * already taken or freed the pages.
  1163. */
  1164. if (reclaim) {
  1165. /* Invoke any callbacks, transfer the buffer to caller,
  1166. * and fire off the (possibly) blocking iwl_send_cmd()
  1167. * as we reclaim the driver command queue */
  1168. if (rxb->page)
  1169. iwl_tx_cmd_complete(priv, rxb);
  1170. else
  1171. IWL_WARN(priv, "Claim null rxb?\n");
  1172. }
  1173. /* Reuse the page if possible. For notification packets and
  1174. * SKBs that fail to Rx correctly, add them back into the
  1175. * rx_free list for reuse later. */
  1176. spin_lock_irqsave(&rxq->lock, flags);
  1177. if (rxb->page != NULL) {
  1178. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1179. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1180. PCI_DMA_FROMDEVICE);
  1181. list_add_tail(&rxb->list, &rxq->rx_free);
  1182. rxq->free_count++;
  1183. } else
  1184. list_add_tail(&rxb->list, &rxq->rx_used);
  1185. spin_unlock_irqrestore(&rxq->lock, flags);
  1186. i = (i + 1) & RX_QUEUE_MASK;
  1187. /* If there are a lot of unused frames,
  1188. * restock the Rx queue so ucode won't assert. */
  1189. if (fill_rx) {
  1190. count++;
  1191. if (count >= 8) {
  1192. rxq->read = i;
  1193. iwl3945_rx_replenish_now(priv);
  1194. count = 0;
  1195. }
  1196. }
  1197. }
  1198. /* Backtrack one entry */
  1199. rxq->read = i;
  1200. if (fill_rx)
  1201. iwl3945_rx_replenish_now(priv);
  1202. else
  1203. iwl3945_rx_queue_restock(priv);
  1204. }
  1205. /* call this function to flush any scheduled tasklet */
  1206. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1207. {
  1208. /* wait to make sure we flush pending tasklet*/
  1209. synchronize_irq(priv->pci_dev->irq);
  1210. tasklet_kill(&priv->irq_tasklet);
  1211. }
  1212. static const char *desc_lookup(int i)
  1213. {
  1214. switch (i) {
  1215. case 1:
  1216. return "FAIL";
  1217. case 2:
  1218. return "BAD_PARAM";
  1219. case 3:
  1220. return "BAD_CHECKSUM";
  1221. case 4:
  1222. return "NMI_INTERRUPT";
  1223. case 5:
  1224. return "SYSASSERT";
  1225. case 6:
  1226. return "FATAL_ERROR";
  1227. }
  1228. return "UNKNOWN";
  1229. }
  1230. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1231. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1232. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1233. {
  1234. u32 i;
  1235. u32 desc, time, count, base, data1;
  1236. u32 blink1, blink2, ilink1, ilink2;
  1237. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1238. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1239. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1240. return;
  1241. }
  1242. count = iwl_read_targ_mem(priv, base);
  1243. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1244. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1245. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1246. priv->status, count);
  1247. }
  1248. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1249. "ilink1 nmiPC Line\n");
  1250. for (i = ERROR_START_OFFSET;
  1251. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1252. i += ERROR_ELEM_SIZE) {
  1253. desc = iwl_read_targ_mem(priv, base + i);
  1254. time =
  1255. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1256. blink1 =
  1257. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1258. blink2 =
  1259. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1260. ilink1 =
  1261. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1262. ilink2 =
  1263. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1264. data1 =
  1265. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1266. IWL_ERR(priv,
  1267. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1268. desc_lookup(desc), desc, time, blink1, blink2,
  1269. ilink1, ilink2, data1);
  1270. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1271. 0, blink1, blink2, ilink1, ilink2);
  1272. }
  1273. }
  1274. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1275. /**
  1276. * iwl3945_print_event_log - Dump error event log to syslog
  1277. *
  1278. */
  1279. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1280. u32 num_events, u32 mode)
  1281. {
  1282. u32 i;
  1283. u32 base; /* SRAM byte address of event log header */
  1284. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1285. u32 ptr; /* SRAM byte address of log data */
  1286. u32 ev, time, data; /* event log data */
  1287. unsigned long reg_flags;
  1288. if (num_events == 0)
  1289. return;
  1290. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1291. if (mode == 0)
  1292. event_size = 2 * sizeof(u32);
  1293. else
  1294. event_size = 3 * sizeof(u32);
  1295. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1296. /* Make sure device is powered up for SRAM reads */
  1297. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1298. iwl_grab_nic_access(priv);
  1299. /* Set starting address; reads will auto-increment */
  1300. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1301. rmb();
  1302. /* "time" is actually "data" for mode 0 (no timestamp).
  1303. * place event id # at far right for easier visual parsing. */
  1304. for (i = 0; i < num_events; i++) {
  1305. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1306. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1307. if (mode == 0) {
  1308. /* data, ev */
  1309. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1310. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1311. } else {
  1312. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1313. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1314. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1315. }
  1316. }
  1317. /* Allow device to power down */
  1318. iwl_release_nic_access(priv);
  1319. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1320. }
  1321. /**
  1322. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1323. */
  1324. static void iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1325. u32 num_wraps, u32 next_entry,
  1326. u32 size, u32 mode)
  1327. {
  1328. /*
  1329. * display the newest DEFAULT_LOG_ENTRIES entries
  1330. * i.e the entries just before the next ont that uCode would fill.
  1331. */
  1332. if (num_wraps) {
  1333. if (next_entry < size) {
  1334. iwl3945_print_event_log(priv,
  1335. capacity - (size - next_entry),
  1336. size - next_entry, mode);
  1337. iwl3945_print_event_log(priv, 0,
  1338. next_entry, mode);
  1339. } else
  1340. iwl3945_print_event_log(priv, next_entry - size,
  1341. size, mode);
  1342. } else {
  1343. if (next_entry < size)
  1344. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1345. else
  1346. iwl3945_print_event_log(priv, next_entry - size,
  1347. size, mode);
  1348. }
  1349. }
  1350. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1351. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1352. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1353. void iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
  1354. {
  1355. u32 base; /* SRAM byte address of event log header */
  1356. u32 capacity; /* event log capacity in # entries */
  1357. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1358. u32 num_wraps; /* # times uCode wrapped to top of log */
  1359. u32 next_entry; /* index of next entry to be written by uCode */
  1360. u32 size; /* # entries that we'll print */
  1361. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1362. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1363. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1364. return;
  1365. }
  1366. /* event log header */
  1367. capacity = iwl_read_targ_mem(priv, base);
  1368. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1369. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1370. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1371. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1372. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1373. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1374. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1375. }
  1376. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1377. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1378. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1379. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1380. }
  1381. size = num_wraps ? capacity : next_entry;
  1382. /* bail out if nothing in log */
  1383. if (size == 0) {
  1384. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1385. return;
  1386. }
  1387. #ifdef CONFIG_IWLWIFI_DEBUG
  1388. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1389. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1390. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1391. #else
  1392. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1393. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1394. #endif
  1395. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1396. size);
  1397. #ifdef CONFIG_IWLWIFI_DEBUG
  1398. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1399. /* if uCode has wrapped back to top of log,
  1400. * start at the oldest entry,
  1401. * i.e the next one that uCode would fill.
  1402. */
  1403. if (num_wraps)
  1404. iwl3945_print_event_log(priv, next_entry,
  1405. capacity - next_entry, mode);
  1406. /* (then/else) start at top of log */
  1407. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1408. } else
  1409. iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1410. next_entry, size, mode);
  1411. #else
  1412. iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1413. next_entry, size, mode);
  1414. #endif
  1415. }
  1416. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1417. {
  1418. u32 inta, handled = 0;
  1419. u32 inta_fh;
  1420. unsigned long flags;
  1421. #ifdef CONFIG_IWLWIFI_DEBUG
  1422. u32 inta_mask;
  1423. #endif
  1424. spin_lock_irqsave(&priv->lock, flags);
  1425. /* Ack/clear/reset pending uCode interrupts.
  1426. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1427. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1428. inta = iwl_read32(priv, CSR_INT);
  1429. iwl_write32(priv, CSR_INT, inta);
  1430. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1431. * Any new interrupts that happen after this, either while we're
  1432. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1433. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1434. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1435. #ifdef CONFIG_IWLWIFI_DEBUG
  1436. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1437. /* just for debug */
  1438. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1439. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1440. inta, inta_mask, inta_fh);
  1441. }
  1442. #endif
  1443. spin_unlock_irqrestore(&priv->lock, flags);
  1444. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1445. * atomic, make sure that inta covers all the interrupts that
  1446. * we've discovered, even if FH interrupt came in just after
  1447. * reading CSR_INT. */
  1448. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1449. inta |= CSR_INT_BIT_FH_RX;
  1450. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1451. inta |= CSR_INT_BIT_FH_TX;
  1452. /* Now service all interrupt bits discovered above. */
  1453. if (inta & CSR_INT_BIT_HW_ERR) {
  1454. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1455. /* Tell the device to stop sending interrupts */
  1456. iwl_disable_interrupts(priv);
  1457. priv->isr_stats.hw++;
  1458. iwl_irq_handle_error(priv);
  1459. handled |= CSR_INT_BIT_HW_ERR;
  1460. return;
  1461. }
  1462. #ifdef CONFIG_IWLWIFI_DEBUG
  1463. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1464. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1465. if (inta & CSR_INT_BIT_SCD) {
  1466. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1467. "the frame/frames.\n");
  1468. priv->isr_stats.sch++;
  1469. }
  1470. /* Alive notification via Rx interrupt will do the real work */
  1471. if (inta & CSR_INT_BIT_ALIVE) {
  1472. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1473. priv->isr_stats.alive++;
  1474. }
  1475. }
  1476. #endif
  1477. /* Safely ignore these bits for debug checks below */
  1478. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1479. /* Error detected by uCode */
  1480. if (inta & CSR_INT_BIT_SW_ERR) {
  1481. IWL_ERR(priv, "Microcode SW error detected. "
  1482. "Restarting 0x%X.\n", inta);
  1483. priv->isr_stats.sw++;
  1484. priv->isr_stats.sw_err = inta;
  1485. iwl_irq_handle_error(priv);
  1486. handled |= CSR_INT_BIT_SW_ERR;
  1487. }
  1488. /* uCode wakes up after power-down sleep */
  1489. if (inta & CSR_INT_BIT_WAKEUP) {
  1490. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1491. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1492. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1493. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1494. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1495. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1496. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1497. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1498. priv->isr_stats.wakeup++;
  1499. handled |= CSR_INT_BIT_WAKEUP;
  1500. }
  1501. /* All uCode command responses, including Tx command responses,
  1502. * Rx "responses" (frame-received notification), and other
  1503. * notifications from uCode come through here*/
  1504. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1505. iwl3945_rx_handle(priv);
  1506. priv->isr_stats.rx++;
  1507. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1508. }
  1509. if (inta & CSR_INT_BIT_FH_TX) {
  1510. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1511. priv->isr_stats.tx++;
  1512. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1513. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1514. (FH39_SRVC_CHNL), 0x0);
  1515. handled |= CSR_INT_BIT_FH_TX;
  1516. }
  1517. if (inta & ~handled) {
  1518. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1519. priv->isr_stats.unhandled++;
  1520. }
  1521. if (inta & ~priv->inta_mask) {
  1522. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1523. inta & ~priv->inta_mask);
  1524. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1525. }
  1526. /* Re-enable all interrupts */
  1527. /* only Re-enable if disabled by irq */
  1528. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1529. iwl_enable_interrupts(priv);
  1530. #ifdef CONFIG_IWLWIFI_DEBUG
  1531. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1532. inta = iwl_read32(priv, CSR_INT);
  1533. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1534. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1535. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1536. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1537. }
  1538. #endif
  1539. }
  1540. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1541. enum ieee80211_band band,
  1542. u8 is_active, u8 n_probes,
  1543. struct iwl3945_scan_channel *scan_ch)
  1544. {
  1545. struct ieee80211_channel *chan;
  1546. const struct ieee80211_supported_band *sband;
  1547. const struct iwl_channel_info *ch_info;
  1548. u16 passive_dwell = 0;
  1549. u16 active_dwell = 0;
  1550. int added, i;
  1551. sband = iwl_get_hw_mode(priv, band);
  1552. if (!sband)
  1553. return 0;
  1554. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1555. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1556. if (passive_dwell <= active_dwell)
  1557. passive_dwell = active_dwell + 1;
  1558. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1559. chan = priv->scan_request->channels[i];
  1560. if (chan->band != band)
  1561. continue;
  1562. scan_ch->channel = chan->hw_value;
  1563. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1564. if (!is_channel_valid(ch_info)) {
  1565. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1566. scan_ch->channel);
  1567. continue;
  1568. }
  1569. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1570. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1571. /* If passive , set up for auto-switch
  1572. * and use long active_dwell time.
  1573. */
  1574. if (!is_active || is_channel_passive(ch_info) ||
  1575. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1576. scan_ch->type = 0; /* passive */
  1577. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1578. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1579. } else {
  1580. scan_ch->type = 1; /* active */
  1581. }
  1582. /* Set direct probe bits. These may be used both for active
  1583. * scan channels (probes gets sent right away),
  1584. * or for passive channels (probes get se sent only after
  1585. * hearing clear Rx packet).*/
  1586. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1587. if (n_probes)
  1588. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1589. } else {
  1590. /* uCode v1 does not allow setting direct probe bits on
  1591. * passive channel. */
  1592. if ((scan_ch->type & 1) && n_probes)
  1593. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1594. }
  1595. /* Set txpower levels to defaults */
  1596. scan_ch->tpc.dsp_atten = 110;
  1597. /* scan_pwr_info->tpc.dsp_atten; */
  1598. /*scan_pwr_info->tpc.tx_gain; */
  1599. if (band == IEEE80211_BAND_5GHZ)
  1600. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1601. else {
  1602. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1603. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1604. * power level:
  1605. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1606. */
  1607. }
  1608. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1609. scan_ch->channel,
  1610. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1611. (scan_ch->type & 1) ?
  1612. active_dwell : passive_dwell);
  1613. scan_ch++;
  1614. added++;
  1615. }
  1616. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1617. return added;
  1618. }
  1619. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1620. struct ieee80211_rate *rates)
  1621. {
  1622. int i;
  1623. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1624. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1625. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1626. rates[i].hw_value_short = i;
  1627. rates[i].flags = 0;
  1628. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1629. /*
  1630. * If CCK != 1M then set short preamble rate flag.
  1631. */
  1632. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1633. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1634. }
  1635. }
  1636. }
  1637. /******************************************************************************
  1638. *
  1639. * uCode download functions
  1640. *
  1641. ******************************************************************************/
  1642. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1643. {
  1644. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1645. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1646. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1647. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1648. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1649. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1650. }
  1651. /**
  1652. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1653. * looking at all data.
  1654. */
  1655. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1656. {
  1657. u32 val;
  1658. u32 save_len = len;
  1659. int rc = 0;
  1660. u32 errcnt;
  1661. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1662. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1663. IWL39_RTC_INST_LOWER_BOUND);
  1664. errcnt = 0;
  1665. for (; len > 0; len -= sizeof(u32), image++) {
  1666. /* read data comes through single port, auto-incr addr */
  1667. /* NOTE: Use the debugless read so we don't flood kernel log
  1668. * if IWL_DL_IO is set */
  1669. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1670. if (val != le32_to_cpu(*image)) {
  1671. IWL_ERR(priv, "uCode INST section is invalid at "
  1672. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1673. save_len - len, val, le32_to_cpu(*image));
  1674. rc = -EIO;
  1675. errcnt++;
  1676. if (errcnt >= 20)
  1677. break;
  1678. }
  1679. }
  1680. if (!errcnt)
  1681. IWL_DEBUG_INFO(priv,
  1682. "ucode image in INSTRUCTION memory is good\n");
  1683. return rc;
  1684. }
  1685. /**
  1686. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1687. * using sample data 100 bytes apart. If these sample points are good,
  1688. * it's a pretty good bet that everything between them is good, too.
  1689. */
  1690. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1691. {
  1692. u32 val;
  1693. int rc = 0;
  1694. u32 errcnt = 0;
  1695. u32 i;
  1696. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1697. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1698. /* read data comes through single port, auto-incr addr */
  1699. /* NOTE: Use the debugless read so we don't flood kernel log
  1700. * if IWL_DL_IO is set */
  1701. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1702. i + IWL39_RTC_INST_LOWER_BOUND);
  1703. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1704. if (val != le32_to_cpu(*image)) {
  1705. #if 0 /* Enable this if you want to see details */
  1706. IWL_ERR(priv, "uCode INST section is invalid at "
  1707. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1708. i, val, *image);
  1709. #endif
  1710. rc = -EIO;
  1711. errcnt++;
  1712. if (errcnt >= 3)
  1713. break;
  1714. }
  1715. }
  1716. return rc;
  1717. }
  1718. /**
  1719. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1720. * and verify its contents
  1721. */
  1722. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1723. {
  1724. __le32 *image;
  1725. u32 len;
  1726. int rc = 0;
  1727. /* Try bootstrap */
  1728. image = (__le32 *)priv->ucode_boot.v_addr;
  1729. len = priv->ucode_boot.len;
  1730. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1731. if (rc == 0) {
  1732. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1733. return 0;
  1734. }
  1735. /* Try initialize */
  1736. image = (__le32 *)priv->ucode_init.v_addr;
  1737. len = priv->ucode_init.len;
  1738. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1739. if (rc == 0) {
  1740. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1741. return 0;
  1742. }
  1743. /* Try runtime/protocol */
  1744. image = (__le32 *)priv->ucode_code.v_addr;
  1745. len = priv->ucode_code.len;
  1746. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1747. if (rc == 0) {
  1748. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1749. return 0;
  1750. }
  1751. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1752. /* Since nothing seems to match, show first several data entries in
  1753. * instruction SRAM, so maybe visual inspection will give a clue.
  1754. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1755. image = (__le32 *)priv->ucode_boot.v_addr;
  1756. len = priv->ucode_boot.len;
  1757. rc = iwl3945_verify_inst_full(priv, image, len);
  1758. return rc;
  1759. }
  1760. static void iwl3945_nic_start(struct iwl_priv *priv)
  1761. {
  1762. /* Remove all resets to allow NIC to operate */
  1763. iwl_write32(priv, CSR_RESET, 0);
  1764. }
  1765. /**
  1766. * iwl3945_read_ucode - Read uCode images from disk file.
  1767. *
  1768. * Copy into buffers for card to fetch via bus-mastering
  1769. */
  1770. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1771. {
  1772. const struct iwl_ucode_header *ucode;
  1773. int ret = -EINVAL, index;
  1774. const struct firmware *ucode_raw;
  1775. /* firmware file name contains uCode/driver compatibility version */
  1776. const char *name_pre = priv->cfg->fw_name_pre;
  1777. const unsigned int api_max = priv->cfg->ucode_api_max;
  1778. const unsigned int api_min = priv->cfg->ucode_api_min;
  1779. char buf[25];
  1780. u8 *src;
  1781. size_t len;
  1782. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1783. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1784. * request_firmware() is synchronous, file is in memory on return. */
  1785. for (index = api_max; index >= api_min; index--) {
  1786. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1787. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1788. if (ret < 0) {
  1789. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1790. buf, ret);
  1791. if (ret == -ENOENT)
  1792. continue;
  1793. else
  1794. goto error;
  1795. } else {
  1796. if (index < api_max)
  1797. IWL_ERR(priv, "Loaded firmware %s, "
  1798. "which is deprecated. "
  1799. " Please use API v%u instead.\n",
  1800. buf, api_max);
  1801. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1802. "(%zd bytes) from disk\n",
  1803. buf, ucode_raw->size);
  1804. break;
  1805. }
  1806. }
  1807. if (ret < 0)
  1808. goto error;
  1809. /* Make sure that we got at least our header! */
  1810. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1811. IWL_ERR(priv, "File size way too small!\n");
  1812. ret = -EINVAL;
  1813. goto err_release;
  1814. }
  1815. /* Data from ucode file: header followed by uCode images */
  1816. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1817. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1818. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1819. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1820. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1821. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1822. init_data_size =
  1823. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1824. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1825. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1826. /* api_ver should match the api version forming part of the
  1827. * firmware filename ... but we don't check for that and only rely
  1828. * on the API version read from firmware header from here on forward */
  1829. if (api_ver < api_min || api_ver > api_max) {
  1830. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1831. "Driver supports v%u, firmware is v%u.\n",
  1832. api_max, api_ver);
  1833. priv->ucode_ver = 0;
  1834. ret = -EINVAL;
  1835. goto err_release;
  1836. }
  1837. if (api_ver != api_max)
  1838. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1839. "got %u. New firmware can be obtained "
  1840. "from http://www.intellinuxwireless.org.\n",
  1841. api_max, api_ver);
  1842. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1843. IWL_UCODE_MAJOR(priv->ucode_ver),
  1844. IWL_UCODE_MINOR(priv->ucode_ver),
  1845. IWL_UCODE_API(priv->ucode_ver),
  1846. IWL_UCODE_SERIAL(priv->ucode_ver));
  1847. snprintf(priv->hw->wiphy->fw_version,
  1848. sizeof(priv->hw->wiphy->fw_version),
  1849. "%u.%u.%u.%u",
  1850. IWL_UCODE_MAJOR(priv->ucode_ver),
  1851. IWL_UCODE_MINOR(priv->ucode_ver),
  1852. IWL_UCODE_API(priv->ucode_ver),
  1853. IWL_UCODE_SERIAL(priv->ucode_ver));
  1854. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1855. priv->ucode_ver);
  1856. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1857. inst_size);
  1858. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1859. data_size);
  1860. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1861. init_size);
  1862. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1863. init_data_size);
  1864. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1865. boot_size);
  1866. /* Verify size of file vs. image size info in file's header */
  1867. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1868. inst_size + data_size + init_size +
  1869. init_data_size + boot_size) {
  1870. IWL_DEBUG_INFO(priv,
  1871. "uCode file size %zd does not match expected size\n",
  1872. ucode_raw->size);
  1873. ret = -EINVAL;
  1874. goto err_release;
  1875. }
  1876. /* Verify that uCode images will fit in card's SRAM */
  1877. if (inst_size > IWL39_MAX_INST_SIZE) {
  1878. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1879. inst_size);
  1880. ret = -EINVAL;
  1881. goto err_release;
  1882. }
  1883. if (data_size > IWL39_MAX_DATA_SIZE) {
  1884. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1885. data_size);
  1886. ret = -EINVAL;
  1887. goto err_release;
  1888. }
  1889. if (init_size > IWL39_MAX_INST_SIZE) {
  1890. IWL_DEBUG_INFO(priv,
  1891. "uCode init instr len %d too large to fit in\n",
  1892. init_size);
  1893. ret = -EINVAL;
  1894. goto err_release;
  1895. }
  1896. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1897. IWL_DEBUG_INFO(priv,
  1898. "uCode init data len %d too large to fit in\n",
  1899. init_data_size);
  1900. ret = -EINVAL;
  1901. goto err_release;
  1902. }
  1903. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1904. IWL_DEBUG_INFO(priv,
  1905. "uCode boot instr len %d too large to fit in\n",
  1906. boot_size);
  1907. ret = -EINVAL;
  1908. goto err_release;
  1909. }
  1910. /* Allocate ucode buffers for card's bus-master loading ... */
  1911. /* Runtime instructions and 2 copies of data:
  1912. * 1) unmodified from disk
  1913. * 2) backup cache for save/restore during power-downs */
  1914. priv->ucode_code.len = inst_size;
  1915. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1916. priv->ucode_data.len = data_size;
  1917. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1918. priv->ucode_data_backup.len = data_size;
  1919. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1920. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1921. !priv->ucode_data_backup.v_addr)
  1922. goto err_pci_alloc;
  1923. /* Initialization instructions and data */
  1924. if (init_size && init_data_size) {
  1925. priv->ucode_init.len = init_size;
  1926. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1927. priv->ucode_init_data.len = init_data_size;
  1928. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1929. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1930. goto err_pci_alloc;
  1931. }
  1932. /* Bootstrap (instructions only, no data) */
  1933. if (boot_size) {
  1934. priv->ucode_boot.len = boot_size;
  1935. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1936. if (!priv->ucode_boot.v_addr)
  1937. goto err_pci_alloc;
  1938. }
  1939. /* Copy images into buffers for card's bus-master reads ... */
  1940. /* Runtime instructions (first block of data in file) */
  1941. len = inst_size;
  1942. IWL_DEBUG_INFO(priv,
  1943. "Copying (but not loading) uCode instr len %zd\n", len);
  1944. memcpy(priv->ucode_code.v_addr, src, len);
  1945. src += len;
  1946. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1947. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1948. /* Runtime data (2nd block)
  1949. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1950. len = data_size;
  1951. IWL_DEBUG_INFO(priv,
  1952. "Copying (but not loading) uCode data len %zd\n", len);
  1953. memcpy(priv->ucode_data.v_addr, src, len);
  1954. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1955. src += len;
  1956. /* Initialization instructions (3rd block) */
  1957. if (init_size) {
  1958. len = init_size;
  1959. IWL_DEBUG_INFO(priv,
  1960. "Copying (but not loading) init instr len %zd\n", len);
  1961. memcpy(priv->ucode_init.v_addr, src, len);
  1962. src += len;
  1963. }
  1964. /* Initialization data (4th block) */
  1965. if (init_data_size) {
  1966. len = init_data_size;
  1967. IWL_DEBUG_INFO(priv,
  1968. "Copying (but not loading) init data len %zd\n", len);
  1969. memcpy(priv->ucode_init_data.v_addr, src, len);
  1970. src += len;
  1971. }
  1972. /* Bootstrap instructions (5th block) */
  1973. len = boot_size;
  1974. IWL_DEBUG_INFO(priv,
  1975. "Copying (but not loading) boot instr len %zd\n", len);
  1976. memcpy(priv->ucode_boot.v_addr, src, len);
  1977. /* We have our copies now, allow OS release its copies */
  1978. release_firmware(ucode_raw);
  1979. return 0;
  1980. err_pci_alloc:
  1981. IWL_ERR(priv, "failed to allocate pci memory\n");
  1982. ret = -ENOMEM;
  1983. iwl3945_dealloc_ucode_pci(priv);
  1984. err_release:
  1985. release_firmware(ucode_raw);
  1986. error:
  1987. return ret;
  1988. }
  1989. /**
  1990. * iwl3945_set_ucode_ptrs - Set uCode address location
  1991. *
  1992. * Tell initialization uCode where to find runtime uCode.
  1993. *
  1994. * BSM registers initially contain pointers to initialization uCode.
  1995. * We need to replace them to load runtime uCode inst and data,
  1996. * and to save runtime data when powering down.
  1997. */
  1998. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1999. {
  2000. dma_addr_t pinst;
  2001. dma_addr_t pdata;
  2002. /* bits 31:0 for 3945 */
  2003. pinst = priv->ucode_code.p_addr;
  2004. pdata = priv->ucode_data_backup.p_addr;
  2005. /* Tell bootstrap uCode where to find image to load */
  2006. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2007. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2008. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2009. priv->ucode_data.len);
  2010. /* Inst byte count must be last to set up, bit 31 signals uCode
  2011. * that all new ptr/size info is in place */
  2012. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2013. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2014. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2015. return 0;
  2016. }
  2017. /**
  2018. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2019. *
  2020. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2021. *
  2022. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2023. */
  2024. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2025. {
  2026. /* Check alive response for "valid" sign from uCode */
  2027. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2028. /* We had an error bringing up the hardware, so take it
  2029. * all the way back down so we can try again */
  2030. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2031. goto restart;
  2032. }
  2033. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2034. * This is a paranoid check, because we would not have gotten the
  2035. * "initialize" alive if code weren't properly loaded. */
  2036. if (iwl3945_verify_ucode(priv)) {
  2037. /* Runtime instruction load was bad;
  2038. * take it all the way back down so we can try again */
  2039. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2040. goto restart;
  2041. }
  2042. /* Send pointers to protocol/runtime uCode image ... init code will
  2043. * load and launch runtime uCode, which will send us another "Alive"
  2044. * notification. */
  2045. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2046. if (iwl3945_set_ucode_ptrs(priv)) {
  2047. /* Runtime instruction load won't happen;
  2048. * take it all the way back down so we can try again */
  2049. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2050. goto restart;
  2051. }
  2052. return;
  2053. restart:
  2054. queue_work(priv->workqueue, &priv->restart);
  2055. }
  2056. /**
  2057. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2058. * from protocol/runtime uCode (initialization uCode's
  2059. * Alive gets handled by iwl3945_init_alive_start()).
  2060. */
  2061. static void iwl3945_alive_start(struct iwl_priv *priv)
  2062. {
  2063. int thermal_spin = 0;
  2064. u32 rfkill;
  2065. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2066. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2067. /* We had an error bringing up the hardware, so take it
  2068. * all the way back down so we can try again */
  2069. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2070. goto restart;
  2071. }
  2072. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2073. * This is a paranoid check, because we would not have gotten the
  2074. * "runtime" alive if code weren't properly loaded. */
  2075. if (iwl3945_verify_ucode(priv)) {
  2076. /* Runtime instruction load was bad;
  2077. * take it all the way back down so we can try again */
  2078. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2079. goto restart;
  2080. }
  2081. iwl_clear_stations_table(priv);
  2082. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2083. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2084. if (rfkill & 0x1) {
  2085. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2086. /* if RFKILL is not on, then wait for thermal
  2087. * sensor in adapter to kick in */
  2088. while (iwl3945_hw_get_temperature(priv) == 0) {
  2089. thermal_spin++;
  2090. udelay(10);
  2091. }
  2092. if (thermal_spin)
  2093. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2094. thermal_spin * 10);
  2095. } else
  2096. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2097. /* After the ALIVE response, we can send commands to 3945 uCode */
  2098. set_bit(STATUS_ALIVE, &priv->status);
  2099. if (iwl_is_rfkill(priv))
  2100. return;
  2101. ieee80211_wake_queues(priv->hw);
  2102. priv->active_rate = priv->rates_mask;
  2103. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2104. iwl_power_update_mode(priv, true);
  2105. if (iwl_is_associated(priv)) {
  2106. struct iwl3945_rxon_cmd *active_rxon =
  2107. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2108. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2109. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2110. } else {
  2111. /* Initialize our rx_config data */
  2112. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2113. }
  2114. /* Configure Bluetooth device coexistence support */
  2115. iwl_send_bt_config(priv);
  2116. /* Configure the adapter for unassociated operation */
  2117. iwlcore_commit_rxon(priv);
  2118. iwl3945_reg_txpower_periodic(priv);
  2119. iwl_leds_init(priv);
  2120. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2121. set_bit(STATUS_READY, &priv->status);
  2122. wake_up_interruptible(&priv->wait_command_queue);
  2123. /* reassociate for ADHOC mode */
  2124. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2125. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2126. priv->vif);
  2127. if (beacon)
  2128. iwl_mac_beacon_update(priv->hw, beacon);
  2129. }
  2130. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2131. iwl_set_mode(priv, priv->iw_mode);
  2132. return;
  2133. restart:
  2134. queue_work(priv->workqueue, &priv->restart);
  2135. }
  2136. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2137. static void __iwl3945_down(struct iwl_priv *priv)
  2138. {
  2139. unsigned long flags;
  2140. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2141. struct ieee80211_conf *conf = NULL;
  2142. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2143. conf = ieee80211_get_hw_conf(priv->hw);
  2144. if (!exit_pending)
  2145. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2146. iwl_clear_stations_table(priv);
  2147. /* Unblock any waiting calls */
  2148. wake_up_interruptible_all(&priv->wait_command_queue);
  2149. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2150. * exiting the module */
  2151. if (!exit_pending)
  2152. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2153. /* stop and reset the on-board processor */
  2154. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2155. /* tell the device to stop sending interrupts */
  2156. spin_lock_irqsave(&priv->lock, flags);
  2157. iwl_disable_interrupts(priv);
  2158. spin_unlock_irqrestore(&priv->lock, flags);
  2159. iwl_synchronize_irq(priv);
  2160. if (priv->mac80211_registered)
  2161. ieee80211_stop_queues(priv->hw);
  2162. /* If we have not previously called iwl3945_init() then
  2163. * clear all bits but the RF Kill bits and return */
  2164. if (!iwl_is_init(priv)) {
  2165. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2166. STATUS_RF_KILL_HW |
  2167. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2168. STATUS_GEO_CONFIGURED |
  2169. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2170. STATUS_EXIT_PENDING;
  2171. goto exit;
  2172. }
  2173. /* ...otherwise clear out all the status bits but the RF Kill
  2174. * bit and continue taking the NIC down. */
  2175. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2176. STATUS_RF_KILL_HW |
  2177. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2178. STATUS_GEO_CONFIGURED |
  2179. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2180. STATUS_FW_ERROR |
  2181. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2182. STATUS_EXIT_PENDING;
  2183. iwl3945_hw_txq_ctx_stop(priv);
  2184. iwl3945_hw_rxq_stop(priv);
  2185. /* Power-down device's busmaster DMA clocks */
  2186. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2187. udelay(5);
  2188. /* Stop the device, and put it in low power state */
  2189. priv->cfg->ops->lib->apm_ops.stop(priv);
  2190. exit:
  2191. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2192. if (priv->ibss_beacon)
  2193. dev_kfree_skb(priv->ibss_beacon);
  2194. priv->ibss_beacon = NULL;
  2195. /* clear out any free frames */
  2196. iwl3945_clear_free_frames(priv);
  2197. }
  2198. static void iwl3945_down(struct iwl_priv *priv)
  2199. {
  2200. mutex_lock(&priv->mutex);
  2201. __iwl3945_down(priv);
  2202. mutex_unlock(&priv->mutex);
  2203. iwl3945_cancel_deferred_work(priv);
  2204. }
  2205. #define MAX_HW_RESTARTS 5
  2206. static int __iwl3945_up(struct iwl_priv *priv)
  2207. {
  2208. int rc, i;
  2209. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2210. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2211. return -EIO;
  2212. }
  2213. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2214. IWL_ERR(priv, "ucode not available for device bring up\n");
  2215. return -EIO;
  2216. }
  2217. /* If platform's RF_KILL switch is NOT set to KILL */
  2218. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2219. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2220. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2221. else {
  2222. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2223. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2224. return -ENODEV;
  2225. }
  2226. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2227. rc = iwl3945_hw_nic_init(priv);
  2228. if (rc) {
  2229. IWL_ERR(priv, "Unable to int nic\n");
  2230. return rc;
  2231. }
  2232. /* make sure rfkill handshake bits are cleared */
  2233. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2234. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2235. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2236. /* clear (again), then enable host interrupts */
  2237. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2238. iwl_enable_interrupts(priv);
  2239. /* really make sure rfkill handshake bits are cleared */
  2240. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2241. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2242. /* Copy original ucode data image from disk into backup cache.
  2243. * This will be used to initialize the on-board processor's
  2244. * data SRAM for a clean start when the runtime program first loads. */
  2245. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2246. priv->ucode_data.len);
  2247. /* We return success when we resume from suspend and rf_kill is on. */
  2248. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2249. return 0;
  2250. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2251. iwl_clear_stations_table(priv);
  2252. /* load bootstrap state machine,
  2253. * load bootstrap program into processor's memory,
  2254. * prepare to load the "initialize" uCode */
  2255. priv->cfg->ops->lib->load_ucode(priv);
  2256. if (rc) {
  2257. IWL_ERR(priv,
  2258. "Unable to set up bootstrap uCode: %d\n", rc);
  2259. continue;
  2260. }
  2261. /* start card; "initialize" will load runtime ucode */
  2262. iwl3945_nic_start(priv);
  2263. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2264. return 0;
  2265. }
  2266. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2267. __iwl3945_down(priv);
  2268. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2269. /* tried to restart and config the device for as long as our
  2270. * patience could withstand */
  2271. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2272. return -EIO;
  2273. }
  2274. /*****************************************************************************
  2275. *
  2276. * Workqueue callbacks
  2277. *
  2278. *****************************************************************************/
  2279. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2280. {
  2281. struct iwl_priv *priv =
  2282. container_of(data, struct iwl_priv, init_alive_start.work);
  2283. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2284. return;
  2285. mutex_lock(&priv->mutex);
  2286. iwl3945_init_alive_start(priv);
  2287. mutex_unlock(&priv->mutex);
  2288. }
  2289. static void iwl3945_bg_alive_start(struct work_struct *data)
  2290. {
  2291. struct iwl_priv *priv =
  2292. container_of(data, struct iwl_priv, alive_start.work);
  2293. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2294. return;
  2295. mutex_lock(&priv->mutex);
  2296. iwl3945_alive_start(priv);
  2297. mutex_unlock(&priv->mutex);
  2298. }
  2299. /*
  2300. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2301. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2302. * *is* readable even when device has been SW_RESET into low power mode
  2303. * (e.g. during RF KILL).
  2304. */
  2305. static void iwl3945_rfkill_poll(struct work_struct *data)
  2306. {
  2307. struct iwl_priv *priv =
  2308. container_of(data, struct iwl_priv, rfkill_poll.work);
  2309. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2310. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2311. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2312. if (new_rfkill != old_rfkill) {
  2313. if (new_rfkill)
  2314. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2315. else
  2316. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2317. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2318. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2319. new_rfkill ? "disable radio" : "enable radio");
  2320. }
  2321. /* Keep this running, even if radio now enabled. This will be
  2322. * cancelled in mac_start() if system decides to start again */
  2323. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2324. round_jiffies_relative(2 * HZ));
  2325. }
  2326. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2327. static void iwl3945_bg_request_scan(struct work_struct *data)
  2328. {
  2329. struct iwl_priv *priv =
  2330. container_of(data, struct iwl_priv, request_scan);
  2331. struct iwl_host_cmd cmd = {
  2332. .id = REPLY_SCAN_CMD,
  2333. .len = sizeof(struct iwl3945_scan_cmd),
  2334. .flags = CMD_SIZE_HUGE,
  2335. };
  2336. int rc = 0;
  2337. struct iwl3945_scan_cmd *scan;
  2338. struct ieee80211_conf *conf = NULL;
  2339. u8 n_probes = 0;
  2340. enum ieee80211_band band;
  2341. bool is_active = false;
  2342. conf = ieee80211_get_hw_conf(priv->hw);
  2343. mutex_lock(&priv->mutex);
  2344. cancel_delayed_work(&priv->scan_check);
  2345. if (!iwl_is_ready(priv)) {
  2346. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2347. goto done;
  2348. }
  2349. /* Make sure the scan wasn't canceled before this queued work
  2350. * was given the chance to run... */
  2351. if (!test_bit(STATUS_SCANNING, &priv->status))
  2352. goto done;
  2353. /* This should never be called or scheduled if there is currently
  2354. * a scan active in the hardware. */
  2355. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2356. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2357. "Ignoring second request.\n");
  2358. rc = -EIO;
  2359. goto done;
  2360. }
  2361. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2362. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2363. goto done;
  2364. }
  2365. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2366. IWL_DEBUG_HC(priv,
  2367. "Scan request while abort pending. Queuing.\n");
  2368. goto done;
  2369. }
  2370. if (iwl_is_rfkill(priv)) {
  2371. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2372. goto done;
  2373. }
  2374. if (!test_bit(STATUS_READY, &priv->status)) {
  2375. IWL_DEBUG_HC(priv,
  2376. "Scan request while uninitialized. Queuing.\n");
  2377. goto done;
  2378. }
  2379. if (!priv->scan_bands) {
  2380. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2381. goto done;
  2382. }
  2383. if (!priv->scan) {
  2384. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2385. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2386. if (!priv->scan) {
  2387. rc = -ENOMEM;
  2388. goto done;
  2389. }
  2390. }
  2391. scan = priv->scan;
  2392. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2393. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2394. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2395. if (iwl_is_associated(priv)) {
  2396. u16 interval = 0;
  2397. u32 extra;
  2398. u32 suspend_time = 100;
  2399. u32 scan_suspend_time = 100;
  2400. unsigned long flags;
  2401. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2402. spin_lock_irqsave(&priv->lock, flags);
  2403. interval = priv->beacon_int;
  2404. spin_unlock_irqrestore(&priv->lock, flags);
  2405. scan->suspend_time = 0;
  2406. scan->max_out_time = cpu_to_le32(200 * 1024);
  2407. if (!interval)
  2408. interval = suspend_time;
  2409. /*
  2410. * suspend time format:
  2411. * 0-19: beacon interval in usec (time before exec.)
  2412. * 20-23: 0
  2413. * 24-31: number of beacons (suspend between channels)
  2414. */
  2415. extra = (suspend_time / interval) << 24;
  2416. scan_suspend_time = 0xFF0FFFFF &
  2417. (extra | ((suspend_time % interval) * 1024));
  2418. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2419. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2420. scan_suspend_time, interval);
  2421. }
  2422. if (priv->scan_request->n_ssids) {
  2423. int i, p = 0;
  2424. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2425. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2426. /* always does wildcard anyway */
  2427. if (!priv->scan_request->ssids[i].ssid_len)
  2428. continue;
  2429. scan->direct_scan[p].id = WLAN_EID_SSID;
  2430. scan->direct_scan[p].len =
  2431. priv->scan_request->ssids[i].ssid_len;
  2432. memcpy(scan->direct_scan[p].ssid,
  2433. priv->scan_request->ssids[i].ssid,
  2434. priv->scan_request->ssids[i].ssid_len);
  2435. n_probes++;
  2436. p++;
  2437. }
  2438. is_active = true;
  2439. } else
  2440. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2441. /* We don't build a direct scan probe request; the uCode will do
  2442. * that based on the direct_mask added to each channel entry */
  2443. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2444. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2445. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2446. /* flags + rate selection */
  2447. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2448. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2449. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2450. scan->good_CRC_th = 0;
  2451. band = IEEE80211_BAND_2GHZ;
  2452. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2453. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2454. /*
  2455. * If active scaning is requested but a certain channel
  2456. * is marked passive, we can do active scanning if we
  2457. * detect transmissions.
  2458. */
  2459. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2460. band = IEEE80211_BAND_5GHZ;
  2461. } else {
  2462. IWL_WARN(priv, "Invalid scan band count\n");
  2463. goto done;
  2464. }
  2465. scan->tx_cmd.len = cpu_to_le16(
  2466. iwl_fill_probe_req(priv,
  2467. (struct ieee80211_mgmt *)scan->data,
  2468. priv->scan_request->ie,
  2469. priv->scan_request->ie_len,
  2470. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2471. /* select Rx antennas */
  2472. scan->flags |= iwl3945_get_antenna_flags(priv);
  2473. if (iwl_is_monitor_mode(priv))
  2474. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2475. scan->channel_count =
  2476. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2477. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2478. if (scan->channel_count == 0) {
  2479. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2480. goto done;
  2481. }
  2482. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2483. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2484. cmd.data = scan;
  2485. scan->len = cpu_to_le16(cmd.len);
  2486. set_bit(STATUS_SCAN_HW, &priv->status);
  2487. rc = iwl_send_cmd_sync(priv, &cmd);
  2488. if (rc)
  2489. goto done;
  2490. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2491. IWL_SCAN_CHECK_WATCHDOG);
  2492. mutex_unlock(&priv->mutex);
  2493. return;
  2494. done:
  2495. /* can not perform scan make sure we clear scanning
  2496. * bits from status so next scan request can be performed.
  2497. * if we dont clear scanning status bit here all next scan
  2498. * will fail
  2499. */
  2500. clear_bit(STATUS_SCAN_HW, &priv->status);
  2501. clear_bit(STATUS_SCANNING, &priv->status);
  2502. /* inform mac80211 scan aborted */
  2503. queue_work(priv->workqueue, &priv->scan_completed);
  2504. mutex_unlock(&priv->mutex);
  2505. }
  2506. static void iwl3945_bg_up(struct work_struct *data)
  2507. {
  2508. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2509. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2510. return;
  2511. mutex_lock(&priv->mutex);
  2512. __iwl3945_up(priv);
  2513. mutex_unlock(&priv->mutex);
  2514. }
  2515. static void iwl3945_bg_restart(struct work_struct *data)
  2516. {
  2517. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2518. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2519. return;
  2520. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2521. mutex_lock(&priv->mutex);
  2522. priv->vif = NULL;
  2523. priv->is_open = 0;
  2524. mutex_unlock(&priv->mutex);
  2525. iwl3945_down(priv);
  2526. ieee80211_restart_hw(priv->hw);
  2527. } else {
  2528. iwl3945_down(priv);
  2529. queue_work(priv->workqueue, &priv->up);
  2530. }
  2531. }
  2532. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2533. {
  2534. struct iwl_priv *priv =
  2535. container_of(data, struct iwl_priv, rx_replenish);
  2536. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2537. return;
  2538. mutex_lock(&priv->mutex);
  2539. iwl3945_rx_replenish(priv);
  2540. mutex_unlock(&priv->mutex);
  2541. }
  2542. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2543. void iwl3945_post_associate(struct iwl_priv *priv)
  2544. {
  2545. int rc = 0;
  2546. struct ieee80211_conf *conf = NULL;
  2547. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2548. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2549. return;
  2550. }
  2551. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2552. priv->assoc_id, priv->active_rxon.bssid_addr);
  2553. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2554. return;
  2555. if (!priv->vif || !priv->is_open)
  2556. return;
  2557. iwl_scan_cancel_timeout(priv, 200);
  2558. conf = ieee80211_get_hw_conf(priv->hw);
  2559. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2560. iwlcore_commit_rxon(priv);
  2561. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2562. iwl_setup_rxon_timing(priv);
  2563. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2564. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2565. if (rc)
  2566. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2567. "Attempting to continue.\n");
  2568. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2569. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2570. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2571. priv->assoc_id, priv->beacon_int);
  2572. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2573. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2574. else
  2575. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2576. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2577. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2578. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2579. else
  2580. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2581. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2582. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2583. }
  2584. iwlcore_commit_rxon(priv);
  2585. switch (priv->iw_mode) {
  2586. case NL80211_IFTYPE_STATION:
  2587. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2588. break;
  2589. case NL80211_IFTYPE_ADHOC:
  2590. priv->assoc_id = 1;
  2591. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2592. iwl3945_sync_sta(priv, IWL_STA_ID,
  2593. (priv->band == IEEE80211_BAND_5GHZ) ?
  2594. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2595. CMD_ASYNC);
  2596. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2597. iwl3945_send_beacon_cmd(priv);
  2598. break;
  2599. default:
  2600. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2601. __func__, priv->iw_mode);
  2602. break;
  2603. }
  2604. iwl_activate_qos(priv, 0);
  2605. /* we have just associated, don't start scan too early */
  2606. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2607. }
  2608. /*****************************************************************************
  2609. *
  2610. * mac80211 entry point functions
  2611. *
  2612. *****************************************************************************/
  2613. #define UCODE_READY_TIMEOUT (2 * HZ)
  2614. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2615. {
  2616. struct iwl_priv *priv = hw->priv;
  2617. int ret;
  2618. IWL_DEBUG_MAC80211(priv, "enter\n");
  2619. /* we should be verifying the device is ready to be opened */
  2620. mutex_lock(&priv->mutex);
  2621. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2622. * ucode filename and max sizes are card-specific. */
  2623. if (!priv->ucode_code.len) {
  2624. ret = iwl3945_read_ucode(priv);
  2625. if (ret) {
  2626. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2627. mutex_unlock(&priv->mutex);
  2628. goto out_release_irq;
  2629. }
  2630. }
  2631. ret = __iwl3945_up(priv);
  2632. mutex_unlock(&priv->mutex);
  2633. if (ret)
  2634. goto out_release_irq;
  2635. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2636. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2637. * mac80211 will not be run successfully. */
  2638. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2639. test_bit(STATUS_READY, &priv->status),
  2640. UCODE_READY_TIMEOUT);
  2641. if (!ret) {
  2642. if (!test_bit(STATUS_READY, &priv->status)) {
  2643. IWL_ERR(priv,
  2644. "Wait for START_ALIVE timeout after %dms.\n",
  2645. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2646. ret = -ETIMEDOUT;
  2647. goto out_release_irq;
  2648. }
  2649. }
  2650. /* ucode is running and will send rfkill notifications,
  2651. * no need to poll the killswitch state anymore */
  2652. cancel_delayed_work(&priv->rfkill_poll);
  2653. iwl_led_start(priv);
  2654. priv->is_open = 1;
  2655. IWL_DEBUG_MAC80211(priv, "leave\n");
  2656. return 0;
  2657. out_release_irq:
  2658. priv->is_open = 0;
  2659. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2660. return ret;
  2661. }
  2662. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2663. {
  2664. struct iwl_priv *priv = hw->priv;
  2665. IWL_DEBUG_MAC80211(priv, "enter\n");
  2666. if (!priv->is_open) {
  2667. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2668. return;
  2669. }
  2670. priv->is_open = 0;
  2671. if (iwl_is_ready_rf(priv)) {
  2672. /* stop mac, cancel any scan request and clear
  2673. * RXON_FILTER_ASSOC_MSK BIT
  2674. */
  2675. mutex_lock(&priv->mutex);
  2676. iwl_scan_cancel_timeout(priv, 100);
  2677. mutex_unlock(&priv->mutex);
  2678. }
  2679. iwl3945_down(priv);
  2680. flush_workqueue(priv->workqueue);
  2681. /* start polling the killswitch state again */
  2682. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2683. round_jiffies_relative(2 * HZ));
  2684. IWL_DEBUG_MAC80211(priv, "leave\n");
  2685. }
  2686. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2687. {
  2688. struct iwl_priv *priv = hw->priv;
  2689. IWL_DEBUG_MAC80211(priv, "enter\n");
  2690. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2691. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2692. if (iwl3945_tx_skb(priv, skb))
  2693. dev_kfree_skb_any(skb);
  2694. IWL_DEBUG_MAC80211(priv, "leave\n");
  2695. return NETDEV_TX_OK;
  2696. }
  2697. void iwl3945_config_ap(struct iwl_priv *priv)
  2698. {
  2699. int rc = 0;
  2700. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2701. return;
  2702. /* The following should be done only at AP bring up */
  2703. if (!(iwl_is_associated(priv))) {
  2704. /* RXON - unassoc (to set timing command) */
  2705. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2706. iwlcore_commit_rxon(priv);
  2707. /* RXON Timing */
  2708. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2709. iwl_setup_rxon_timing(priv);
  2710. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2711. sizeof(priv->rxon_timing),
  2712. &priv->rxon_timing);
  2713. if (rc)
  2714. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2715. "Attempting to continue.\n");
  2716. /* FIXME: what should be the assoc_id for AP? */
  2717. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2718. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2719. priv->staging_rxon.flags |=
  2720. RXON_FLG_SHORT_PREAMBLE_MSK;
  2721. else
  2722. priv->staging_rxon.flags &=
  2723. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2724. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2725. if (priv->assoc_capability &
  2726. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2727. priv->staging_rxon.flags |=
  2728. RXON_FLG_SHORT_SLOT_MSK;
  2729. else
  2730. priv->staging_rxon.flags &=
  2731. ~RXON_FLG_SHORT_SLOT_MSK;
  2732. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2733. priv->staging_rxon.flags &=
  2734. ~RXON_FLG_SHORT_SLOT_MSK;
  2735. }
  2736. /* restore RXON assoc */
  2737. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2738. iwlcore_commit_rxon(priv);
  2739. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2740. }
  2741. iwl3945_send_beacon_cmd(priv);
  2742. /* FIXME - we need to add code here to detect a totally new
  2743. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2744. * clear sta table, add BCAST sta... */
  2745. }
  2746. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2747. struct ieee80211_vif *vif,
  2748. struct ieee80211_sta *sta,
  2749. struct ieee80211_key_conf *key)
  2750. {
  2751. struct iwl_priv *priv = hw->priv;
  2752. const u8 *addr;
  2753. int ret = 0;
  2754. u8 sta_id = IWL_INVALID_STATION;
  2755. u8 static_key;
  2756. IWL_DEBUG_MAC80211(priv, "enter\n");
  2757. if (iwl3945_mod_params.sw_crypto) {
  2758. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2759. return -EOPNOTSUPP;
  2760. }
  2761. addr = sta ? sta->addr : iwl_bcast_addr;
  2762. static_key = !iwl_is_associated(priv);
  2763. if (!static_key) {
  2764. sta_id = iwl_find_station(priv, addr);
  2765. if (sta_id == IWL_INVALID_STATION) {
  2766. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2767. addr);
  2768. return -EINVAL;
  2769. }
  2770. }
  2771. mutex_lock(&priv->mutex);
  2772. iwl_scan_cancel_timeout(priv, 100);
  2773. mutex_unlock(&priv->mutex);
  2774. switch (cmd) {
  2775. case SET_KEY:
  2776. if (static_key)
  2777. ret = iwl3945_set_static_key(priv, key);
  2778. else
  2779. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2780. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2781. break;
  2782. case DISABLE_KEY:
  2783. if (static_key)
  2784. ret = iwl3945_remove_static_key(priv);
  2785. else
  2786. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2787. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2788. break;
  2789. default:
  2790. ret = -EINVAL;
  2791. }
  2792. IWL_DEBUG_MAC80211(priv, "leave\n");
  2793. return ret;
  2794. }
  2795. /*****************************************************************************
  2796. *
  2797. * sysfs attributes
  2798. *
  2799. *****************************************************************************/
  2800. #ifdef CONFIG_IWLWIFI_DEBUG
  2801. /*
  2802. * The following adds a new attribute to the sysfs representation
  2803. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2804. * used for controlling the debug level.
  2805. *
  2806. * See the level definitions in iwl for details.
  2807. *
  2808. * The debug_level being managed using sysfs below is a per device debug
  2809. * level that is used instead of the global debug level if it (the per
  2810. * device debug level) is set.
  2811. */
  2812. static ssize_t show_debug_level(struct device *d,
  2813. struct device_attribute *attr, char *buf)
  2814. {
  2815. struct iwl_priv *priv = dev_get_drvdata(d);
  2816. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2817. }
  2818. static ssize_t store_debug_level(struct device *d,
  2819. struct device_attribute *attr,
  2820. const char *buf, size_t count)
  2821. {
  2822. struct iwl_priv *priv = dev_get_drvdata(d);
  2823. unsigned long val;
  2824. int ret;
  2825. ret = strict_strtoul(buf, 0, &val);
  2826. if (ret)
  2827. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2828. else {
  2829. priv->debug_level = val;
  2830. if (iwl_alloc_traffic_mem(priv))
  2831. IWL_ERR(priv,
  2832. "Not enough memory to generate traffic log\n");
  2833. }
  2834. return strnlen(buf, count);
  2835. }
  2836. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2837. show_debug_level, store_debug_level);
  2838. #endif /* CONFIG_IWLWIFI_DEBUG */
  2839. static ssize_t show_temperature(struct device *d,
  2840. struct device_attribute *attr, char *buf)
  2841. {
  2842. struct iwl_priv *priv = dev_get_drvdata(d);
  2843. if (!iwl_is_alive(priv))
  2844. return -EAGAIN;
  2845. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2846. }
  2847. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2848. static ssize_t show_tx_power(struct device *d,
  2849. struct device_attribute *attr, char *buf)
  2850. {
  2851. struct iwl_priv *priv = dev_get_drvdata(d);
  2852. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2853. }
  2854. static ssize_t store_tx_power(struct device *d,
  2855. struct device_attribute *attr,
  2856. const char *buf, size_t count)
  2857. {
  2858. struct iwl_priv *priv = dev_get_drvdata(d);
  2859. char *p = (char *)buf;
  2860. u32 val;
  2861. val = simple_strtoul(p, &p, 10);
  2862. if (p == buf)
  2863. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2864. else
  2865. iwl3945_hw_reg_set_txpower(priv, val);
  2866. return count;
  2867. }
  2868. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2869. static ssize_t show_flags(struct device *d,
  2870. struct device_attribute *attr, char *buf)
  2871. {
  2872. struct iwl_priv *priv = dev_get_drvdata(d);
  2873. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2874. }
  2875. static ssize_t store_flags(struct device *d,
  2876. struct device_attribute *attr,
  2877. const char *buf, size_t count)
  2878. {
  2879. struct iwl_priv *priv = dev_get_drvdata(d);
  2880. u32 flags = simple_strtoul(buf, NULL, 0);
  2881. mutex_lock(&priv->mutex);
  2882. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2883. /* Cancel any currently running scans... */
  2884. if (iwl_scan_cancel_timeout(priv, 100))
  2885. IWL_WARN(priv, "Could not cancel scan.\n");
  2886. else {
  2887. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2888. flags);
  2889. priv->staging_rxon.flags = cpu_to_le32(flags);
  2890. iwlcore_commit_rxon(priv);
  2891. }
  2892. }
  2893. mutex_unlock(&priv->mutex);
  2894. return count;
  2895. }
  2896. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2897. static ssize_t show_filter_flags(struct device *d,
  2898. struct device_attribute *attr, char *buf)
  2899. {
  2900. struct iwl_priv *priv = dev_get_drvdata(d);
  2901. return sprintf(buf, "0x%04X\n",
  2902. le32_to_cpu(priv->active_rxon.filter_flags));
  2903. }
  2904. static ssize_t store_filter_flags(struct device *d,
  2905. struct device_attribute *attr,
  2906. const char *buf, size_t count)
  2907. {
  2908. struct iwl_priv *priv = dev_get_drvdata(d);
  2909. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2910. mutex_lock(&priv->mutex);
  2911. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2912. /* Cancel any currently running scans... */
  2913. if (iwl_scan_cancel_timeout(priv, 100))
  2914. IWL_WARN(priv, "Could not cancel scan.\n");
  2915. else {
  2916. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2917. "0x%04X\n", filter_flags);
  2918. priv->staging_rxon.filter_flags =
  2919. cpu_to_le32(filter_flags);
  2920. iwlcore_commit_rxon(priv);
  2921. }
  2922. }
  2923. mutex_unlock(&priv->mutex);
  2924. return count;
  2925. }
  2926. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2927. store_filter_flags);
  2928. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2929. static ssize_t show_measurement(struct device *d,
  2930. struct device_attribute *attr, char *buf)
  2931. {
  2932. struct iwl_priv *priv = dev_get_drvdata(d);
  2933. struct iwl_spectrum_notification measure_report;
  2934. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2935. u8 *data = (u8 *)&measure_report;
  2936. unsigned long flags;
  2937. spin_lock_irqsave(&priv->lock, flags);
  2938. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2939. spin_unlock_irqrestore(&priv->lock, flags);
  2940. return 0;
  2941. }
  2942. memcpy(&measure_report, &priv->measure_report, size);
  2943. priv->measurement_status = 0;
  2944. spin_unlock_irqrestore(&priv->lock, flags);
  2945. while (size && (PAGE_SIZE - len)) {
  2946. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2947. PAGE_SIZE - len, 1);
  2948. len = strlen(buf);
  2949. if (PAGE_SIZE - len)
  2950. buf[len++] = '\n';
  2951. ofs += 16;
  2952. size -= min(size, 16U);
  2953. }
  2954. return len;
  2955. }
  2956. static ssize_t store_measurement(struct device *d,
  2957. struct device_attribute *attr,
  2958. const char *buf, size_t count)
  2959. {
  2960. struct iwl_priv *priv = dev_get_drvdata(d);
  2961. struct ieee80211_measurement_params params = {
  2962. .channel = le16_to_cpu(priv->active_rxon.channel),
  2963. .start_time = cpu_to_le64(priv->last_tsf),
  2964. .duration = cpu_to_le16(1),
  2965. };
  2966. u8 type = IWL_MEASURE_BASIC;
  2967. u8 buffer[32];
  2968. u8 channel;
  2969. if (count) {
  2970. char *p = buffer;
  2971. strncpy(buffer, buf, min(sizeof(buffer), count));
  2972. channel = simple_strtoul(p, NULL, 0);
  2973. if (channel)
  2974. params.channel = channel;
  2975. p = buffer;
  2976. while (*p && *p != ' ')
  2977. p++;
  2978. if (*p)
  2979. type = simple_strtoul(p + 1, NULL, 0);
  2980. }
  2981. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2982. "channel %d (for '%s')\n", type, params.channel, buf);
  2983. iwl3945_get_measurement(priv, &params, type);
  2984. return count;
  2985. }
  2986. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2987. show_measurement, store_measurement);
  2988. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2989. static ssize_t store_retry_rate(struct device *d,
  2990. struct device_attribute *attr,
  2991. const char *buf, size_t count)
  2992. {
  2993. struct iwl_priv *priv = dev_get_drvdata(d);
  2994. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2995. if (priv->retry_rate <= 0)
  2996. priv->retry_rate = 1;
  2997. return count;
  2998. }
  2999. static ssize_t show_retry_rate(struct device *d,
  3000. struct device_attribute *attr, char *buf)
  3001. {
  3002. struct iwl_priv *priv = dev_get_drvdata(d);
  3003. return sprintf(buf, "%d", priv->retry_rate);
  3004. }
  3005. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3006. store_retry_rate);
  3007. static ssize_t show_channels(struct device *d,
  3008. struct device_attribute *attr, char *buf)
  3009. {
  3010. /* all this shit doesn't belong into sysfs anyway */
  3011. return 0;
  3012. }
  3013. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3014. static ssize_t show_statistics(struct device *d,
  3015. struct device_attribute *attr, char *buf)
  3016. {
  3017. struct iwl_priv *priv = dev_get_drvdata(d);
  3018. u32 size = sizeof(struct iwl3945_notif_statistics);
  3019. u32 len = 0, ofs = 0;
  3020. u8 *data = (u8 *)&priv->statistics_39;
  3021. int rc = 0;
  3022. if (!iwl_is_alive(priv))
  3023. return -EAGAIN;
  3024. mutex_lock(&priv->mutex);
  3025. rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
  3026. mutex_unlock(&priv->mutex);
  3027. if (rc) {
  3028. len = sprintf(buf,
  3029. "Error sending statistics request: 0x%08X\n", rc);
  3030. return len;
  3031. }
  3032. while (size && (PAGE_SIZE - len)) {
  3033. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3034. PAGE_SIZE - len, 1);
  3035. len = strlen(buf);
  3036. if (PAGE_SIZE - len)
  3037. buf[len++] = '\n';
  3038. ofs += 16;
  3039. size -= min(size, 16U);
  3040. }
  3041. return len;
  3042. }
  3043. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3044. static ssize_t show_antenna(struct device *d,
  3045. struct device_attribute *attr, char *buf)
  3046. {
  3047. struct iwl_priv *priv = dev_get_drvdata(d);
  3048. if (!iwl_is_alive(priv))
  3049. return -EAGAIN;
  3050. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3051. }
  3052. static ssize_t store_antenna(struct device *d,
  3053. struct device_attribute *attr,
  3054. const char *buf, size_t count)
  3055. {
  3056. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3057. int ant;
  3058. if (count == 0)
  3059. return 0;
  3060. if (sscanf(buf, "%1i", &ant) != 1) {
  3061. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3062. return count;
  3063. }
  3064. if ((ant >= 0) && (ant <= 2)) {
  3065. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3066. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3067. } else
  3068. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3069. return count;
  3070. }
  3071. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3072. static ssize_t show_status(struct device *d,
  3073. struct device_attribute *attr, char *buf)
  3074. {
  3075. struct iwl_priv *priv = dev_get_drvdata(d);
  3076. if (!iwl_is_alive(priv))
  3077. return -EAGAIN;
  3078. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3079. }
  3080. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3081. static ssize_t dump_error_log(struct device *d,
  3082. struct device_attribute *attr,
  3083. const char *buf, size_t count)
  3084. {
  3085. struct iwl_priv *priv = dev_get_drvdata(d);
  3086. char *p = (char *)buf;
  3087. if (p[0] == '1')
  3088. iwl3945_dump_nic_error_log(priv);
  3089. return strnlen(buf, count);
  3090. }
  3091. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3092. /*****************************************************************************
  3093. *
  3094. * driver setup and tear down
  3095. *
  3096. *****************************************************************************/
  3097. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3098. {
  3099. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3100. init_waitqueue_head(&priv->wait_command_queue);
  3101. INIT_WORK(&priv->up, iwl3945_bg_up);
  3102. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3103. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3104. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3105. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3106. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3107. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3108. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3109. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3110. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3111. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3112. iwl3945_hw_setup_deferred_work(priv);
  3113. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3114. iwl3945_irq_tasklet, (unsigned long)priv);
  3115. }
  3116. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3117. {
  3118. iwl3945_hw_cancel_deferred_work(priv);
  3119. cancel_delayed_work_sync(&priv->init_alive_start);
  3120. cancel_delayed_work(&priv->scan_check);
  3121. cancel_delayed_work(&priv->alive_start);
  3122. cancel_work_sync(&priv->beacon_update);
  3123. }
  3124. static struct attribute *iwl3945_sysfs_entries[] = {
  3125. &dev_attr_antenna.attr,
  3126. &dev_attr_channels.attr,
  3127. &dev_attr_dump_errors.attr,
  3128. &dev_attr_flags.attr,
  3129. &dev_attr_filter_flags.attr,
  3130. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3131. &dev_attr_measurement.attr,
  3132. #endif
  3133. &dev_attr_retry_rate.attr,
  3134. &dev_attr_statistics.attr,
  3135. &dev_attr_status.attr,
  3136. &dev_attr_temperature.attr,
  3137. &dev_attr_tx_power.attr,
  3138. #ifdef CONFIG_IWLWIFI_DEBUG
  3139. &dev_attr_debug_level.attr,
  3140. #endif
  3141. NULL
  3142. };
  3143. static struct attribute_group iwl3945_attribute_group = {
  3144. .name = NULL, /* put in device directory */
  3145. .attrs = iwl3945_sysfs_entries,
  3146. };
  3147. static struct ieee80211_ops iwl3945_hw_ops = {
  3148. .tx = iwl3945_mac_tx,
  3149. .start = iwl3945_mac_start,
  3150. .stop = iwl3945_mac_stop,
  3151. .add_interface = iwl_mac_add_interface,
  3152. .remove_interface = iwl_mac_remove_interface,
  3153. .config = iwl_mac_config,
  3154. .configure_filter = iwl_configure_filter,
  3155. .set_key = iwl3945_mac_set_key,
  3156. .get_tx_stats = iwl_mac_get_tx_stats,
  3157. .conf_tx = iwl_mac_conf_tx,
  3158. .reset_tsf = iwl_mac_reset_tsf,
  3159. .bss_info_changed = iwl_bss_info_changed,
  3160. .hw_scan = iwl_mac_hw_scan
  3161. };
  3162. static int iwl3945_init_drv(struct iwl_priv *priv)
  3163. {
  3164. int ret;
  3165. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3166. priv->retry_rate = 1;
  3167. priv->ibss_beacon = NULL;
  3168. spin_lock_init(&priv->sta_lock);
  3169. spin_lock_init(&priv->hcmd_lock);
  3170. INIT_LIST_HEAD(&priv->free_frames);
  3171. mutex_init(&priv->mutex);
  3172. /* Clear the driver's (not device's) station table */
  3173. iwl_clear_stations_table(priv);
  3174. priv->ieee_channels = NULL;
  3175. priv->ieee_rates = NULL;
  3176. priv->band = IEEE80211_BAND_2GHZ;
  3177. priv->iw_mode = NL80211_IFTYPE_STATION;
  3178. iwl_reset_qos(priv);
  3179. priv->qos_data.qos_active = 0;
  3180. priv->qos_data.qos_cap.val = 0;
  3181. priv->rates_mask = IWL_RATES_MASK;
  3182. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3183. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3184. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3185. eeprom->version);
  3186. ret = -EINVAL;
  3187. goto err;
  3188. }
  3189. ret = iwl_init_channel_map(priv);
  3190. if (ret) {
  3191. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3192. goto err;
  3193. }
  3194. /* Set up txpower settings in driver for all channels */
  3195. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3196. ret = -EIO;
  3197. goto err_free_channel_map;
  3198. }
  3199. ret = iwlcore_init_geos(priv);
  3200. if (ret) {
  3201. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3202. goto err_free_channel_map;
  3203. }
  3204. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3205. return 0;
  3206. err_free_channel_map:
  3207. iwl_free_channel_map(priv);
  3208. err:
  3209. return ret;
  3210. }
  3211. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3212. {
  3213. int ret;
  3214. struct ieee80211_hw *hw = priv->hw;
  3215. hw->rate_control_algorithm = "iwl-3945-rs";
  3216. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3217. /* Tell mac80211 our characteristics */
  3218. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3219. IEEE80211_HW_NOISE_DBM |
  3220. IEEE80211_HW_SPECTRUM_MGMT;
  3221. if (!priv->cfg->broken_powersave)
  3222. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3223. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3224. hw->wiphy->interface_modes =
  3225. BIT(NL80211_IFTYPE_STATION) |
  3226. BIT(NL80211_IFTYPE_ADHOC);
  3227. hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
  3228. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3229. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3230. /* we create the 802.11 header and a zero-length SSID element */
  3231. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3232. /* Default value; 4 EDCA QOS priorities */
  3233. hw->queues = 4;
  3234. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3235. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3236. &priv->bands[IEEE80211_BAND_2GHZ];
  3237. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3238. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3239. &priv->bands[IEEE80211_BAND_5GHZ];
  3240. ret = ieee80211_register_hw(priv->hw);
  3241. if (ret) {
  3242. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3243. return ret;
  3244. }
  3245. priv->mac80211_registered = 1;
  3246. return 0;
  3247. }
  3248. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3249. {
  3250. int err = 0;
  3251. struct iwl_priv *priv;
  3252. struct ieee80211_hw *hw;
  3253. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3254. struct iwl3945_eeprom *eeprom;
  3255. unsigned long flags;
  3256. /***********************
  3257. * 1. Allocating HW data
  3258. * ********************/
  3259. /* mac80211 allocates memory for this device instance, including
  3260. * space for this driver's private structure */
  3261. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3262. if (hw == NULL) {
  3263. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3264. err = -ENOMEM;
  3265. goto out;
  3266. }
  3267. priv = hw->priv;
  3268. SET_IEEE80211_DEV(hw, &pdev->dev);
  3269. /*
  3270. * Disabling hardware scan means that mac80211 will perform scans
  3271. * "the hard way", rather than using device's scan.
  3272. */
  3273. if (iwl3945_mod_params.disable_hw_scan) {
  3274. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3275. iwl3945_hw_ops.hw_scan = NULL;
  3276. }
  3277. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3278. priv->cfg = cfg;
  3279. priv->pci_dev = pdev;
  3280. priv->inta_mask = CSR_INI_SET_MASK;
  3281. #ifdef CONFIG_IWLWIFI_DEBUG
  3282. atomic_set(&priv->restrict_refcnt, 0);
  3283. #endif
  3284. if (iwl_alloc_traffic_mem(priv))
  3285. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3286. /***************************
  3287. * 2. Initializing PCI bus
  3288. * *************************/
  3289. if (pci_enable_device(pdev)) {
  3290. err = -ENODEV;
  3291. goto out_ieee80211_free_hw;
  3292. }
  3293. pci_set_master(pdev);
  3294. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3295. if (!err)
  3296. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3297. if (err) {
  3298. IWL_WARN(priv, "No suitable DMA available.\n");
  3299. goto out_pci_disable_device;
  3300. }
  3301. pci_set_drvdata(pdev, priv);
  3302. err = pci_request_regions(pdev, DRV_NAME);
  3303. if (err)
  3304. goto out_pci_disable_device;
  3305. /***********************
  3306. * 3. Read REV Register
  3307. * ********************/
  3308. priv->hw_base = pci_iomap(pdev, 0, 0);
  3309. if (!priv->hw_base) {
  3310. err = -ENODEV;
  3311. goto out_pci_release_regions;
  3312. }
  3313. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3314. (unsigned long long) pci_resource_len(pdev, 0));
  3315. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3316. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3317. * PCI Tx retries from interfering with C3 CPU state */
  3318. pci_write_config_byte(pdev, 0x41, 0x00);
  3319. /* these spin locks will be used in apm_ops.init and EEPROM access
  3320. * we should init now
  3321. */
  3322. spin_lock_init(&priv->reg_lock);
  3323. spin_lock_init(&priv->lock);
  3324. /***********************
  3325. * 4. Read EEPROM
  3326. * ********************/
  3327. /* Read the EEPROM */
  3328. err = iwl_eeprom_init(priv);
  3329. if (err) {
  3330. IWL_ERR(priv, "Unable to init EEPROM\n");
  3331. goto out_iounmap;
  3332. }
  3333. /* MAC Address location in EEPROM same for 3945/4965 */
  3334. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3335. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3336. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3337. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3338. /***********************
  3339. * 5. Setup HW Constants
  3340. * ********************/
  3341. /* Device-specific setup */
  3342. if (iwl3945_hw_set_hw_params(priv)) {
  3343. IWL_ERR(priv, "failed to set hw settings\n");
  3344. goto out_eeprom_free;
  3345. }
  3346. /***********************
  3347. * 6. Setup priv
  3348. * ********************/
  3349. err = iwl3945_init_drv(priv);
  3350. if (err) {
  3351. IWL_ERR(priv, "initializing driver failed\n");
  3352. goto out_unset_hw_params;
  3353. }
  3354. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3355. priv->cfg->name);
  3356. /***********************
  3357. * 7. Setup Services
  3358. * ********************/
  3359. spin_lock_irqsave(&priv->lock, flags);
  3360. iwl_disable_interrupts(priv);
  3361. spin_unlock_irqrestore(&priv->lock, flags);
  3362. pci_enable_msi(priv->pci_dev);
  3363. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3364. IRQF_SHARED, DRV_NAME, priv);
  3365. if (err) {
  3366. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3367. goto out_disable_msi;
  3368. }
  3369. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3370. if (err) {
  3371. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3372. goto out_release_irq;
  3373. }
  3374. iwl_set_rxon_channel(priv,
  3375. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3376. iwl3945_setup_deferred_work(priv);
  3377. iwl3945_setup_rx_handlers(priv);
  3378. iwl_power_initialize(priv);
  3379. /*********************************
  3380. * 8. Setup and Register mac80211
  3381. * *******************************/
  3382. iwl_enable_interrupts(priv);
  3383. err = iwl3945_setup_mac(priv);
  3384. if (err)
  3385. goto out_remove_sysfs;
  3386. err = iwl_dbgfs_register(priv, DRV_NAME);
  3387. if (err)
  3388. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3389. /* Start monitoring the killswitch */
  3390. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3391. 2 * HZ);
  3392. return 0;
  3393. out_remove_sysfs:
  3394. destroy_workqueue(priv->workqueue);
  3395. priv->workqueue = NULL;
  3396. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3397. out_release_irq:
  3398. free_irq(priv->pci_dev->irq, priv);
  3399. out_disable_msi:
  3400. pci_disable_msi(priv->pci_dev);
  3401. iwlcore_free_geos(priv);
  3402. iwl_free_channel_map(priv);
  3403. out_unset_hw_params:
  3404. iwl3945_unset_hw_params(priv);
  3405. out_eeprom_free:
  3406. iwl_eeprom_free(priv);
  3407. out_iounmap:
  3408. pci_iounmap(pdev, priv->hw_base);
  3409. out_pci_release_regions:
  3410. pci_release_regions(pdev);
  3411. out_pci_disable_device:
  3412. pci_set_drvdata(pdev, NULL);
  3413. pci_disable_device(pdev);
  3414. out_ieee80211_free_hw:
  3415. iwl_free_traffic_mem(priv);
  3416. ieee80211_free_hw(priv->hw);
  3417. out:
  3418. return err;
  3419. }
  3420. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3421. {
  3422. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3423. unsigned long flags;
  3424. if (!priv)
  3425. return;
  3426. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3427. iwl_dbgfs_unregister(priv);
  3428. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3429. if (priv->mac80211_registered) {
  3430. ieee80211_unregister_hw(priv->hw);
  3431. priv->mac80211_registered = 0;
  3432. } else {
  3433. iwl3945_down(priv);
  3434. }
  3435. /*
  3436. * Make sure device is reset to low power before unloading driver.
  3437. * This may be redundant with iwl_down(), but there are paths to
  3438. * run iwl_down() without calling apm_ops.stop(), and there are
  3439. * paths to avoid running iwl_down() at all before leaving driver.
  3440. * This (inexpensive) call *makes sure* device is reset.
  3441. */
  3442. priv->cfg->ops->lib->apm_ops.stop(priv);
  3443. /* make sure we flush any pending irq or
  3444. * tasklet for the driver
  3445. */
  3446. spin_lock_irqsave(&priv->lock, flags);
  3447. iwl_disable_interrupts(priv);
  3448. spin_unlock_irqrestore(&priv->lock, flags);
  3449. iwl_synchronize_irq(priv);
  3450. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3451. cancel_delayed_work_sync(&priv->rfkill_poll);
  3452. iwl3945_dealloc_ucode_pci(priv);
  3453. if (priv->rxq.bd)
  3454. iwl3945_rx_queue_free(priv, &priv->rxq);
  3455. iwl3945_hw_txq_ctx_free(priv);
  3456. iwl3945_unset_hw_params(priv);
  3457. iwl_clear_stations_table(priv);
  3458. /*netif_stop_queue(dev); */
  3459. flush_workqueue(priv->workqueue);
  3460. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3461. * priv->workqueue... so we can't take down the workqueue
  3462. * until now... */
  3463. destroy_workqueue(priv->workqueue);
  3464. priv->workqueue = NULL;
  3465. iwl_free_traffic_mem(priv);
  3466. free_irq(pdev->irq, priv);
  3467. pci_disable_msi(pdev);
  3468. pci_iounmap(pdev, priv->hw_base);
  3469. pci_release_regions(pdev);
  3470. pci_disable_device(pdev);
  3471. pci_set_drvdata(pdev, NULL);
  3472. iwl_free_channel_map(priv);
  3473. iwlcore_free_geos(priv);
  3474. kfree(priv->scan);
  3475. if (priv->ibss_beacon)
  3476. dev_kfree_skb(priv->ibss_beacon);
  3477. ieee80211_free_hw(priv->hw);
  3478. }
  3479. /*****************************************************************************
  3480. *
  3481. * driver and module entry point
  3482. *
  3483. *****************************************************************************/
  3484. static struct pci_driver iwl3945_driver = {
  3485. .name = DRV_NAME,
  3486. .id_table = iwl3945_hw_card_ids,
  3487. .probe = iwl3945_pci_probe,
  3488. .remove = __devexit_p(iwl3945_pci_remove),
  3489. #ifdef CONFIG_PM
  3490. .suspend = iwl_pci_suspend,
  3491. .resume = iwl_pci_resume,
  3492. #endif
  3493. };
  3494. static int __init iwl3945_init(void)
  3495. {
  3496. int ret;
  3497. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3498. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3499. ret = iwl3945_rate_control_register();
  3500. if (ret) {
  3501. printk(KERN_ERR DRV_NAME
  3502. "Unable to register rate control algorithm: %d\n", ret);
  3503. return ret;
  3504. }
  3505. ret = pci_register_driver(&iwl3945_driver);
  3506. if (ret) {
  3507. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3508. goto error_register;
  3509. }
  3510. return ret;
  3511. error_register:
  3512. iwl3945_rate_control_unregister();
  3513. return ret;
  3514. }
  3515. static void __exit iwl3945_exit(void)
  3516. {
  3517. pci_unregister_driver(&iwl3945_driver);
  3518. iwl3945_rate_control_unregister();
  3519. }
  3520. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3521. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3522. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3523. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3524. MODULE_PARM_DESC(swcrypto,
  3525. "using software crypto (default 1 [software])\n");
  3526. #ifdef CONFIG_IWLWIFI_DEBUG
  3527. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3528. MODULE_PARM_DESC(debug, "debug output mask");
  3529. #endif
  3530. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3531. int, S_IRUGO);
  3532. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3533. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3534. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3535. module_exit(iwl3945_exit);
  3536. module_init(iwl3945_init);