tx.c 33 KB

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  1. /*
  2. * Intel Wireless WiMAX Connection 2400m
  3. * Generic (non-bus specific) TX handling
  4. *
  5. *
  6. * Copyright (C) 2007-2008 Intel Corporation. All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. *
  12. * * Redistributions of source code must retain the above copyright
  13. * notice, this list of conditions and the following disclaimer.
  14. * * Redistributions in binary form must reproduce the above copyright
  15. * notice, this list of conditions and the following disclaimer in
  16. * the documentation and/or other materials provided with the
  17. * distribution.
  18. * * Neither the name of Intel Corporation nor the names of its
  19. * contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. *
  34. *
  35. * Intel Corporation <linux-wimax@intel.com>
  36. * Yanir Lubetkin <yanirx.lubetkin@intel.com>
  37. * - Initial implementation
  38. *
  39. * Intel Corporation <linux-wimax@intel.com>
  40. * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
  41. * - Rewritten to use a single FIFO to lower the memory allocation
  42. * pressure and optimize cache hits when copying to the queue, as
  43. * well as splitting out bus-specific code.
  44. *
  45. *
  46. * Implements data transmission to the device; this is done through a
  47. * software FIFO, as data/control frames can be coalesced (while the
  48. * device is reading the previous tx transaction, others accumulate).
  49. *
  50. * A FIFO is used because at the end it is resource-cheaper that trying
  51. * to implement scatter/gather over USB. As well, most traffic is going
  52. * to be download (vs upload).
  53. *
  54. * The format for sending/receiving data to/from the i2400m is
  55. * described in detail in rx.c:PROTOCOL FORMAT. In here we implement
  56. * the transmission of that. This is split between a bus-independent
  57. * part that just prepares everything and a bus-specific part that
  58. * does the actual transmission over the bus to the device (in the
  59. * bus-specific driver).
  60. *
  61. *
  62. * The general format of a device-host transaction is MSG-HDR, PLD1,
  63. * PLD2...PLDN, PL1, PL2,...PLN, PADDING.
  64. *
  65. * Because we need the send payload descriptors and then payloads and
  66. * because it is kind of expensive to do scatterlists in USB (one URB
  67. * per node), it becomes cheaper to append all the data to a FIFO
  68. * (copying to a FIFO potentially in cache is cheaper).
  69. *
  70. * Then the bus-specific code takes the parts of that FIFO that are
  71. * written and passes them to the device.
  72. *
  73. * So the concepts to keep in mind there are:
  74. *
  75. * We use a FIFO to queue the data in a linear buffer. We first append
  76. * a MSG-HDR, space for I2400M_TX_PLD_MAX payload descriptors and then
  77. * go appending payloads until we run out of space or of payload
  78. * descriptors. Then we append padding to make the whole transaction a
  79. * multiple of i2400m->bus_tx_block_size (as defined by the bus layer).
  80. *
  81. * - A TX message: a combination of a message header, payload
  82. * descriptors and payloads.
  83. *
  84. * Open: it is marked as active (i2400m->tx_msg is valid) and we
  85. * can keep adding payloads to it.
  86. *
  87. * Closed: we are not appending more payloads to this TX message
  88. * (exahusted space in the queue, too many payloads or
  89. * whichever). We have appended padding so the whole message
  90. * length is aligned to i2400m->bus_tx_block_size (as set by the
  91. * bus/transport layer).
  92. *
  93. * - Most of the time we keep a TX message open to which we append
  94. * payloads.
  95. *
  96. * - If we are going to append and there is no more space (we are at
  97. * the end of the FIFO), we close the message, mark the rest of the
  98. * FIFO space unusable (skip_tail), create a new message at the
  99. * beginning of the FIFO (if there is space) and append the message
  100. * there.
  101. *
  102. * This is because we need to give linear TX messages to the bus
  103. * engine. So we don't write a message to the remaining FIFO space
  104. * until the tail and continue at the head of it.
  105. *
  106. * - We overload one of the fields in the message header to use it as
  107. * 'size' of the TX message, so we can iterate over them. It also
  108. * contains a flag that indicates if we have to skip it or not.
  109. * When we send the buffer, we update that to its real on-the-wire
  110. * value.
  111. *
  112. * - The MSG-HDR PLD1...PLD2 stuff has to be a size multiple of 16.
  113. *
  114. * It follows that if MSG-HDR says we have N messages, the whole
  115. * header + descriptors is 16 + 4*N; for those to be a multiple of
  116. * 16, it follows that N can be 4, 8, 12, ... (32, 48, 64, 80...
  117. * bytes).
  118. *
  119. * So if we have only 1 payload, we have to submit a header that in
  120. * all truth has space for 4.
  121. *
  122. * The implication is that we reserve space for 12 (64 bytes); but
  123. * if we fill up only (eg) 2, our header becomes 32 bytes only. So
  124. * the TX engine has to shift those 32 bytes of msg header and 2
  125. * payloads and padding so that right after it the payloads start
  126. * and the TX engine has to know about that.
  127. *
  128. * It is cheaper to move the header up than the whole payloads down.
  129. *
  130. * We do this in i2400m_tx_close(). See 'i2400m_msg_hdr->offset'.
  131. *
  132. * - Each payload has to be size-padded to 16 bytes; before appending
  133. * it, we just do it.
  134. *
  135. * - The whole message has to be padded to i2400m->bus_tx_block_size;
  136. * we do this at close time. Thus, when reserving space for the
  137. * payload, we always make sure there is also free space for this
  138. * padding that sooner or later will happen.
  139. *
  140. * When we append a message, we tell the bus specific code to kick in
  141. * TXs. It will TX (in parallel) until the buffer is exhausted--hence
  142. * the lockin we do. The TX code will only send a TX message at the
  143. * time (which remember, might contain more than one payload). Of
  144. * course, when the bus-specific driver attempts to TX a message that
  145. * is still open, it gets closed first.
  146. *
  147. * Gee, this is messy; well a picture. In the example below we have a
  148. * partially full FIFO, with a closed message ready to be delivered
  149. * (with a moved message header to make sure it is size-aligned to
  150. * 16), TAIL room that was unusable (and thus is marked with a message
  151. * header that says 'skip this') and at the head of the buffer, an
  152. * imcomplete message with a couple of payloads.
  153. *
  154. * N ___________________________________________________
  155. * | |
  156. * | TAIL room |
  157. * | |
  158. * | msg_hdr to skip (size |= 0x80000) |
  159. * |---------------------------------------------------|-------
  160. * | | /|\
  161. * | | |
  162. * | TX message padding | |
  163. * | | |
  164. * | | |
  165. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  166. * | | |
  167. * | payload 1 | |
  168. * | | N * tx_block_size
  169. * | | |
  170. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  171. * | | |
  172. * | payload 1 | |
  173. * | | |
  174. * | | |
  175. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- -|- - - -
  176. * | padding 3 /|\ | | /|\
  177. * | padding 2 | | | |
  178. * | pld 1 32 bytes (2 * 16) | | |
  179. * | pld 0 | | | |
  180. * | moved msg_hdr \|/ | \|/ |
  181. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- - - |
  182. * | | _PLD_SIZE
  183. * | unused | |
  184. * | | |
  185. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  186. * | msg_hdr (size X) [this message is closed] | \|/
  187. * |===================================================|========== <=== OUT
  188. * | |
  189. * | |
  190. * | |
  191. * | Free rooom |
  192. * | |
  193. * | |
  194. * | |
  195. * | |
  196. * | |
  197. * | |
  198. * | |
  199. * | |
  200. * | |
  201. * |===================================================|========== <=== IN
  202. * | |
  203. * | |
  204. * | |
  205. * | |
  206. * | payload 1 |
  207. * | |
  208. * | |
  209. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
  210. * | |
  211. * | payload 0 |
  212. * | |
  213. * | |
  214. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
  215. * | pld 11 /|\ |
  216. * | ... | |
  217. * | pld 1 64 bytes (2 * 16) |
  218. * | pld 0 | |
  219. * | msg_hdr (size X) \|/ [message is open] |
  220. * 0 ---------------------------------------------------
  221. *
  222. *
  223. * ROADMAP
  224. *
  225. * i2400m_tx_setup() Called by i2400m_setup
  226. * i2400m_tx_release() Called by i2400m_release()
  227. *
  228. * i2400m_tx() Called to send data or control frames
  229. * i2400m_tx_fifo_push() Allocates append-space in the FIFO
  230. * i2400m_tx_new() Opens a new message in the FIFO
  231. * i2400m_tx_fits() Checks if a new payload fits in the message
  232. * i2400m_tx_close() Closes an open message in the FIFO
  233. * i2400m_tx_skip_tail() Marks unusable FIFO tail space
  234. * i2400m->bus_tx_kick()
  235. *
  236. * Now i2400m->bus_tx_kick() is the the bus-specific driver backend
  237. * implementation; that would do:
  238. *
  239. * i2400m->bus_tx_kick()
  240. * i2400m_tx_msg_get() Gets first message ready to go
  241. * ...sends it...
  242. * i2400m_tx_msg_sent() Ack the message is sent; repeat from
  243. * _tx_msg_get() until it returns NULL
  244. * (FIFO empty).
  245. */
  246. #include <linux/netdevice.h>
  247. #include "i2400m.h"
  248. #define D_SUBMODULE tx
  249. #include "debug-levels.h"
  250. enum {
  251. /**
  252. * TX Buffer size
  253. *
  254. * Doc says maximum transaction is 16KiB. If we had 16KiB en
  255. * route and 16KiB being queued, it boils down to needing
  256. * 32KiB.
  257. */
  258. I2400M_TX_BUF_SIZE = 32768,
  259. /**
  260. * Message header and payload descriptors have to be 16
  261. * aligned (16 + 4 * N = 16 * M). If we take that average sent
  262. * packets are MTU size (~1400-~1500) it follows that we could
  263. * fit at most 10-11 payloads in one transaction. To meet the
  264. * alignment requirement, that means we need to leave space
  265. * for 12 (64 bytes). To simplify, we leave space for that. If
  266. * at the end there are less, we pad up to the nearest
  267. * multiple of 16.
  268. */
  269. I2400M_TX_PLD_MAX = 12,
  270. I2400M_TX_PLD_SIZE = sizeof(struct i2400m_msg_hdr)
  271. + I2400M_TX_PLD_MAX * sizeof(struct i2400m_pld),
  272. I2400M_TX_SKIP = 0x80000000,
  273. };
  274. #define TAIL_FULL ((void *)~(unsigned long)NULL)
  275. /*
  276. * Calculate how much tail room is available
  277. *
  278. * Note the trick here. This path is ONLY caleed for Case A (see
  279. * i2400m_tx_fifo_push() below), where we have:
  280. *
  281. * Case A
  282. * N ___________
  283. * | tail room |
  284. * | |
  285. * |<- IN ->|
  286. * | |
  287. * | data |
  288. * | |
  289. * |<- OUT ->|
  290. * | |
  291. * | head room |
  292. * 0 -----------
  293. *
  294. * When calculating the tail_room, tx_in might get to be zero if
  295. * i2400m->tx_in is right at the end of the buffer (really full
  296. * buffer) if there is no head room. In this case, tail_room would be
  297. * I2400M_TX_BUF_SIZE, although it is actually zero. Hence the final
  298. * mod (%) operation. However, when doing this kind of optimization,
  299. * i2400m->tx_in being zero would fail, so we treat is an a special
  300. * case.
  301. */
  302. static inline
  303. size_t __i2400m_tx_tail_room(struct i2400m *i2400m)
  304. {
  305. size_t tail_room;
  306. size_t tx_in;
  307. if (unlikely(i2400m->tx_in == 0))
  308. return I2400M_TX_BUF_SIZE;
  309. tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
  310. tail_room = I2400M_TX_BUF_SIZE - tx_in;
  311. tail_room %= I2400M_TX_BUF_SIZE;
  312. return tail_room;
  313. }
  314. /*
  315. * Allocate @size bytes in the TX fifo, return a pointer to it
  316. *
  317. * @i2400m: device descriptor
  318. * @size: size of the buffer we need to allocate
  319. * @padding: ensure that there is at least this many bytes of free
  320. * contiguous space in the fifo. This is needed because later on
  321. * we might need to add padding.
  322. *
  323. * Returns:
  324. *
  325. * Pointer to the allocated space. NULL if there is no
  326. * space. TAIL_FULL if there is no space at the tail but there is at
  327. * the head (Case B below).
  328. *
  329. * These are the two basic cases we need to keep an eye for -- it is
  330. * much better explained in linux/kernel/kfifo.c, but this code
  331. * basically does the same. No rocket science here.
  332. *
  333. * Case A Case B
  334. * N ___________ ___________
  335. * | tail room | | data |
  336. * | | | |
  337. * |<- IN ->| |<- OUT ->|
  338. * | | | |
  339. * | data | | room |
  340. * | | | |
  341. * |<- OUT ->| |<- IN ->|
  342. * | | | |
  343. * | head room | | data |
  344. * 0 ----------- -----------
  345. *
  346. * We allocate only *contiguous* space.
  347. *
  348. * We can allocate only from 'room'. In Case B, it is simple; in case
  349. * A, we only try from the tail room; if it is not enough, we just
  350. * fail and return TAIL_FULL and let the caller figure out if we wants to
  351. * skip the tail room and try to allocate from the head.
  352. *
  353. * Note:
  354. *
  355. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  356. *
  357. * The indexes keep increasing and we reset them to zero when we
  358. * pop data off the queue
  359. */
  360. static
  361. void *i2400m_tx_fifo_push(struct i2400m *i2400m, size_t size, size_t padding)
  362. {
  363. struct device *dev = i2400m_dev(i2400m);
  364. size_t room, tail_room, needed_size;
  365. void *ptr;
  366. needed_size = size + padding;
  367. room = I2400M_TX_BUF_SIZE - (i2400m->tx_in - i2400m->tx_out);
  368. if (room < needed_size) { /* this takes care of Case B */
  369. d_printf(2, dev, "fifo push %zu/%zu: no space\n",
  370. size, padding);
  371. return NULL;
  372. }
  373. /* Is there space at the tail? */
  374. tail_room = __i2400m_tx_tail_room(i2400m);
  375. if (tail_room < needed_size) {
  376. if (i2400m->tx_out % I2400M_TX_BUF_SIZE
  377. < i2400m->tx_in % I2400M_TX_BUF_SIZE) {
  378. d_printf(2, dev, "fifo push %zu/%zu: tail full\n",
  379. size, padding);
  380. return TAIL_FULL; /* There might be head space */
  381. } else {
  382. d_printf(2, dev, "fifo push %zu/%zu: no head space\n",
  383. size, padding);
  384. return NULL; /* There is no space */
  385. }
  386. }
  387. ptr = i2400m->tx_buf + i2400m->tx_in % I2400M_TX_BUF_SIZE;
  388. d_printf(2, dev, "fifo push %zu/%zu: at @%zu\n", size, padding,
  389. i2400m->tx_in % I2400M_TX_BUF_SIZE);
  390. i2400m->tx_in += size;
  391. return ptr;
  392. }
  393. /*
  394. * Mark the tail of the FIFO buffer as 'to-skip'
  395. *
  396. * We should never hit the BUG_ON() because all the sizes we push to
  397. * the FIFO are padded to be a multiple of 16 -- the size of *msg
  398. * (I2400M_PL_PAD for the payloads, I2400M_TX_PLD_SIZE for the
  399. * header).
  400. *
  401. * Tail room can get to be zero if a message was opened when there was
  402. * space only for a header. _tx_close() will mark it as to-skip (as it
  403. * will have no payloads) and there will be no more space to flush, so
  404. * nothing has to be done here. This is probably cheaper than ensuring
  405. * in _tx_new() that there is some space for payloads...as we could
  406. * always possibly hit the same problem if the payload wouldn't fit.
  407. *
  408. * Note:
  409. *
  410. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  411. *
  412. * This path is only taken for Case A FIFO situations [see
  413. * i2400m_tx_fifo_push()]
  414. */
  415. static
  416. void i2400m_tx_skip_tail(struct i2400m *i2400m)
  417. {
  418. struct device *dev = i2400m_dev(i2400m);
  419. size_t tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
  420. size_t tail_room = __i2400m_tx_tail_room(i2400m);
  421. struct i2400m_msg_hdr *msg = i2400m->tx_buf + tx_in;
  422. if (unlikely(tail_room == 0))
  423. return;
  424. BUG_ON(tail_room < sizeof(*msg));
  425. msg->size = tail_room | I2400M_TX_SKIP;
  426. d_printf(2, dev, "skip tail: skipping %zu bytes @%zu\n",
  427. tail_room, tx_in);
  428. i2400m->tx_in += tail_room;
  429. }
  430. /*
  431. * Check if a skb will fit in the TX queue's current active TX
  432. * message (if there are still descriptors left unused).
  433. *
  434. * Returns:
  435. * 0 if the message won't fit, 1 if it will.
  436. *
  437. * Note:
  438. *
  439. * Assumes a TX message is active (i2400m->tx_msg).
  440. *
  441. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  442. */
  443. static
  444. unsigned i2400m_tx_fits(struct i2400m *i2400m)
  445. {
  446. struct i2400m_msg_hdr *msg_hdr = i2400m->tx_msg;
  447. return le16_to_cpu(msg_hdr->num_pls) < I2400M_TX_PLD_MAX;
  448. }
  449. /*
  450. * Start a new TX message header in the queue.
  451. *
  452. * Reserve memory from the base FIFO engine and then just initialize
  453. * the message header.
  454. *
  455. * We allocate the biggest TX message header we might need (one that'd
  456. * fit I2400M_TX_PLD_MAX payloads) -- when it is closed it will be
  457. * 'ironed it out' and the unneeded parts removed.
  458. *
  459. * NOTE:
  460. *
  461. * Assumes that the previous message is CLOSED (eg: either
  462. * there was none or 'i2400m_tx_close()' was called on it).
  463. *
  464. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  465. */
  466. static
  467. void i2400m_tx_new(struct i2400m *i2400m)
  468. {
  469. struct device *dev = i2400m_dev(i2400m);
  470. struct i2400m_msg_hdr *tx_msg;
  471. BUG_ON(i2400m->tx_msg != NULL);
  472. try_head:
  473. tx_msg = i2400m_tx_fifo_push(i2400m, I2400M_TX_PLD_SIZE, 0);
  474. if (tx_msg == NULL)
  475. goto out;
  476. else if (tx_msg == TAIL_FULL) {
  477. i2400m_tx_skip_tail(i2400m);
  478. d_printf(2, dev, "new TX message: tail full, trying head\n");
  479. goto try_head;
  480. }
  481. memset(tx_msg, 0, I2400M_TX_PLD_SIZE);
  482. tx_msg->size = I2400M_TX_PLD_SIZE;
  483. out:
  484. i2400m->tx_msg = tx_msg;
  485. d_printf(2, dev, "new TX message: %p @%zu\n",
  486. tx_msg, (void *) tx_msg - i2400m->tx_buf);
  487. }
  488. /*
  489. * Finalize the current TX message header
  490. *
  491. * Sets the message header to be at the proper location depending on
  492. * how many descriptors we have (check documentation at the file's
  493. * header for more info on that).
  494. *
  495. * Appends padding bytes to make sure the whole TX message (counting
  496. * from the 'relocated' message header) is aligned to
  497. * tx_block_size. We assume the _append() code has left enough space
  498. * in the FIFO for that. If there are no payloads, just pass, as it
  499. * won't be transferred.
  500. *
  501. * The amount of padding bytes depends on how many payloads are in the
  502. * TX message, as the "msg header and payload descriptors" will be
  503. * shifted up in the buffer.
  504. */
  505. static
  506. void i2400m_tx_close(struct i2400m *i2400m)
  507. {
  508. struct device *dev = i2400m_dev(i2400m);
  509. struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
  510. struct i2400m_msg_hdr *tx_msg_moved;
  511. size_t aligned_size, padding, hdr_size;
  512. void *pad_buf;
  513. unsigned num_pls;
  514. if (tx_msg->size & I2400M_TX_SKIP) /* a skipper? nothing to do */
  515. goto out;
  516. num_pls = le16_to_cpu(tx_msg->num_pls);
  517. /* We can get this situation when a new message was started
  518. * and there was no space to add payloads before hitting the
  519. tail (and taking padding into consideration). */
  520. if (num_pls == 0) {
  521. tx_msg->size |= I2400M_TX_SKIP;
  522. goto out;
  523. }
  524. /* Relocate the message header
  525. *
  526. * Find the current header size, align it to 16 and if we need
  527. * to move it so the tail is next to the payloads, move it and
  528. * set the offset.
  529. *
  530. * If it moved, this header is good only for transmission; the
  531. * original one (it is kept if we moved) is still used to
  532. * figure out where the next TX message starts (and where the
  533. * offset to the moved header is).
  534. */
  535. hdr_size = sizeof(*tx_msg)
  536. + le16_to_cpu(tx_msg->num_pls) * sizeof(tx_msg->pld[0]);
  537. hdr_size = ALIGN(hdr_size, I2400M_PL_ALIGN);
  538. tx_msg->offset = I2400M_TX_PLD_SIZE - hdr_size;
  539. tx_msg_moved = (void *) tx_msg + tx_msg->offset;
  540. memmove(tx_msg_moved, tx_msg, hdr_size);
  541. tx_msg_moved->size -= tx_msg->offset;
  542. /*
  543. * Now figure out how much we have to add to the (moved!)
  544. * message so the size is a multiple of i2400m->bus_tx_block_size.
  545. */
  546. aligned_size = ALIGN(tx_msg_moved->size, i2400m->bus_tx_block_size);
  547. padding = aligned_size - tx_msg_moved->size;
  548. if (padding > 0) {
  549. pad_buf = i2400m_tx_fifo_push(i2400m, padding, 0);
  550. if (unlikely(WARN_ON(pad_buf == NULL
  551. || pad_buf == TAIL_FULL))) {
  552. /* This should not happen -- append should verify
  553. * there is always space left at least to append
  554. * tx_block_size */
  555. dev_err(dev,
  556. "SW BUG! Possible data leakage from memory the "
  557. "device should not read for padding - "
  558. "size %lu aligned_size %zu tx_buf %p in "
  559. "%zu out %zu\n",
  560. (unsigned long) tx_msg_moved->size,
  561. aligned_size, i2400m->tx_buf, i2400m->tx_in,
  562. i2400m->tx_out);
  563. } else
  564. memset(pad_buf, 0xad, padding);
  565. }
  566. tx_msg_moved->padding = cpu_to_le16(padding);
  567. tx_msg_moved->size += padding;
  568. if (tx_msg != tx_msg_moved)
  569. tx_msg->size += padding;
  570. out:
  571. i2400m->tx_msg = NULL;
  572. }
  573. /**
  574. * i2400m_tx - send the data in a buffer to the device
  575. *
  576. * @buf: pointer to the buffer to transmit
  577. *
  578. * @buf_len: buffer size
  579. *
  580. * @pl_type: type of the payload we are sending.
  581. *
  582. * Returns:
  583. * 0 if ok, < 0 errno code on error (-ENOSPC, if there is no more
  584. * room for the message in the queue).
  585. *
  586. * Appends the buffer to the TX FIFO and notifies the bus-specific
  587. * part of the driver that there is new data ready to transmit.
  588. * Once this function returns, the buffer has been copied, so it can
  589. * be reused.
  590. *
  591. * The steps followed to append are explained in detail in the file
  592. * header.
  593. *
  594. * Whenever we write to a message, we increase msg->size, so it
  595. * reflects exactly how big the message is. This is needed so that if
  596. * we concatenate two messages before they can be sent, the code that
  597. * sends the messages can find the boundaries (and it will replace the
  598. * size with the real barker before sending).
  599. *
  600. * Note:
  601. *
  602. * Cold and warm reset payloads need to be sent as a single
  603. * payload, so we handle that.
  604. */
  605. int i2400m_tx(struct i2400m *i2400m, const void *buf, size_t buf_len,
  606. enum i2400m_pt pl_type)
  607. {
  608. int result = -ENOSPC;
  609. struct device *dev = i2400m_dev(i2400m);
  610. unsigned long flags;
  611. size_t padded_len;
  612. void *ptr;
  613. unsigned is_singleton = pl_type == I2400M_PT_RESET_WARM
  614. || pl_type == I2400M_PT_RESET_COLD;
  615. d_fnstart(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u)\n",
  616. i2400m, buf, buf_len, pl_type);
  617. padded_len = ALIGN(buf_len, I2400M_PL_ALIGN);
  618. d_printf(5, dev, "padded_len %zd buf_len %zd\n", padded_len, buf_len);
  619. /* If there is no current TX message, create one; if the
  620. * current one is out of payload slots or we have a singleton,
  621. * close it and start a new one */
  622. spin_lock_irqsave(&i2400m->tx_lock, flags);
  623. result = -ESHUTDOWN;
  624. if (i2400m->tx_buf == NULL)
  625. goto error_tx_new;
  626. try_new:
  627. if (unlikely(i2400m->tx_msg == NULL))
  628. i2400m_tx_new(i2400m);
  629. else if (unlikely(!i2400m_tx_fits(i2400m)
  630. || (is_singleton && i2400m->tx_msg->num_pls != 0))) {
  631. d_printf(2, dev, "closing TX message (fits %u singleton "
  632. "%u num_pls %u)\n", i2400m_tx_fits(i2400m),
  633. is_singleton, i2400m->tx_msg->num_pls);
  634. i2400m_tx_close(i2400m);
  635. i2400m_tx_new(i2400m);
  636. }
  637. if (i2400m->tx_msg == NULL)
  638. goto error_tx_new;
  639. if (i2400m->tx_msg->size + padded_len > I2400M_TX_BUF_SIZE / 2) {
  640. d_printf(2, dev, "TX: message too big, going new\n");
  641. i2400m_tx_close(i2400m);
  642. i2400m_tx_new(i2400m);
  643. }
  644. if (i2400m->tx_msg == NULL)
  645. goto error_tx_new;
  646. /* So we have a current message header; now append space for
  647. * the message -- if there is not enough, try the head */
  648. ptr = i2400m_tx_fifo_push(i2400m, padded_len,
  649. i2400m->bus_tx_block_size);
  650. if (ptr == TAIL_FULL) { /* Tail is full, try head */
  651. d_printf(2, dev, "pl append: tail full\n");
  652. i2400m_tx_close(i2400m);
  653. i2400m_tx_skip_tail(i2400m);
  654. goto try_new;
  655. } else if (ptr == NULL) { /* All full */
  656. result = -ENOSPC;
  657. d_printf(2, dev, "pl append: all full\n");
  658. } else { /* Got space, copy it, set padding */
  659. struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
  660. unsigned num_pls = le16_to_cpu(tx_msg->num_pls);
  661. memcpy(ptr, buf, buf_len);
  662. memset(ptr + buf_len, 0xad, padded_len - buf_len);
  663. i2400m_pld_set(&tx_msg->pld[num_pls], buf_len, pl_type);
  664. d_printf(3, dev, "pld 0x%08x (type 0x%1x len 0x%04zx\n",
  665. le32_to_cpu(tx_msg->pld[num_pls].val),
  666. pl_type, buf_len);
  667. tx_msg->num_pls = le16_to_cpu(num_pls+1);
  668. tx_msg->size += padded_len;
  669. d_printf(2, dev, "TX: appended %zu b (up to %u b) pl #%u \n",
  670. padded_len, tx_msg->size, num_pls+1);
  671. d_printf(2, dev,
  672. "TX: appended hdr @%zu %zu b pl #%u @%zu %zu/%zu b\n",
  673. (void *)tx_msg - i2400m->tx_buf, (size_t)tx_msg->size,
  674. num_pls+1, ptr - i2400m->tx_buf, buf_len, padded_len);
  675. result = 0;
  676. if (is_singleton)
  677. i2400m_tx_close(i2400m);
  678. }
  679. error_tx_new:
  680. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  681. /* kick in most cases, except when the TX subsys is down, as
  682. * it might free space */
  683. if (likely(result != -ESHUTDOWN))
  684. i2400m->bus_tx_kick(i2400m);
  685. d_fnend(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u) = %d\n",
  686. i2400m, buf, buf_len, pl_type, result);
  687. return result;
  688. }
  689. EXPORT_SYMBOL_GPL(i2400m_tx);
  690. /**
  691. * i2400m_tx_msg_get - Get the first TX message in the FIFO to start sending it
  692. *
  693. * @i2400m: device descriptors
  694. * @bus_size: where to place the size of the TX message
  695. *
  696. * Called by the bus-specific driver to get the first TX message at
  697. * the FIF that is ready for transmission.
  698. *
  699. * It sets the state in @i2400m to indicate the bus-specific driver is
  700. * transfering that message (i2400m->tx_msg_size).
  701. *
  702. * Once the transfer is completed, call i2400m_tx_msg_sent().
  703. *
  704. * Notes:
  705. *
  706. * The size of the TX message to be transmitted might be smaller than
  707. * that of the TX message in the FIFO (in case the header was
  708. * shorter). Hence, we copy it in @bus_size, for the bus layer to
  709. * use. We keep the message's size in i2400m->tx_msg_size so that
  710. * when the bus later is done transferring we know how much to
  711. * advance the fifo.
  712. *
  713. * We collect statistics here as all the data is available and we
  714. * assume it is going to work [see i2400m_tx_msg_sent()].
  715. */
  716. struct i2400m_msg_hdr *i2400m_tx_msg_get(struct i2400m *i2400m,
  717. size_t *bus_size)
  718. {
  719. struct device *dev = i2400m_dev(i2400m);
  720. struct i2400m_msg_hdr *tx_msg, *tx_msg_moved;
  721. unsigned long flags, pls;
  722. d_fnstart(3, dev, "(i2400m %p bus_size %p)\n", i2400m, bus_size);
  723. spin_lock_irqsave(&i2400m->tx_lock, flags);
  724. tx_msg_moved = NULL;
  725. if (i2400m->tx_buf == NULL)
  726. goto out_unlock;
  727. skip:
  728. tx_msg_moved = NULL;
  729. if (i2400m->tx_in == i2400m->tx_out) { /* Empty FIFO? */
  730. i2400m->tx_in = 0;
  731. i2400m->tx_out = 0;
  732. d_printf(2, dev, "TX: FIFO empty: resetting\n");
  733. goto out_unlock;
  734. }
  735. tx_msg = i2400m->tx_buf + i2400m->tx_out % I2400M_TX_BUF_SIZE;
  736. if (tx_msg->size & I2400M_TX_SKIP) { /* skip? */
  737. d_printf(2, dev, "TX: skip: msg @%zu (%zu b)\n",
  738. i2400m->tx_out % I2400M_TX_BUF_SIZE,
  739. (size_t) tx_msg->size & ~I2400M_TX_SKIP);
  740. i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
  741. goto skip;
  742. }
  743. if (tx_msg->num_pls == 0) { /* No payloads? */
  744. if (tx_msg == i2400m->tx_msg) { /* open, we are done */
  745. d_printf(2, dev,
  746. "TX: FIFO empty: open msg w/o payloads @%zu\n",
  747. (void *) tx_msg - i2400m->tx_buf);
  748. tx_msg = NULL;
  749. goto out_unlock;
  750. } else { /* closed, skip it */
  751. d_printf(2, dev,
  752. "TX: skip msg w/o payloads @%zu (%zu b)\n",
  753. (void *) tx_msg - i2400m->tx_buf,
  754. (size_t) tx_msg->size);
  755. i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
  756. goto skip;
  757. }
  758. }
  759. if (tx_msg == i2400m->tx_msg) /* open msg? */
  760. i2400m_tx_close(i2400m);
  761. /* Now we have a valid TX message (with payloads) to TX */
  762. tx_msg_moved = (void *) tx_msg + tx_msg->offset;
  763. i2400m->tx_msg_size = tx_msg->size;
  764. *bus_size = tx_msg_moved->size;
  765. d_printf(2, dev, "TX: pid %d msg hdr at @%zu offset +@%zu "
  766. "size %zu bus_size %zu\n",
  767. current->pid, (void *) tx_msg - i2400m->tx_buf,
  768. (size_t) tx_msg->offset, (size_t) tx_msg->size,
  769. (size_t) tx_msg_moved->size);
  770. tx_msg_moved->barker = le32_to_cpu(I2400M_H2D_PREVIEW_BARKER);
  771. tx_msg_moved->sequence = le32_to_cpu(i2400m->tx_sequence++);
  772. pls = le32_to_cpu(tx_msg_moved->num_pls);
  773. i2400m->tx_pl_num += pls; /* Update stats */
  774. if (pls > i2400m->tx_pl_max)
  775. i2400m->tx_pl_max = pls;
  776. if (pls < i2400m->tx_pl_min)
  777. i2400m->tx_pl_min = pls;
  778. i2400m->tx_num++;
  779. i2400m->tx_size_acc += *bus_size;
  780. if (*bus_size < i2400m->tx_size_min)
  781. i2400m->tx_size_min = *bus_size;
  782. if (*bus_size > i2400m->tx_size_max)
  783. i2400m->tx_size_max = *bus_size;
  784. out_unlock:
  785. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  786. d_fnstart(3, dev, "(i2400m %p bus_size %p [%zu]) = %p\n",
  787. i2400m, bus_size, *bus_size, tx_msg_moved);
  788. return tx_msg_moved;
  789. }
  790. EXPORT_SYMBOL_GPL(i2400m_tx_msg_get);
  791. /**
  792. * i2400m_tx_msg_sent - indicate the transmission of a TX message
  793. *
  794. * @i2400m: device descriptor
  795. *
  796. * Called by the bus-specific driver when a message has been sent;
  797. * this pops it from the FIFO; and as there is space, start the queue
  798. * in case it was stopped.
  799. *
  800. * Should be called even if the message send failed and we are
  801. * dropping this TX message.
  802. */
  803. void i2400m_tx_msg_sent(struct i2400m *i2400m)
  804. {
  805. unsigned n;
  806. unsigned long flags;
  807. struct device *dev = i2400m_dev(i2400m);
  808. d_fnstart(3, dev, "(i2400m %p)\n", i2400m);
  809. spin_lock_irqsave(&i2400m->tx_lock, flags);
  810. if (i2400m->tx_buf == NULL)
  811. goto out_unlock;
  812. i2400m->tx_out += i2400m->tx_msg_size;
  813. d_printf(2, dev, "TX: sent %zu b\n", (size_t) i2400m->tx_msg_size);
  814. i2400m->tx_msg_size = 0;
  815. BUG_ON(i2400m->tx_out > i2400m->tx_in);
  816. /* level them FIFO markers off */
  817. n = i2400m->tx_out / I2400M_TX_BUF_SIZE;
  818. i2400m->tx_out %= I2400M_TX_BUF_SIZE;
  819. i2400m->tx_in -= n * I2400M_TX_BUF_SIZE;
  820. out_unlock:
  821. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  822. d_fnend(3, dev, "(i2400m %p) = void\n", i2400m);
  823. }
  824. EXPORT_SYMBOL_GPL(i2400m_tx_msg_sent);
  825. /**
  826. * i2400m_tx_setup - Initialize the TX queue and infrastructure
  827. *
  828. * Make sure we reset the TX sequence to zero, as when this function
  829. * is called, the firmware has been just restarted.
  830. */
  831. int i2400m_tx_setup(struct i2400m *i2400m)
  832. {
  833. int result;
  834. /* Do this here only once -- can't do on
  835. * i2400m_hard_start_xmit() as we'll cause race conditions if
  836. * the WS was scheduled on another CPU */
  837. INIT_WORK(&i2400m->wake_tx_ws, i2400m_wake_tx_work);
  838. i2400m->tx_sequence = 0;
  839. i2400m->tx_buf = kmalloc(I2400M_TX_BUF_SIZE, GFP_KERNEL);
  840. if (i2400m->tx_buf == NULL)
  841. result = -ENOMEM;
  842. else
  843. result = 0;
  844. /* Huh? the bus layer has to define this... */
  845. BUG_ON(i2400m->bus_tx_block_size == 0);
  846. return result;
  847. }
  848. /**
  849. * i2400m_tx_release - Tear down the TX queue and infrastructure
  850. */
  851. void i2400m_tx_release(struct i2400m *i2400m)
  852. {
  853. unsigned long flags;
  854. spin_lock_irqsave(&i2400m->tx_lock, flags);
  855. kfree(i2400m->tx_buf);
  856. i2400m->tx_buf = NULL;
  857. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  858. }