mcdi.c 29 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2008-2009 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include "net_driver.h"
  11. #include "nic.h"
  12. #include "io.h"
  13. #include "regs.h"
  14. #include "mcdi_pcol.h"
  15. #include "phy.h"
  16. /**************************************************************************
  17. *
  18. * Management-Controller-to-Driver Interface
  19. *
  20. **************************************************************************
  21. */
  22. /* Software-defined structure to the shared-memory */
  23. #define CMD_NOTIFY_PORT0 0
  24. #define CMD_NOTIFY_PORT1 4
  25. #define CMD_PDU_PORT0 0x008
  26. #define CMD_PDU_PORT1 0x108
  27. #define REBOOT_FLAG_PORT0 0x3f8
  28. #define REBOOT_FLAG_PORT1 0x3fc
  29. #define MCDI_RPC_TIMEOUT 10 /*seconds */
  30. #define MCDI_PDU(efx) \
  31. (efx_port_num(efx) ? CMD_PDU_PORT1 : CMD_PDU_PORT0)
  32. #define MCDI_DOORBELL(efx) \
  33. (efx_port_num(efx) ? CMD_NOTIFY_PORT1 : CMD_NOTIFY_PORT0)
  34. #define MCDI_REBOOT_FLAG(efx) \
  35. (efx_port_num(efx) ? REBOOT_FLAG_PORT1 : REBOOT_FLAG_PORT0)
  36. #define SEQ_MASK \
  37. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  38. static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
  39. {
  40. struct siena_nic_data *nic_data;
  41. EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  42. nic_data = efx->nic_data;
  43. return &nic_data->mcdi;
  44. }
  45. void efx_mcdi_init(struct efx_nic *efx)
  46. {
  47. struct efx_mcdi_iface *mcdi;
  48. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  49. return;
  50. mcdi = efx_mcdi(efx);
  51. init_waitqueue_head(&mcdi->wq);
  52. spin_lock_init(&mcdi->iface_lock);
  53. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  54. mcdi->mode = MCDI_MODE_POLL;
  55. (void) efx_mcdi_poll_reboot(efx);
  56. }
  57. static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
  58. const u8 *inbuf, size_t inlen)
  59. {
  60. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  61. unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  62. unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
  63. unsigned int i;
  64. efx_dword_t hdr;
  65. u32 xflags, seqno;
  66. BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
  67. BUG_ON(inlen & 3 || inlen >= 0x100);
  68. seqno = mcdi->seqno & SEQ_MASK;
  69. xflags = 0;
  70. if (mcdi->mode == MCDI_MODE_EVENTS)
  71. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  72. EFX_POPULATE_DWORD_6(hdr,
  73. MCDI_HEADER_RESPONSE, 0,
  74. MCDI_HEADER_RESYNC, 1,
  75. MCDI_HEADER_CODE, cmd,
  76. MCDI_HEADER_DATALEN, inlen,
  77. MCDI_HEADER_SEQ, seqno,
  78. MCDI_HEADER_XFLAGS, xflags);
  79. efx_writed(efx, &hdr, pdu);
  80. for (i = 0; i < inlen; i += 4)
  81. _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
  82. /* Ensure the payload is written out before the header */
  83. wmb();
  84. /* ring the doorbell with a distinctive value */
  85. _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
  86. }
  87. static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
  88. {
  89. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  90. unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  91. int i;
  92. BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
  93. BUG_ON(outlen & 3 || outlen >= 0x100);
  94. for (i = 0; i < outlen; i += 4)
  95. *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
  96. }
  97. static int efx_mcdi_poll(struct efx_nic *efx)
  98. {
  99. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  100. unsigned int time, finish;
  101. unsigned int respseq, respcmd, error;
  102. unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  103. unsigned int rc, spins;
  104. efx_dword_t reg;
  105. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  106. rc = efx_mcdi_poll_reboot(efx);
  107. if (rc)
  108. goto out;
  109. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  110. * because generally mcdi responses are fast. After that, back off
  111. * and poll once a jiffy (approximately)
  112. */
  113. spins = TICK_USEC;
  114. finish = get_seconds() + MCDI_RPC_TIMEOUT;
  115. while (1) {
  116. if (spins != 0) {
  117. --spins;
  118. udelay(1);
  119. } else
  120. schedule();
  121. time = get_seconds();
  122. rmb();
  123. efx_readd(efx, &reg, pdu);
  124. /* All 1's indicates that shared memory is in reset (and is
  125. * not a valid header). Wait for it to come out reset before
  126. * completing the command */
  127. if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
  128. EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
  129. break;
  130. if (time >= finish)
  131. return -ETIMEDOUT;
  132. }
  133. mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
  134. respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
  135. respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
  136. error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
  137. if (error && mcdi->resplen == 0) {
  138. EFX_ERR(efx, "MC rebooted\n");
  139. rc = EIO;
  140. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  141. EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  142. respseq, mcdi->seqno);
  143. rc = EIO;
  144. } else if (error) {
  145. efx_readd(efx, &reg, pdu + 4);
  146. switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
  147. #define TRANSLATE_ERROR(name) \
  148. case MC_CMD_ERR_ ## name: \
  149. rc = name; \
  150. break
  151. TRANSLATE_ERROR(ENOENT);
  152. TRANSLATE_ERROR(EINTR);
  153. TRANSLATE_ERROR(EACCES);
  154. TRANSLATE_ERROR(EBUSY);
  155. TRANSLATE_ERROR(EINVAL);
  156. TRANSLATE_ERROR(EDEADLK);
  157. TRANSLATE_ERROR(ENOSYS);
  158. TRANSLATE_ERROR(ETIME);
  159. #undef TRANSLATE_ERROR
  160. default:
  161. rc = EIO;
  162. break;
  163. }
  164. } else
  165. rc = 0;
  166. out:
  167. mcdi->resprc = rc;
  168. if (rc)
  169. mcdi->resplen = 0;
  170. /* Return rc=0 like wait_event_timeout() */
  171. return 0;
  172. }
  173. /* Test and clear MC-rebooted flag for this port/function */
  174. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  175. {
  176. unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx);
  177. efx_dword_t reg;
  178. uint32_t value;
  179. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  180. return false;
  181. efx_readd(efx, &reg, addr);
  182. value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
  183. if (value == 0)
  184. return 0;
  185. EFX_ZERO_DWORD(reg);
  186. efx_writed(efx, &reg, addr);
  187. if (value == MC_STATUS_DWORD_ASSERT)
  188. return -EINTR;
  189. else
  190. return -EIO;
  191. }
  192. static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
  193. {
  194. /* Wait until the interface becomes QUIESCENT and we win the race
  195. * to mark it RUNNING. */
  196. wait_event(mcdi->wq,
  197. atomic_cmpxchg(&mcdi->state,
  198. MCDI_STATE_QUIESCENT,
  199. MCDI_STATE_RUNNING)
  200. == MCDI_STATE_QUIESCENT);
  201. }
  202. static int efx_mcdi_await_completion(struct efx_nic *efx)
  203. {
  204. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  205. if (wait_event_timeout(
  206. mcdi->wq,
  207. atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
  208. msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
  209. return -ETIMEDOUT;
  210. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  211. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  212. * completed the request first, then we'll just end up completing the
  213. * request again, which is safe.
  214. *
  215. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  216. * wait_event_timeout() implicitly provides.
  217. */
  218. if (mcdi->mode == MCDI_MODE_POLL)
  219. return efx_mcdi_poll(efx);
  220. return 0;
  221. }
  222. static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
  223. {
  224. /* If the interface is RUNNING, then move to COMPLETED and wake any
  225. * waiters. If the interface isn't in RUNNING then we've received a
  226. * duplicate completion after we've already transitioned back to
  227. * QUIESCENT. [A subsequent invocation would increment seqno, so would
  228. * have failed the seqno check].
  229. */
  230. if (atomic_cmpxchg(&mcdi->state,
  231. MCDI_STATE_RUNNING,
  232. MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
  233. wake_up(&mcdi->wq);
  234. return true;
  235. }
  236. return false;
  237. }
  238. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  239. {
  240. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  241. wake_up(&mcdi->wq);
  242. }
  243. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  244. unsigned int datalen, unsigned int errno)
  245. {
  246. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  247. bool wake = false;
  248. spin_lock(&mcdi->iface_lock);
  249. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  250. if (mcdi->credits)
  251. /* The request has been cancelled */
  252. --mcdi->credits;
  253. else
  254. EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx "
  255. "seq 0x%x\n", seqno, mcdi->seqno);
  256. } else {
  257. mcdi->resprc = errno;
  258. mcdi->resplen = datalen;
  259. wake = true;
  260. }
  261. spin_unlock(&mcdi->iface_lock);
  262. if (wake)
  263. efx_mcdi_complete(mcdi);
  264. }
  265. /* Issue the given command by writing the data into the shared memory PDU,
  266. * ring the doorbell and wait for completion. Copyout the result. */
  267. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  268. const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
  269. size_t *outlen_actual)
  270. {
  271. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  272. int rc;
  273. BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  274. efx_mcdi_acquire(mcdi);
  275. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  276. spin_lock_bh(&mcdi->iface_lock);
  277. ++mcdi->seqno;
  278. spin_unlock_bh(&mcdi->iface_lock);
  279. efx_mcdi_copyin(efx, cmd, inbuf, inlen);
  280. if (mcdi->mode == MCDI_MODE_POLL)
  281. rc = efx_mcdi_poll(efx);
  282. else
  283. rc = efx_mcdi_await_completion(efx);
  284. if (rc != 0) {
  285. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  286. * and completing a request we've just cancelled, by ensuring
  287. * that the seqno check therein fails.
  288. */
  289. spin_lock_bh(&mcdi->iface_lock);
  290. ++mcdi->seqno;
  291. ++mcdi->credits;
  292. spin_unlock_bh(&mcdi->iface_lock);
  293. EFX_ERR(efx, "MC command 0x%x inlen %d mode %d timed out\n",
  294. cmd, (int)inlen, mcdi->mode);
  295. } else {
  296. size_t resplen;
  297. /* At the very least we need a memory barrier here to ensure
  298. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  299. * a spurious efx_mcdi_ev_cpl() running concurrently by
  300. * acquiring the iface_lock. */
  301. spin_lock_bh(&mcdi->iface_lock);
  302. rc = -mcdi->resprc;
  303. resplen = mcdi->resplen;
  304. spin_unlock_bh(&mcdi->iface_lock);
  305. if (rc == 0) {
  306. efx_mcdi_copyout(efx, outbuf,
  307. min(outlen, mcdi->resplen + 3) & ~0x3);
  308. if (outlen_actual != NULL)
  309. *outlen_actual = resplen;
  310. } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
  311. ; /* Don't reset if MC_CMD_REBOOT returns EIO */
  312. else if (rc == -EIO || rc == -EINTR) {
  313. EFX_ERR(efx, "MC fatal error %d\n", -rc);
  314. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  315. } else
  316. EFX_ERR(efx, "MC command 0x%x inlen %d failed rc=%d\n",
  317. cmd, (int)inlen, -rc);
  318. }
  319. efx_mcdi_release(mcdi);
  320. return rc;
  321. }
  322. void efx_mcdi_mode_poll(struct efx_nic *efx)
  323. {
  324. struct efx_mcdi_iface *mcdi;
  325. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  326. return;
  327. mcdi = efx_mcdi(efx);
  328. if (mcdi->mode == MCDI_MODE_POLL)
  329. return;
  330. /* We can switch from event completion to polled completion, because
  331. * mcdi requests are always completed in shared memory. We do this by
  332. * switching the mode to POLL'd then completing the request.
  333. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  334. *
  335. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  336. * which efx_mcdi_complete() provides for us.
  337. */
  338. mcdi->mode = MCDI_MODE_POLL;
  339. efx_mcdi_complete(mcdi);
  340. }
  341. void efx_mcdi_mode_event(struct efx_nic *efx)
  342. {
  343. struct efx_mcdi_iface *mcdi;
  344. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  345. return;
  346. mcdi = efx_mcdi(efx);
  347. if (mcdi->mode == MCDI_MODE_EVENTS)
  348. return;
  349. /* We can't switch from polled to event completion in the middle of a
  350. * request, because the completion method is specified in the request.
  351. * So acquire the interface to serialise the requestors. We don't need
  352. * to acquire the iface_lock to change the mode here, but we do need a
  353. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  354. * efx_mcdi_acquire() provides.
  355. */
  356. efx_mcdi_acquire(mcdi);
  357. mcdi->mode = MCDI_MODE_EVENTS;
  358. efx_mcdi_release(mcdi);
  359. }
  360. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  361. {
  362. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  363. /* If there is an outstanding MCDI request, it has been terminated
  364. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  365. * in polled mode, then do nothing because the MC reboot handler will
  366. * set the header correctly. However, if the mcdi interface is waiting
  367. * for a CMDDONE event it won't receive it [and since all MCDI events
  368. * are sent to the same queue, we can't be racing with
  369. * efx_mcdi_ev_cpl()]
  370. *
  371. * There's a race here with efx_mcdi_rpc(), because we might receive
  372. * a REBOOT event *before* the request has been copied out. In polled
  373. * mode (during startup) this is irrelevent, because efx_mcdi_complete()
  374. * is ignored. In event mode, this condition is just an edge-case of
  375. * receiving a REBOOT event after posting the MCDI request. Did the mc
  376. * reboot before or after the copyout? The best we can do always is
  377. * just return failure.
  378. */
  379. spin_lock(&mcdi->iface_lock);
  380. if (efx_mcdi_complete(mcdi)) {
  381. if (mcdi->mode == MCDI_MODE_EVENTS) {
  382. mcdi->resprc = rc;
  383. mcdi->resplen = 0;
  384. }
  385. } else
  386. /* Nobody was waiting for an MCDI request, so trigger a reset */
  387. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  388. spin_unlock(&mcdi->iface_lock);
  389. }
  390. static unsigned int efx_mcdi_event_link_speed[] = {
  391. [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
  392. [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
  393. [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
  394. };
  395. static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
  396. {
  397. u32 flags, fcntl, speed, lpa;
  398. speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
  399. EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
  400. speed = efx_mcdi_event_link_speed[speed];
  401. flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
  402. fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
  403. lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
  404. /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
  405. * which is only run after flushing the event queues. Therefore, it
  406. * is safe to modify the link state outside of the mac_lock here.
  407. */
  408. efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
  409. efx_mcdi_phy_check_fcntl(efx, lpa);
  410. efx_link_status_changed(efx);
  411. }
  412. static const char *sensor_names[] = {
  413. [MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor",
  414. [MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor",
  415. [MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling",
  416. [MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor",
  417. [MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling",
  418. [MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor",
  419. [MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling",
  420. [MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor",
  421. [MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor",
  422. [MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor",
  423. [MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor",
  424. [MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor",
  425. [MC_CMD_SENSOR_IN_12V0] = "12V supply sensor"
  426. };
  427. static const char *sensor_status_names[] = {
  428. [MC_CMD_SENSOR_STATE_OK] = "OK",
  429. [MC_CMD_SENSOR_STATE_WARNING] = "Warning",
  430. [MC_CMD_SENSOR_STATE_FATAL] = "Fatal",
  431. [MC_CMD_SENSOR_STATE_BROKEN] = "Device failure",
  432. };
  433. static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev)
  434. {
  435. unsigned int monitor, state, value;
  436. const char *name, *state_txt;
  437. monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR);
  438. state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE);
  439. value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE);
  440. /* Deal gracefully with the board having more drivers than we
  441. * know about, but do not expect new sensor states. */
  442. name = (monitor >= ARRAY_SIZE(sensor_names))
  443. ? "No sensor name available" :
  444. sensor_names[monitor];
  445. EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names));
  446. state_txt = sensor_status_names[state];
  447. EFX_ERR(efx, "Sensor %d (%s) reports condition '%s' for raw value %d\n",
  448. monitor, name, state_txt, value);
  449. }
  450. /* Called from falcon_process_eventq for MCDI events */
  451. void efx_mcdi_process_event(struct efx_channel *channel,
  452. efx_qword_t *event)
  453. {
  454. struct efx_nic *efx = channel->efx;
  455. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  456. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  457. switch (code) {
  458. case MCDI_EVENT_CODE_BADSSERT:
  459. EFX_ERR(efx, "MC watchdog or assertion failure at 0x%x\n", data);
  460. efx_mcdi_ev_death(efx, EINTR);
  461. break;
  462. case MCDI_EVENT_CODE_PMNOTICE:
  463. EFX_INFO(efx, "MCDI PM event.\n");
  464. break;
  465. case MCDI_EVENT_CODE_CMDDONE:
  466. efx_mcdi_ev_cpl(efx,
  467. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  468. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  469. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  470. break;
  471. case MCDI_EVENT_CODE_LINKCHANGE:
  472. efx_mcdi_process_link_change(efx, event);
  473. break;
  474. case MCDI_EVENT_CODE_SENSOREVT:
  475. efx_mcdi_sensor_event(efx, event);
  476. break;
  477. case MCDI_EVENT_CODE_SCHEDERR:
  478. EFX_INFO(efx, "MC Scheduler error address=0x%x\n", data);
  479. break;
  480. case MCDI_EVENT_CODE_REBOOT:
  481. EFX_INFO(efx, "MC Reboot\n");
  482. efx_mcdi_ev_death(efx, EIO);
  483. break;
  484. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  485. /* MAC stats are gather lazily. We can ignore this. */
  486. break;
  487. default:
  488. EFX_ERR(efx, "Unknown MCDI event 0x%x\n", code);
  489. }
  490. }
  491. /**************************************************************************
  492. *
  493. * Specific request functions
  494. *
  495. **************************************************************************
  496. */
  497. int efx_mcdi_fwver(struct efx_nic *efx, u64 *version, u32 *build)
  498. {
  499. u8 outbuf[ALIGN(MC_CMD_GET_VERSION_V1_OUT_LEN, 4)];
  500. size_t outlength;
  501. const __le16 *ver_words;
  502. int rc;
  503. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  504. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  505. outbuf, sizeof(outbuf), &outlength);
  506. if (rc)
  507. goto fail;
  508. if (outlength == MC_CMD_GET_VERSION_V0_OUT_LEN) {
  509. *version = 0;
  510. *build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
  511. return 0;
  512. }
  513. if (outlength < MC_CMD_GET_VERSION_V1_OUT_LEN) {
  514. rc = -EMSGSIZE;
  515. goto fail;
  516. }
  517. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  518. *version = (((u64)le16_to_cpu(ver_words[0]) << 48) |
  519. ((u64)le16_to_cpu(ver_words[1]) << 32) |
  520. ((u64)le16_to_cpu(ver_words[2]) << 16) |
  521. le16_to_cpu(ver_words[3]));
  522. *build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
  523. return 0;
  524. fail:
  525. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  526. return rc;
  527. }
  528. int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  529. bool *was_attached)
  530. {
  531. u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
  532. u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
  533. size_t outlen;
  534. int rc;
  535. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  536. driver_operating ? 1 : 0);
  537. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  538. rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  539. outbuf, sizeof(outbuf), &outlen);
  540. if (rc)
  541. goto fail;
  542. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN)
  543. goto fail;
  544. if (was_attached != NULL)
  545. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  546. return 0;
  547. fail:
  548. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  549. return rc;
  550. }
  551. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  552. u16 *fw_subtype_list)
  553. {
  554. uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LEN];
  555. size_t outlen;
  556. int port_num = efx_port_num(efx);
  557. int offset;
  558. int rc;
  559. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  560. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  561. outbuf, sizeof(outbuf), &outlen);
  562. if (rc)
  563. goto fail;
  564. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LEN) {
  565. rc = -EMSGSIZE;
  566. goto fail;
  567. }
  568. offset = (port_num)
  569. ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
  570. : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
  571. if (mac_address)
  572. memcpy(mac_address, outbuf + offset, ETH_ALEN);
  573. if (fw_subtype_list)
  574. memcpy(fw_subtype_list,
  575. outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
  576. MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN);
  577. return 0;
  578. fail:
  579. EFX_ERR(efx, "%s: failed rc=%d len=%d\n", __func__, rc, (int)outlen);
  580. return rc;
  581. }
  582. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  583. {
  584. u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
  585. u32 dest = 0;
  586. int rc;
  587. if (uart)
  588. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  589. if (evq)
  590. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  591. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  592. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  593. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  594. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  595. NULL, 0, NULL);
  596. if (rc)
  597. goto fail;
  598. return 0;
  599. fail:
  600. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  601. return rc;
  602. }
  603. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  604. {
  605. u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
  606. size_t outlen;
  607. int rc;
  608. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  609. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  610. outbuf, sizeof(outbuf), &outlen);
  611. if (rc)
  612. goto fail;
  613. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN)
  614. goto fail;
  615. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  616. return 0;
  617. fail:
  618. EFX_ERR(efx, "%s: failed rc=%d\n",
  619. __func__, rc);
  620. return rc;
  621. }
  622. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  623. size_t *size_out, size_t *erase_size_out,
  624. bool *protected_out)
  625. {
  626. u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
  627. u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
  628. size_t outlen;
  629. int rc;
  630. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  631. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  632. outbuf, sizeof(outbuf), &outlen);
  633. if (rc)
  634. goto fail;
  635. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN)
  636. goto fail;
  637. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  638. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  639. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  640. (1 << MC_CMD_NVRAM_PROTECTED_LBN));
  641. return 0;
  642. fail:
  643. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  644. return rc;
  645. }
  646. int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  647. {
  648. u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
  649. int rc;
  650. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  651. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  652. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  653. NULL, 0, NULL);
  654. if (rc)
  655. goto fail;
  656. return 0;
  657. fail:
  658. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  659. return rc;
  660. }
  661. int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  662. loff_t offset, u8 *buffer, size_t length)
  663. {
  664. u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
  665. u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(length)];
  666. size_t outlen;
  667. int rc;
  668. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  669. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  670. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  671. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  672. outbuf, sizeof(outbuf), &outlen);
  673. if (rc)
  674. goto fail;
  675. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  676. return 0;
  677. fail:
  678. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  679. return rc;
  680. }
  681. int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  682. loff_t offset, const u8 *buffer, size_t length)
  683. {
  684. u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(length)];
  685. int rc;
  686. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  687. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  688. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  689. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  690. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  691. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, sizeof(inbuf),
  692. NULL, 0, NULL);
  693. if (rc)
  694. goto fail;
  695. return 0;
  696. fail:
  697. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  698. return rc;
  699. }
  700. int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  701. loff_t offset, size_t length)
  702. {
  703. u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
  704. int rc;
  705. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  706. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  707. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  708. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  709. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  710. NULL, 0, NULL);
  711. if (rc)
  712. goto fail;
  713. return 0;
  714. fail:
  715. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  716. return rc;
  717. }
  718. int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  719. {
  720. u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
  721. int rc;
  722. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  723. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  724. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  725. NULL, 0, NULL);
  726. if (rc)
  727. goto fail;
  728. return 0;
  729. fail:
  730. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  731. return rc;
  732. }
  733. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  734. {
  735. union {
  736. u8 asserts[MC_CMD_GET_ASSERTS_IN_LEN];
  737. u8 reboot[MC_CMD_REBOOT_IN_LEN];
  738. } inbuf;
  739. u8 assertion[MC_CMD_GET_ASSERTS_OUT_LEN];
  740. unsigned int flags, index, ofst;
  741. const char *reason;
  742. size_t outlen;
  743. int retry;
  744. int rc;
  745. /* Check if the MC is in the assertion handler, retrying twice. Once
  746. * because a boot-time assertion might cause this command to fail
  747. * with EINTR. And once again because GET_ASSERTS can race with
  748. * MC_CMD_REBOOT running on the other port. */
  749. retry = 2;
  750. do {
  751. MCDI_SET_DWORD(inbuf.asserts, GET_ASSERTS_IN_CLEAR, 0);
  752. rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
  753. inbuf.asserts, MC_CMD_GET_ASSERTS_IN_LEN,
  754. assertion, sizeof(assertion), &outlen);
  755. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  756. if (rc)
  757. return rc;
  758. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  759. return -EINVAL;
  760. flags = MCDI_DWORD(assertion, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  761. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  762. return 0;
  763. /* Reset the hardware atomically such that only one port with succeed.
  764. * This command will succeed if a reboot is no longer required (because
  765. * the other port did it first), but fail with EIO if it succeeds.
  766. */
  767. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  768. MCDI_SET_DWORD(inbuf.reboot, REBOOT_IN_FLAGS,
  769. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  770. efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf.reboot, MC_CMD_REBOOT_IN_LEN,
  771. NULL, 0, NULL);
  772. /* Print out the assertion */
  773. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  774. ? "system-level assertion"
  775. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  776. ? "thread-level assertion"
  777. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  778. ? "watchdog reset"
  779. : "unknown assertion";
  780. EFX_ERR(efx, "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  781. MCDI_DWORD(assertion, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  782. MCDI_DWORD(assertion, GET_ASSERTS_OUT_THREAD_OFFS));
  783. /* Print out the registers */
  784. ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
  785. for (index = 1; index < 32; index++) {
  786. EFX_ERR(efx, "R%.2d (?): 0x%.8x\n", index,
  787. MCDI_DWORD2(assertion, ofst));
  788. ofst += sizeof(efx_dword_t);
  789. }
  790. return 0;
  791. }
  792. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  793. {
  794. u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
  795. int rc;
  796. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  797. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  798. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  799. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  800. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  801. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  802. NULL, 0, NULL);
  803. if (rc)
  804. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  805. }
  806. int efx_mcdi_reset_port(struct efx_nic *efx)
  807. {
  808. int rc = efx_mcdi_rpc(efx, MC_CMD_PORT_RESET, NULL, 0, NULL, 0, NULL);
  809. if (rc)
  810. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  811. return rc;
  812. }
  813. int efx_mcdi_reset_mc(struct efx_nic *efx)
  814. {
  815. u8 inbuf[MC_CMD_REBOOT_IN_LEN];
  816. int rc;
  817. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  818. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  819. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  820. NULL, 0, NULL);
  821. /* White is black, and up is down */
  822. if (rc == -EIO)
  823. return 0;
  824. if (rc == 0)
  825. rc = -EIO;
  826. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  827. return rc;
  828. }
  829. int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  830. const u8 *mac, int *id_out)
  831. {
  832. u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
  833. u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
  834. size_t outlen;
  835. int rc;
  836. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  837. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  838. MC_CMD_FILTER_MODE_SIMPLE);
  839. memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
  840. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  841. outbuf, sizeof(outbuf), &outlen);
  842. if (rc)
  843. goto fail;
  844. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  845. rc = -EMSGSIZE;
  846. goto fail;
  847. }
  848. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  849. return 0;
  850. fail:
  851. *id_out = -1;
  852. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  853. return rc;
  854. }
  855. int
  856. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  857. {
  858. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  859. }
  860. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  861. {
  862. u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
  863. size_t outlen;
  864. int rc;
  865. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  866. outbuf, sizeof(outbuf), &outlen);
  867. if (rc)
  868. goto fail;
  869. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  870. rc = -EMSGSIZE;
  871. goto fail;
  872. }
  873. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  874. return 0;
  875. fail:
  876. *id_out = -1;
  877. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  878. return rc;
  879. }
  880. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  881. {
  882. u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
  883. int rc;
  884. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  885. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  886. NULL, 0, NULL);
  887. if (rc)
  888. goto fail;
  889. return 0;
  890. fail:
  891. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  892. return rc;
  893. }
  894. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  895. {
  896. int rc;
  897. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  898. if (rc)
  899. goto fail;
  900. return 0;
  901. fail:
  902. EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
  903. return rc;
  904. }