falcon_boards.c 20 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007-2009 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/rtnetlink.h>
  10. #include "net_driver.h"
  11. #include "phy.h"
  12. #include "efx.h"
  13. #include "nic.h"
  14. #include "regs.h"
  15. #include "io.h"
  16. #include "workarounds.h"
  17. /* Macros for unpacking the board revision */
  18. /* The revision info is in host byte order. */
  19. #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
  20. #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
  21. #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
  22. /* Board types */
  23. #define FALCON_BOARD_SFE4001 0x01
  24. #define FALCON_BOARD_SFE4002 0x02
  25. #define FALCON_BOARD_SFN4111T 0x51
  26. #define FALCON_BOARD_SFN4112F 0x52
  27. /*****************************************************************************
  28. * Support for LM87 sensor chip used on several boards
  29. */
  30. #define LM87_REG_ALARMS1 0x41
  31. #define LM87_REG_ALARMS2 0x42
  32. #define LM87_IN_LIMITS(nr, _min, _max) \
  33. 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
  34. #define LM87_AIN_LIMITS(nr, _min, _max) \
  35. 0x3B + (nr), _max, 0x1A + (nr), _min
  36. #define LM87_TEMP_INT_LIMITS(_min, _max) \
  37. 0x39, _max, 0x3A, _min
  38. #define LM87_TEMP_EXT1_LIMITS(_min, _max) \
  39. 0x37, _max, 0x38, _min
  40. #define LM87_ALARM_TEMP_INT 0x10
  41. #define LM87_ALARM_TEMP_EXT1 0x20
  42. #if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
  43. static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  44. const u8 *reg_values)
  45. {
  46. struct falcon_board *board = falcon_board(efx);
  47. struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
  48. int rc;
  49. if (!client)
  50. return -EIO;
  51. while (*reg_values) {
  52. u8 reg = *reg_values++;
  53. u8 value = *reg_values++;
  54. rc = i2c_smbus_write_byte_data(client, reg, value);
  55. if (rc)
  56. goto err;
  57. }
  58. board->hwmon_client = client;
  59. return 0;
  60. err:
  61. i2c_unregister_device(client);
  62. return rc;
  63. }
  64. static void efx_fini_lm87(struct efx_nic *efx)
  65. {
  66. i2c_unregister_device(falcon_board(efx)->hwmon_client);
  67. }
  68. static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  69. {
  70. struct i2c_client *client = falcon_board(efx)->hwmon_client;
  71. s32 alarms1, alarms2;
  72. /* If link is up then do not monitor temperature */
  73. if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
  74. return 0;
  75. alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
  76. alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
  77. if (alarms1 < 0)
  78. return alarms1;
  79. if (alarms2 < 0)
  80. return alarms2;
  81. alarms1 &= mask;
  82. alarms2 &= mask >> 8;
  83. if (alarms1 || alarms2) {
  84. EFX_ERR(efx,
  85. "LM87 detected a hardware failure (status %02x:%02x)"
  86. "%s%s\n",
  87. alarms1, alarms2,
  88. (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
  89. (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
  90. return -ERANGE;
  91. }
  92. return 0;
  93. }
  94. #else /* !CONFIG_SENSORS_LM87 */
  95. static inline int
  96. efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
  97. const u8 *reg_values)
  98. {
  99. return 0;
  100. }
  101. static inline void efx_fini_lm87(struct efx_nic *efx)
  102. {
  103. }
  104. static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
  105. {
  106. return 0;
  107. }
  108. #endif /* CONFIG_SENSORS_LM87 */
  109. /*****************************************************************************
  110. * Support for the SFE4001 and SFN4111T NICs.
  111. *
  112. * The SFE4001 does not power-up fully at reset due to its high power
  113. * consumption. We control its power via a PCA9539 I/O expander.
  114. * Both boards have a MAX6647 temperature monitor which we expose to
  115. * the lm90 driver.
  116. *
  117. * This also provides minimal support for reflashing the PHY, which is
  118. * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
  119. * On SFE4001 rev A2 and later this is connected to the 3V3X output of
  120. * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
  121. * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
  122. * exclusive with the network device being open.
  123. */
  124. /**************************************************************************
  125. * Support for I2C IO Expander device on SFE4001
  126. */
  127. #define PCA9539 0x74
  128. #define P0_IN 0x00
  129. #define P0_OUT 0x02
  130. #define P0_INVERT 0x04
  131. #define P0_CONFIG 0x06
  132. #define P0_EN_1V0X_LBN 0
  133. #define P0_EN_1V0X_WIDTH 1
  134. #define P0_EN_1V2_LBN 1
  135. #define P0_EN_1V2_WIDTH 1
  136. #define P0_EN_2V5_LBN 2
  137. #define P0_EN_2V5_WIDTH 1
  138. #define P0_EN_3V3X_LBN 3
  139. #define P0_EN_3V3X_WIDTH 1
  140. #define P0_EN_5V_LBN 4
  141. #define P0_EN_5V_WIDTH 1
  142. #define P0_SHORTEN_JTAG_LBN 5
  143. #define P0_SHORTEN_JTAG_WIDTH 1
  144. #define P0_X_TRST_LBN 6
  145. #define P0_X_TRST_WIDTH 1
  146. #define P0_DSP_RESET_LBN 7
  147. #define P0_DSP_RESET_WIDTH 1
  148. #define P1_IN 0x01
  149. #define P1_OUT 0x03
  150. #define P1_INVERT 0x05
  151. #define P1_CONFIG 0x07
  152. #define P1_AFE_PWD_LBN 0
  153. #define P1_AFE_PWD_WIDTH 1
  154. #define P1_DSP_PWD25_LBN 1
  155. #define P1_DSP_PWD25_WIDTH 1
  156. #define P1_RESERVED_LBN 2
  157. #define P1_RESERVED_WIDTH 2
  158. #define P1_SPARE_LBN 4
  159. #define P1_SPARE_WIDTH 4
  160. /* Temperature Sensor */
  161. #define MAX664X_REG_RSL 0x02
  162. #define MAX664X_REG_WLHO 0x0B
  163. static void sfe4001_poweroff(struct efx_nic *efx)
  164. {
  165. struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
  166. struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
  167. /* Turn off all power rails and disable outputs */
  168. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  169. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  170. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  171. /* Clear any over-temperature alert */
  172. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  173. }
  174. static int sfe4001_poweron(struct efx_nic *efx)
  175. {
  176. struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
  177. struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
  178. unsigned int i, j;
  179. int rc;
  180. u8 out;
  181. /* Clear any previous over-temperature alert */
  182. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  183. if (rc < 0)
  184. return rc;
  185. /* Enable port 0 and port 1 outputs on IO expander */
  186. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  187. if (rc)
  188. return rc;
  189. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  190. 0xff & ~(1 << P1_SPARE_LBN));
  191. if (rc)
  192. goto fail_on;
  193. /* If PHY power is on, turn it all off and wait 1 second to
  194. * ensure a full reset.
  195. */
  196. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  197. if (rc < 0)
  198. goto fail_on;
  199. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  200. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  201. (0 << P0_EN_1V0X_LBN));
  202. if (rc != out) {
  203. EFX_INFO(efx, "power-cycling PHY\n");
  204. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  205. if (rc)
  206. goto fail_on;
  207. schedule_timeout_uninterruptible(HZ);
  208. }
  209. for (i = 0; i < 20; ++i) {
  210. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  211. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  212. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  213. (1 << P0_X_TRST_LBN));
  214. if (efx->phy_mode & PHY_MODE_SPECIAL)
  215. out |= 1 << P0_EN_3V3X_LBN;
  216. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  217. if (rc)
  218. goto fail_on;
  219. msleep(10);
  220. /* Turn on 1V power rail */
  221. out &= ~(1 << P0_EN_1V0X_LBN);
  222. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  223. if (rc)
  224. goto fail_on;
  225. EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
  226. /* In flash config mode, DSP does not turn on AFE, so
  227. * just wait 1 second.
  228. */
  229. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  230. schedule_timeout_uninterruptible(HZ);
  231. return 0;
  232. }
  233. for (j = 0; j < 10; ++j) {
  234. msleep(100);
  235. /* Check DSP has asserted AFE power line */
  236. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  237. if (rc < 0)
  238. goto fail_on;
  239. if (rc & (1 << P1_AFE_PWD_LBN))
  240. return 0;
  241. }
  242. }
  243. EFX_INFO(efx, "timed out waiting for DSP boot\n");
  244. rc = -ETIMEDOUT;
  245. fail_on:
  246. sfe4001_poweroff(efx);
  247. return rc;
  248. }
  249. static int sfn4111t_reset(struct efx_nic *efx)
  250. {
  251. struct falcon_board *board = falcon_board(efx);
  252. efx_oword_t reg;
  253. /* GPIO 3 and the GPIO register are shared with I2C, so block that */
  254. i2c_lock_adapter(&board->i2c_adap);
  255. /* Pull RST_N (GPIO 2) low then let it up again, setting the
  256. * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
  257. * output enables; the output levels should always be 0 (low)
  258. * and we rely on external pull-ups. */
  259. efx_reado(efx, &reg, FR_AB_GPIO_CTL);
  260. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
  261. efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
  262. msleep(1000);
  263. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
  264. EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
  265. !!(efx->phy_mode & PHY_MODE_SPECIAL));
  266. efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
  267. msleep(1);
  268. i2c_unlock_adapter(&board->i2c_adap);
  269. ssleep(1);
  270. return 0;
  271. }
  272. static ssize_t show_phy_flash_cfg(struct device *dev,
  273. struct device_attribute *attr, char *buf)
  274. {
  275. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  276. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  277. }
  278. static ssize_t set_phy_flash_cfg(struct device *dev,
  279. struct device_attribute *attr,
  280. const char *buf, size_t count)
  281. {
  282. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  283. enum efx_phy_mode old_mode, new_mode;
  284. int err;
  285. rtnl_lock();
  286. old_mode = efx->phy_mode;
  287. if (count == 0 || *buf == '0')
  288. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  289. else
  290. new_mode = PHY_MODE_SPECIAL;
  291. if (old_mode == new_mode) {
  292. err = 0;
  293. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  294. err = -EBUSY;
  295. } else {
  296. /* Reset the PHY, reconfigure the MAC and enable/disable
  297. * MAC stats accordingly. */
  298. efx->phy_mode = new_mode;
  299. if (new_mode & PHY_MODE_SPECIAL)
  300. falcon_stop_nic_stats(efx);
  301. if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
  302. err = sfe4001_poweron(efx);
  303. else
  304. err = sfn4111t_reset(efx);
  305. if (!err)
  306. err = efx_reconfigure_port(efx);
  307. if (!(new_mode & PHY_MODE_SPECIAL))
  308. falcon_start_nic_stats(efx);
  309. }
  310. rtnl_unlock();
  311. return err ? err : count;
  312. }
  313. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  314. static void sfe4001_fini(struct efx_nic *efx)
  315. {
  316. struct falcon_board *board = falcon_board(efx);
  317. EFX_INFO(efx, "%s\n", __func__);
  318. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  319. sfe4001_poweroff(efx);
  320. i2c_unregister_device(board->ioexp_client);
  321. i2c_unregister_device(board->hwmon_client);
  322. }
  323. static int sfe4001_check_hw(struct efx_nic *efx)
  324. {
  325. s32 status;
  326. /* If XAUI link is up then do not monitor */
  327. if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
  328. return 0;
  329. /* Check the powered status of the PHY. Lack of power implies that
  330. * the MAX6647 has shut down power to it, probably due to a temp.
  331. * alarm. Reading the power status rather than the MAX6647 status
  332. * directly because the later is read-to-clear and would thus
  333. * start to power up the PHY again when polled, causing us to blip
  334. * the power undesirably.
  335. * We know we can read from the IO expander because we did
  336. * it during power-on. Assume failure now is bad news. */
  337. status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
  338. if (status >= 0 &&
  339. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  340. return 0;
  341. /* Use board power control, not PHY power control */
  342. sfe4001_poweroff(efx);
  343. efx->phy_mode = PHY_MODE_OFF;
  344. return (status < 0) ? -EIO : -ERANGE;
  345. }
  346. static struct i2c_board_info sfe4001_hwmon_info = {
  347. I2C_BOARD_INFO("max6647", 0x4e),
  348. };
  349. /* This board uses an I2C expander to provider power to the PHY, which needs to
  350. * be turned on before the PHY can be used.
  351. * Context: Process context, rtnl lock held
  352. */
  353. static int sfe4001_init(struct efx_nic *efx)
  354. {
  355. struct falcon_board *board = falcon_board(efx);
  356. int rc;
  357. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  358. board->hwmon_client =
  359. i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
  360. #else
  361. board->hwmon_client =
  362. i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
  363. #endif
  364. if (!board->hwmon_client)
  365. return -EIO;
  366. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  367. rc = i2c_smbus_write_byte_data(board->hwmon_client,
  368. MAX664X_REG_WLHO, 90);
  369. if (rc)
  370. goto fail_hwmon;
  371. board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
  372. if (!board->ioexp_client) {
  373. rc = -EIO;
  374. goto fail_hwmon;
  375. }
  376. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  377. /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
  378. * will fail. */
  379. falcon_stop_nic_stats(efx);
  380. }
  381. rc = sfe4001_poweron(efx);
  382. if (rc)
  383. goto fail_ioexp;
  384. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  385. if (rc)
  386. goto fail_on;
  387. EFX_INFO(efx, "PHY is powered on\n");
  388. return 0;
  389. fail_on:
  390. sfe4001_poweroff(efx);
  391. fail_ioexp:
  392. i2c_unregister_device(board->ioexp_client);
  393. fail_hwmon:
  394. i2c_unregister_device(board->hwmon_client);
  395. return rc;
  396. }
  397. static int sfn4111t_check_hw(struct efx_nic *efx)
  398. {
  399. s32 status;
  400. /* If XAUI link is up then do not monitor */
  401. if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
  402. return 0;
  403. /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
  404. status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
  405. MAX664X_REG_RSL);
  406. if (status < 0)
  407. return -EIO;
  408. if (status & 0x57)
  409. return -ERANGE;
  410. return 0;
  411. }
  412. static void sfn4111t_fini(struct efx_nic *efx)
  413. {
  414. EFX_INFO(efx, "%s\n", __func__);
  415. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  416. i2c_unregister_device(falcon_board(efx)->hwmon_client);
  417. }
  418. static struct i2c_board_info sfn4111t_a0_hwmon_info = {
  419. I2C_BOARD_INFO("max6647", 0x4e),
  420. };
  421. static struct i2c_board_info sfn4111t_r5_hwmon_info = {
  422. I2C_BOARD_INFO("max6646", 0x4d),
  423. };
  424. static void sfn4111t_init_phy(struct efx_nic *efx)
  425. {
  426. if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
  427. if (sft9001_wait_boot(efx) != -EINVAL)
  428. return;
  429. efx->phy_mode = PHY_MODE_SPECIAL;
  430. falcon_stop_nic_stats(efx);
  431. }
  432. sfn4111t_reset(efx);
  433. sft9001_wait_boot(efx);
  434. }
  435. static int sfn4111t_init(struct efx_nic *efx)
  436. {
  437. struct falcon_board *board = falcon_board(efx);
  438. int rc;
  439. board->hwmon_client =
  440. i2c_new_device(&board->i2c_adap,
  441. (board->minor < 5) ?
  442. &sfn4111t_a0_hwmon_info :
  443. &sfn4111t_r5_hwmon_info);
  444. if (!board->hwmon_client)
  445. return -EIO;
  446. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  447. if (rc)
  448. goto fail_hwmon;
  449. if (efx->phy_mode & PHY_MODE_SPECIAL)
  450. /* PHY may not generate a 156.25 MHz clock and MAC
  451. * stats fetch will fail. */
  452. falcon_stop_nic_stats(efx);
  453. return 0;
  454. fail_hwmon:
  455. i2c_unregister_device(board->hwmon_client);
  456. return rc;
  457. }
  458. /*****************************************************************************
  459. * Support for the SFE4002
  460. *
  461. */
  462. static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
  463. static const u8 sfe4002_lm87_regs[] = {
  464. LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
  465. LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
  466. LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
  467. LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
  468. LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
  469. LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
  470. LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
  471. LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
  472. LM87_TEMP_INT_LIMITS(10, 60), /* board */
  473. LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
  474. 0
  475. };
  476. static struct i2c_board_info sfe4002_hwmon_info = {
  477. I2C_BOARD_INFO("lm87", 0x2e),
  478. .platform_data = &sfe4002_lm87_channel,
  479. };
  480. /****************************************************************************/
  481. /* LED allocations. Note that on rev A0 boards the schematic and the reality
  482. * differ: red and green are swapped. Below is the fixed (A1) layout (there
  483. * are only 3 A0 boards in existence, so no real reason to make this
  484. * conditional).
  485. */
  486. #define SFE4002_FAULT_LED (2) /* Red */
  487. #define SFE4002_RX_LED (0) /* Green */
  488. #define SFE4002_TX_LED (1) /* Amber */
  489. static void sfe4002_init_phy(struct efx_nic *efx)
  490. {
  491. /* Set the TX and RX LEDs to reflect status and activity, and the
  492. * fault LED off */
  493. falcon_qt202x_set_led(efx, SFE4002_TX_LED,
  494. QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
  495. falcon_qt202x_set_led(efx, SFE4002_RX_LED,
  496. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
  497. falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
  498. }
  499. static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  500. {
  501. falcon_qt202x_set_led(
  502. efx, SFE4002_FAULT_LED,
  503. (mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
  504. }
  505. static int sfe4002_check_hw(struct efx_nic *efx)
  506. {
  507. struct falcon_board *board = falcon_board(efx);
  508. /* A0 board rev. 4002s report a temperature fault the whole time
  509. * (bad sensor) so we mask it out. */
  510. unsigned alarm_mask =
  511. (board->major == 0 && board->minor == 0) ?
  512. ~LM87_ALARM_TEMP_EXT1 : ~0;
  513. return efx_check_lm87(efx, alarm_mask);
  514. }
  515. static int sfe4002_init(struct efx_nic *efx)
  516. {
  517. return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
  518. }
  519. /*****************************************************************************
  520. * Support for the SFN4112F
  521. *
  522. */
  523. static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
  524. static const u8 sfn4112f_lm87_regs[] = {
  525. LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
  526. LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
  527. LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
  528. LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
  529. LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
  530. LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
  531. LM87_TEMP_INT_LIMITS(10, 60), /* board */
  532. LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
  533. 0
  534. };
  535. static struct i2c_board_info sfn4112f_hwmon_info = {
  536. I2C_BOARD_INFO("lm87", 0x2e),
  537. .platform_data = &sfn4112f_lm87_channel,
  538. };
  539. #define SFN4112F_ACT_LED 0
  540. #define SFN4112F_LINK_LED 1
  541. static void sfn4112f_init_phy(struct efx_nic *efx)
  542. {
  543. falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
  544. QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
  545. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
  546. QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
  547. }
  548. static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  549. {
  550. int reg;
  551. switch (mode) {
  552. case EFX_LED_OFF:
  553. reg = QUAKE_LED_OFF;
  554. break;
  555. case EFX_LED_ON:
  556. reg = QUAKE_LED_ON;
  557. break;
  558. default:
  559. reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
  560. break;
  561. }
  562. falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
  563. }
  564. static int sfn4112f_check_hw(struct efx_nic *efx)
  565. {
  566. /* Mask out unused sensors */
  567. return efx_check_lm87(efx, ~0x48);
  568. }
  569. static int sfn4112f_init(struct efx_nic *efx)
  570. {
  571. return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
  572. }
  573. static const struct falcon_board_type board_types[] = {
  574. {
  575. .id = FALCON_BOARD_SFE4001,
  576. .ref_model = "SFE4001",
  577. .gen_type = "10GBASE-T adapter",
  578. .init = sfe4001_init,
  579. .init_phy = efx_port_dummy_op_void,
  580. .fini = sfe4001_fini,
  581. .set_id_led = tenxpress_set_id_led,
  582. .monitor = sfe4001_check_hw,
  583. },
  584. {
  585. .id = FALCON_BOARD_SFE4002,
  586. .ref_model = "SFE4002",
  587. .gen_type = "XFP adapter",
  588. .init = sfe4002_init,
  589. .init_phy = sfe4002_init_phy,
  590. .fini = efx_fini_lm87,
  591. .set_id_led = sfe4002_set_id_led,
  592. .monitor = sfe4002_check_hw,
  593. },
  594. {
  595. .id = FALCON_BOARD_SFN4111T,
  596. .ref_model = "SFN4111T",
  597. .gen_type = "100/1000/10GBASE-T adapter",
  598. .init = sfn4111t_init,
  599. .init_phy = sfn4111t_init_phy,
  600. .fini = sfn4111t_fini,
  601. .set_id_led = tenxpress_set_id_led,
  602. .monitor = sfn4111t_check_hw,
  603. },
  604. {
  605. .id = FALCON_BOARD_SFN4112F,
  606. .ref_model = "SFN4112F",
  607. .gen_type = "SFP+ adapter",
  608. .init = sfn4112f_init,
  609. .init_phy = sfn4112f_init_phy,
  610. .fini = efx_fini_lm87,
  611. .set_id_led = sfn4112f_set_id_led,
  612. .monitor = sfn4112f_check_hw,
  613. },
  614. };
  615. static const struct falcon_board_type falcon_dummy_board = {
  616. .init = efx_port_dummy_op_int,
  617. .init_phy = efx_port_dummy_op_void,
  618. .fini = efx_port_dummy_op_void,
  619. .set_id_led = efx_port_dummy_op_set_id_led,
  620. .monitor = efx_port_dummy_op_int,
  621. };
  622. void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
  623. {
  624. struct falcon_board *board = falcon_board(efx);
  625. u8 type_id = FALCON_BOARD_TYPE(revision_info);
  626. int i;
  627. board->major = FALCON_BOARD_MAJOR(revision_info);
  628. board->minor = FALCON_BOARD_MINOR(revision_info);
  629. for (i = 0; i < ARRAY_SIZE(board_types); i++)
  630. if (board_types[i].id == type_id)
  631. board->type = &board_types[i];
  632. if (board->type) {
  633. EFX_INFO(efx, "board is %s rev %c%d\n",
  634. (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
  635. ? board->type->ref_model : board->type->gen_type,
  636. 'A' + board->major, board->minor);
  637. } else {
  638. EFX_ERR(efx, "unknown board type %d\n", type_id);
  639. board->type = &falcon_dummy_board;
  640. }
  641. }