baycom_ser_hdx.c 21 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_ser_hdx.c -- baycom ser12 halfduplex radio modem driver.
  4. *
  5. * Copyright (C) 1996-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. * Please note that the GPL allows you to use the driver, NOT the radio.
  22. * In order to use the radio, you need a license from the communications
  23. * authority of your country.
  24. *
  25. *
  26. * Supported modems
  27. *
  28. * ser12: This is a very simple 1200 baud AFSK modem. The modem consists only
  29. * of a modulator/demodulator chip, usually a TI TCM3105. The computer
  30. * is responsible for regenerating the receiver bit clock, as well as
  31. * for handling the HDLC protocol. The modem connects to a serial port,
  32. * hence the name. Since the serial port is not used as an async serial
  33. * port, the kernel driver for serial ports cannot be used, and this
  34. * driver only supports standard serial hardware (8250, 16450, 16550A)
  35. *
  36. *
  37. * Command line options (insmod command line)
  38. *
  39. * mode ser12 hardware DCD
  40. * ser12* software DCD
  41. * ser12@ hardware/software DCD, i.e. no explicit DCD signal but hardware
  42. * mutes audio input to the modem
  43. * ser12+ hardware DCD, inverted signal at DCD pin
  44. * iobase base address of the port; common values are 0x3f8, 0x2f8, 0x3e8, 0x2e8
  45. * irq interrupt line of the port; common values are 4,3
  46. *
  47. *
  48. * History:
  49. * 0.1 26.06.1996 Adapted from baycom.c and made network driver interface
  50. * 18.10.1996 Changed to new user space access routines (copy_{to,from}_user)
  51. * 0.3 26.04.1997 init code/data tagged
  52. * 0.4 08.07.1997 alternative ser12 decoding algorithm (uses delta CTS ints)
  53. * 0.5 11.11.1997 ser12/par96 split into separate files
  54. * 0.6 14.04.1998 cleanups
  55. * 0.7 03.08.1999 adapt to Linus' new __setup/__initcall
  56. * 0.8 10.08.1999 use module_init/module_exit
  57. * 0.9 12.02.2000 adapted to softnet driver interface
  58. * 0.10 03.07.2000 fix interface name handling
  59. */
  60. /*****************************************************************************/
  61. #include <linux/capability.h>
  62. #include <linux/module.h>
  63. #include <linux/ioport.h>
  64. #include <linux/string.h>
  65. #include <linux/init.h>
  66. #include <asm/uaccess.h>
  67. #include <asm/io.h>
  68. #include <linux/hdlcdrv.h>
  69. #include <linux/baycom.h>
  70. #include <linux/jiffies.h>
  71. /* --------------------------------------------------------------------- */
  72. #define BAYCOM_DEBUG
  73. /* --------------------------------------------------------------------- */
  74. static const char bc_drvname[] = "baycom_ser_hdx";
  75. static const char bc_drvinfo[] = KERN_INFO "baycom_ser_hdx: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  76. "baycom_ser_hdx: version 0.10 compiled " __TIME__ " " __DATE__ "\n";
  77. /* --------------------------------------------------------------------- */
  78. #define NR_PORTS 4
  79. static struct net_device *baycom_device[NR_PORTS];
  80. /* --------------------------------------------------------------------- */
  81. #define RBR(iobase) (iobase+0)
  82. #define THR(iobase) (iobase+0)
  83. #define IER(iobase) (iobase+1)
  84. #define IIR(iobase) (iobase+2)
  85. #define FCR(iobase) (iobase+2)
  86. #define LCR(iobase) (iobase+3)
  87. #define MCR(iobase) (iobase+4)
  88. #define LSR(iobase) (iobase+5)
  89. #define MSR(iobase) (iobase+6)
  90. #define SCR(iobase) (iobase+7)
  91. #define DLL(iobase) (iobase+0)
  92. #define DLM(iobase) (iobase+1)
  93. #define SER12_EXTENT 8
  94. /* ---------------------------------------------------------------------- */
  95. /*
  96. * Information that need to be kept for each board.
  97. */
  98. struct baycom_state {
  99. struct hdlcdrv_state hdrv;
  100. int opt_dcd;
  101. struct modem_state {
  102. short arb_divider;
  103. unsigned char flags;
  104. unsigned int shreg;
  105. struct modem_state_ser12 {
  106. unsigned char tx_bit;
  107. int dcd_sum0, dcd_sum1, dcd_sum2;
  108. unsigned char last_sample;
  109. unsigned char last_rxbit;
  110. unsigned int dcd_shreg;
  111. unsigned int dcd_time;
  112. unsigned int bit_pll;
  113. unsigned char interm_sample;
  114. } ser12;
  115. } modem;
  116. #ifdef BAYCOM_DEBUG
  117. struct debug_vals {
  118. unsigned long last_jiffies;
  119. unsigned cur_intcnt;
  120. unsigned last_intcnt;
  121. int cur_pllcorr;
  122. int last_pllcorr;
  123. } debug_vals;
  124. #endif /* BAYCOM_DEBUG */
  125. };
  126. /* --------------------------------------------------------------------- */
  127. static inline void baycom_int_freq(struct baycom_state *bc)
  128. {
  129. #ifdef BAYCOM_DEBUG
  130. unsigned long cur_jiffies = jiffies;
  131. /*
  132. * measure the interrupt frequency
  133. */
  134. bc->debug_vals.cur_intcnt++;
  135. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  136. bc->debug_vals.last_jiffies = cur_jiffies;
  137. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  138. bc->debug_vals.cur_intcnt = 0;
  139. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  140. bc->debug_vals.cur_pllcorr = 0;
  141. }
  142. #endif /* BAYCOM_DEBUG */
  143. }
  144. /* --------------------------------------------------------------------- */
  145. /*
  146. * ===================== SER12 specific routines =========================
  147. */
  148. static inline void ser12_set_divisor(struct net_device *dev,
  149. unsigned char divisor)
  150. {
  151. outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */
  152. outb(divisor, DLL(dev->base_addr));
  153. outb(0, DLM(dev->base_addr));
  154. outb(0x01, LCR(dev->base_addr)); /* word length = 6 */
  155. /*
  156. * make sure the next interrupt is generated;
  157. * 0 must be used to power the modem; the modem draws its
  158. * power from the TxD line
  159. */
  160. outb(0x00, THR(dev->base_addr));
  161. /*
  162. * it is important not to set the divider while transmitting;
  163. * this reportedly makes some UARTs generating interrupts
  164. * in the hundredthousands per second region
  165. * Reported by: Ignacio.Arenaza@studi.epfl.ch (Ignacio Arenaza Nuno)
  166. */
  167. }
  168. /* --------------------------------------------------------------------- */
  169. /*
  170. * must call the TX arbitrator every 10ms
  171. */
  172. #define SER12_ARB_DIVIDER(bc) (bc->opt_dcd ? 24 : 36)
  173. #define SER12_DCD_INTERVAL(bc) (bc->opt_dcd ? 12 : 240)
  174. static inline void ser12_tx(struct net_device *dev, struct baycom_state *bc)
  175. {
  176. /* one interrupt per channel bit */
  177. ser12_set_divisor(dev, 12);
  178. /*
  179. * first output the last bit (!) then call HDLC transmitter,
  180. * since this may take quite long
  181. */
  182. outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
  183. if (bc->modem.shreg <= 1)
  184. bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
  185. bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
  186. (bc->modem.shreg & 1));
  187. bc->modem.shreg >>= 1;
  188. }
  189. /* --------------------------------------------------------------------- */
  190. static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
  191. {
  192. unsigned char cur_s;
  193. /*
  194. * do demodulator
  195. */
  196. cur_s = inb(MSR(dev->base_addr)) & 0x10; /* the CTS line */
  197. hdlcdrv_channelbit(&bc->hdrv, cur_s);
  198. bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
  199. (cur_s != bc->modem.ser12.last_sample);
  200. bc->modem.ser12.last_sample = cur_s;
  201. if(bc->modem.ser12.dcd_shreg & 1) {
  202. if (!bc->opt_dcd) {
  203. unsigned int dcdspos, dcdsneg;
  204. dcdspos = dcdsneg = 0;
  205. dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
  206. if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
  207. dcdspos += 2;
  208. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
  209. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
  210. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
  211. bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
  212. } else
  213. bc->modem.ser12.dcd_sum0--;
  214. }
  215. if(!bc->modem.ser12.dcd_time) {
  216. hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
  217. bc->modem.ser12.dcd_sum1 +
  218. bc->modem.ser12.dcd_sum2) < 0);
  219. bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
  220. bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
  221. /* offset to ensure DCD off on silent input */
  222. bc->modem.ser12.dcd_sum0 = 2;
  223. bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
  224. }
  225. bc->modem.ser12.dcd_time--;
  226. if (!bc->opt_dcd) {
  227. /*
  228. * PLL code for the improved software DCD algorithm
  229. */
  230. if (bc->modem.ser12.interm_sample) {
  231. /*
  232. * intermediate sample; set timing correction to normal
  233. */
  234. ser12_set_divisor(dev, 4);
  235. } else {
  236. /*
  237. * do PLL correction and call HDLC receiver
  238. */
  239. switch (bc->modem.ser12.dcd_shreg & 7) {
  240. case 1: /* transition too late */
  241. ser12_set_divisor(dev, 5);
  242. #ifdef BAYCOM_DEBUG
  243. bc->debug_vals.cur_pllcorr++;
  244. #endif /* BAYCOM_DEBUG */
  245. break;
  246. case 4: /* transition too early */
  247. ser12_set_divisor(dev, 3);
  248. #ifdef BAYCOM_DEBUG
  249. bc->debug_vals.cur_pllcorr--;
  250. #endif /* BAYCOM_DEBUG */
  251. break;
  252. default:
  253. ser12_set_divisor(dev, 4);
  254. break;
  255. }
  256. bc->modem.shreg >>= 1;
  257. if (bc->modem.ser12.last_sample ==
  258. bc->modem.ser12.last_rxbit)
  259. bc->modem.shreg |= 0x10000;
  260. bc->modem.ser12.last_rxbit =
  261. bc->modem.ser12.last_sample;
  262. }
  263. if (++bc->modem.ser12.interm_sample >= 3)
  264. bc->modem.ser12.interm_sample = 0;
  265. /*
  266. * DCD stuff
  267. */
  268. if (bc->modem.ser12.dcd_shreg & 1) {
  269. unsigned int dcdspos, dcdsneg;
  270. dcdspos = dcdsneg = 0;
  271. dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
  272. dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
  273. << 1;
  274. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
  275. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
  276. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
  277. bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
  278. }
  279. } else {
  280. /*
  281. * PLL algorithm for the hardware squelch DCD algorithm
  282. */
  283. if (bc->modem.ser12.interm_sample) {
  284. /*
  285. * intermediate sample; set timing correction to normal
  286. */
  287. ser12_set_divisor(dev, 6);
  288. } else {
  289. /*
  290. * do PLL correction and call HDLC receiver
  291. */
  292. switch (bc->modem.ser12.dcd_shreg & 3) {
  293. case 1: /* transition too late */
  294. ser12_set_divisor(dev, 7);
  295. #ifdef BAYCOM_DEBUG
  296. bc->debug_vals.cur_pllcorr++;
  297. #endif /* BAYCOM_DEBUG */
  298. break;
  299. case 2: /* transition too early */
  300. ser12_set_divisor(dev, 5);
  301. #ifdef BAYCOM_DEBUG
  302. bc->debug_vals.cur_pllcorr--;
  303. #endif /* BAYCOM_DEBUG */
  304. break;
  305. default:
  306. ser12_set_divisor(dev, 6);
  307. break;
  308. }
  309. bc->modem.shreg >>= 1;
  310. if (bc->modem.ser12.last_sample ==
  311. bc->modem.ser12.last_rxbit)
  312. bc->modem.shreg |= 0x10000;
  313. bc->modem.ser12.last_rxbit =
  314. bc->modem.ser12.last_sample;
  315. }
  316. bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
  317. /*
  318. * DCD stuff
  319. */
  320. bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
  321. }
  322. outb(0x0d, MCR(dev->base_addr)); /* transmitter off */
  323. if (bc->modem.shreg & 1) {
  324. hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
  325. bc->modem.shreg = 0x10000;
  326. }
  327. if(!bc->modem.ser12.dcd_time) {
  328. if (bc->opt_dcd & 1)
  329. hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80));
  330. else
  331. hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
  332. bc->modem.ser12.dcd_sum1 +
  333. bc->modem.ser12.dcd_sum2) < 0);
  334. bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
  335. bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
  336. /* offset to ensure DCD off on silent input */
  337. bc->modem.ser12.dcd_sum0 = 2;
  338. bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
  339. }
  340. bc->modem.ser12.dcd_time--;
  341. }
  342. /* --------------------------------------------------------------------- */
  343. static irqreturn_t ser12_interrupt(int irq, void *dev_id)
  344. {
  345. struct net_device *dev = (struct net_device *)dev_id;
  346. struct baycom_state *bc = netdev_priv(dev);
  347. unsigned char iir;
  348. if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
  349. return IRQ_NONE;
  350. /* fast way out */
  351. if ((iir = inb(IIR(dev->base_addr))) & 1)
  352. return IRQ_NONE;
  353. baycom_int_freq(bc);
  354. do {
  355. switch (iir & 6) {
  356. case 6:
  357. inb(LSR(dev->base_addr));
  358. break;
  359. case 4:
  360. inb(RBR(dev->base_addr));
  361. break;
  362. case 2:
  363. /*
  364. * check if transmitter active
  365. */
  366. if (hdlcdrv_ptt(&bc->hdrv))
  367. ser12_tx(dev, bc);
  368. else {
  369. ser12_rx(dev, bc);
  370. bc->modem.arb_divider--;
  371. }
  372. outb(0x00, THR(dev->base_addr));
  373. break;
  374. default:
  375. inb(MSR(dev->base_addr));
  376. break;
  377. }
  378. iir = inb(IIR(dev->base_addr));
  379. } while (!(iir & 1));
  380. if (bc->modem.arb_divider <= 0) {
  381. bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
  382. local_irq_enable();
  383. hdlcdrv_arbitrate(dev, &bc->hdrv);
  384. }
  385. local_irq_enable();
  386. hdlcdrv_transmitter(dev, &bc->hdrv);
  387. hdlcdrv_receiver(dev, &bc->hdrv);
  388. local_irq_disable();
  389. return IRQ_HANDLED;
  390. }
  391. /* --------------------------------------------------------------------- */
  392. enum uart { c_uart_unknown, c_uart_8250,
  393. c_uart_16450, c_uart_16550, c_uart_16550A};
  394. static const char *uart_str[] = {
  395. "unknown", "8250", "16450", "16550", "16550A"
  396. };
  397. static enum uart ser12_check_uart(unsigned int iobase)
  398. {
  399. unsigned char b1,b2,b3;
  400. enum uart u;
  401. enum uart uart_tab[] =
  402. { c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A };
  403. b1 = inb(MCR(iobase));
  404. outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
  405. b2 = inb(MSR(iobase));
  406. outb(0x1a, MCR(iobase));
  407. b3 = inb(MSR(iobase)) & 0xf0;
  408. outb(b1, MCR(iobase)); /* restore old values */
  409. outb(b2, MSR(iobase));
  410. if (b3 != 0x90)
  411. return c_uart_unknown;
  412. inb(RBR(iobase));
  413. inb(RBR(iobase));
  414. outb(0x01, FCR(iobase)); /* enable FIFOs */
  415. u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
  416. if (u == c_uart_16450) {
  417. outb(0x5a, SCR(iobase));
  418. b1 = inb(SCR(iobase));
  419. outb(0xa5, SCR(iobase));
  420. b2 = inb(SCR(iobase));
  421. if ((b1 != 0x5a) || (b2 != 0xa5))
  422. u = c_uart_8250;
  423. }
  424. return u;
  425. }
  426. /* --------------------------------------------------------------------- */
  427. static int ser12_open(struct net_device *dev)
  428. {
  429. struct baycom_state *bc = netdev_priv(dev);
  430. enum uart u;
  431. if (!dev || !bc)
  432. return -ENXIO;
  433. if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT ||
  434. dev->irq < 2 || dev->irq > 15)
  435. return -ENXIO;
  436. if (!request_region(dev->base_addr, SER12_EXTENT, "baycom_ser12"))
  437. return -EACCES;
  438. memset(&bc->modem, 0, sizeof(bc->modem));
  439. bc->hdrv.par.bitrate = 1200;
  440. if ((u = ser12_check_uart(dev->base_addr)) == c_uart_unknown) {
  441. release_region(dev->base_addr, SER12_EXTENT);
  442. return -EIO;
  443. }
  444. outb(0, FCR(dev->base_addr)); /* disable FIFOs */
  445. outb(0x0d, MCR(dev->base_addr));
  446. outb(0, IER(dev->base_addr));
  447. if (request_irq(dev->irq, ser12_interrupt, IRQF_DISABLED | IRQF_SHARED,
  448. "baycom_ser12", dev)) {
  449. release_region(dev->base_addr, SER12_EXTENT);
  450. return -EBUSY;
  451. }
  452. /*
  453. * enable transmitter empty interrupt
  454. */
  455. outb(2, IER(dev->base_addr));
  456. /*
  457. * set the SIO to 6 Bits/character and 19200 or 28800 baud, so that
  458. * we get exactly (hopefully) 2 or 3 interrupts per radio symbol,
  459. * depending on the usage of the software DCD routine
  460. */
  461. ser12_set_divisor(dev, bc->opt_dcd ? 6 : 4);
  462. printk(KERN_INFO "%s: ser12 at iobase 0x%lx irq %u uart %s\n",
  463. bc_drvname, dev->base_addr, dev->irq, uart_str[u]);
  464. return 0;
  465. }
  466. /* --------------------------------------------------------------------- */
  467. static int ser12_close(struct net_device *dev)
  468. {
  469. struct baycom_state *bc = netdev_priv(dev);
  470. if (!dev || !bc)
  471. return -EINVAL;
  472. /*
  473. * disable interrupts
  474. */
  475. outb(0, IER(dev->base_addr));
  476. outb(1, MCR(dev->base_addr));
  477. free_irq(dev->irq, dev);
  478. release_region(dev->base_addr, SER12_EXTENT);
  479. printk(KERN_INFO "%s: close ser12 at iobase 0x%lx irq %u\n",
  480. bc_drvname, dev->base_addr, dev->irq);
  481. return 0;
  482. }
  483. /* --------------------------------------------------------------------- */
  484. /*
  485. * ===================== hdlcdrv driver interface =========================
  486. */
  487. /* --------------------------------------------------------------------- */
  488. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
  489. struct hdlcdrv_ioctl *hi, int cmd);
  490. /* --------------------------------------------------------------------- */
  491. static struct hdlcdrv_ops ser12_ops = {
  492. .drvname = bc_drvname,
  493. .drvinfo = bc_drvinfo,
  494. .open = ser12_open,
  495. .close = ser12_close,
  496. .ioctl = baycom_ioctl,
  497. };
  498. /* --------------------------------------------------------------------- */
  499. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  500. {
  501. if (strchr(modestr, '*'))
  502. bc->opt_dcd = 0;
  503. else if (strchr(modestr, '+'))
  504. bc->opt_dcd = -1;
  505. else if (strchr(modestr, '@'))
  506. bc->opt_dcd = -2;
  507. else
  508. bc->opt_dcd = 1;
  509. return 0;
  510. }
  511. /* --------------------------------------------------------------------- */
  512. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
  513. struct hdlcdrv_ioctl *hi, int cmd)
  514. {
  515. struct baycom_state *bc;
  516. struct baycom_ioctl bi;
  517. if (!dev)
  518. return -EINVAL;
  519. bc = netdev_priv(dev);
  520. BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
  521. if (cmd != SIOCDEVPRIVATE)
  522. return -ENOIOCTLCMD;
  523. switch (hi->cmd) {
  524. default:
  525. break;
  526. case HDLCDRVCTL_GETMODE:
  527. strcpy(hi->data.modename, "ser12");
  528. if (bc->opt_dcd <= 0)
  529. strcat(hi->data.modename, (!bc->opt_dcd) ? "*" : (bc->opt_dcd == -2) ? "@" : "+");
  530. if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
  531. return -EFAULT;
  532. return 0;
  533. case HDLCDRVCTL_SETMODE:
  534. if (netif_running(dev) || !capable(CAP_NET_ADMIN))
  535. return -EACCES;
  536. hi->data.modename[sizeof(hi->data.modename)-1] = '\0';
  537. return baycom_setmode(bc, hi->data.modename);
  538. case HDLCDRVCTL_MODELIST:
  539. strcpy(hi->data.modename, "ser12");
  540. if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
  541. return -EFAULT;
  542. return 0;
  543. case HDLCDRVCTL_MODEMPARMASK:
  544. return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ;
  545. }
  546. if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
  547. return -EFAULT;
  548. switch (bi.cmd) {
  549. default:
  550. return -ENOIOCTLCMD;
  551. #ifdef BAYCOM_DEBUG
  552. case BAYCOMCTL_GETDEBUG:
  553. bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
  554. bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
  555. bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
  556. break;
  557. #endif /* BAYCOM_DEBUG */
  558. }
  559. if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
  560. return -EFAULT;
  561. return 0;
  562. }
  563. /* --------------------------------------------------------------------- */
  564. /*
  565. * command line settable parameters
  566. */
  567. static char *mode[NR_PORTS] = { "ser12*", };
  568. static int iobase[NR_PORTS] = { 0x3f8, };
  569. static int irq[NR_PORTS] = { 4, };
  570. module_param_array(mode, charp, NULL, 0);
  571. MODULE_PARM_DESC(mode, "baycom operating mode; * for software DCD");
  572. module_param_array(iobase, int, NULL, 0);
  573. MODULE_PARM_DESC(iobase, "baycom io base address");
  574. module_param_array(irq, int, NULL, 0);
  575. MODULE_PARM_DESC(irq, "baycom irq number");
  576. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  577. MODULE_DESCRIPTION("Baycom ser12 half duplex amateur radio modem driver");
  578. MODULE_LICENSE("GPL");
  579. /* --------------------------------------------------------------------- */
  580. static int __init init_baycomserhdx(void)
  581. {
  582. int i, found = 0;
  583. char set_hw = 1;
  584. printk(bc_drvinfo);
  585. /*
  586. * register net devices
  587. */
  588. for (i = 0; i < NR_PORTS; i++) {
  589. struct net_device *dev;
  590. struct baycom_state *bc;
  591. char ifname[IFNAMSIZ];
  592. sprintf(ifname, "bcsh%d", i);
  593. if (!mode[i])
  594. set_hw = 0;
  595. if (!set_hw)
  596. iobase[i] = irq[i] = 0;
  597. dev = hdlcdrv_register(&ser12_ops,
  598. sizeof(struct baycom_state),
  599. ifname, iobase[i], irq[i], 0);
  600. if (IS_ERR(dev))
  601. break;
  602. bc = netdev_priv(dev);
  603. if (set_hw && baycom_setmode(bc, mode[i]))
  604. set_hw = 0;
  605. found++;
  606. baycom_device[i] = dev;
  607. }
  608. if (!found)
  609. return -ENXIO;
  610. return 0;
  611. }
  612. static void __exit cleanup_baycomserhdx(void)
  613. {
  614. int i;
  615. for(i = 0; i < NR_PORTS; i++) {
  616. struct net_device *dev = baycom_device[i];
  617. if (dev)
  618. hdlcdrv_unregister(dev);
  619. }
  620. }
  621. module_init(init_baycomserhdx);
  622. module_exit(cleanup_baycomserhdx);
  623. /* --------------------------------------------------------------------- */
  624. #ifndef MODULE
  625. /*
  626. * format: baycom_ser_hdx=io,irq,mode
  627. * mode: ser12 hardware DCD
  628. * ser12* software DCD
  629. * ser12@ hardware/software DCD, i.e. no explicit DCD signal but hardware
  630. * mutes audio input to the modem
  631. * ser12+ hardware DCD, inverted signal at DCD pin
  632. */
  633. static int __init baycom_ser_hdx_setup(char *str)
  634. {
  635. static unsigned nr_dev;
  636. int ints[3];
  637. if (nr_dev >= NR_PORTS)
  638. return 0;
  639. str = get_options(str, 3, ints);
  640. if (ints[0] < 2)
  641. return 0;
  642. mode[nr_dev] = str;
  643. iobase[nr_dev] = ints[1];
  644. irq[nr_dev] = ints[2];
  645. nr_dev++;
  646. return 1;
  647. }
  648. __setup("baycom_ser_hdx=", baycom_ser_hdx_setup);
  649. #endif /* MODULE */
  650. /* --------------------------------------------------------------------- */