be_main.c 59 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. if (!is_valid_ether_addr(addr->sa_data))
  113. return -EADDRNOTAVAIL;
  114. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  115. if (status)
  116. return status;
  117. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  118. adapter->if_handle, &adapter->pmac_id);
  119. if (!status)
  120. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  121. return status;
  122. }
  123. void netdev_stats_update(struct be_adapter *adapter)
  124. {
  125. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  126. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  127. struct be_port_rxf_stats *port_stats =
  128. &rxf_stats->port[adapter->port_num];
  129. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  130. struct be_erx_stats *erx_stats = &hw_stats->erx;
  131. dev_stats->rx_packets = port_stats->rx_total_frames;
  132. dev_stats->tx_packets = port_stats->tx_unicastframes +
  133. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  134. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  135. (u64) port_stats->rx_bytes_lsd;
  136. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  137. (u64) port_stats->tx_bytes_lsd;
  138. /* bad pkts received */
  139. dev_stats->rx_errors = port_stats->rx_crc_errors +
  140. port_stats->rx_alignment_symbol_errors +
  141. port_stats->rx_in_range_errors +
  142. port_stats->rx_out_range_errors +
  143. port_stats->rx_frame_too_long +
  144. port_stats->rx_dropped_too_small +
  145. port_stats->rx_dropped_too_short +
  146. port_stats->rx_dropped_header_too_small +
  147. port_stats->rx_dropped_tcp_length +
  148. port_stats->rx_dropped_runt +
  149. port_stats->rx_tcp_checksum_errs +
  150. port_stats->rx_ip_checksum_errs +
  151. port_stats->rx_udp_checksum_errs;
  152. /* no space in linux buffers: best possible approximation */
  153. dev_stats->rx_dropped =
  154. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  155. /* detailed rx errors */
  156. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  157. port_stats->rx_out_range_errors +
  158. port_stats->rx_frame_too_long;
  159. /* receive ring buffer overflow */
  160. dev_stats->rx_over_errors = 0;
  161. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  162. /* frame alignment errors */
  163. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  164. /* receiver fifo overrun */
  165. /* drops_no_pbuf is no per i/f, it's per BE card */
  166. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  167. port_stats->rx_input_fifo_overflow +
  168. rxf_stats->rx_drops_no_pbuf;
  169. /* receiver missed packetd */
  170. dev_stats->rx_missed_errors = 0;
  171. /* packet transmit problems */
  172. dev_stats->tx_errors = 0;
  173. /* no space available in linux */
  174. dev_stats->tx_dropped = 0;
  175. dev_stats->multicast = port_stats->rx_multicast_frames;
  176. dev_stats->collisions = 0;
  177. /* detailed tx_errors */
  178. dev_stats->tx_aborted_errors = 0;
  179. dev_stats->tx_carrier_errors = 0;
  180. dev_stats->tx_fifo_errors = 0;
  181. dev_stats->tx_heartbeat_errors = 0;
  182. dev_stats->tx_window_errors = 0;
  183. }
  184. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  185. {
  186. struct net_device *netdev = adapter->netdev;
  187. /* If link came up or went down */
  188. if (adapter->link_up != link_up) {
  189. adapter->link_speed = -1;
  190. if (link_up) {
  191. netif_start_queue(netdev);
  192. netif_carrier_on(netdev);
  193. printk(KERN_INFO "%s: Link up\n", netdev->name);
  194. } else {
  195. netif_stop_queue(netdev);
  196. netif_carrier_off(netdev);
  197. printk(KERN_INFO "%s: Link down\n", netdev->name);
  198. }
  199. adapter->link_up = link_up;
  200. }
  201. }
  202. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  203. static void be_rx_eqd_update(struct be_adapter *adapter)
  204. {
  205. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  206. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  207. ulong now = jiffies;
  208. u32 eqd;
  209. if (!rx_eq->enable_aic)
  210. return;
  211. /* Wrapped around */
  212. if (time_before(now, stats->rx_fps_jiffies)) {
  213. stats->rx_fps_jiffies = now;
  214. return;
  215. }
  216. /* Update once a second */
  217. if ((now - stats->rx_fps_jiffies) < HZ)
  218. return;
  219. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  220. ((now - stats->rx_fps_jiffies) / HZ);
  221. stats->rx_fps_jiffies = now;
  222. stats->be_prev_rx_frags = stats->be_rx_frags;
  223. eqd = stats->be_rx_fps / 110000;
  224. eqd = eqd << 3;
  225. if (eqd > rx_eq->max_eqd)
  226. eqd = rx_eq->max_eqd;
  227. if (eqd < rx_eq->min_eqd)
  228. eqd = rx_eq->min_eqd;
  229. if (eqd < 10)
  230. eqd = 0;
  231. if (eqd != rx_eq->cur_eqd)
  232. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  233. rx_eq->cur_eqd = eqd;
  234. }
  235. static struct net_device_stats *be_get_stats(struct net_device *dev)
  236. {
  237. return &dev->stats;
  238. }
  239. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  240. {
  241. u64 rate = bytes;
  242. do_div(rate, ticks / HZ);
  243. rate <<= 3; /* bytes/sec -> bits/sec */
  244. do_div(rate, 1000000ul); /* MB/Sec */
  245. return rate;
  246. }
  247. static void be_tx_rate_update(struct be_adapter *adapter)
  248. {
  249. struct be_drvr_stats *stats = drvr_stats(adapter);
  250. ulong now = jiffies;
  251. /* Wrapped around? */
  252. if (time_before(now, stats->be_tx_jiffies)) {
  253. stats->be_tx_jiffies = now;
  254. return;
  255. }
  256. /* Update tx rate once in two seconds */
  257. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  258. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  259. - stats->be_tx_bytes_prev,
  260. now - stats->be_tx_jiffies);
  261. stats->be_tx_jiffies = now;
  262. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  263. }
  264. }
  265. static void be_tx_stats_update(struct be_adapter *adapter,
  266. u32 wrb_cnt, u32 copied, bool stopped)
  267. {
  268. struct be_drvr_stats *stats = drvr_stats(adapter);
  269. stats->be_tx_reqs++;
  270. stats->be_tx_wrbs += wrb_cnt;
  271. stats->be_tx_bytes += copied;
  272. if (stopped)
  273. stats->be_tx_stops++;
  274. }
  275. /* Determine number of WRB entries needed to xmit data in an skb */
  276. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  277. {
  278. int cnt = (skb->len > skb->data_len);
  279. cnt += skb_shinfo(skb)->nr_frags;
  280. /* to account for hdr wrb */
  281. cnt++;
  282. if (cnt & 1) {
  283. /* add a dummy to make it an even num */
  284. cnt++;
  285. *dummy = true;
  286. } else
  287. *dummy = false;
  288. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  289. return cnt;
  290. }
  291. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  292. {
  293. wrb->frag_pa_hi = upper_32_bits(addr);
  294. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  295. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  296. }
  297. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  298. bool vlan, u32 wrb_cnt, u32 len)
  299. {
  300. memset(hdr, 0, sizeof(*hdr));
  301. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  302. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  303. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  305. hdr, skb_shinfo(skb)->gso_size);
  306. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  307. if (is_tcp_pkt(skb))
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  309. else if (is_udp_pkt(skb))
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  311. }
  312. if (vlan && vlan_tx_tag_present(skb)) {
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  315. hdr, vlan_tx_tag_get(skb));
  316. }
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  318. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  321. }
  322. static int make_tx_wrbs(struct be_adapter *adapter,
  323. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  324. {
  325. u64 busaddr;
  326. u32 i, copied = 0;
  327. struct pci_dev *pdev = adapter->pdev;
  328. struct sk_buff *first_skb = skb;
  329. struct be_queue_info *txq = &adapter->tx_obj.q;
  330. struct be_eth_wrb *wrb;
  331. struct be_eth_hdr_wrb *hdr;
  332. hdr = queue_head_node(txq);
  333. atomic_add(wrb_cnt, &txq->used);
  334. queue_head_inc(txq);
  335. if (skb->len > skb->data_len) {
  336. int len = skb->len - skb->data_len;
  337. busaddr = pci_map_single(pdev, skb->data, len,
  338. PCI_DMA_TODEVICE);
  339. wrb = queue_head_node(txq);
  340. wrb_fill(wrb, busaddr, len);
  341. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  342. queue_head_inc(txq);
  343. copied += len;
  344. }
  345. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  346. struct skb_frag_struct *frag =
  347. &skb_shinfo(skb)->frags[i];
  348. busaddr = pci_map_page(pdev, frag->page,
  349. frag->page_offset,
  350. frag->size, PCI_DMA_TODEVICE);
  351. wrb = queue_head_node(txq);
  352. wrb_fill(wrb, busaddr, frag->size);
  353. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  354. queue_head_inc(txq);
  355. copied += frag->size;
  356. }
  357. if (dummy_wrb) {
  358. wrb = queue_head_node(txq);
  359. wrb_fill(wrb, 0, 0);
  360. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  361. queue_head_inc(txq);
  362. }
  363. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  364. wrb_cnt, copied);
  365. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  366. return copied;
  367. }
  368. static netdev_tx_t be_xmit(struct sk_buff *skb,
  369. struct net_device *netdev)
  370. {
  371. struct be_adapter *adapter = netdev_priv(netdev);
  372. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  373. struct be_queue_info *txq = &tx_obj->q;
  374. u32 wrb_cnt = 0, copied = 0;
  375. u32 start = txq->head;
  376. bool dummy_wrb, stopped = false;
  377. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  378. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  379. if (copied) {
  380. /* record the sent skb in the sent_skb table */
  381. BUG_ON(tx_obj->sent_skb_list[start]);
  382. tx_obj->sent_skb_list[start] = skb;
  383. /* Ensure txq has space for the next skb; Else stop the queue
  384. * *BEFORE* ringing the tx doorbell, so that we serialze the
  385. * tx compls of the current transmit which'll wake up the queue
  386. */
  387. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  388. txq->len) {
  389. netif_stop_queue(netdev);
  390. stopped = true;
  391. }
  392. be_txq_notify(adapter, txq->id, wrb_cnt);
  393. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  394. } else {
  395. txq->head = start;
  396. dev_kfree_skb_any(skb);
  397. }
  398. return NETDEV_TX_OK;
  399. }
  400. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  401. {
  402. struct be_adapter *adapter = netdev_priv(netdev);
  403. if (new_mtu < BE_MIN_MTU ||
  404. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  405. dev_info(&adapter->pdev->dev,
  406. "MTU must be between %d and %d bytes\n",
  407. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  408. return -EINVAL;
  409. }
  410. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  411. netdev->mtu, new_mtu);
  412. netdev->mtu = new_mtu;
  413. return 0;
  414. }
  415. /*
  416. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  417. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  418. * set the BE in promiscuous VLAN mode.
  419. */
  420. static int be_vid_config(struct be_adapter *adapter)
  421. {
  422. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  423. u16 ntags = 0, i;
  424. int status;
  425. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  426. /* Construct VLAN Table to give to HW */
  427. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  428. if (adapter->vlan_tag[i]) {
  429. vtag[ntags] = cpu_to_le16(i);
  430. ntags++;
  431. }
  432. }
  433. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  434. vtag, ntags, 1, 0);
  435. } else {
  436. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  437. NULL, 0, 1, 1);
  438. }
  439. return status;
  440. }
  441. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  442. {
  443. struct be_adapter *adapter = netdev_priv(netdev);
  444. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  445. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  446. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  447. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  448. adapter->vlan_grp = grp;
  449. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  450. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  451. }
  452. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  453. {
  454. struct be_adapter *adapter = netdev_priv(netdev);
  455. adapter->num_vlans++;
  456. adapter->vlan_tag[vid] = 1;
  457. be_vid_config(adapter);
  458. }
  459. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  460. {
  461. struct be_adapter *adapter = netdev_priv(netdev);
  462. adapter->num_vlans--;
  463. adapter->vlan_tag[vid] = 0;
  464. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  465. be_vid_config(adapter);
  466. }
  467. static void be_set_multicast_list(struct net_device *netdev)
  468. {
  469. struct be_adapter *adapter = netdev_priv(netdev);
  470. if (netdev->flags & IFF_PROMISC) {
  471. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  472. adapter->promiscuous = true;
  473. goto done;
  474. }
  475. /* BE was previously in promiscous mode; disable it */
  476. if (adapter->promiscuous) {
  477. adapter->promiscuous = false;
  478. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  479. }
  480. /* Enable multicast promisc if num configured exceeds what we support */
  481. if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
  482. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
  483. &adapter->mc_cmd_mem);
  484. goto done;
  485. }
  486. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  487. netdev->mc_count, &adapter->mc_cmd_mem);
  488. done:
  489. return;
  490. }
  491. static void be_rx_rate_update(struct be_adapter *adapter)
  492. {
  493. struct be_drvr_stats *stats = drvr_stats(adapter);
  494. ulong now = jiffies;
  495. /* Wrapped around */
  496. if (time_before(now, stats->be_rx_jiffies)) {
  497. stats->be_rx_jiffies = now;
  498. return;
  499. }
  500. /* Update the rate once in two seconds */
  501. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  502. return;
  503. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  504. - stats->be_rx_bytes_prev,
  505. now - stats->be_rx_jiffies);
  506. stats->be_rx_jiffies = now;
  507. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  508. }
  509. static void be_rx_stats_update(struct be_adapter *adapter,
  510. u32 pktsize, u16 numfrags)
  511. {
  512. struct be_drvr_stats *stats = drvr_stats(adapter);
  513. stats->be_rx_compl++;
  514. stats->be_rx_frags += numfrags;
  515. stats->be_rx_bytes += pktsize;
  516. }
  517. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  518. {
  519. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  520. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  521. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  522. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  523. if (ip_version) {
  524. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  525. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  526. }
  527. ipv6_chk = (ip_version && (tcpf || udpf));
  528. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  529. }
  530. static struct be_rx_page_info *
  531. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  532. {
  533. struct be_rx_page_info *rx_page_info;
  534. struct be_queue_info *rxq = &adapter->rx_obj.q;
  535. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  536. BUG_ON(!rx_page_info->page);
  537. if (rx_page_info->last_page_user)
  538. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  539. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  540. atomic_dec(&rxq->used);
  541. return rx_page_info;
  542. }
  543. /* Throwaway the data in the Rx completion */
  544. static void be_rx_compl_discard(struct be_adapter *adapter,
  545. struct be_eth_rx_compl *rxcp)
  546. {
  547. struct be_queue_info *rxq = &adapter->rx_obj.q;
  548. struct be_rx_page_info *page_info;
  549. u16 rxq_idx, i, num_rcvd;
  550. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  551. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  552. for (i = 0; i < num_rcvd; i++) {
  553. page_info = get_rx_page_info(adapter, rxq_idx);
  554. put_page(page_info->page);
  555. memset(page_info, 0, sizeof(*page_info));
  556. index_inc(&rxq_idx, rxq->len);
  557. }
  558. }
  559. /*
  560. * skb_fill_rx_data forms a complete skb for an ether frame
  561. * indicated by rxcp.
  562. */
  563. static void skb_fill_rx_data(struct be_adapter *adapter,
  564. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  565. {
  566. struct be_queue_info *rxq = &adapter->rx_obj.q;
  567. struct be_rx_page_info *page_info;
  568. u16 rxq_idx, i, num_rcvd, j;
  569. u32 pktsize, hdr_len, curr_frag_len, size;
  570. u8 *start;
  571. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  572. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  573. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  574. page_info = get_rx_page_info(adapter, rxq_idx);
  575. start = page_address(page_info->page) + page_info->page_offset;
  576. prefetch(start);
  577. /* Copy data in the first descriptor of this completion */
  578. curr_frag_len = min(pktsize, rx_frag_size);
  579. /* Copy the header portion into skb_data */
  580. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  581. memcpy(skb->data, start, hdr_len);
  582. skb->len = curr_frag_len;
  583. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  584. /* Complete packet has now been moved to data */
  585. put_page(page_info->page);
  586. skb->data_len = 0;
  587. skb->tail += curr_frag_len;
  588. } else {
  589. skb_shinfo(skb)->nr_frags = 1;
  590. skb_shinfo(skb)->frags[0].page = page_info->page;
  591. skb_shinfo(skb)->frags[0].page_offset =
  592. page_info->page_offset + hdr_len;
  593. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  594. skb->data_len = curr_frag_len - hdr_len;
  595. skb->tail += hdr_len;
  596. }
  597. memset(page_info, 0, sizeof(*page_info));
  598. if (pktsize <= rx_frag_size) {
  599. BUG_ON(num_rcvd != 1);
  600. goto done;
  601. }
  602. /* More frags present for this completion */
  603. size = pktsize;
  604. for (i = 1, j = 0; i < num_rcvd; i++) {
  605. size -= curr_frag_len;
  606. index_inc(&rxq_idx, rxq->len);
  607. page_info = get_rx_page_info(adapter, rxq_idx);
  608. curr_frag_len = min(size, rx_frag_size);
  609. /* Coalesce all frags from the same physical page in one slot */
  610. if (page_info->page_offset == 0) {
  611. /* Fresh page */
  612. j++;
  613. skb_shinfo(skb)->frags[j].page = page_info->page;
  614. skb_shinfo(skb)->frags[j].page_offset =
  615. page_info->page_offset;
  616. skb_shinfo(skb)->frags[j].size = 0;
  617. skb_shinfo(skb)->nr_frags++;
  618. } else {
  619. put_page(page_info->page);
  620. }
  621. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  622. skb->len += curr_frag_len;
  623. skb->data_len += curr_frag_len;
  624. memset(page_info, 0, sizeof(*page_info));
  625. }
  626. BUG_ON(j > MAX_SKB_FRAGS);
  627. done:
  628. be_rx_stats_update(adapter, pktsize, num_rcvd);
  629. return;
  630. }
  631. /* Process the RX completion indicated by rxcp when GRO is disabled */
  632. static void be_rx_compl_process(struct be_adapter *adapter,
  633. struct be_eth_rx_compl *rxcp)
  634. {
  635. struct sk_buff *skb;
  636. u32 vlanf, vid;
  637. u8 vtm;
  638. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  639. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  640. /* vlanf could be wrongly set in some cards.
  641. * ignore if vtm is not set */
  642. if ((adapter->cap & 0x400) && !vtm)
  643. vlanf = 0;
  644. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  645. if (!skb) {
  646. if (net_ratelimit())
  647. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  648. be_rx_compl_discard(adapter, rxcp);
  649. return;
  650. }
  651. skb_fill_rx_data(adapter, skb, rxcp);
  652. if (do_pkt_csum(rxcp, adapter->rx_csum))
  653. skb->ip_summed = CHECKSUM_NONE;
  654. else
  655. skb->ip_summed = CHECKSUM_UNNECESSARY;
  656. skb->truesize = skb->len + sizeof(struct sk_buff);
  657. skb->protocol = eth_type_trans(skb, adapter->netdev);
  658. skb->dev = adapter->netdev;
  659. if (vlanf) {
  660. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  661. kfree_skb(skb);
  662. return;
  663. }
  664. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  665. vid = be16_to_cpu(vid);
  666. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  667. } else {
  668. netif_receive_skb(skb);
  669. }
  670. return;
  671. }
  672. /* Process the RX completion indicated by rxcp when GRO is enabled */
  673. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  674. struct be_eth_rx_compl *rxcp)
  675. {
  676. struct be_rx_page_info *page_info;
  677. struct sk_buff *skb = NULL;
  678. struct be_queue_info *rxq = &adapter->rx_obj.q;
  679. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  680. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  681. u16 i, rxq_idx = 0, vid, j;
  682. u8 vtm;
  683. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  684. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  685. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  686. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  687. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  688. /* vlanf could be wrongly set in some cards.
  689. * ignore if vtm is not set */
  690. if ((adapter->cap & 0x400) && !vtm)
  691. vlanf = 0;
  692. skb = napi_get_frags(&eq_obj->napi);
  693. if (!skb) {
  694. be_rx_compl_discard(adapter, rxcp);
  695. return;
  696. }
  697. remaining = pkt_size;
  698. for (i = 0, j = -1; i < num_rcvd; i++) {
  699. page_info = get_rx_page_info(adapter, rxq_idx);
  700. curr_frag_len = min(remaining, rx_frag_size);
  701. /* Coalesce all frags from the same physical page in one slot */
  702. if (i == 0 || page_info->page_offset == 0) {
  703. /* First frag or Fresh page */
  704. j++;
  705. skb_shinfo(skb)->frags[j].page = page_info->page;
  706. skb_shinfo(skb)->frags[j].page_offset =
  707. page_info->page_offset;
  708. skb_shinfo(skb)->frags[j].size = 0;
  709. } else {
  710. put_page(page_info->page);
  711. }
  712. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  713. remaining -= curr_frag_len;
  714. index_inc(&rxq_idx, rxq->len);
  715. memset(page_info, 0, sizeof(*page_info));
  716. }
  717. BUG_ON(j > MAX_SKB_FRAGS);
  718. skb_shinfo(skb)->nr_frags = j + 1;
  719. skb->len = pkt_size;
  720. skb->data_len = pkt_size;
  721. skb->truesize += pkt_size;
  722. skb->ip_summed = CHECKSUM_UNNECESSARY;
  723. if (likely(!vlanf)) {
  724. napi_gro_frags(&eq_obj->napi);
  725. } else {
  726. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  727. vid = be16_to_cpu(vid);
  728. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  729. return;
  730. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  731. }
  732. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  733. return;
  734. }
  735. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  736. {
  737. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  738. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  739. return NULL;
  740. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  741. queue_tail_inc(&adapter->rx_obj.cq);
  742. return rxcp;
  743. }
  744. /* To reset the valid bit, we need to reset the whole word as
  745. * when walking the queue the valid entries are little-endian
  746. * and invalid entries are host endian
  747. */
  748. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  749. {
  750. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  751. }
  752. static inline struct page *be_alloc_pages(u32 size)
  753. {
  754. gfp_t alloc_flags = GFP_ATOMIC;
  755. u32 order = get_order(size);
  756. if (order > 0)
  757. alloc_flags |= __GFP_COMP;
  758. return alloc_pages(alloc_flags, order);
  759. }
  760. /*
  761. * Allocate a page, split it to fragments of size rx_frag_size and post as
  762. * receive buffers to BE
  763. */
  764. static void be_post_rx_frags(struct be_adapter *adapter)
  765. {
  766. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  767. struct be_rx_page_info *page_info = NULL;
  768. struct be_queue_info *rxq = &adapter->rx_obj.q;
  769. struct page *pagep = NULL;
  770. struct be_eth_rx_d *rxd;
  771. u64 page_dmaaddr = 0, frag_dmaaddr;
  772. u32 posted, page_offset = 0;
  773. page_info = &page_info_tbl[rxq->head];
  774. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  775. if (!pagep) {
  776. pagep = be_alloc_pages(adapter->big_page_size);
  777. if (unlikely(!pagep)) {
  778. drvr_stats(adapter)->be_ethrx_post_fail++;
  779. break;
  780. }
  781. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  782. adapter->big_page_size,
  783. PCI_DMA_FROMDEVICE);
  784. page_info->page_offset = 0;
  785. } else {
  786. get_page(pagep);
  787. page_info->page_offset = page_offset + rx_frag_size;
  788. }
  789. page_offset = page_info->page_offset;
  790. page_info->page = pagep;
  791. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  792. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  793. rxd = queue_head_node(rxq);
  794. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  795. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  796. queue_head_inc(rxq);
  797. /* Any space left in the current big page for another frag? */
  798. if ((page_offset + rx_frag_size + rx_frag_size) >
  799. adapter->big_page_size) {
  800. pagep = NULL;
  801. page_info->last_page_user = true;
  802. }
  803. page_info = &page_info_tbl[rxq->head];
  804. }
  805. if (pagep)
  806. page_info->last_page_user = true;
  807. if (posted) {
  808. atomic_add(posted, &rxq->used);
  809. be_rxq_notify(adapter, rxq->id, posted);
  810. } else if (atomic_read(&rxq->used) == 0) {
  811. /* Let be_worker replenish when memory is available */
  812. adapter->rx_post_starved = true;
  813. }
  814. return;
  815. }
  816. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  817. {
  818. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  819. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  820. return NULL;
  821. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  822. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  823. queue_tail_inc(tx_cq);
  824. return txcp;
  825. }
  826. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  827. {
  828. struct be_queue_info *txq = &adapter->tx_obj.q;
  829. struct be_eth_wrb *wrb;
  830. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  831. struct sk_buff *sent_skb;
  832. u64 busaddr;
  833. u16 cur_index, num_wrbs = 0;
  834. cur_index = txq->tail;
  835. sent_skb = sent_skbs[cur_index];
  836. BUG_ON(!sent_skb);
  837. sent_skbs[cur_index] = NULL;
  838. wrb = queue_tail_node(txq);
  839. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  840. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  841. if (busaddr != 0) {
  842. pci_unmap_single(adapter->pdev, busaddr,
  843. wrb->frag_len, PCI_DMA_TODEVICE);
  844. }
  845. num_wrbs++;
  846. queue_tail_inc(txq);
  847. while (cur_index != last_index) {
  848. cur_index = txq->tail;
  849. wrb = queue_tail_node(txq);
  850. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  851. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  852. if (busaddr != 0) {
  853. pci_unmap_page(adapter->pdev, busaddr,
  854. wrb->frag_len, PCI_DMA_TODEVICE);
  855. }
  856. num_wrbs++;
  857. queue_tail_inc(txq);
  858. }
  859. atomic_sub(num_wrbs, &txq->used);
  860. kfree_skb(sent_skb);
  861. }
  862. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  863. {
  864. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  865. if (!eqe->evt)
  866. return NULL;
  867. eqe->evt = le32_to_cpu(eqe->evt);
  868. queue_tail_inc(&eq_obj->q);
  869. return eqe;
  870. }
  871. static int event_handle(struct be_adapter *adapter,
  872. struct be_eq_obj *eq_obj)
  873. {
  874. struct be_eq_entry *eqe;
  875. u16 num = 0;
  876. while ((eqe = event_get(eq_obj)) != NULL) {
  877. eqe->evt = 0;
  878. num++;
  879. }
  880. /* Deal with any spurious interrupts that come
  881. * without events
  882. */
  883. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  884. if (num)
  885. napi_schedule(&eq_obj->napi);
  886. return num;
  887. }
  888. /* Just read and notify events without processing them.
  889. * Used at the time of destroying event queues */
  890. static void be_eq_clean(struct be_adapter *adapter,
  891. struct be_eq_obj *eq_obj)
  892. {
  893. struct be_eq_entry *eqe;
  894. u16 num = 0;
  895. while ((eqe = event_get(eq_obj)) != NULL) {
  896. eqe->evt = 0;
  897. num++;
  898. }
  899. if (num)
  900. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  901. }
  902. static void be_rx_q_clean(struct be_adapter *adapter)
  903. {
  904. struct be_rx_page_info *page_info;
  905. struct be_queue_info *rxq = &adapter->rx_obj.q;
  906. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  907. struct be_eth_rx_compl *rxcp;
  908. u16 tail;
  909. /* First cleanup pending rx completions */
  910. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  911. be_rx_compl_discard(adapter, rxcp);
  912. be_rx_compl_reset(rxcp);
  913. be_cq_notify(adapter, rx_cq->id, true, 1);
  914. }
  915. /* Then free posted rx buffer that were not used */
  916. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  917. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  918. page_info = get_rx_page_info(adapter, tail);
  919. put_page(page_info->page);
  920. memset(page_info, 0, sizeof(*page_info));
  921. }
  922. BUG_ON(atomic_read(&rxq->used));
  923. }
  924. static void be_tx_compl_clean(struct be_adapter *adapter)
  925. {
  926. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  927. struct be_queue_info *txq = &adapter->tx_obj.q;
  928. struct be_eth_tx_compl *txcp;
  929. u16 end_idx, cmpl = 0, timeo = 0;
  930. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  931. do {
  932. while ((txcp = be_tx_compl_get(tx_cq))) {
  933. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  934. wrb_index, txcp);
  935. be_tx_compl_process(adapter, end_idx);
  936. cmpl++;
  937. }
  938. if (cmpl) {
  939. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  940. cmpl = 0;
  941. }
  942. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  943. break;
  944. mdelay(1);
  945. } while (true);
  946. if (atomic_read(&txq->used))
  947. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  948. atomic_read(&txq->used));
  949. }
  950. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  951. {
  952. struct be_queue_info *q;
  953. q = &adapter->mcc_obj.q;
  954. if (q->created)
  955. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  956. be_queue_free(adapter, q);
  957. q = &adapter->mcc_obj.cq;
  958. if (q->created)
  959. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  960. be_queue_free(adapter, q);
  961. }
  962. /* Must be called only after TX qs are created as MCC shares TX EQ */
  963. static int be_mcc_queues_create(struct be_adapter *adapter)
  964. {
  965. struct be_queue_info *q, *cq;
  966. /* Alloc MCC compl queue */
  967. cq = &adapter->mcc_obj.cq;
  968. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  969. sizeof(struct be_mcc_compl)))
  970. goto err;
  971. /* Ask BE to create MCC compl queue; share TX's eq */
  972. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  973. goto mcc_cq_free;
  974. /* Alloc MCC queue */
  975. q = &adapter->mcc_obj.q;
  976. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  977. goto mcc_cq_destroy;
  978. /* Ask BE to create MCC queue */
  979. if (be_cmd_mccq_create(adapter, q, cq))
  980. goto mcc_q_free;
  981. return 0;
  982. mcc_q_free:
  983. be_queue_free(adapter, q);
  984. mcc_cq_destroy:
  985. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  986. mcc_cq_free:
  987. be_queue_free(adapter, cq);
  988. err:
  989. return -1;
  990. }
  991. static void be_tx_queues_destroy(struct be_adapter *adapter)
  992. {
  993. struct be_queue_info *q;
  994. q = &adapter->tx_obj.q;
  995. if (q->created)
  996. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  997. be_queue_free(adapter, q);
  998. q = &adapter->tx_obj.cq;
  999. if (q->created)
  1000. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1001. be_queue_free(adapter, q);
  1002. /* Clear any residual events */
  1003. be_eq_clean(adapter, &adapter->tx_eq);
  1004. q = &adapter->tx_eq.q;
  1005. if (q->created)
  1006. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1007. be_queue_free(adapter, q);
  1008. }
  1009. static int be_tx_queues_create(struct be_adapter *adapter)
  1010. {
  1011. struct be_queue_info *eq, *q, *cq;
  1012. adapter->tx_eq.max_eqd = 0;
  1013. adapter->tx_eq.min_eqd = 0;
  1014. adapter->tx_eq.cur_eqd = 96;
  1015. adapter->tx_eq.enable_aic = false;
  1016. /* Alloc Tx Event queue */
  1017. eq = &adapter->tx_eq.q;
  1018. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1019. return -1;
  1020. /* Ask BE to create Tx Event queue */
  1021. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1022. goto tx_eq_free;
  1023. /* Alloc TX eth compl queue */
  1024. cq = &adapter->tx_obj.cq;
  1025. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1026. sizeof(struct be_eth_tx_compl)))
  1027. goto tx_eq_destroy;
  1028. /* Ask BE to create Tx eth compl queue */
  1029. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1030. goto tx_cq_free;
  1031. /* Alloc TX eth queue */
  1032. q = &adapter->tx_obj.q;
  1033. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1034. goto tx_cq_destroy;
  1035. /* Ask BE to create Tx eth queue */
  1036. if (be_cmd_txq_create(adapter, q, cq))
  1037. goto tx_q_free;
  1038. return 0;
  1039. tx_q_free:
  1040. be_queue_free(adapter, q);
  1041. tx_cq_destroy:
  1042. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1043. tx_cq_free:
  1044. be_queue_free(adapter, cq);
  1045. tx_eq_destroy:
  1046. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1047. tx_eq_free:
  1048. be_queue_free(adapter, eq);
  1049. return -1;
  1050. }
  1051. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1052. {
  1053. struct be_queue_info *q;
  1054. q = &adapter->rx_obj.q;
  1055. if (q->created) {
  1056. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1057. be_rx_q_clean(adapter);
  1058. }
  1059. be_queue_free(adapter, q);
  1060. q = &adapter->rx_obj.cq;
  1061. if (q->created)
  1062. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1063. be_queue_free(adapter, q);
  1064. /* Clear any residual events */
  1065. be_eq_clean(adapter, &adapter->rx_eq);
  1066. q = &adapter->rx_eq.q;
  1067. if (q->created)
  1068. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1069. be_queue_free(adapter, q);
  1070. }
  1071. static int be_rx_queues_create(struct be_adapter *adapter)
  1072. {
  1073. struct be_queue_info *eq, *q, *cq;
  1074. int rc;
  1075. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1076. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1077. adapter->rx_eq.min_eqd = 0;
  1078. adapter->rx_eq.cur_eqd = 0;
  1079. adapter->rx_eq.enable_aic = true;
  1080. /* Alloc Rx Event queue */
  1081. eq = &adapter->rx_eq.q;
  1082. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1083. sizeof(struct be_eq_entry));
  1084. if (rc)
  1085. return rc;
  1086. /* Ask BE to create Rx Event queue */
  1087. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1088. if (rc)
  1089. goto rx_eq_free;
  1090. /* Alloc RX eth compl queue */
  1091. cq = &adapter->rx_obj.cq;
  1092. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1093. sizeof(struct be_eth_rx_compl));
  1094. if (rc)
  1095. goto rx_eq_destroy;
  1096. /* Ask BE to create Rx eth compl queue */
  1097. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1098. if (rc)
  1099. goto rx_cq_free;
  1100. /* Alloc RX eth queue */
  1101. q = &adapter->rx_obj.q;
  1102. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1103. if (rc)
  1104. goto rx_cq_destroy;
  1105. /* Ask BE to create Rx eth queue */
  1106. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1107. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1108. if (rc)
  1109. goto rx_q_free;
  1110. return 0;
  1111. rx_q_free:
  1112. be_queue_free(adapter, q);
  1113. rx_cq_destroy:
  1114. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1115. rx_cq_free:
  1116. be_queue_free(adapter, cq);
  1117. rx_eq_destroy:
  1118. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1119. rx_eq_free:
  1120. be_queue_free(adapter, eq);
  1121. return rc;
  1122. }
  1123. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1124. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1125. {
  1126. return eq_id - 8 * be_pci_func(adapter);
  1127. }
  1128. static irqreturn_t be_intx(int irq, void *dev)
  1129. {
  1130. struct be_adapter *adapter = dev;
  1131. int isr;
  1132. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1133. be_pci_func(adapter) * CEV_ISR_SIZE);
  1134. if (!isr)
  1135. return IRQ_NONE;
  1136. event_handle(adapter, &adapter->tx_eq);
  1137. event_handle(adapter, &adapter->rx_eq);
  1138. return IRQ_HANDLED;
  1139. }
  1140. static irqreturn_t be_msix_rx(int irq, void *dev)
  1141. {
  1142. struct be_adapter *adapter = dev;
  1143. event_handle(adapter, &adapter->rx_eq);
  1144. return IRQ_HANDLED;
  1145. }
  1146. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1147. {
  1148. struct be_adapter *adapter = dev;
  1149. event_handle(adapter, &adapter->tx_eq);
  1150. return IRQ_HANDLED;
  1151. }
  1152. static inline bool do_gro(struct be_adapter *adapter,
  1153. struct be_eth_rx_compl *rxcp)
  1154. {
  1155. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1156. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1157. if (err)
  1158. drvr_stats(adapter)->be_rxcp_err++;
  1159. return (tcp_frame && !err) ? true : false;
  1160. }
  1161. int be_poll_rx(struct napi_struct *napi, int budget)
  1162. {
  1163. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1164. struct be_adapter *adapter =
  1165. container_of(rx_eq, struct be_adapter, rx_eq);
  1166. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1167. struct be_eth_rx_compl *rxcp;
  1168. u32 work_done;
  1169. adapter->stats.drvr_stats.be_rx_polls++;
  1170. for (work_done = 0; work_done < budget; work_done++) {
  1171. rxcp = be_rx_compl_get(adapter);
  1172. if (!rxcp)
  1173. break;
  1174. if (do_gro(adapter, rxcp))
  1175. be_rx_compl_process_gro(adapter, rxcp);
  1176. else
  1177. be_rx_compl_process(adapter, rxcp);
  1178. be_rx_compl_reset(rxcp);
  1179. }
  1180. /* Refill the queue */
  1181. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1182. be_post_rx_frags(adapter);
  1183. /* All consumed */
  1184. if (work_done < budget) {
  1185. napi_complete(napi);
  1186. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1187. } else {
  1188. /* More to be consumed; continue with interrupts disabled */
  1189. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1190. }
  1191. return work_done;
  1192. }
  1193. void be_process_tx(struct be_adapter *adapter)
  1194. {
  1195. struct be_queue_info *txq = &adapter->tx_obj.q;
  1196. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1197. struct be_eth_tx_compl *txcp;
  1198. u32 num_cmpl = 0;
  1199. u16 end_idx;
  1200. while ((txcp = be_tx_compl_get(tx_cq))) {
  1201. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1202. wrb_index, txcp);
  1203. be_tx_compl_process(adapter, end_idx);
  1204. num_cmpl++;
  1205. }
  1206. if (num_cmpl) {
  1207. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1208. /* As Tx wrbs have been freed up, wake up netdev queue if
  1209. * it was stopped due to lack of tx wrbs.
  1210. */
  1211. if (netif_queue_stopped(adapter->netdev) &&
  1212. atomic_read(&txq->used) < txq->len / 2) {
  1213. netif_wake_queue(adapter->netdev);
  1214. }
  1215. drvr_stats(adapter)->be_tx_events++;
  1216. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1217. }
  1218. }
  1219. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1220. * For TX/MCC we don't honour budget; consume everything
  1221. */
  1222. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1223. {
  1224. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1225. struct be_adapter *adapter =
  1226. container_of(tx_eq, struct be_adapter, tx_eq);
  1227. napi_complete(napi);
  1228. be_process_tx(adapter);
  1229. be_process_mcc(adapter);
  1230. return 1;
  1231. }
  1232. static void be_worker(struct work_struct *work)
  1233. {
  1234. struct be_adapter *adapter =
  1235. container_of(work, struct be_adapter, work.work);
  1236. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1237. /* Set EQ delay */
  1238. be_rx_eqd_update(adapter);
  1239. be_tx_rate_update(adapter);
  1240. be_rx_rate_update(adapter);
  1241. if (adapter->rx_post_starved) {
  1242. adapter->rx_post_starved = false;
  1243. be_post_rx_frags(adapter);
  1244. }
  1245. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1246. }
  1247. static void be_msix_disable(struct be_adapter *adapter)
  1248. {
  1249. if (adapter->msix_enabled) {
  1250. pci_disable_msix(adapter->pdev);
  1251. adapter->msix_enabled = false;
  1252. }
  1253. }
  1254. static void be_msix_enable(struct be_adapter *adapter)
  1255. {
  1256. int i, status;
  1257. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1258. adapter->msix_entries[i].entry = i;
  1259. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1260. BE_NUM_MSIX_VECTORS);
  1261. if (status == 0)
  1262. adapter->msix_enabled = true;
  1263. return;
  1264. }
  1265. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1266. {
  1267. return adapter->msix_entries[
  1268. be_evt_bit_get(adapter, eq_id)].vector;
  1269. }
  1270. static int be_request_irq(struct be_adapter *adapter,
  1271. struct be_eq_obj *eq_obj,
  1272. void *handler, char *desc)
  1273. {
  1274. struct net_device *netdev = adapter->netdev;
  1275. int vec;
  1276. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1277. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1278. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1279. }
  1280. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1281. {
  1282. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1283. free_irq(vec, adapter);
  1284. }
  1285. static int be_msix_register(struct be_adapter *adapter)
  1286. {
  1287. int status;
  1288. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1289. if (status)
  1290. goto err;
  1291. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1292. if (status)
  1293. goto free_tx_irq;
  1294. return 0;
  1295. free_tx_irq:
  1296. be_free_irq(adapter, &adapter->tx_eq);
  1297. err:
  1298. dev_warn(&adapter->pdev->dev,
  1299. "MSIX Request IRQ failed - err %d\n", status);
  1300. pci_disable_msix(adapter->pdev);
  1301. adapter->msix_enabled = false;
  1302. return status;
  1303. }
  1304. static int be_irq_register(struct be_adapter *adapter)
  1305. {
  1306. struct net_device *netdev = adapter->netdev;
  1307. int status;
  1308. if (adapter->msix_enabled) {
  1309. status = be_msix_register(adapter);
  1310. if (status == 0)
  1311. goto done;
  1312. }
  1313. /* INTx */
  1314. netdev->irq = adapter->pdev->irq;
  1315. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1316. adapter);
  1317. if (status) {
  1318. dev_err(&adapter->pdev->dev,
  1319. "INTx request IRQ failed - err %d\n", status);
  1320. return status;
  1321. }
  1322. done:
  1323. adapter->isr_registered = true;
  1324. return 0;
  1325. }
  1326. static void be_irq_unregister(struct be_adapter *adapter)
  1327. {
  1328. struct net_device *netdev = adapter->netdev;
  1329. if (!adapter->isr_registered)
  1330. return;
  1331. /* INTx */
  1332. if (!adapter->msix_enabled) {
  1333. free_irq(netdev->irq, adapter);
  1334. goto done;
  1335. }
  1336. /* MSIx */
  1337. be_free_irq(adapter, &adapter->tx_eq);
  1338. be_free_irq(adapter, &adapter->rx_eq);
  1339. done:
  1340. adapter->isr_registered = false;
  1341. return;
  1342. }
  1343. static int be_open(struct net_device *netdev)
  1344. {
  1345. struct be_adapter *adapter = netdev_priv(netdev);
  1346. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1347. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1348. bool link_up;
  1349. int status;
  1350. u8 mac_speed;
  1351. u16 link_speed;
  1352. /* First time posting */
  1353. be_post_rx_frags(adapter);
  1354. napi_enable(&rx_eq->napi);
  1355. napi_enable(&tx_eq->napi);
  1356. be_irq_register(adapter);
  1357. be_intr_set(adapter, true);
  1358. /* The evt queues are created in unarmed state; arm them */
  1359. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1360. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1361. /* Rx compl queue may be in unarmed state; rearm it */
  1362. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1363. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1364. &link_speed);
  1365. if (status)
  1366. goto ret_sts;
  1367. be_link_status_update(adapter, link_up);
  1368. status = be_vid_config(adapter);
  1369. if (status)
  1370. goto ret_sts;
  1371. status = be_cmd_set_flow_control(adapter,
  1372. adapter->tx_fc, adapter->rx_fc);
  1373. if (status)
  1374. goto ret_sts;
  1375. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1376. ret_sts:
  1377. return status;
  1378. }
  1379. static int be_setup_wol(struct be_adapter *adapter, bool enable)
  1380. {
  1381. struct be_dma_mem cmd;
  1382. int status = 0;
  1383. u8 mac[ETH_ALEN];
  1384. memset(mac, 0, ETH_ALEN);
  1385. cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
  1386. cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
  1387. if (cmd.va == NULL)
  1388. return -1;
  1389. memset(cmd.va, 0, cmd.size);
  1390. if (enable) {
  1391. status = pci_write_config_dword(adapter->pdev,
  1392. PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
  1393. if (status) {
  1394. dev_err(&adapter->pdev->dev,
  1395. "Could not enable Wake-on-lan \n");
  1396. pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
  1397. cmd.dma);
  1398. return status;
  1399. }
  1400. status = be_cmd_enable_magic_wol(adapter,
  1401. adapter->netdev->dev_addr, &cmd);
  1402. pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
  1403. pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
  1404. } else {
  1405. status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
  1406. pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
  1407. pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
  1408. }
  1409. pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
  1410. return status;
  1411. }
  1412. static int be_setup(struct be_adapter *adapter)
  1413. {
  1414. struct net_device *netdev = adapter->netdev;
  1415. u32 cap_flags, en_flags;
  1416. int status;
  1417. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1418. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1419. BE_IF_FLAGS_PROMISCUOUS |
  1420. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1421. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1422. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1423. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1424. netdev->dev_addr, false/* pmac_invalid */,
  1425. &adapter->if_handle, &adapter->pmac_id);
  1426. if (status != 0)
  1427. goto do_none;
  1428. status = be_tx_queues_create(adapter);
  1429. if (status != 0)
  1430. goto if_destroy;
  1431. status = be_rx_queues_create(adapter);
  1432. if (status != 0)
  1433. goto tx_qs_destroy;
  1434. status = be_mcc_queues_create(adapter);
  1435. if (status != 0)
  1436. goto rx_qs_destroy;
  1437. adapter->link_speed = -1;
  1438. return 0;
  1439. rx_qs_destroy:
  1440. be_rx_queues_destroy(adapter);
  1441. tx_qs_destroy:
  1442. be_tx_queues_destroy(adapter);
  1443. if_destroy:
  1444. be_cmd_if_destroy(adapter, adapter->if_handle);
  1445. do_none:
  1446. return status;
  1447. }
  1448. static int be_clear(struct be_adapter *adapter)
  1449. {
  1450. be_mcc_queues_destroy(adapter);
  1451. be_rx_queues_destroy(adapter);
  1452. be_tx_queues_destroy(adapter);
  1453. be_cmd_if_destroy(adapter, adapter->if_handle);
  1454. /* tell fw we're done with firing cmds */
  1455. be_cmd_fw_clean(adapter);
  1456. return 0;
  1457. }
  1458. static int be_close(struct net_device *netdev)
  1459. {
  1460. struct be_adapter *adapter = netdev_priv(netdev);
  1461. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1462. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1463. int vec;
  1464. cancel_delayed_work_sync(&adapter->work);
  1465. netif_stop_queue(netdev);
  1466. netif_carrier_off(netdev);
  1467. adapter->link_up = false;
  1468. be_intr_set(adapter, false);
  1469. if (adapter->msix_enabled) {
  1470. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1471. synchronize_irq(vec);
  1472. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1473. synchronize_irq(vec);
  1474. } else {
  1475. synchronize_irq(netdev->irq);
  1476. }
  1477. be_irq_unregister(adapter);
  1478. napi_disable(&rx_eq->napi);
  1479. napi_disable(&tx_eq->napi);
  1480. /* Wait for all pending tx completions to arrive so that
  1481. * all tx skbs are freed.
  1482. */
  1483. be_tx_compl_clean(adapter);
  1484. return 0;
  1485. }
  1486. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1487. char flash_cookie[2][16] = {"*** SE FLAS",
  1488. "H DIRECTORY *** "};
  1489. static bool be_flash_redboot(struct be_adapter *adapter,
  1490. const u8 *p)
  1491. {
  1492. u32 crc_offset;
  1493. u8 flashed_crc[4];
  1494. int status;
  1495. crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
  1496. + sizeof(struct flash_file_hdr) - 32*1024;
  1497. p += crc_offset;
  1498. status = be_cmd_get_flash_crc(adapter, flashed_crc);
  1499. if (status) {
  1500. dev_err(&adapter->pdev->dev,
  1501. "could not get crc from flash, not flashing redboot\n");
  1502. return false;
  1503. }
  1504. /*update redboot only if crc does not match*/
  1505. if (!memcmp(flashed_crc, p, 4))
  1506. return false;
  1507. else
  1508. return true;
  1509. }
  1510. static int be_flash_image(struct be_adapter *adapter,
  1511. const struct firmware *fw,
  1512. struct be_dma_mem *flash_cmd, u32 flash_type)
  1513. {
  1514. int status;
  1515. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1516. int num_bytes;
  1517. const u8 *p = fw->data;
  1518. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1519. switch (flash_type) {
  1520. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1521. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1522. image_size = FLASH_IMAGE_MAX_SIZE;
  1523. break;
  1524. case FLASHROM_TYPE_ISCSI_BACKUP:
  1525. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1526. image_size = FLASH_IMAGE_MAX_SIZE;
  1527. break;
  1528. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1529. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1530. image_size = FLASH_IMAGE_MAX_SIZE;
  1531. break;
  1532. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1533. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1534. image_size = FLASH_IMAGE_MAX_SIZE;
  1535. break;
  1536. case FLASHROM_TYPE_BIOS:
  1537. image_offset = FLASH_iSCSI_BIOS_START;
  1538. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1539. break;
  1540. case FLASHROM_TYPE_FCOE_BIOS:
  1541. image_offset = FLASH_FCoE_BIOS_START;
  1542. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1543. break;
  1544. case FLASHROM_TYPE_PXE_BIOS:
  1545. image_offset = FLASH_PXE_BIOS_START;
  1546. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1547. break;
  1548. case FLASHROM_TYPE_REDBOOT:
  1549. if (!be_flash_redboot(adapter, fw->data))
  1550. return 0;
  1551. image_offset = FLASH_REDBOOT_ISM_START;
  1552. image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
  1553. break;
  1554. default:
  1555. return 0;
  1556. }
  1557. p += sizeof(struct flash_file_hdr) + image_offset;
  1558. if (p + image_size > fw->data + fw->size)
  1559. return -1;
  1560. total_bytes = image_size;
  1561. while (total_bytes) {
  1562. if (total_bytes > 32*1024)
  1563. num_bytes = 32*1024;
  1564. else
  1565. num_bytes = total_bytes;
  1566. total_bytes -= num_bytes;
  1567. if (!total_bytes)
  1568. flash_op = FLASHROM_OPER_FLASH;
  1569. else
  1570. flash_op = FLASHROM_OPER_SAVE;
  1571. memcpy(req->params.data_buf, p, num_bytes);
  1572. p += num_bytes;
  1573. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1574. flash_type, flash_op, num_bytes);
  1575. if (status) {
  1576. dev_err(&adapter->pdev->dev,
  1577. "cmd to write to flash rom failed. type/op %d/%d\n",
  1578. flash_type, flash_op);
  1579. return -1;
  1580. }
  1581. yield();
  1582. }
  1583. return 0;
  1584. }
  1585. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1586. {
  1587. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1588. const struct firmware *fw;
  1589. struct flash_file_hdr *fhdr;
  1590. struct flash_section_info *fsec = NULL;
  1591. struct be_dma_mem flash_cmd;
  1592. int status;
  1593. const u8 *p;
  1594. bool entry_found = false;
  1595. int flash_type;
  1596. char fw_ver[FW_VER_LEN];
  1597. char fw_cfg;
  1598. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1599. if (status)
  1600. return status;
  1601. fw_cfg = *(fw_ver + 2);
  1602. if (fw_cfg == '0')
  1603. fw_cfg = '1';
  1604. strcpy(fw_file, func);
  1605. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1606. if (status)
  1607. goto fw_exit;
  1608. p = fw->data;
  1609. fhdr = (struct flash_file_hdr *) p;
  1610. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1611. dev_err(&adapter->pdev->dev,
  1612. "Firmware(%s) load error (signature did not match)\n",
  1613. fw_file);
  1614. status = -1;
  1615. goto fw_exit;
  1616. }
  1617. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1618. p += sizeof(struct flash_file_hdr);
  1619. while (p < (fw->data + fw->size)) {
  1620. fsec = (struct flash_section_info *)p;
  1621. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1622. entry_found = true;
  1623. break;
  1624. }
  1625. p += 32;
  1626. }
  1627. if (!entry_found) {
  1628. status = -1;
  1629. dev_err(&adapter->pdev->dev,
  1630. "Flash cookie not found in firmware image\n");
  1631. goto fw_exit;
  1632. }
  1633. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1634. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1635. &flash_cmd.dma);
  1636. if (!flash_cmd.va) {
  1637. status = -ENOMEM;
  1638. dev_err(&adapter->pdev->dev,
  1639. "Memory allocation failure while flashing\n");
  1640. goto fw_exit;
  1641. }
  1642. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1643. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1644. status = be_flash_image(adapter, fw, &flash_cmd,
  1645. flash_type);
  1646. if (status)
  1647. break;
  1648. }
  1649. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1650. flash_cmd.dma);
  1651. if (status) {
  1652. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1653. goto fw_exit;
  1654. }
  1655. dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
  1656. fw_exit:
  1657. release_firmware(fw);
  1658. return status;
  1659. }
  1660. static struct net_device_ops be_netdev_ops = {
  1661. .ndo_open = be_open,
  1662. .ndo_stop = be_close,
  1663. .ndo_start_xmit = be_xmit,
  1664. .ndo_get_stats = be_get_stats,
  1665. .ndo_set_rx_mode = be_set_multicast_list,
  1666. .ndo_set_mac_address = be_mac_addr_set,
  1667. .ndo_change_mtu = be_change_mtu,
  1668. .ndo_validate_addr = eth_validate_addr,
  1669. .ndo_vlan_rx_register = be_vlan_register,
  1670. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1671. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1672. };
  1673. static void be_netdev_init(struct net_device *netdev)
  1674. {
  1675. struct be_adapter *adapter = netdev_priv(netdev);
  1676. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1677. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1678. NETIF_F_GRO;
  1679. netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  1680. netdev->flags |= IFF_MULTICAST;
  1681. adapter->rx_csum = true;
  1682. /* Default settings for Rx and Tx flow control */
  1683. adapter->rx_fc = true;
  1684. adapter->tx_fc = true;
  1685. netif_set_gso_max_size(netdev, 65535);
  1686. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1687. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1688. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1689. BE_NAPI_WEIGHT);
  1690. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1691. BE_NAPI_WEIGHT);
  1692. netif_carrier_off(netdev);
  1693. netif_stop_queue(netdev);
  1694. }
  1695. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1696. {
  1697. if (adapter->csr)
  1698. iounmap(adapter->csr);
  1699. if (adapter->db)
  1700. iounmap(adapter->db);
  1701. if (adapter->pcicfg)
  1702. iounmap(adapter->pcicfg);
  1703. }
  1704. static int be_map_pci_bars(struct be_adapter *adapter)
  1705. {
  1706. u8 __iomem *addr;
  1707. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1708. pci_resource_len(adapter->pdev, 2));
  1709. if (addr == NULL)
  1710. return -ENOMEM;
  1711. adapter->csr = addr;
  1712. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1713. 128 * 1024);
  1714. if (addr == NULL)
  1715. goto pci_map_err;
  1716. adapter->db = addr;
  1717. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1718. pci_resource_len(adapter->pdev, 1));
  1719. if (addr == NULL)
  1720. goto pci_map_err;
  1721. adapter->pcicfg = addr;
  1722. return 0;
  1723. pci_map_err:
  1724. be_unmap_pci_bars(adapter);
  1725. return -ENOMEM;
  1726. }
  1727. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1728. {
  1729. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1730. be_unmap_pci_bars(adapter);
  1731. if (mem->va)
  1732. pci_free_consistent(adapter->pdev, mem->size,
  1733. mem->va, mem->dma);
  1734. mem = &adapter->mc_cmd_mem;
  1735. if (mem->va)
  1736. pci_free_consistent(adapter->pdev, mem->size,
  1737. mem->va, mem->dma);
  1738. }
  1739. static int be_ctrl_init(struct be_adapter *adapter)
  1740. {
  1741. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1742. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1743. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1744. int status;
  1745. status = be_map_pci_bars(adapter);
  1746. if (status)
  1747. goto done;
  1748. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1749. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1750. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1751. if (!mbox_mem_alloc->va) {
  1752. status = -ENOMEM;
  1753. goto unmap_pci_bars;
  1754. }
  1755. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1756. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1757. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1758. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1759. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  1760. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  1761. &mc_cmd_mem->dma);
  1762. if (mc_cmd_mem->va == NULL) {
  1763. status = -ENOMEM;
  1764. goto free_mbox;
  1765. }
  1766. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  1767. spin_lock_init(&adapter->mbox_lock);
  1768. spin_lock_init(&adapter->mcc_lock);
  1769. spin_lock_init(&adapter->mcc_cq_lock);
  1770. return 0;
  1771. free_mbox:
  1772. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  1773. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  1774. unmap_pci_bars:
  1775. be_unmap_pci_bars(adapter);
  1776. done:
  1777. return status;
  1778. }
  1779. static void be_stats_cleanup(struct be_adapter *adapter)
  1780. {
  1781. struct be_stats_obj *stats = &adapter->stats;
  1782. struct be_dma_mem *cmd = &stats->cmd;
  1783. if (cmd->va)
  1784. pci_free_consistent(adapter->pdev, cmd->size,
  1785. cmd->va, cmd->dma);
  1786. }
  1787. static int be_stats_init(struct be_adapter *adapter)
  1788. {
  1789. struct be_stats_obj *stats = &adapter->stats;
  1790. struct be_dma_mem *cmd = &stats->cmd;
  1791. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1792. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1793. if (cmd->va == NULL)
  1794. return -1;
  1795. return 0;
  1796. }
  1797. static void __devexit be_remove(struct pci_dev *pdev)
  1798. {
  1799. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1800. if (!adapter)
  1801. return;
  1802. unregister_netdev(adapter->netdev);
  1803. be_clear(adapter);
  1804. be_stats_cleanup(adapter);
  1805. be_ctrl_cleanup(adapter);
  1806. be_msix_disable(adapter);
  1807. pci_set_drvdata(pdev, NULL);
  1808. pci_release_regions(pdev);
  1809. pci_disable_device(pdev);
  1810. free_netdev(adapter->netdev);
  1811. }
  1812. static int be_get_config(struct be_adapter *adapter)
  1813. {
  1814. int status;
  1815. u8 mac[ETH_ALEN];
  1816. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1817. if (status)
  1818. return status;
  1819. status = be_cmd_query_fw_cfg(adapter,
  1820. &adapter->port_num, &adapter->cap);
  1821. if (status)
  1822. return status;
  1823. memset(mac, 0, ETH_ALEN);
  1824. status = be_cmd_mac_addr_query(adapter, mac,
  1825. MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
  1826. if (status)
  1827. return status;
  1828. if (!is_valid_ether_addr(mac))
  1829. return -EADDRNOTAVAIL;
  1830. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  1831. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  1832. return 0;
  1833. }
  1834. static int __devinit be_probe(struct pci_dev *pdev,
  1835. const struct pci_device_id *pdev_id)
  1836. {
  1837. int status = 0;
  1838. struct be_adapter *adapter;
  1839. struct net_device *netdev;
  1840. status = pci_enable_device(pdev);
  1841. if (status)
  1842. goto do_none;
  1843. status = pci_request_regions(pdev, DRV_NAME);
  1844. if (status)
  1845. goto disable_dev;
  1846. pci_set_master(pdev);
  1847. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1848. if (netdev == NULL) {
  1849. status = -ENOMEM;
  1850. goto rel_reg;
  1851. }
  1852. adapter = netdev_priv(netdev);
  1853. adapter->pdev = pdev;
  1854. pci_set_drvdata(pdev, adapter);
  1855. adapter->netdev = netdev;
  1856. be_netdev_init(netdev);
  1857. SET_NETDEV_DEV(netdev, &pdev->dev);
  1858. be_msix_enable(adapter);
  1859. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1860. if (!status) {
  1861. netdev->features |= NETIF_F_HIGHDMA;
  1862. } else {
  1863. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1864. if (status) {
  1865. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1866. goto free_netdev;
  1867. }
  1868. }
  1869. status = be_ctrl_init(adapter);
  1870. if (status)
  1871. goto free_netdev;
  1872. /* sync up with fw's ready state */
  1873. status = be_cmd_POST(adapter);
  1874. if (status)
  1875. goto ctrl_clean;
  1876. /* tell fw we're ready to fire cmds */
  1877. status = be_cmd_fw_init(adapter);
  1878. if (status)
  1879. goto ctrl_clean;
  1880. status = be_cmd_reset_function(adapter);
  1881. if (status)
  1882. goto ctrl_clean;
  1883. status = be_stats_init(adapter);
  1884. if (status)
  1885. goto ctrl_clean;
  1886. status = be_get_config(adapter);
  1887. if (status)
  1888. goto stats_clean;
  1889. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1890. status = be_setup(adapter);
  1891. if (status)
  1892. goto stats_clean;
  1893. status = register_netdev(netdev);
  1894. if (status != 0)
  1895. goto unsetup;
  1896. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1897. return 0;
  1898. unsetup:
  1899. be_clear(adapter);
  1900. stats_clean:
  1901. be_stats_cleanup(adapter);
  1902. ctrl_clean:
  1903. be_ctrl_cleanup(adapter);
  1904. free_netdev:
  1905. be_msix_disable(adapter);
  1906. free_netdev(adapter->netdev);
  1907. pci_set_drvdata(pdev, NULL);
  1908. rel_reg:
  1909. pci_release_regions(pdev);
  1910. disable_dev:
  1911. pci_disable_device(pdev);
  1912. do_none:
  1913. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1914. return status;
  1915. }
  1916. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1917. {
  1918. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1919. struct net_device *netdev = adapter->netdev;
  1920. if (adapter->wol)
  1921. be_setup_wol(adapter, true);
  1922. netif_device_detach(netdev);
  1923. if (netif_running(netdev)) {
  1924. rtnl_lock();
  1925. be_close(netdev);
  1926. rtnl_unlock();
  1927. }
  1928. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1929. be_clear(adapter);
  1930. pci_save_state(pdev);
  1931. pci_disable_device(pdev);
  1932. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1933. return 0;
  1934. }
  1935. static int be_resume(struct pci_dev *pdev)
  1936. {
  1937. int status = 0;
  1938. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1939. struct net_device *netdev = adapter->netdev;
  1940. netif_device_detach(netdev);
  1941. status = pci_enable_device(pdev);
  1942. if (status)
  1943. return status;
  1944. pci_set_power_state(pdev, 0);
  1945. pci_restore_state(pdev);
  1946. /* tell fw we're ready to fire cmds */
  1947. status = be_cmd_fw_init(adapter);
  1948. if (status)
  1949. return status;
  1950. be_setup(adapter);
  1951. if (netif_running(netdev)) {
  1952. rtnl_lock();
  1953. be_open(netdev);
  1954. rtnl_unlock();
  1955. }
  1956. netif_device_attach(netdev);
  1957. if (adapter->wol)
  1958. be_setup_wol(adapter, false);
  1959. return 0;
  1960. }
  1961. static struct pci_driver be_driver = {
  1962. .name = DRV_NAME,
  1963. .id_table = be_dev_ids,
  1964. .probe = be_probe,
  1965. .remove = be_remove,
  1966. .suspend = be_suspend,
  1967. .resume = be_resume
  1968. };
  1969. static int __init be_init_module(void)
  1970. {
  1971. if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
  1972. rx_frag_size != 2048) {
  1973. printk(KERN_WARNING DRV_NAME
  1974. " : Module param rx_frag_size must be 2048/4096/8192."
  1975. " Using 2048\n");
  1976. rx_frag_size = 2048;
  1977. }
  1978. return pci_register_driver(&be_driver);
  1979. }
  1980. module_init(be_init_module);
  1981. static void __exit be_exit_module(void)
  1982. {
  1983. pci_unregister_driver(&be_driver);
  1984. }
  1985. module_exit(be_exit_module);