atl1c_main.c 76 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781
  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
  26. #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
  27. /*
  28. * atl1c_pci_tbl - PCI Device ID Table
  29. *
  30. * Wildcard entries (PCI_ANY_ID) should come last
  31. * Last entry must be all 0s
  32. *
  33. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  34. * Class, Class Mask, private data (not used) }
  35. */
  36. static struct pci_device_id atl1c_pci_tbl[] = {
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  39. /* required last entry */
  40. { 0 }
  41. };
  42. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  43. MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
  44. MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
  45. MODULE_LICENSE("GPL");
  46. MODULE_VERSION(ATL1C_DRV_VERSION);
  47. static int atl1c_stop_mac(struct atl1c_hw *hw);
  48. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
  49. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
  50. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  51. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
  52. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
  53. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  54. int *work_done, int work_to_do);
  55. static const u16 atl1c_pay_load_size[] = {
  56. 128, 256, 512, 1024, 2048, 4096,
  57. };
  58. static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
  59. {
  60. REG_MB_RFD0_PROD_IDX,
  61. REG_MB_RFD1_PROD_IDX,
  62. REG_MB_RFD2_PROD_IDX,
  63. REG_MB_RFD3_PROD_IDX
  64. };
  65. static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  66. {
  67. REG_RFD0_HEAD_ADDR_LO,
  68. REG_RFD1_HEAD_ADDR_LO,
  69. REG_RFD2_HEAD_ADDR_LO,
  70. REG_RFD3_HEAD_ADDR_LO
  71. };
  72. static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  73. {
  74. REG_RRD0_HEAD_ADDR_LO,
  75. REG_RRD1_HEAD_ADDR_LO,
  76. REG_RRD2_HEAD_ADDR_LO,
  77. REG_RRD3_HEAD_ADDR_LO
  78. };
  79. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  80. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  81. /*
  82. * atl1c_init_pcie - init PCIE module
  83. */
  84. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  85. {
  86. u32 data;
  87. u32 pci_cmd;
  88. struct pci_dev *pdev = hw->adapter->pdev;
  89. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  90. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  91. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  92. PCI_COMMAND_IO);
  93. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  94. /*
  95. * Clear any PowerSaveing Settings
  96. */
  97. pci_enable_wake(pdev, PCI_D3hot, 0);
  98. pci_enable_wake(pdev, PCI_D3cold, 0);
  99. /*
  100. * Mask some pcie error bits
  101. */
  102. AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
  103. data &= ~PCIE_UC_SERVRITY_DLP;
  104. data &= ~PCIE_UC_SERVRITY_FCP;
  105. AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
  106. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  107. atl1c_disable_l0s_l1(hw);
  108. if (flag & ATL1C_PCIE_PHY_RESET)
  109. AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
  110. else
  111. AT_WRITE_REG(hw, REG_GPHY_CTRL,
  112. GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
  113. msleep(1);
  114. }
  115. /*
  116. * atl1c_irq_enable - Enable default interrupt generation settings
  117. * @adapter: board private structure
  118. */
  119. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  120. {
  121. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  122. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  123. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  124. AT_WRITE_FLUSH(&adapter->hw);
  125. }
  126. }
  127. /*
  128. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  129. * @adapter: board private structure
  130. */
  131. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  132. {
  133. atomic_inc(&adapter->irq_sem);
  134. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  135. AT_WRITE_FLUSH(&adapter->hw);
  136. synchronize_irq(adapter->pdev->irq);
  137. }
  138. /*
  139. * atl1c_irq_reset - reset interrupt confiure on the NIC
  140. * @adapter: board private structure
  141. */
  142. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  143. {
  144. atomic_set(&adapter->irq_sem, 1);
  145. atl1c_irq_enable(adapter);
  146. }
  147. /*
  148. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  149. * of the idle status register until the device is actually idle
  150. */
  151. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
  152. {
  153. int timeout;
  154. u32 data;
  155. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  156. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  157. if ((data & IDLE_STATUS_MASK) == 0)
  158. return 0;
  159. msleep(1);
  160. }
  161. return data;
  162. }
  163. /*
  164. * atl1c_phy_config - Timer Call-back
  165. * @data: pointer to netdev cast into an unsigned long
  166. */
  167. static void atl1c_phy_config(unsigned long data)
  168. {
  169. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  170. struct atl1c_hw *hw = &adapter->hw;
  171. unsigned long flags;
  172. spin_lock_irqsave(&adapter->mdio_lock, flags);
  173. atl1c_restart_autoneg(hw);
  174. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  175. }
  176. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  177. {
  178. WARN_ON(in_interrupt());
  179. atl1c_down(adapter);
  180. atl1c_up(adapter);
  181. clear_bit(__AT_RESETTING, &adapter->flags);
  182. }
  183. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  184. {
  185. struct atl1c_hw *hw = &adapter->hw;
  186. struct net_device *netdev = adapter->netdev;
  187. struct pci_dev *pdev = adapter->pdev;
  188. int err;
  189. unsigned long flags;
  190. u16 speed, duplex, phy_data;
  191. spin_lock_irqsave(&adapter->mdio_lock, flags);
  192. /* MII_BMSR must read twise */
  193. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  194. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  195. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  196. if ((phy_data & BMSR_LSTATUS) == 0) {
  197. /* link down */
  198. if (netif_carrier_ok(netdev)) {
  199. hw->hibernate = true;
  200. if (atl1c_stop_mac(hw) != 0)
  201. if (netif_msg_hw(adapter))
  202. dev_warn(&pdev->dev,
  203. "stop mac failed\n");
  204. atl1c_set_aspm(hw, false);
  205. }
  206. netif_carrier_off(netdev);
  207. } else {
  208. /* Link Up */
  209. hw->hibernate = false;
  210. spin_lock_irqsave(&adapter->mdio_lock, flags);
  211. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  212. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  213. if (unlikely(err))
  214. return;
  215. /* link result is our setting */
  216. if (adapter->link_speed != speed ||
  217. adapter->link_duplex != duplex) {
  218. adapter->link_speed = speed;
  219. adapter->link_duplex = duplex;
  220. atl1c_set_aspm(hw, true);
  221. atl1c_enable_tx_ctrl(hw);
  222. atl1c_enable_rx_ctrl(hw);
  223. atl1c_setup_mac_ctrl(adapter);
  224. if (netif_msg_link(adapter))
  225. dev_info(&pdev->dev,
  226. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  227. atl1c_driver_name, netdev->name,
  228. adapter->link_speed,
  229. adapter->link_duplex == FULL_DUPLEX ?
  230. "Full Duplex" : "Half Duplex");
  231. }
  232. if (!netif_carrier_ok(netdev))
  233. netif_carrier_on(netdev);
  234. }
  235. }
  236. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  237. {
  238. struct net_device *netdev = adapter->netdev;
  239. struct pci_dev *pdev = adapter->pdev;
  240. u16 phy_data;
  241. u16 link_up;
  242. spin_lock(&adapter->mdio_lock);
  243. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  244. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  245. spin_unlock(&adapter->mdio_lock);
  246. link_up = phy_data & BMSR_LSTATUS;
  247. /* notify upper layer link down ASAP */
  248. if (!link_up) {
  249. if (netif_carrier_ok(netdev)) {
  250. /* old link state: Up */
  251. netif_carrier_off(netdev);
  252. if (netif_msg_link(adapter))
  253. dev_info(&pdev->dev,
  254. "%s: %s NIC Link is Down\n",
  255. atl1c_driver_name, netdev->name);
  256. adapter->link_speed = SPEED_0;
  257. }
  258. }
  259. adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
  260. schedule_work(&adapter->common_task);
  261. }
  262. static void atl1c_common_task(struct work_struct *work)
  263. {
  264. struct atl1c_adapter *adapter;
  265. struct net_device *netdev;
  266. adapter = container_of(work, struct atl1c_adapter, common_task);
  267. netdev = adapter->netdev;
  268. if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
  269. netif_device_detach(netdev);
  270. atl1c_down(adapter);
  271. atl1c_up(adapter);
  272. netif_device_attach(netdev);
  273. return;
  274. }
  275. if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE)
  276. atl1c_check_link_status(adapter);
  277. return;
  278. }
  279. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  280. {
  281. del_timer_sync(&adapter->phy_config_timer);
  282. }
  283. /*
  284. * atl1c_tx_timeout - Respond to a Tx Hang
  285. * @netdev: network interface device structure
  286. */
  287. static void atl1c_tx_timeout(struct net_device *netdev)
  288. {
  289. struct atl1c_adapter *adapter = netdev_priv(netdev);
  290. /* Do the reset outside of interrupt context */
  291. adapter->work_event |= ATL1C_WORK_EVENT_RESET;
  292. schedule_work(&adapter->common_task);
  293. }
  294. /*
  295. * atl1c_set_multi - Multicast and Promiscuous mode set
  296. * @netdev: network interface device structure
  297. *
  298. * The set_multi entry point is called whenever the multicast address
  299. * list or the network interface flags are updated. This routine is
  300. * responsible for configuring the hardware for proper multicast,
  301. * promiscuous mode, and all-multi behavior.
  302. */
  303. static void atl1c_set_multi(struct net_device *netdev)
  304. {
  305. struct atl1c_adapter *adapter = netdev_priv(netdev);
  306. struct atl1c_hw *hw = &adapter->hw;
  307. struct dev_mc_list *mc_ptr;
  308. u32 mac_ctrl_data;
  309. u32 hash_value;
  310. /* Check for Promiscuous and All Multicast modes */
  311. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  312. if (netdev->flags & IFF_PROMISC) {
  313. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  314. } else if (netdev->flags & IFF_ALLMULTI) {
  315. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  316. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  317. } else {
  318. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  319. }
  320. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  321. /* clear the old settings from the multicast hash table */
  322. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  323. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  324. /* comoute mc addresses' hash value ,and put it into hash table */
  325. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  326. hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
  327. atl1c_hash_set(hw, hash_value);
  328. }
  329. }
  330. static void atl1c_vlan_rx_register(struct net_device *netdev,
  331. struct vlan_group *grp)
  332. {
  333. struct atl1c_adapter *adapter = netdev_priv(netdev);
  334. struct pci_dev *pdev = adapter->pdev;
  335. u32 mac_ctrl_data = 0;
  336. if (netif_msg_pktdata(adapter))
  337. dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
  338. atl1c_irq_disable(adapter);
  339. adapter->vlgrp = grp;
  340. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  341. if (grp) {
  342. /* enable VLAN tag insert/strip */
  343. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  344. } else {
  345. /* disable VLAN tag insert/strip */
  346. mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  347. }
  348. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  349. atl1c_irq_enable(adapter);
  350. }
  351. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  352. {
  353. struct pci_dev *pdev = adapter->pdev;
  354. if (netif_msg_pktdata(adapter))
  355. dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
  356. atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  357. }
  358. /*
  359. * atl1c_set_mac - Change the Ethernet Address of the NIC
  360. * @netdev: network interface device structure
  361. * @p: pointer to an address structure
  362. *
  363. * Returns 0 on success, negative on failure
  364. */
  365. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  366. {
  367. struct atl1c_adapter *adapter = netdev_priv(netdev);
  368. struct sockaddr *addr = p;
  369. if (!is_valid_ether_addr(addr->sa_data))
  370. return -EADDRNOTAVAIL;
  371. if (netif_running(netdev))
  372. return -EBUSY;
  373. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  374. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  375. atl1c_hw_set_mac_addr(&adapter->hw);
  376. return 0;
  377. }
  378. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  379. struct net_device *dev)
  380. {
  381. int mtu = dev->mtu;
  382. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  383. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  384. }
  385. /*
  386. * atl1c_change_mtu - Change the Maximum Transfer Unit
  387. * @netdev: network interface device structure
  388. * @new_mtu: new value for maximum frame size
  389. *
  390. * Returns 0 on success, negative on failure
  391. */
  392. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  393. {
  394. struct atl1c_adapter *adapter = netdev_priv(netdev);
  395. int old_mtu = netdev->mtu;
  396. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  397. if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
  398. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  399. if (netif_msg_link(adapter))
  400. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  401. return -EINVAL;
  402. }
  403. /* set MTU */
  404. if (old_mtu != new_mtu && netif_running(netdev)) {
  405. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  406. msleep(1);
  407. netdev->mtu = new_mtu;
  408. adapter->hw.max_frame_size = new_mtu;
  409. atl1c_set_rxbufsize(adapter, netdev);
  410. atl1c_down(adapter);
  411. atl1c_up(adapter);
  412. clear_bit(__AT_RESETTING, &adapter->flags);
  413. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  414. u32 phy_data;
  415. AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
  416. phy_data |= 0x10000000;
  417. AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
  418. }
  419. }
  420. return 0;
  421. }
  422. /*
  423. * caller should hold mdio_lock
  424. */
  425. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  426. {
  427. struct atl1c_adapter *adapter = netdev_priv(netdev);
  428. u16 result;
  429. atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
  430. return result;
  431. }
  432. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  433. int reg_num, int val)
  434. {
  435. struct atl1c_adapter *adapter = netdev_priv(netdev);
  436. atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
  437. }
  438. /*
  439. * atl1c_mii_ioctl -
  440. * @netdev:
  441. * @ifreq:
  442. * @cmd:
  443. */
  444. static int atl1c_mii_ioctl(struct net_device *netdev,
  445. struct ifreq *ifr, int cmd)
  446. {
  447. struct atl1c_adapter *adapter = netdev_priv(netdev);
  448. struct pci_dev *pdev = adapter->pdev;
  449. struct mii_ioctl_data *data = if_mii(ifr);
  450. unsigned long flags;
  451. int retval = 0;
  452. if (!netif_running(netdev))
  453. return -EINVAL;
  454. spin_lock_irqsave(&adapter->mdio_lock, flags);
  455. switch (cmd) {
  456. case SIOCGMIIPHY:
  457. data->phy_id = 0;
  458. break;
  459. case SIOCGMIIREG:
  460. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  461. &data->val_out)) {
  462. retval = -EIO;
  463. goto out;
  464. }
  465. break;
  466. case SIOCSMIIREG:
  467. if (data->reg_num & ~(0x1F)) {
  468. retval = -EFAULT;
  469. goto out;
  470. }
  471. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  472. data->reg_num, data->val_in);
  473. if (atl1c_write_phy_reg(&adapter->hw,
  474. data->reg_num, data->val_in)) {
  475. retval = -EIO;
  476. goto out;
  477. }
  478. break;
  479. default:
  480. retval = -EOPNOTSUPP;
  481. break;
  482. }
  483. out:
  484. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  485. return retval;
  486. }
  487. /*
  488. * atl1c_ioctl -
  489. * @netdev:
  490. * @ifreq:
  491. * @cmd:
  492. */
  493. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  494. {
  495. switch (cmd) {
  496. case SIOCGMIIPHY:
  497. case SIOCGMIIREG:
  498. case SIOCSMIIREG:
  499. return atl1c_mii_ioctl(netdev, ifr, cmd);
  500. default:
  501. return -EOPNOTSUPP;
  502. }
  503. }
  504. /*
  505. * atl1c_alloc_queues - Allocate memory for all rings
  506. * @adapter: board private structure to initialize
  507. *
  508. */
  509. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  510. {
  511. return 0;
  512. }
  513. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  514. {
  515. switch (hw->device_id) {
  516. case PCI_DEVICE_ID_ATTANSIC_L2C:
  517. hw->nic_type = athr_l2c;
  518. break;
  519. case PCI_DEVICE_ID_ATTANSIC_L1C:
  520. hw->nic_type = athr_l1c;
  521. break;
  522. default:
  523. break;
  524. }
  525. }
  526. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  527. {
  528. u32 phy_status_data;
  529. u32 link_ctrl_data;
  530. atl1c_set_mac_type(hw);
  531. AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
  532. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  533. hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
  534. ATL1C_INTR_MODRT_ENABLE |
  535. ATL1C_RX_IPV6_CHKSUM |
  536. ATL1C_TXQ_MODE_ENHANCE;
  537. if (link_ctrl_data & LINK_CTRL_L0S_EN)
  538. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
  539. if (link_ctrl_data & LINK_CTRL_L1_EN)
  540. hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
  541. if (hw->nic_type == athr_l1c) {
  542. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  543. hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
  544. }
  545. return 0;
  546. }
  547. /*
  548. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  549. * @adapter: board private structure to initialize
  550. *
  551. * atl1c_sw_init initializes the Adapter private data structure.
  552. * Fields are initialized based on PCI device information and
  553. * OS network device settings (MTU size).
  554. */
  555. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  556. {
  557. struct atl1c_hw *hw = &adapter->hw;
  558. struct pci_dev *pdev = adapter->pdev;
  559. adapter->wol = 0;
  560. adapter->link_speed = SPEED_0;
  561. adapter->link_duplex = FULL_DUPLEX;
  562. adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
  563. adapter->tpd_ring[0].count = 1024;
  564. adapter->rfd_ring[0].count = 512;
  565. hw->vendor_id = pdev->vendor;
  566. hw->device_id = pdev->device;
  567. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  568. hw->subsystem_id = pdev->subsystem_device;
  569. /* before link up, we assume hibernate is true */
  570. hw->hibernate = true;
  571. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  572. if (atl1c_setup_mac_funcs(hw) != 0) {
  573. dev_err(&pdev->dev, "set mac function pointers failed\n");
  574. return -1;
  575. }
  576. hw->intr_mask = IMR_NORMAL_MASK;
  577. hw->phy_configured = false;
  578. hw->preamble_len = 7;
  579. hw->max_frame_size = adapter->netdev->mtu;
  580. if (adapter->num_rx_queues < 2) {
  581. hw->rss_type = atl1c_rss_disable;
  582. hw->rss_mode = atl1c_rss_mode_disable;
  583. } else {
  584. hw->rss_type = atl1c_rss_ipv4;
  585. hw->rss_mode = atl1c_rss_mul_que_mul_int;
  586. hw->rss_hash_bits = 16;
  587. }
  588. hw->autoneg_advertised = ADVERTISED_Autoneg;
  589. hw->indirect_tab = 0xE4E4E4E4;
  590. hw->base_cpu = 0;
  591. hw->ict = 50000; /* 100ms */
  592. hw->smb_timer = 200000; /* 400ms */
  593. hw->cmb_tpd = 4;
  594. hw->cmb_tx_timer = 1; /* 2 us */
  595. hw->rx_imt = 200;
  596. hw->tx_imt = 1000;
  597. hw->tpd_burst = 5;
  598. hw->rfd_burst = 8;
  599. hw->dma_order = atl1c_dma_ord_out;
  600. hw->dmar_block = atl1c_dma_req_1024;
  601. hw->dmaw_block = atl1c_dma_req_1024;
  602. hw->dmar_dly_cnt = 15;
  603. hw->dmaw_dly_cnt = 4;
  604. if (atl1c_alloc_queues(adapter)) {
  605. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  606. return -ENOMEM;
  607. }
  608. /* TODO */
  609. atl1c_set_rxbufsize(adapter, adapter->netdev);
  610. atomic_set(&adapter->irq_sem, 1);
  611. spin_lock_init(&adapter->mdio_lock);
  612. spin_lock_init(&adapter->tx_lock);
  613. set_bit(__AT_DOWN, &adapter->flags);
  614. return 0;
  615. }
  616. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  617. struct atl1c_buffer *buffer_info, int in_irq)
  618. {
  619. u16 pci_driection;
  620. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  621. return;
  622. if (buffer_info->dma) {
  623. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  624. pci_driection = PCI_DMA_FROMDEVICE;
  625. else
  626. pci_driection = PCI_DMA_TODEVICE;
  627. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  628. pci_unmap_single(pdev, buffer_info->dma,
  629. buffer_info->length, pci_driection);
  630. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  631. pci_unmap_page(pdev, buffer_info->dma,
  632. buffer_info->length, pci_driection);
  633. }
  634. if (buffer_info->skb) {
  635. if (in_irq)
  636. dev_kfree_skb_irq(buffer_info->skb);
  637. else
  638. dev_kfree_skb(buffer_info->skb);
  639. }
  640. buffer_info->dma = 0;
  641. buffer_info->skb = NULL;
  642. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  643. }
  644. /*
  645. * atl1c_clean_tx_ring - Free Tx-skb
  646. * @adapter: board private structure
  647. */
  648. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  649. enum atl1c_trans_queue type)
  650. {
  651. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  652. struct atl1c_buffer *buffer_info;
  653. struct pci_dev *pdev = adapter->pdev;
  654. u16 index, ring_count;
  655. ring_count = tpd_ring->count;
  656. for (index = 0; index < ring_count; index++) {
  657. buffer_info = &tpd_ring->buffer_info[index];
  658. atl1c_clean_buffer(pdev, buffer_info, 0);
  659. }
  660. /* Zero out Tx-buffers */
  661. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  662. ring_count);
  663. atomic_set(&tpd_ring->next_to_clean, 0);
  664. tpd_ring->next_to_use = 0;
  665. }
  666. /*
  667. * atl1c_clean_rx_ring - Free rx-reservation skbs
  668. * @adapter: board private structure
  669. */
  670. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  671. {
  672. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  673. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  674. struct atl1c_buffer *buffer_info;
  675. struct pci_dev *pdev = adapter->pdev;
  676. int i, j;
  677. for (i = 0; i < adapter->num_rx_queues; i++) {
  678. for (j = 0; j < rfd_ring[i].count; j++) {
  679. buffer_info = &rfd_ring[i].buffer_info[j];
  680. atl1c_clean_buffer(pdev, buffer_info, 0);
  681. }
  682. /* zero out the descriptor ring */
  683. memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
  684. rfd_ring[i].next_to_clean = 0;
  685. rfd_ring[i].next_to_use = 0;
  686. rrd_ring[i].next_to_use = 0;
  687. rrd_ring[i].next_to_clean = 0;
  688. }
  689. }
  690. /*
  691. * Read / Write Ptr Initialize:
  692. */
  693. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  694. {
  695. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  696. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  697. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  698. struct atl1c_buffer *buffer_info;
  699. int i, j;
  700. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  701. tpd_ring[i].next_to_use = 0;
  702. atomic_set(&tpd_ring[i].next_to_clean, 0);
  703. buffer_info = tpd_ring[i].buffer_info;
  704. for (j = 0; j < tpd_ring->count; j++)
  705. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  706. ATL1C_BUFFER_FREE);
  707. }
  708. for (i = 0; i < adapter->num_rx_queues; i++) {
  709. rfd_ring[i].next_to_use = 0;
  710. rfd_ring[i].next_to_clean = 0;
  711. rrd_ring[i].next_to_use = 0;
  712. rrd_ring[i].next_to_clean = 0;
  713. for (j = 0; j < rfd_ring[i].count; j++) {
  714. buffer_info = &rfd_ring[i].buffer_info[j];
  715. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  716. }
  717. }
  718. }
  719. /*
  720. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  721. * @adapter: board private structure
  722. *
  723. * Free all transmit software resources
  724. */
  725. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  726. {
  727. struct pci_dev *pdev = adapter->pdev;
  728. pci_free_consistent(pdev, adapter->ring_header.size,
  729. adapter->ring_header.desc,
  730. adapter->ring_header.dma);
  731. adapter->ring_header.desc = NULL;
  732. /* Note: just free tdp_ring.buffer_info,
  733. * it contain rfd_ring.buffer_info, do not double free */
  734. if (adapter->tpd_ring[0].buffer_info) {
  735. kfree(adapter->tpd_ring[0].buffer_info);
  736. adapter->tpd_ring[0].buffer_info = NULL;
  737. }
  738. }
  739. /*
  740. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  741. * @adapter: board private structure
  742. *
  743. * Return 0 on success, negative on failure
  744. */
  745. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  746. {
  747. struct pci_dev *pdev = adapter->pdev;
  748. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  749. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  750. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  751. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  752. int num_rx_queues = adapter->num_rx_queues;
  753. int size;
  754. int i;
  755. int count = 0;
  756. int rx_desc_count = 0;
  757. u32 offset = 0;
  758. rrd_ring[0].count = rfd_ring[0].count;
  759. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  760. tpd_ring[i].count = tpd_ring[0].count;
  761. for (i = 1; i < adapter->num_rx_queues; i++)
  762. rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
  763. /* 2 tpd queue, one high priority queue,
  764. * another normal priority queue */
  765. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  766. rfd_ring->count * num_rx_queues);
  767. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  768. if (unlikely(!tpd_ring->buffer_info)) {
  769. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  770. size);
  771. goto err_nomem;
  772. }
  773. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  774. tpd_ring[i].buffer_info =
  775. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  776. count += tpd_ring[i].count;
  777. }
  778. for (i = 0; i < num_rx_queues; i++) {
  779. rfd_ring[i].buffer_info =
  780. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  781. count += rfd_ring[i].count;
  782. rx_desc_count += rfd_ring[i].count;
  783. }
  784. /*
  785. * real ring DMA buffer
  786. * each ring/block may need up to 8 bytes for alignment, hence the
  787. * additional bytes tacked onto the end.
  788. */
  789. ring_header->size = size =
  790. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  791. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  792. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  793. sizeof(struct atl1c_hw_stats) +
  794. 8 * 4 + 8 * 2 * num_rx_queues;
  795. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  796. &ring_header->dma);
  797. if (unlikely(!ring_header->desc)) {
  798. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  799. goto err_nomem;
  800. }
  801. memset(ring_header->desc, 0, ring_header->size);
  802. /* init TPD ring */
  803. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  804. offset = tpd_ring[0].dma - ring_header->dma;
  805. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  806. tpd_ring[i].dma = ring_header->dma + offset;
  807. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  808. tpd_ring[i].size =
  809. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  810. offset += roundup(tpd_ring[i].size, 8);
  811. }
  812. /* init RFD ring */
  813. for (i = 0; i < num_rx_queues; i++) {
  814. rfd_ring[i].dma = ring_header->dma + offset;
  815. rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
  816. rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
  817. rfd_ring[i].count;
  818. offset += roundup(rfd_ring[i].size, 8);
  819. }
  820. /* init RRD ring */
  821. for (i = 0; i < num_rx_queues; i++) {
  822. rrd_ring[i].dma = ring_header->dma + offset;
  823. rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
  824. rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
  825. rrd_ring[i].count;
  826. offset += roundup(rrd_ring[i].size, 8);
  827. }
  828. adapter->smb.dma = ring_header->dma + offset;
  829. adapter->smb.smb = (u8 *)ring_header->desc + offset;
  830. return 0;
  831. err_nomem:
  832. kfree(tpd_ring->buffer_info);
  833. return -ENOMEM;
  834. }
  835. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  836. {
  837. struct atl1c_hw *hw = &adapter->hw;
  838. struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
  839. adapter->rfd_ring;
  840. struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
  841. adapter->rrd_ring;
  842. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  843. adapter->tpd_ring;
  844. struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
  845. struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
  846. int i;
  847. /* TPD */
  848. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  849. (u32)((tpd_ring[atl1c_trans_normal].dma &
  850. AT_DMA_HI_ADDR_MASK) >> 32));
  851. /* just enable normal priority TX queue */
  852. AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
  853. (u32)(tpd_ring[atl1c_trans_normal].dma &
  854. AT_DMA_LO_ADDR_MASK));
  855. AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
  856. (u32)(tpd_ring[atl1c_trans_high].dma &
  857. AT_DMA_LO_ADDR_MASK));
  858. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  859. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  860. /* RFD */
  861. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  862. (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
  863. for (i = 0; i < adapter->num_rx_queues; i++)
  864. AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
  865. (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  866. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  867. rfd_ring[0].count & RFD_RING_SIZE_MASK);
  868. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  869. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  870. /* RRD */
  871. for (i = 0; i < adapter->num_rx_queues; i++)
  872. AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
  873. (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  874. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  875. (rrd_ring[0].count & RRD_RING_SIZE_MASK));
  876. /* CMB */
  877. AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
  878. /* SMB */
  879. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
  880. (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  881. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
  882. (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
  883. /* Load all of base address above */
  884. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  885. }
  886. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  887. {
  888. struct atl1c_hw *hw = &adapter->hw;
  889. u32 dev_ctrl_data;
  890. u32 max_pay_load;
  891. u16 tx_offload_thresh;
  892. u32 txq_ctrl_data;
  893. u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
  894. extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
  895. tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
  896. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  897. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  898. AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
  899. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
  900. DEVICE_CTRL_MAX_PAYLOAD_MASK;
  901. hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
  902. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
  903. DEVICE_CTRL_MAX_RREQ_SZ_MASK;
  904. hw->dmar_block = min(max_pay_load, hw->dmar_block);
  905. txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
  906. TXQ_NUM_TPD_BURST_SHIFT;
  907. if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
  908. txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
  909. txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
  910. TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
  911. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  912. }
  913. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  914. {
  915. struct atl1c_hw *hw = &adapter->hw;
  916. u32 rxq_ctrl_data;
  917. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  918. RXQ_RFD_BURST_NUM_SHIFT;
  919. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  920. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  921. if (hw->rss_type == atl1c_rss_ipv4)
  922. rxq_ctrl_data |= RSS_HASH_IPV4;
  923. if (hw->rss_type == atl1c_rss_ipv4_tcp)
  924. rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
  925. if (hw->rss_type == atl1c_rss_ipv6)
  926. rxq_ctrl_data |= RSS_HASH_IPV6;
  927. if (hw->rss_type == atl1c_rss_ipv6_tcp)
  928. rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
  929. if (hw->rss_type != atl1c_rss_disable)
  930. rxq_ctrl_data |= RRS_HASH_CTRL_EN;
  931. rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
  932. RSS_MODE_SHIFT;
  933. rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
  934. RSS_HASH_BITS_SHIFT;
  935. if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
  936. rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
  937. ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
  938. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  939. }
  940. static void atl1c_configure_rss(struct atl1c_adapter *adapter)
  941. {
  942. struct atl1c_hw *hw = &adapter->hw;
  943. AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
  944. AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
  945. }
  946. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  947. {
  948. struct atl1c_hw *hw = &adapter->hw;
  949. u32 dma_ctrl_data;
  950. dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
  951. if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
  952. dma_ctrl_data |= DMA_CTRL_CMB_EN;
  953. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  954. dma_ctrl_data |= DMA_CTRL_SMB_EN;
  955. else
  956. dma_ctrl_data |= MAC_CTRL_SMB_DIS;
  957. switch (hw->dma_order) {
  958. case atl1c_dma_ord_in:
  959. dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
  960. break;
  961. case atl1c_dma_ord_enh:
  962. dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
  963. break;
  964. case atl1c_dma_ord_out:
  965. dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
  966. break;
  967. default:
  968. break;
  969. }
  970. dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  971. << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
  972. dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
  973. << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
  974. dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
  975. << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
  976. dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
  977. << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
  978. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  979. }
  980. /*
  981. * Stop the mac, transmit and receive units
  982. * hw - Struct containing variables accessed by shared code
  983. * return : 0 or idle status (if error)
  984. */
  985. static int atl1c_stop_mac(struct atl1c_hw *hw)
  986. {
  987. u32 data;
  988. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  989. data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
  990. RXQ3_CTRL_EN | RXQ_CTRL_EN);
  991. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  992. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  993. data &= ~TXQ_CTRL_EN;
  994. AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
  995. atl1c_wait_until_idle(hw);
  996. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  997. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  998. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  999. return (int)atl1c_wait_until_idle(hw);
  1000. }
  1001. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
  1002. {
  1003. u32 data;
  1004. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1005. switch (hw->adapter->num_rx_queues) {
  1006. case 4:
  1007. data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1008. break;
  1009. case 3:
  1010. data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1011. break;
  1012. case 2:
  1013. data |= RXQ1_CTRL_EN;
  1014. break;
  1015. default:
  1016. break;
  1017. }
  1018. data |= RXQ_CTRL_EN;
  1019. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1020. }
  1021. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
  1022. {
  1023. u32 data;
  1024. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1025. data |= TXQ_CTRL_EN;
  1026. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1027. }
  1028. /*
  1029. * Reset the transmit and receive units; mask and clear all interrupts.
  1030. * hw - Struct containing variables accessed by shared code
  1031. * return : 0 or idle status (if error)
  1032. */
  1033. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1034. {
  1035. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1036. struct pci_dev *pdev = adapter->pdev;
  1037. int ret;
  1038. AT_WRITE_REG(hw, REG_IMR, 0);
  1039. AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
  1040. ret = atl1c_stop_mac(hw);
  1041. if (ret)
  1042. return ret;
  1043. /*
  1044. * Issue Soft Reset to the MAC. This will reset the chip's
  1045. * transmit, receive, DMA. It will not effect
  1046. * the current PCI configuration. The global reset bit is self-
  1047. * clearing, and should clear within a microsecond.
  1048. */
  1049. AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
  1050. AT_WRITE_FLUSH(hw);
  1051. msleep(10);
  1052. /* Wait at least 10ms for All module to be Idle */
  1053. if (atl1c_wait_until_idle(hw)) {
  1054. dev_err(&pdev->dev,
  1055. "MAC state machine can't be idle since"
  1056. " disabled for 10ms second\n");
  1057. return -1;
  1058. }
  1059. return 0;
  1060. }
  1061. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1062. {
  1063. u32 pm_ctrl_data;
  1064. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1065. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1066. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1067. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1068. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1069. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1070. pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
  1071. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1072. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1073. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1074. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1075. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1076. }
  1077. /*
  1078. * Set ASPM state.
  1079. * Enable/disable L0s/L1 depend on link state.
  1080. */
  1081. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
  1082. {
  1083. u32 pm_ctrl_data;
  1084. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1085. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1086. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1087. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1088. pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
  1089. if (linkup) {
  1090. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1091. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1092. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1093. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1094. } else {
  1095. pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1096. pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
  1097. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1098. pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
  1099. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1100. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1101. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
  1102. else
  1103. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1104. }
  1105. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1106. }
  1107. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
  1108. {
  1109. struct atl1c_hw *hw = &adapter->hw;
  1110. struct net_device *netdev = adapter->netdev;
  1111. u32 mac_ctrl_data;
  1112. mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  1113. mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  1114. if (adapter->link_duplex == FULL_DUPLEX) {
  1115. hw->mac_duplex = true;
  1116. mac_ctrl_data |= MAC_CTRL_DUPLX;
  1117. }
  1118. if (adapter->link_speed == SPEED_1000)
  1119. hw->mac_speed = atl1c_mac_speed_1000;
  1120. else
  1121. hw->mac_speed = atl1c_mac_speed_10_100;
  1122. mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
  1123. MAC_CTRL_SPEED_SHIFT;
  1124. mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  1125. mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
  1126. MAC_CTRL_PRMLEN_SHIFT);
  1127. if (adapter->vlgrp)
  1128. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  1129. mac_ctrl_data |= MAC_CTRL_BC_EN;
  1130. if (netdev->flags & IFF_PROMISC)
  1131. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  1132. if (netdev->flags & IFF_ALLMULTI)
  1133. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  1134. mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
  1135. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  1136. }
  1137. /*
  1138. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1139. * @adapter: board private structure
  1140. *
  1141. * Configure the Tx /Rx unit of the MAC after a reset.
  1142. */
  1143. static int atl1c_configure(struct atl1c_adapter *adapter)
  1144. {
  1145. struct atl1c_hw *hw = &adapter->hw;
  1146. u32 master_ctrl_data = 0;
  1147. u32 intr_modrt_data;
  1148. /* clear interrupt status */
  1149. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1150. /* Clear any WOL status */
  1151. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1152. /* set Interrupt Clear Timer
  1153. * HW will enable self to assert interrupt event to system after
  1154. * waiting x-time for software to notify it accept interrupt.
  1155. */
  1156. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1157. hw->ict & INT_RETRIG_TIMER_MASK);
  1158. atl1c_configure_des_ring(adapter);
  1159. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1160. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1161. IRQ_MODRT_TX_TIMER_SHIFT;
  1162. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1163. IRQ_MODRT_RX_TIMER_SHIFT;
  1164. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1165. master_ctrl_data |=
  1166. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1167. }
  1168. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1169. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1170. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1171. if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
  1172. AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
  1173. hw->cmb_tpd & CMB_TPD_THRESH_MASK);
  1174. AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
  1175. hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
  1176. }
  1177. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  1178. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1179. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1180. /* set MTU */
  1181. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1182. VLAN_HLEN + ETH_FCS_LEN);
  1183. /* HDS, disable */
  1184. AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
  1185. atl1c_configure_tx(adapter);
  1186. atl1c_configure_rx(adapter);
  1187. atl1c_configure_rss(adapter);
  1188. atl1c_configure_dma(adapter);
  1189. return 0;
  1190. }
  1191. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1192. {
  1193. u16 hw_reg_addr = 0;
  1194. unsigned long *stats_item = NULL;
  1195. u32 data;
  1196. /* update rx status */
  1197. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1198. stats_item = &adapter->hw_stats.rx_ok;
  1199. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1200. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1201. *stats_item += data;
  1202. stats_item++;
  1203. hw_reg_addr += 4;
  1204. }
  1205. /* update tx status */
  1206. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1207. stats_item = &adapter->hw_stats.tx_ok;
  1208. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1209. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1210. *stats_item += data;
  1211. stats_item++;
  1212. hw_reg_addr += 4;
  1213. }
  1214. }
  1215. /*
  1216. * atl1c_get_stats - Get System Network Statistics
  1217. * @netdev: network interface device structure
  1218. *
  1219. * Returns the address of the device statistics structure.
  1220. * The statistics are actually updated from the timer callback.
  1221. */
  1222. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1223. {
  1224. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1225. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1226. struct net_device_stats *net_stats = &adapter->net_stats;
  1227. atl1c_update_hw_stats(adapter);
  1228. net_stats->rx_packets = hw_stats->rx_ok;
  1229. net_stats->tx_packets = hw_stats->tx_ok;
  1230. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1231. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1232. net_stats->multicast = hw_stats->rx_mcast;
  1233. net_stats->collisions = hw_stats->tx_1_col +
  1234. hw_stats->tx_2_col * 2 +
  1235. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1236. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1237. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1238. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1239. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1240. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1241. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1242. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1243. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1244. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1245. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1246. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1247. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1248. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1249. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1250. return &adapter->net_stats;
  1251. }
  1252. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1253. {
  1254. u16 phy_data;
  1255. spin_lock(&adapter->mdio_lock);
  1256. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1257. spin_unlock(&adapter->mdio_lock);
  1258. }
  1259. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1260. enum atl1c_trans_queue type)
  1261. {
  1262. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1263. &adapter->tpd_ring[type];
  1264. struct atl1c_buffer *buffer_info;
  1265. struct pci_dev *pdev = adapter->pdev;
  1266. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1267. u16 hw_next_to_clean;
  1268. u16 shift;
  1269. u32 data;
  1270. if (type == atl1c_trans_high)
  1271. shift = MB_HTPD_CONS_IDX_SHIFT;
  1272. else
  1273. shift = MB_NTPD_CONS_IDX_SHIFT;
  1274. AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
  1275. hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
  1276. while (next_to_clean != hw_next_to_clean) {
  1277. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1278. atl1c_clean_buffer(pdev, buffer_info, 1);
  1279. if (++next_to_clean == tpd_ring->count)
  1280. next_to_clean = 0;
  1281. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1282. }
  1283. if (netif_queue_stopped(adapter->netdev) &&
  1284. netif_carrier_ok(adapter->netdev)) {
  1285. netif_wake_queue(adapter->netdev);
  1286. }
  1287. return true;
  1288. }
  1289. /*
  1290. * atl1c_intr - Interrupt Handler
  1291. * @irq: interrupt number
  1292. * @data: pointer to a network interface device structure
  1293. * @pt_regs: CPU registers structure
  1294. */
  1295. static irqreturn_t atl1c_intr(int irq, void *data)
  1296. {
  1297. struct net_device *netdev = data;
  1298. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1299. struct pci_dev *pdev = adapter->pdev;
  1300. struct atl1c_hw *hw = &adapter->hw;
  1301. int max_ints = AT_MAX_INT_WORK;
  1302. int handled = IRQ_NONE;
  1303. u32 status;
  1304. u32 reg_data;
  1305. do {
  1306. AT_READ_REG(hw, REG_ISR, &reg_data);
  1307. status = reg_data & hw->intr_mask;
  1308. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1309. if (max_ints != AT_MAX_INT_WORK)
  1310. handled = IRQ_HANDLED;
  1311. break;
  1312. }
  1313. /* link event */
  1314. if (status & ISR_GPHY)
  1315. atl1c_clear_phy_int(adapter);
  1316. /* Ack ISR */
  1317. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1318. if (status & ISR_RX_PKT) {
  1319. if (likely(napi_schedule_prep(&adapter->napi))) {
  1320. hw->intr_mask &= ~ISR_RX_PKT;
  1321. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1322. __napi_schedule(&adapter->napi);
  1323. }
  1324. }
  1325. if (status & ISR_TX_PKT)
  1326. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1327. handled = IRQ_HANDLED;
  1328. /* check if PCIE PHY Link down */
  1329. if (status & ISR_ERROR) {
  1330. if (netif_msg_hw(adapter))
  1331. dev_err(&pdev->dev,
  1332. "atl1c hardware error (status = 0x%x)\n",
  1333. status & ISR_ERROR);
  1334. /* reset MAC */
  1335. hw->intr_mask &= ~ISR_ERROR;
  1336. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1337. adapter->work_event |= ATL1C_WORK_EVENT_RESET;
  1338. schedule_work(&adapter->common_task);
  1339. break;
  1340. }
  1341. if (status & ISR_OVER)
  1342. if (netif_msg_intr(adapter))
  1343. dev_warn(&pdev->dev,
  1344. "TX/RX overflow (status = 0x%x)\n",
  1345. status & ISR_OVER);
  1346. /* link event */
  1347. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1348. adapter->net_stats.tx_carrier_errors++;
  1349. atl1c_link_chg_event(adapter);
  1350. break;
  1351. }
  1352. } while (--max_ints > 0);
  1353. /* re-enable Interrupt*/
  1354. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1355. return handled;
  1356. }
  1357. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1358. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1359. {
  1360. /*
  1361. * The pid field in RRS in not correct sometimes, so we
  1362. * cannot figure out if the packet is fragmented or not,
  1363. * so we tell the KERNEL CHECKSUM_NONE
  1364. */
  1365. skb->ip_summed = CHECKSUM_NONE;
  1366. }
  1367. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
  1368. {
  1369. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
  1370. struct pci_dev *pdev = adapter->pdev;
  1371. struct atl1c_buffer *buffer_info, *next_info;
  1372. struct sk_buff *skb;
  1373. void *vir_addr = NULL;
  1374. u16 num_alloc = 0;
  1375. u16 rfd_next_to_use, next_next;
  1376. struct atl1c_rx_free_desc *rfd_desc;
  1377. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1378. if (++next_next == rfd_ring->count)
  1379. next_next = 0;
  1380. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1381. next_info = &rfd_ring->buffer_info[next_next];
  1382. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1383. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1384. skb = dev_alloc_skb(adapter->rx_buffer_len);
  1385. if (unlikely(!skb)) {
  1386. if (netif_msg_rx_err(adapter))
  1387. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1388. break;
  1389. }
  1390. /*
  1391. * Make buffer alignment 2 beyond a 16 byte boundary
  1392. * this will result in a 16 byte aligned IP header after
  1393. * the 14 byte MAC header is removed
  1394. */
  1395. vir_addr = skb->data;
  1396. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1397. buffer_info->skb = skb;
  1398. buffer_info->length = adapter->rx_buffer_len;
  1399. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1400. buffer_info->length,
  1401. PCI_DMA_FROMDEVICE);
  1402. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1403. ATL1C_PCIMAP_FROMDEVICE);
  1404. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1405. rfd_next_to_use = next_next;
  1406. if (++next_next == rfd_ring->count)
  1407. next_next = 0;
  1408. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1409. next_info = &rfd_ring->buffer_info[next_next];
  1410. num_alloc++;
  1411. }
  1412. if (num_alloc) {
  1413. /* TODO: update mailbox here */
  1414. wmb();
  1415. rfd_ring->next_to_use = rfd_next_to_use;
  1416. AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
  1417. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1418. }
  1419. return num_alloc;
  1420. }
  1421. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1422. struct atl1c_recv_ret_status *rrs, u16 num)
  1423. {
  1424. u16 i;
  1425. /* the relationship between rrd and rfd is one map one */
  1426. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1427. rrd_ring->next_to_clean)) {
  1428. rrs->word3 &= ~RRS_RXD_UPDATED;
  1429. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1430. rrd_ring->next_to_clean = 0;
  1431. }
  1432. }
  1433. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1434. struct atl1c_recv_ret_status *rrs, u16 num)
  1435. {
  1436. u16 i;
  1437. u16 rfd_index;
  1438. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1439. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1440. RRS_RX_RFD_INDEX_MASK;
  1441. for (i = 0; i < num; i++) {
  1442. buffer_info[rfd_index].skb = NULL;
  1443. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1444. ATL1C_BUFFER_FREE);
  1445. if (++rfd_index == rfd_ring->count)
  1446. rfd_index = 0;
  1447. }
  1448. rfd_ring->next_to_clean = rfd_index;
  1449. }
  1450. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  1451. int *work_done, int work_to_do)
  1452. {
  1453. u16 rfd_num, rfd_index;
  1454. u16 count = 0;
  1455. u16 length;
  1456. struct pci_dev *pdev = adapter->pdev;
  1457. struct net_device *netdev = adapter->netdev;
  1458. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
  1459. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
  1460. struct sk_buff *skb;
  1461. struct atl1c_recv_ret_status *rrs;
  1462. struct atl1c_buffer *buffer_info;
  1463. while (1) {
  1464. if (*work_done >= work_to_do)
  1465. break;
  1466. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1467. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1468. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1469. RRS_RX_RFD_CNT_MASK;
  1470. if (unlikely(rfd_num != 1))
  1471. /* TODO support mul rfd*/
  1472. if (netif_msg_rx_err(adapter))
  1473. dev_warn(&pdev->dev,
  1474. "Multi rfd not support yet!\n");
  1475. goto rrs_checked;
  1476. } else {
  1477. break;
  1478. }
  1479. rrs_checked:
  1480. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1481. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1482. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1483. if (netif_msg_rx_err(adapter))
  1484. dev_warn(&pdev->dev,
  1485. "wrong packet! rrs word3 is %x\n",
  1486. rrs->word3);
  1487. continue;
  1488. }
  1489. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1490. RRS_PKT_SIZE_MASK);
  1491. /* Good Receive */
  1492. if (likely(rfd_num == 1)) {
  1493. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1494. RRS_RX_RFD_INDEX_MASK;
  1495. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1496. pci_unmap_single(pdev, buffer_info->dma,
  1497. buffer_info->length, PCI_DMA_FROMDEVICE);
  1498. skb = buffer_info->skb;
  1499. } else {
  1500. /* TODO */
  1501. if (netif_msg_rx_err(adapter))
  1502. dev_warn(&pdev->dev,
  1503. "Multi rfd not support yet!\n");
  1504. break;
  1505. }
  1506. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1507. skb_put(skb, length - ETH_FCS_LEN);
  1508. skb->protocol = eth_type_trans(skb, netdev);
  1509. skb->dev = netdev;
  1510. atl1c_rx_checksum(adapter, skb, rrs);
  1511. if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
  1512. u16 vlan;
  1513. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1514. vlan = le16_to_cpu(vlan);
  1515. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
  1516. } else
  1517. netif_receive_skb(skb);
  1518. (*work_done)++;
  1519. count++;
  1520. }
  1521. if (count)
  1522. atl1c_alloc_rx_buffer(adapter, que);
  1523. }
  1524. /*
  1525. * atl1c_clean - NAPI Rx polling callback
  1526. * @adapter: board private structure
  1527. */
  1528. static int atl1c_clean(struct napi_struct *napi, int budget)
  1529. {
  1530. struct atl1c_adapter *adapter =
  1531. container_of(napi, struct atl1c_adapter, napi);
  1532. int work_done = 0;
  1533. /* Keep link state information with original netdev */
  1534. if (!netif_carrier_ok(adapter->netdev))
  1535. goto quit_polling;
  1536. /* just enable one RXQ */
  1537. atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
  1538. if (work_done < budget) {
  1539. quit_polling:
  1540. napi_complete(napi);
  1541. adapter->hw.intr_mask |= ISR_RX_PKT;
  1542. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1543. }
  1544. return work_done;
  1545. }
  1546. #ifdef CONFIG_NET_POLL_CONTROLLER
  1547. /*
  1548. * Polling 'interrupt' - used by things like netconsole to send skbs
  1549. * without having to re-enable interrupts. It's not called while
  1550. * the interrupt routine is executing.
  1551. */
  1552. static void atl1c_netpoll(struct net_device *netdev)
  1553. {
  1554. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1555. disable_irq(adapter->pdev->irq);
  1556. atl1c_intr(adapter->pdev->irq, netdev);
  1557. enable_irq(adapter->pdev->irq);
  1558. }
  1559. #endif
  1560. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1561. {
  1562. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1563. u16 next_to_use = 0;
  1564. u16 next_to_clean = 0;
  1565. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1566. next_to_use = tpd_ring->next_to_use;
  1567. return (u16)(next_to_clean > next_to_use) ?
  1568. (next_to_clean - next_to_use - 1) :
  1569. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1570. }
  1571. /*
  1572. * get next usable tpd
  1573. * Note: should call atl1c_tdp_avail to make sure
  1574. * there is enough tpd to use
  1575. */
  1576. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1577. enum atl1c_trans_queue type)
  1578. {
  1579. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1580. struct atl1c_tpd_desc *tpd_desc;
  1581. u16 next_to_use = 0;
  1582. next_to_use = tpd_ring->next_to_use;
  1583. if (++tpd_ring->next_to_use == tpd_ring->count)
  1584. tpd_ring->next_to_use = 0;
  1585. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1586. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1587. return tpd_desc;
  1588. }
  1589. static struct atl1c_buffer *
  1590. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1591. {
  1592. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1593. return &tpd_ring->buffer_info[tpd -
  1594. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1595. }
  1596. /* Calculate the transmit packet descript needed*/
  1597. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1598. {
  1599. u16 tpd_req;
  1600. u16 proto_hdr_len = 0;
  1601. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1602. if (skb_is_gso(skb)) {
  1603. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1604. if (proto_hdr_len < skb_headlen(skb))
  1605. tpd_req++;
  1606. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1607. tpd_req++;
  1608. }
  1609. return tpd_req;
  1610. }
  1611. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1612. struct sk_buff *skb,
  1613. struct atl1c_tpd_desc **tpd,
  1614. enum atl1c_trans_queue type)
  1615. {
  1616. struct pci_dev *pdev = adapter->pdev;
  1617. u8 hdr_len;
  1618. u32 real_len;
  1619. unsigned short offload_type;
  1620. int err;
  1621. if (skb_is_gso(skb)) {
  1622. if (skb_header_cloned(skb)) {
  1623. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1624. if (unlikely(err))
  1625. return -1;
  1626. }
  1627. offload_type = skb_shinfo(skb)->gso_type;
  1628. if (offload_type & SKB_GSO_TCPV4) {
  1629. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1630. + ntohs(ip_hdr(skb)->tot_len));
  1631. if (real_len < skb->len)
  1632. pskb_trim(skb, real_len);
  1633. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1634. if (unlikely(skb->len == hdr_len)) {
  1635. /* only xsum need */
  1636. if (netif_msg_tx_queued(adapter))
  1637. dev_warn(&pdev->dev,
  1638. "IPV4 tso with zero data??\n");
  1639. goto check_sum;
  1640. } else {
  1641. ip_hdr(skb)->check = 0;
  1642. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1643. ip_hdr(skb)->saddr,
  1644. ip_hdr(skb)->daddr,
  1645. 0, IPPROTO_TCP, 0);
  1646. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1647. }
  1648. }
  1649. if (offload_type & SKB_GSO_TCPV6) {
  1650. struct atl1c_tpd_ext_desc *etpd =
  1651. *(struct atl1c_tpd_ext_desc **)(tpd);
  1652. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1653. *tpd = atl1c_get_tpd(adapter, type);
  1654. ipv6_hdr(skb)->payload_len = 0;
  1655. /* check payload == 0 byte ? */
  1656. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1657. if (unlikely(skb->len == hdr_len)) {
  1658. /* only xsum need */
  1659. if (netif_msg_tx_queued(adapter))
  1660. dev_warn(&pdev->dev,
  1661. "IPV6 tso with zero data??\n");
  1662. goto check_sum;
  1663. } else
  1664. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1665. &ipv6_hdr(skb)->saddr,
  1666. &ipv6_hdr(skb)->daddr,
  1667. 0, IPPROTO_TCP, 0);
  1668. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1669. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1670. etpd->pkt_len = cpu_to_le32(skb->len);
  1671. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1672. }
  1673. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1674. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1675. TPD_TCPHDR_OFFSET_SHIFT;
  1676. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1677. TPD_MSS_SHIFT;
  1678. return 0;
  1679. }
  1680. check_sum:
  1681. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1682. u8 css, cso;
  1683. cso = skb_transport_offset(skb);
  1684. if (unlikely(cso & 0x1)) {
  1685. if (netif_msg_tx_err(adapter))
  1686. dev_err(&adapter->pdev->dev,
  1687. "payload offset should not an event number\n");
  1688. return -1;
  1689. } else {
  1690. css = cso + skb->csum_offset;
  1691. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1692. TPD_PLOADOFFSET_SHIFT;
  1693. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1694. TPD_CCSUM_OFFSET_SHIFT;
  1695. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1696. }
  1697. }
  1698. return 0;
  1699. }
  1700. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1701. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1702. enum atl1c_trans_queue type)
  1703. {
  1704. struct atl1c_tpd_desc *use_tpd = NULL;
  1705. struct atl1c_buffer *buffer_info = NULL;
  1706. u16 buf_len = skb_headlen(skb);
  1707. u16 map_len = 0;
  1708. u16 mapped_len = 0;
  1709. u16 hdr_len = 0;
  1710. u16 nr_frags;
  1711. u16 f;
  1712. int tso;
  1713. nr_frags = skb_shinfo(skb)->nr_frags;
  1714. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1715. if (tso) {
  1716. /* TSO */
  1717. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1718. use_tpd = tpd;
  1719. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1720. buffer_info->length = map_len;
  1721. buffer_info->dma = pci_map_single(adapter->pdev,
  1722. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1723. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1724. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1725. ATL1C_PCIMAP_TODEVICE);
  1726. mapped_len += map_len;
  1727. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1728. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1729. }
  1730. if (mapped_len < buf_len) {
  1731. /* mapped_len == 0, means we should use the first tpd,
  1732. which is given by caller */
  1733. if (mapped_len == 0)
  1734. use_tpd = tpd;
  1735. else {
  1736. use_tpd = atl1c_get_tpd(adapter, type);
  1737. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1738. }
  1739. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1740. buffer_info->length = buf_len - mapped_len;
  1741. buffer_info->dma =
  1742. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1743. buffer_info->length, PCI_DMA_TODEVICE);
  1744. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1745. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1746. ATL1C_PCIMAP_TODEVICE);
  1747. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1748. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1749. }
  1750. for (f = 0; f < nr_frags; f++) {
  1751. struct skb_frag_struct *frag;
  1752. frag = &skb_shinfo(skb)->frags[f];
  1753. use_tpd = atl1c_get_tpd(adapter, type);
  1754. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1755. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1756. buffer_info->length = frag->size;
  1757. buffer_info->dma =
  1758. pci_map_page(adapter->pdev, frag->page,
  1759. frag->page_offset,
  1760. buffer_info->length,
  1761. PCI_DMA_TODEVICE);
  1762. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1763. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1764. ATL1C_PCIMAP_TODEVICE);
  1765. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1766. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1767. }
  1768. /* The last tpd */
  1769. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1770. /* The last buffer info contain the skb address,
  1771. so it will be free after unmap */
  1772. buffer_info->skb = skb;
  1773. }
  1774. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1775. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1776. {
  1777. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1778. u32 prod_data;
  1779. AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
  1780. switch (type) {
  1781. case atl1c_trans_high:
  1782. prod_data &= 0xFFFF0000;
  1783. prod_data |= tpd_ring->next_to_use & 0xFFFF;
  1784. break;
  1785. case atl1c_trans_normal:
  1786. prod_data &= 0x0000FFFF;
  1787. prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
  1788. break;
  1789. default:
  1790. break;
  1791. }
  1792. wmb();
  1793. AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
  1794. }
  1795. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1796. struct net_device *netdev)
  1797. {
  1798. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1799. unsigned long flags;
  1800. u16 tpd_req = 1;
  1801. struct atl1c_tpd_desc *tpd;
  1802. enum atl1c_trans_queue type = atl1c_trans_normal;
  1803. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1804. dev_kfree_skb_any(skb);
  1805. return NETDEV_TX_OK;
  1806. }
  1807. tpd_req = atl1c_cal_tpd_req(skb);
  1808. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1809. if (netif_msg_pktdata(adapter))
  1810. dev_info(&adapter->pdev->dev, "tx locked\n");
  1811. return NETDEV_TX_LOCKED;
  1812. }
  1813. if (skb->mark == 0x01)
  1814. type = atl1c_trans_high;
  1815. else
  1816. type = atl1c_trans_normal;
  1817. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1818. /* no enough descriptor, just stop queue */
  1819. netif_stop_queue(netdev);
  1820. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1821. return NETDEV_TX_BUSY;
  1822. }
  1823. tpd = atl1c_get_tpd(adapter, type);
  1824. /* do TSO and check sum */
  1825. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1826. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1827. dev_kfree_skb_any(skb);
  1828. return NETDEV_TX_OK;
  1829. }
  1830. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  1831. u16 vlan = vlan_tx_tag_get(skb);
  1832. __le16 tag;
  1833. vlan = cpu_to_le16(vlan);
  1834. AT_VLAN_TO_TAG(vlan, tag);
  1835. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1836. tpd->vlan_tag = tag;
  1837. }
  1838. if (skb_network_offset(skb) != ETH_HLEN)
  1839. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1840. atl1c_tx_map(adapter, skb, tpd, type);
  1841. atl1c_tx_queue(adapter, skb, tpd, type);
  1842. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1843. return NETDEV_TX_OK;
  1844. }
  1845. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1846. {
  1847. struct net_device *netdev = adapter->netdev;
  1848. free_irq(adapter->pdev->irq, netdev);
  1849. if (adapter->have_msi)
  1850. pci_disable_msi(adapter->pdev);
  1851. }
  1852. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1853. {
  1854. struct pci_dev *pdev = adapter->pdev;
  1855. struct net_device *netdev = adapter->netdev;
  1856. int flags = 0;
  1857. int err = 0;
  1858. adapter->have_msi = true;
  1859. err = pci_enable_msi(adapter->pdev);
  1860. if (err) {
  1861. if (netif_msg_ifup(adapter))
  1862. dev_err(&pdev->dev,
  1863. "Unable to allocate MSI interrupt Error: %d\n",
  1864. err);
  1865. adapter->have_msi = false;
  1866. } else
  1867. netdev->irq = pdev->irq;
  1868. if (!adapter->have_msi)
  1869. flags |= IRQF_SHARED;
  1870. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  1871. netdev->name, netdev);
  1872. if (err) {
  1873. if (netif_msg_ifup(adapter))
  1874. dev_err(&pdev->dev,
  1875. "Unable to allocate interrupt Error: %d\n",
  1876. err);
  1877. if (adapter->have_msi)
  1878. pci_disable_msi(adapter->pdev);
  1879. return err;
  1880. }
  1881. if (netif_msg_ifup(adapter))
  1882. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1883. return err;
  1884. }
  1885. int atl1c_up(struct atl1c_adapter *adapter)
  1886. {
  1887. struct net_device *netdev = adapter->netdev;
  1888. int num;
  1889. int err;
  1890. int i;
  1891. netif_carrier_off(netdev);
  1892. atl1c_init_ring_ptrs(adapter);
  1893. atl1c_set_multi(netdev);
  1894. atl1c_restore_vlan(adapter);
  1895. for (i = 0; i < adapter->num_rx_queues; i++) {
  1896. num = atl1c_alloc_rx_buffer(adapter, i);
  1897. if (unlikely(num == 0)) {
  1898. err = -ENOMEM;
  1899. goto err_alloc_rx;
  1900. }
  1901. }
  1902. if (atl1c_configure(adapter)) {
  1903. err = -EIO;
  1904. goto err_up;
  1905. }
  1906. err = atl1c_request_irq(adapter);
  1907. if (unlikely(err))
  1908. goto err_up;
  1909. clear_bit(__AT_DOWN, &adapter->flags);
  1910. napi_enable(&adapter->napi);
  1911. atl1c_irq_enable(adapter);
  1912. atl1c_check_link_status(adapter);
  1913. netif_start_queue(netdev);
  1914. return err;
  1915. err_up:
  1916. err_alloc_rx:
  1917. atl1c_clean_rx_ring(adapter);
  1918. return err;
  1919. }
  1920. void atl1c_down(struct atl1c_adapter *adapter)
  1921. {
  1922. struct net_device *netdev = adapter->netdev;
  1923. atl1c_del_timer(adapter);
  1924. adapter->work_event = 0; /* clear all event */
  1925. /* signal that we're down so the interrupt handler does not
  1926. * reschedule our watchdog timer */
  1927. set_bit(__AT_DOWN, &adapter->flags);
  1928. netif_carrier_off(netdev);
  1929. napi_disable(&adapter->napi);
  1930. atl1c_irq_disable(adapter);
  1931. atl1c_free_irq(adapter);
  1932. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  1933. /* reset MAC to disable all RX/TX */
  1934. atl1c_reset_mac(&adapter->hw);
  1935. msleep(1);
  1936. adapter->link_speed = SPEED_0;
  1937. adapter->link_duplex = -1;
  1938. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1939. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1940. atl1c_clean_rx_ring(adapter);
  1941. }
  1942. /*
  1943. * atl1c_open - Called when a network interface is made active
  1944. * @netdev: network interface device structure
  1945. *
  1946. * Returns 0 on success, negative value on failure
  1947. *
  1948. * The open entry point is called when a network interface is made
  1949. * active by the system (IFF_UP). At this point all resources needed
  1950. * for transmit and receive operations are allocated, the interrupt
  1951. * handler is registered with the OS, the watchdog timer is started,
  1952. * and the stack is notified that the interface is ready.
  1953. */
  1954. static int atl1c_open(struct net_device *netdev)
  1955. {
  1956. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1957. int err;
  1958. /* disallow open during test */
  1959. if (test_bit(__AT_TESTING, &adapter->flags))
  1960. return -EBUSY;
  1961. /* allocate rx/tx dma buffer & descriptors */
  1962. err = atl1c_setup_ring_resources(adapter);
  1963. if (unlikely(err))
  1964. return err;
  1965. err = atl1c_up(adapter);
  1966. if (unlikely(err))
  1967. goto err_up;
  1968. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  1969. u32 phy_data;
  1970. AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
  1971. phy_data |= MDIO_AP_EN;
  1972. AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
  1973. }
  1974. return 0;
  1975. err_up:
  1976. atl1c_free_irq(adapter);
  1977. atl1c_free_ring_resources(adapter);
  1978. atl1c_reset_mac(&adapter->hw);
  1979. return err;
  1980. }
  1981. /*
  1982. * atl1c_close - Disables a network interface
  1983. * @netdev: network interface device structure
  1984. *
  1985. * Returns 0, this is not allowed to fail
  1986. *
  1987. * The close entry point is called when an interface is de-activated
  1988. * by the OS. The hardware is still under the drivers control, but
  1989. * needs to be disabled. A global MAC reset is issued to stop the
  1990. * hardware, and all transmit and receive resources are freed.
  1991. */
  1992. static int atl1c_close(struct net_device *netdev)
  1993. {
  1994. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1995. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  1996. atl1c_down(adapter);
  1997. atl1c_free_ring_resources(adapter);
  1998. return 0;
  1999. }
  2000. static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
  2001. {
  2002. struct net_device *netdev = pci_get_drvdata(pdev);
  2003. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2004. struct atl1c_hw *hw = &adapter->hw;
  2005. u32 ctrl;
  2006. u32 mac_ctrl_data;
  2007. u32 master_ctrl_data;
  2008. u32 wol_ctrl_data = 0;
  2009. u16 mii_bmsr_data;
  2010. u16 save_autoneg_advertised;
  2011. u16 mii_intr_status_data;
  2012. u32 wufc = adapter->wol;
  2013. u32 i;
  2014. int retval = 0;
  2015. if (netif_running(netdev)) {
  2016. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2017. atl1c_down(adapter);
  2018. }
  2019. netif_device_detach(netdev);
  2020. atl1c_disable_l0s_l1(hw);
  2021. retval = pci_save_state(pdev);
  2022. if (retval)
  2023. return retval;
  2024. if (wufc) {
  2025. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  2026. master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  2027. /* get link status */
  2028. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2029. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2030. save_autoneg_advertised = hw->autoneg_advertised;
  2031. hw->autoneg_advertised = ADVERTISED_10baseT_Half;
  2032. if (atl1c_restart_autoneg(hw) != 0)
  2033. if (netif_msg_link(adapter))
  2034. dev_warn(&pdev->dev, "phy autoneg failed\n");
  2035. hw->phy_configured = false; /* re-init PHY when resume */
  2036. hw->autoneg_advertised = save_autoneg_advertised;
  2037. /* turn on magic packet wol */
  2038. if (wufc & AT_WUFC_MAG)
  2039. wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2040. if (wufc & AT_WUFC_LNKC) {
  2041. for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
  2042. msleep(100);
  2043. atl1c_read_phy_reg(hw, MII_BMSR,
  2044. (u16 *)&mii_bmsr_data);
  2045. if (mii_bmsr_data & BMSR_LSTATUS)
  2046. break;
  2047. }
  2048. if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
  2049. if (netif_msg_link(adapter))
  2050. dev_warn(&pdev->dev,
  2051. "%s: Link may change"
  2052. "when suspend\n",
  2053. atl1c_driver_name);
  2054. wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
  2055. /* only link up can wake up */
  2056. if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
  2057. if (netif_msg_link(adapter))
  2058. dev_err(&pdev->dev,
  2059. "%s: read write phy "
  2060. "register failed.\n",
  2061. atl1c_driver_name);
  2062. goto wol_dis;
  2063. }
  2064. }
  2065. /* clear phy interrupt */
  2066. atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
  2067. /* Config MAC Ctrl register */
  2068. mac_ctrl_data = MAC_CTRL_RX_EN;
  2069. /* set to 10/100M halt duplex */
  2070. mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
  2071. mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
  2072. MAC_CTRL_PRMLEN_MASK) <<
  2073. MAC_CTRL_PRMLEN_SHIFT);
  2074. if (adapter->vlgrp)
  2075. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  2076. /* magic packet maybe Broadcast&multicast&Unicast frame */
  2077. if (wufc & AT_WUFC_MAG)
  2078. mac_ctrl_data |= MAC_CTRL_BC_EN;
  2079. if (netif_msg_hw(adapter))
  2080. dev_dbg(&pdev->dev,
  2081. "%s: suspend MAC=0x%x\n",
  2082. atl1c_driver_name, mac_ctrl_data);
  2083. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  2084. AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
  2085. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  2086. /* pcie patch */
  2087. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2088. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2089. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2090. pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
  2091. goto suspend_exit;
  2092. }
  2093. wol_dis:
  2094. /* WOL disabled */
  2095. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  2096. /* pcie patch */
  2097. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2098. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2099. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2100. atl1c_phy_disable(hw);
  2101. hw->phy_configured = false; /* re-init PHY when resume */
  2102. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  2103. suspend_exit:
  2104. pci_disable_device(pdev);
  2105. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2106. return 0;
  2107. }
  2108. static int atl1c_resume(struct pci_dev *pdev)
  2109. {
  2110. struct net_device *netdev = pci_get_drvdata(pdev);
  2111. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2112. pci_set_power_state(pdev, PCI_D0);
  2113. pci_restore_state(pdev);
  2114. pci_enable_wake(pdev, PCI_D3hot, 0);
  2115. pci_enable_wake(pdev, PCI_D3cold, 0);
  2116. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2117. atl1c_phy_reset(&adapter->hw);
  2118. atl1c_reset_mac(&adapter->hw);
  2119. netif_device_attach(netdev);
  2120. if (netif_running(netdev))
  2121. atl1c_up(adapter);
  2122. return 0;
  2123. }
  2124. static void atl1c_shutdown(struct pci_dev *pdev)
  2125. {
  2126. atl1c_suspend(pdev, PMSG_SUSPEND);
  2127. }
  2128. static const struct net_device_ops atl1c_netdev_ops = {
  2129. .ndo_open = atl1c_open,
  2130. .ndo_stop = atl1c_close,
  2131. .ndo_validate_addr = eth_validate_addr,
  2132. .ndo_start_xmit = atl1c_xmit_frame,
  2133. .ndo_set_mac_address = atl1c_set_mac_addr,
  2134. .ndo_set_multicast_list = atl1c_set_multi,
  2135. .ndo_change_mtu = atl1c_change_mtu,
  2136. .ndo_do_ioctl = atl1c_ioctl,
  2137. .ndo_tx_timeout = atl1c_tx_timeout,
  2138. .ndo_get_stats = atl1c_get_stats,
  2139. .ndo_vlan_rx_register = atl1c_vlan_rx_register,
  2140. #ifdef CONFIG_NET_POLL_CONTROLLER
  2141. .ndo_poll_controller = atl1c_netpoll,
  2142. #endif
  2143. };
  2144. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2145. {
  2146. SET_NETDEV_DEV(netdev, &pdev->dev);
  2147. pci_set_drvdata(pdev, netdev);
  2148. netdev->irq = pdev->irq;
  2149. netdev->netdev_ops = &atl1c_netdev_ops;
  2150. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2151. atl1c_set_ethtool_ops(netdev);
  2152. /* TODO: add when ready */
  2153. netdev->features = NETIF_F_SG |
  2154. NETIF_F_HW_CSUM |
  2155. NETIF_F_HW_VLAN_TX |
  2156. NETIF_F_HW_VLAN_RX |
  2157. NETIF_F_TSO |
  2158. NETIF_F_TSO6;
  2159. return 0;
  2160. }
  2161. /*
  2162. * atl1c_probe - Device Initialization Routine
  2163. * @pdev: PCI device information struct
  2164. * @ent: entry in atl1c_pci_tbl
  2165. *
  2166. * Returns 0 on success, negative on failure
  2167. *
  2168. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2169. * The OS initialization, configuring of the adapter private structure,
  2170. * and a hardware reset occur.
  2171. */
  2172. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2173. const struct pci_device_id *ent)
  2174. {
  2175. struct net_device *netdev;
  2176. struct atl1c_adapter *adapter;
  2177. static int cards_found;
  2178. int err = 0;
  2179. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2180. err = pci_enable_device_mem(pdev);
  2181. if (err) {
  2182. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2183. return err;
  2184. }
  2185. /*
  2186. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2187. * shared register for the high 32 bits, so only a single, aligned,
  2188. * 4 GB physical address range can be used at a time.
  2189. *
  2190. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2191. * worth. It is far easier to limit to 32-bit DMA than update
  2192. * various kernel subsystems to support the mechanics required by a
  2193. * fixed-high-32-bit system.
  2194. */
  2195. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2196. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2197. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2198. goto err_dma;
  2199. }
  2200. err = pci_request_regions(pdev, atl1c_driver_name);
  2201. if (err) {
  2202. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2203. goto err_pci_reg;
  2204. }
  2205. pci_set_master(pdev);
  2206. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2207. if (netdev == NULL) {
  2208. err = -ENOMEM;
  2209. dev_err(&pdev->dev, "etherdev alloc failed\n");
  2210. goto err_alloc_etherdev;
  2211. }
  2212. err = atl1c_init_netdev(netdev, pdev);
  2213. if (err) {
  2214. dev_err(&pdev->dev, "init netdevice failed\n");
  2215. goto err_init_netdev;
  2216. }
  2217. adapter = netdev_priv(netdev);
  2218. adapter->bd_number = cards_found;
  2219. adapter->netdev = netdev;
  2220. adapter->pdev = pdev;
  2221. adapter->hw.adapter = adapter;
  2222. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2223. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2224. if (!adapter->hw.hw_addr) {
  2225. err = -EIO;
  2226. dev_err(&pdev->dev, "cannot map device registers\n");
  2227. goto err_ioremap;
  2228. }
  2229. netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
  2230. /* init mii data */
  2231. adapter->mii.dev = netdev;
  2232. adapter->mii.mdio_read = atl1c_mdio_read;
  2233. adapter->mii.mdio_write = atl1c_mdio_write;
  2234. adapter->mii.phy_id_mask = 0x1f;
  2235. adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
  2236. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2237. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2238. (unsigned long)adapter);
  2239. /* setup the private structure */
  2240. err = atl1c_sw_init(adapter);
  2241. if (err) {
  2242. dev_err(&pdev->dev, "net device private data init failed\n");
  2243. goto err_sw_init;
  2244. }
  2245. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
  2246. ATL1C_PCIE_PHY_RESET);
  2247. /* Init GPHY as early as possible due to power saving issue */
  2248. atl1c_phy_reset(&adapter->hw);
  2249. err = atl1c_reset_mac(&adapter->hw);
  2250. if (err) {
  2251. err = -EIO;
  2252. goto err_reset;
  2253. }
  2254. device_init_wakeup(&pdev->dev, 1);
  2255. /* reset the controller to
  2256. * put the device in a known good starting state */
  2257. err = atl1c_phy_init(&adapter->hw);
  2258. if (err) {
  2259. err = -EIO;
  2260. goto err_reset;
  2261. }
  2262. if (atl1c_read_mac_addr(&adapter->hw) != 0) {
  2263. err = -EIO;
  2264. dev_err(&pdev->dev, "get mac address failed\n");
  2265. goto err_eeprom;
  2266. }
  2267. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2268. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2269. if (netif_msg_probe(adapter))
  2270. dev_dbg(&pdev->dev,
  2271. "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
  2272. adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
  2273. adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
  2274. adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
  2275. atl1c_hw_set_mac_addr(&adapter->hw);
  2276. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2277. adapter->work_event = 0;
  2278. err = register_netdev(netdev);
  2279. if (err) {
  2280. dev_err(&pdev->dev, "register netdevice failed\n");
  2281. goto err_register;
  2282. }
  2283. if (netif_msg_probe(adapter))
  2284. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2285. cards_found++;
  2286. return 0;
  2287. err_reset:
  2288. err_register:
  2289. err_sw_init:
  2290. err_eeprom:
  2291. iounmap(adapter->hw.hw_addr);
  2292. err_init_netdev:
  2293. err_ioremap:
  2294. free_netdev(netdev);
  2295. err_alloc_etherdev:
  2296. pci_release_regions(pdev);
  2297. err_pci_reg:
  2298. err_dma:
  2299. pci_disable_device(pdev);
  2300. return err;
  2301. }
  2302. /*
  2303. * atl1c_remove - Device Removal Routine
  2304. * @pdev: PCI device information struct
  2305. *
  2306. * atl1c_remove is called by the PCI subsystem to alert the driver
  2307. * that it should release a PCI device. The could be caused by a
  2308. * Hot-Plug event, or because the driver is going to be removed from
  2309. * memory.
  2310. */
  2311. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2312. {
  2313. struct net_device *netdev = pci_get_drvdata(pdev);
  2314. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2315. unregister_netdev(netdev);
  2316. atl1c_phy_disable(&adapter->hw);
  2317. iounmap(adapter->hw.hw_addr);
  2318. pci_release_regions(pdev);
  2319. pci_disable_device(pdev);
  2320. free_netdev(netdev);
  2321. }
  2322. /*
  2323. * atl1c_io_error_detected - called when PCI error is detected
  2324. * @pdev: Pointer to PCI device
  2325. * @state: The current pci connection state
  2326. *
  2327. * This function is called after a PCI bus error affecting
  2328. * this device has been detected.
  2329. */
  2330. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2331. pci_channel_state_t state)
  2332. {
  2333. struct net_device *netdev = pci_get_drvdata(pdev);
  2334. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2335. netif_device_detach(netdev);
  2336. if (state == pci_channel_io_perm_failure)
  2337. return PCI_ERS_RESULT_DISCONNECT;
  2338. if (netif_running(netdev))
  2339. atl1c_down(adapter);
  2340. pci_disable_device(pdev);
  2341. /* Request a slot slot reset. */
  2342. return PCI_ERS_RESULT_NEED_RESET;
  2343. }
  2344. /*
  2345. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2346. * @pdev: Pointer to PCI device
  2347. *
  2348. * Restart the card from scratch, as if from a cold-boot. Implementation
  2349. * resembles the first-half of the e1000_resume routine.
  2350. */
  2351. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2352. {
  2353. struct net_device *netdev = pci_get_drvdata(pdev);
  2354. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2355. if (pci_enable_device(pdev)) {
  2356. if (netif_msg_hw(adapter))
  2357. dev_err(&pdev->dev,
  2358. "Cannot re-enable PCI device after reset\n");
  2359. return PCI_ERS_RESULT_DISCONNECT;
  2360. }
  2361. pci_set_master(pdev);
  2362. pci_enable_wake(pdev, PCI_D3hot, 0);
  2363. pci_enable_wake(pdev, PCI_D3cold, 0);
  2364. atl1c_reset_mac(&adapter->hw);
  2365. return PCI_ERS_RESULT_RECOVERED;
  2366. }
  2367. /*
  2368. * atl1c_io_resume - called when traffic can start flowing again.
  2369. * @pdev: Pointer to PCI device
  2370. *
  2371. * This callback is called when the error recovery driver tells us that
  2372. * its OK to resume normal operation. Implementation resembles the
  2373. * second-half of the atl1c_resume routine.
  2374. */
  2375. static void atl1c_io_resume(struct pci_dev *pdev)
  2376. {
  2377. struct net_device *netdev = pci_get_drvdata(pdev);
  2378. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2379. if (netif_running(netdev)) {
  2380. if (atl1c_up(adapter)) {
  2381. if (netif_msg_hw(adapter))
  2382. dev_err(&pdev->dev,
  2383. "Cannot bring device back up after reset\n");
  2384. return;
  2385. }
  2386. }
  2387. netif_device_attach(netdev);
  2388. }
  2389. static struct pci_error_handlers atl1c_err_handler = {
  2390. .error_detected = atl1c_io_error_detected,
  2391. .slot_reset = atl1c_io_slot_reset,
  2392. .resume = atl1c_io_resume,
  2393. };
  2394. static struct pci_driver atl1c_driver = {
  2395. .name = atl1c_driver_name,
  2396. .id_table = atl1c_pci_tbl,
  2397. .probe = atl1c_probe,
  2398. .remove = __devexit_p(atl1c_remove),
  2399. /* Power Managment Hooks */
  2400. .suspend = atl1c_suspend,
  2401. .resume = atl1c_resume,
  2402. .shutdown = atl1c_shutdown,
  2403. .err_handler = &atl1c_err_handler
  2404. };
  2405. /*
  2406. * atl1c_init_module - Driver Registration Routine
  2407. *
  2408. * atl1c_init_module is the first routine called when the driver is
  2409. * loaded. All it does is register with the PCI subsystem.
  2410. */
  2411. static int __init atl1c_init_module(void)
  2412. {
  2413. return pci_register_driver(&atl1c_driver);
  2414. }
  2415. /*
  2416. * atl1c_exit_module - Driver Exit Cleanup Routine
  2417. *
  2418. * atl1c_exit_module is called just before the driver is removed
  2419. * from memory.
  2420. */
  2421. static void __exit atl1c_exit_module(void)
  2422. {
  2423. pci_unregister_driver(&atl1c_driver);
  2424. }
  2425. module_init(atl1c_init_module);
  2426. module_exit(atl1c_exit_module);