onenand_base.c 105 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright © 2005-2009 Samsung Electronics
  5. * Copyright © 2007 Nokia Corporation
  6. *
  7. * Kyungmin Park <kyungmin.park@samsung.com>
  8. *
  9. * Credits:
  10. * Adrian Hunter <ext-adrian.hunter@nokia.com>:
  11. * auto-placement support, read-while load support, various fixes
  12. *
  13. * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
  14. * Flex-OneNAND support
  15. * Amul Kumar Saha <amul.saha at samsung.com>
  16. * OTP support
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/init.h>
  26. #include <linux/sched.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/jiffies.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/onenand.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <asm/io.h>
  34. /*
  35. * Multiblock erase if number of blocks to erase is 2 or more.
  36. * Maximum number of blocks for simultaneous erase is 64.
  37. */
  38. #define MB_ERASE_MIN_BLK_COUNT 2
  39. #define MB_ERASE_MAX_BLK_COUNT 64
  40. /* Default Flex-OneNAND boundary and lock respectively */
  41. static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
  42. module_param_array(flex_bdry, int, NULL, 0400);
  43. MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
  44. "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
  45. "DIE_BDRY: SLC boundary of the die"
  46. "LOCK: Locking information for SLC boundary"
  47. " : 0->Set boundary in unlocked status"
  48. " : 1->Set boundary in locked status");
  49. /* Default OneNAND/Flex-OneNAND OTP options*/
  50. static int otp;
  51. module_param(otp, int, 0400);
  52. MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
  53. "Syntax : otp=LOCK_TYPE"
  54. "LOCK_TYPE : Keys issued, for specific OTP Lock type"
  55. " : 0 -> Default (No Blocks Locked)"
  56. " : 1 -> OTP Block lock"
  57. " : 2 -> 1st Block lock"
  58. " : 3 -> BOTH OTP Block and 1st Block lock");
  59. /**
  60. * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
  61. * For now, we expose only 64 out of 80 ecc bytes
  62. */
  63. static struct nand_ecclayout onenand_oob_128 = {
  64. .eccbytes = 64,
  65. .eccpos = {
  66. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  67. 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
  68. 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
  69. 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
  70. 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
  71. 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
  72. 102, 103, 104, 105
  73. },
  74. .oobfree = {
  75. {2, 4}, {18, 4}, {34, 4}, {50, 4},
  76. {66, 4}, {82, 4}, {98, 4}, {114, 4}
  77. }
  78. };
  79. /**
  80. * onenand_oob_64 - oob info for large (2KB) page
  81. */
  82. static struct nand_ecclayout onenand_oob_64 = {
  83. .eccbytes = 20,
  84. .eccpos = {
  85. 8, 9, 10, 11, 12,
  86. 24, 25, 26, 27, 28,
  87. 40, 41, 42, 43, 44,
  88. 56, 57, 58, 59, 60,
  89. },
  90. .oobfree = {
  91. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  92. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  93. }
  94. };
  95. /**
  96. * onenand_oob_32 - oob info for middle (1KB) page
  97. */
  98. static struct nand_ecclayout onenand_oob_32 = {
  99. .eccbytes = 10,
  100. .eccpos = {
  101. 8, 9, 10, 11, 12,
  102. 24, 25, 26, 27, 28,
  103. },
  104. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  105. };
  106. static const unsigned char ffchars[] = {
  107. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  108. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  109. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  110. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  111. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  112. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  113. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  114. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  115. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  116. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
  117. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  118. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
  119. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  120. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
  121. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  122. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
  123. };
  124. /**
  125. * onenand_readw - [OneNAND Interface] Read OneNAND register
  126. * @param addr address to read
  127. *
  128. * Read OneNAND register
  129. */
  130. static unsigned short onenand_readw(void __iomem *addr)
  131. {
  132. return readw(addr);
  133. }
  134. /**
  135. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  136. * @param value value to write
  137. * @param addr address to write
  138. *
  139. * Write OneNAND register with value
  140. */
  141. static void onenand_writew(unsigned short value, void __iomem *addr)
  142. {
  143. writew(value, addr);
  144. }
  145. /**
  146. * onenand_block_address - [DEFAULT] Get block address
  147. * @param this onenand chip data structure
  148. * @param block the block
  149. * @return translated block address if DDP, otherwise same
  150. *
  151. * Setup Start Address 1 Register (F100h)
  152. */
  153. static int onenand_block_address(struct onenand_chip *this, int block)
  154. {
  155. /* Device Flash Core select, NAND Flash Block Address */
  156. if (block & this->density_mask)
  157. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  158. return block;
  159. }
  160. /**
  161. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  162. * @param this onenand chip data structure
  163. * @param block the block
  164. * @return set DBS value if DDP, otherwise 0
  165. *
  166. * Setup Start Address 2 Register (F101h) for DDP
  167. */
  168. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  169. {
  170. /* Device BufferRAM Select */
  171. if (block & this->density_mask)
  172. return ONENAND_DDP_CHIP1;
  173. return ONENAND_DDP_CHIP0;
  174. }
  175. /**
  176. * onenand_page_address - [DEFAULT] Get page address
  177. * @param page the page address
  178. * @param sector the sector address
  179. * @return combined page and sector address
  180. *
  181. * Setup Start Address 8 Register (F107h)
  182. */
  183. static int onenand_page_address(int page, int sector)
  184. {
  185. /* Flash Page Address, Flash Sector Address */
  186. int fpa, fsa;
  187. fpa = page & ONENAND_FPA_MASK;
  188. fsa = sector & ONENAND_FSA_MASK;
  189. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  190. }
  191. /**
  192. * onenand_buffer_address - [DEFAULT] Get buffer address
  193. * @param dataram1 DataRAM index
  194. * @param sectors the sector address
  195. * @param count the number of sectors
  196. * @return the start buffer value
  197. *
  198. * Setup Start Buffer Register (F200h)
  199. */
  200. static int onenand_buffer_address(int dataram1, int sectors, int count)
  201. {
  202. int bsa, bsc;
  203. /* BufferRAM Sector Address */
  204. bsa = sectors & ONENAND_BSA_MASK;
  205. if (dataram1)
  206. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  207. else
  208. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  209. /* BufferRAM Sector Count */
  210. bsc = count & ONENAND_BSC_MASK;
  211. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  212. }
  213. /**
  214. * flexonenand_block- For given address return block number
  215. * @param this - OneNAND device structure
  216. * @param addr - Address for which block number is needed
  217. */
  218. static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
  219. {
  220. unsigned boundary, blk, die = 0;
  221. if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
  222. die = 1;
  223. addr -= this->diesize[0];
  224. }
  225. boundary = this->boundary[die];
  226. blk = addr >> (this->erase_shift - 1);
  227. if (blk > boundary)
  228. blk = (blk + boundary + 1) >> 1;
  229. blk += die ? this->density_mask : 0;
  230. return blk;
  231. }
  232. inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
  233. {
  234. if (!FLEXONENAND(this))
  235. return addr >> this->erase_shift;
  236. return flexonenand_block(this, addr);
  237. }
  238. /**
  239. * flexonenand_addr - Return address of the block
  240. * @this: OneNAND device structure
  241. * @block: Block number on Flex-OneNAND
  242. *
  243. * Return address of the block
  244. */
  245. static loff_t flexonenand_addr(struct onenand_chip *this, int block)
  246. {
  247. loff_t ofs = 0;
  248. int die = 0, boundary;
  249. if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
  250. block -= this->density_mask;
  251. die = 1;
  252. ofs = this->diesize[0];
  253. }
  254. boundary = this->boundary[die];
  255. ofs += (loff_t)block << (this->erase_shift - 1);
  256. if (block > (boundary + 1))
  257. ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
  258. return ofs;
  259. }
  260. loff_t onenand_addr(struct onenand_chip *this, int block)
  261. {
  262. if (!FLEXONENAND(this))
  263. return (loff_t)block << this->erase_shift;
  264. return flexonenand_addr(this, block);
  265. }
  266. EXPORT_SYMBOL(onenand_addr);
  267. /**
  268. * onenand_get_density - [DEFAULT] Get OneNAND density
  269. * @param dev_id OneNAND device ID
  270. *
  271. * Get OneNAND density from device ID
  272. */
  273. static inline int onenand_get_density(int dev_id)
  274. {
  275. int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  276. return (density & ONENAND_DEVICE_DENSITY_MASK);
  277. }
  278. /**
  279. * flexonenand_region - [Flex-OneNAND] Return erase region of addr
  280. * @param mtd MTD device structure
  281. * @param addr address whose erase region needs to be identified
  282. */
  283. int flexonenand_region(struct mtd_info *mtd, loff_t addr)
  284. {
  285. int i;
  286. for (i = 0; i < mtd->numeraseregions; i++)
  287. if (addr < mtd->eraseregions[i].offset)
  288. break;
  289. return i - 1;
  290. }
  291. EXPORT_SYMBOL(flexonenand_region);
  292. /**
  293. * onenand_command - [DEFAULT] Send command to OneNAND device
  294. * @param mtd MTD device structure
  295. * @param cmd the command to be sent
  296. * @param addr offset to read from or write to
  297. * @param len number of bytes to read or write
  298. *
  299. * Send command to OneNAND device. This function is used for middle/large page
  300. * devices (1KB/2KB Bytes per page)
  301. */
  302. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  303. {
  304. struct onenand_chip *this = mtd->priv;
  305. int value, block, page;
  306. /* Address translation */
  307. switch (cmd) {
  308. case ONENAND_CMD_UNLOCK:
  309. case ONENAND_CMD_LOCK:
  310. case ONENAND_CMD_LOCK_TIGHT:
  311. case ONENAND_CMD_UNLOCK_ALL:
  312. block = -1;
  313. page = -1;
  314. break;
  315. case FLEXONENAND_CMD_PI_ACCESS:
  316. /* addr contains die index */
  317. block = addr * this->density_mask;
  318. page = -1;
  319. break;
  320. case ONENAND_CMD_ERASE:
  321. case ONENAND_CMD_MULTIBLOCK_ERASE:
  322. case ONENAND_CMD_ERASE_VERIFY:
  323. case ONENAND_CMD_BUFFERRAM:
  324. case ONENAND_CMD_OTP_ACCESS:
  325. block = onenand_block(this, addr);
  326. page = -1;
  327. break;
  328. case FLEXONENAND_CMD_READ_PI:
  329. cmd = ONENAND_CMD_READ;
  330. block = addr * this->density_mask;
  331. page = 0;
  332. break;
  333. default:
  334. block = onenand_block(this, addr);
  335. page = (int) (addr - onenand_addr(this, block)) >> this->page_shift;
  336. if (ONENAND_IS_2PLANE(this)) {
  337. /* Make the even block number */
  338. block &= ~1;
  339. /* Is it the odd plane? */
  340. if (addr & this->writesize)
  341. block++;
  342. page >>= 1;
  343. }
  344. page &= this->page_mask;
  345. break;
  346. }
  347. /* NOTE: The setting order of the registers is very important! */
  348. if (cmd == ONENAND_CMD_BUFFERRAM) {
  349. /* Select DataRAM for DDP */
  350. value = onenand_bufferram_address(this, block);
  351. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  352. if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this))
  353. /* It is always BufferRAM0 */
  354. ONENAND_SET_BUFFERRAM0(this);
  355. else
  356. /* Switch to the next data buffer */
  357. ONENAND_SET_NEXT_BUFFERRAM(this);
  358. return 0;
  359. }
  360. if (block != -1) {
  361. /* Write 'DFS, FBA' of Flash */
  362. value = onenand_block_address(this, block);
  363. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  364. /* Select DataRAM for DDP */
  365. value = onenand_bufferram_address(this, block);
  366. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  367. }
  368. if (page != -1) {
  369. /* Now we use page size operation */
  370. int sectors = 0, count = 0;
  371. int dataram;
  372. switch (cmd) {
  373. case FLEXONENAND_CMD_RECOVER_LSB:
  374. case ONENAND_CMD_READ:
  375. case ONENAND_CMD_READOOB:
  376. if (ONENAND_IS_MLC(this))
  377. /* It is always BufferRAM0 */
  378. dataram = ONENAND_SET_BUFFERRAM0(this);
  379. else
  380. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  381. break;
  382. default:
  383. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  384. cmd = ONENAND_CMD_2X_PROG;
  385. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  386. break;
  387. }
  388. /* Write 'FPA, FSA' of Flash */
  389. value = onenand_page_address(page, sectors);
  390. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  391. /* Write 'BSA, BSC' of DataRAM */
  392. value = onenand_buffer_address(dataram, sectors, count);
  393. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  394. }
  395. /* Interrupt clear */
  396. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  397. /* Write command */
  398. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  399. return 0;
  400. }
  401. /**
  402. * onenand_read_ecc - return ecc status
  403. * @param this onenand chip structure
  404. */
  405. static inline int onenand_read_ecc(struct onenand_chip *this)
  406. {
  407. int ecc, i, result = 0;
  408. if (!FLEXONENAND(this))
  409. return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  410. for (i = 0; i < 4; i++) {
  411. ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i);
  412. if (likely(!ecc))
  413. continue;
  414. if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
  415. return ONENAND_ECC_2BIT_ALL;
  416. else
  417. result = ONENAND_ECC_1BIT_ALL;
  418. }
  419. return result;
  420. }
  421. /**
  422. * onenand_wait - [DEFAULT] wait until the command is done
  423. * @param mtd MTD device structure
  424. * @param state state to select the max. timeout value
  425. *
  426. * Wait for command done. This applies to all OneNAND command
  427. * Read can take up to 30us, erase up to 2ms and program up to 350us
  428. * according to general OneNAND specs
  429. */
  430. static int onenand_wait(struct mtd_info *mtd, int state)
  431. {
  432. struct onenand_chip * this = mtd->priv;
  433. unsigned long timeout;
  434. unsigned int flags = ONENAND_INT_MASTER;
  435. unsigned int interrupt = 0;
  436. unsigned int ctrl;
  437. /* The 20 msec is enough */
  438. timeout = jiffies + msecs_to_jiffies(20);
  439. while (time_before(jiffies, timeout)) {
  440. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  441. if (interrupt & flags)
  442. break;
  443. if (state != FL_READING && state != FL_PREPARING_ERASE)
  444. cond_resched();
  445. }
  446. /* To get correct interrupt status in timeout case */
  447. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  448. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  449. /*
  450. * In the Spec. it checks the controller status first
  451. * However if you get the correct information in case of
  452. * power off recovery (POR) test, it should read ECC status first
  453. */
  454. if (interrupt & ONENAND_INT_READ) {
  455. int ecc = onenand_read_ecc(this);
  456. if (ecc) {
  457. if (ecc & ONENAND_ECC_2BIT_ALL) {
  458. printk(KERN_ERR "%s: ECC error = 0x%04x\n",
  459. __func__, ecc);
  460. mtd->ecc_stats.failed++;
  461. return -EBADMSG;
  462. } else if (ecc & ONENAND_ECC_1BIT_ALL) {
  463. printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
  464. __func__, ecc);
  465. mtd->ecc_stats.corrected++;
  466. }
  467. }
  468. } else if (state == FL_READING) {
  469. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  470. __func__, ctrl, interrupt);
  471. return -EIO;
  472. }
  473. if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
  474. printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
  475. __func__, ctrl, interrupt);
  476. return -EIO;
  477. }
  478. if (!(interrupt & ONENAND_INT_MASTER)) {
  479. printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
  480. __func__, ctrl, interrupt);
  481. return -EIO;
  482. }
  483. /* If there's controller error, it's a real error */
  484. if (ctrl & ONENAND_CTRL_ERROR) {
  485. printk(KERN_ERR "%s: controller error = 0x%04x\n",
  486. __func__, ctrl);
  487. if (ctrl & ONENAND_CTRL_LOCK)
  488. printk(KERN_ERR "%s: it's locked error.\n", __func__);
  489. return -EIO;
  490. }
  491. return 0;
  492. }
  493. /*
  494. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  495. * @param irq onenand interrupt number
  496. * @param dev_id interrupt data
  497. *
  498. * complete the work
  499. */
  500. static irqreturn_t onenand_interrupt(int irq, void *data)
  501. {
  502. struct onenand_chip *this = data;
  503. /* To handle shared interrupt */
  504. if (!this->complete.done)
  505. complete(&this->complete);
  506. return IRQ_HANDLED;
  507. }
  508. /*
  509. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  510. * @param mtd MTD device structure
  511. * @param state state to select the max. timeout value
  512. *
  513. * Wait for command done.
  514. */
  515. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  516. {
  517. struct onenand_chip *this = mtd->priv;
  518. wait_for_completion(&this->complete);
  519. return onenand_wait(mtd, state);
  520. }
  521. /*
  522. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  523. * @param mtd MTD device structure
  524. * @param state state to select the max. timeout value
  525. *
  526. * Try interrupt based wait (It is used one-time)
  527. */
  528. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  529. {
  530. struct onenand_chip *this = mtd->priv;
  531. unsigned long remain, timeout;
  532. /* We use interrupt wait first */
  533. this->wait = onenand_interrupt_wait;
  534. timeout = msecs_to_jiffies(100);
  535. remain = wait_for_completion_timeout(&this->complete, timeout);
  536. if (!remain) {
  537. printk(KERN_INFO "OneNAND: There's no interrupt. "
  538. "We use the normal wait\n");
  539. /* Release the irq */
  540. free_irq(this->irq, this);
  541. this->wait = onenand_wait;
  542. }
  543. return onenand_wait(mtd, state);
  544. }
  545. /*
  546. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  547. * @param mtd MTD device structure
  548. *
  549. * There's two method to wait onenand work
  550. * 1. polling - read interrupt status register
  551. * 2. interrupt - use the kernel interrupt method
  552. */
  553. static void onenand_setup_wait(struct mtd_info *mtd)
  554. {
  555. struct onenand_chip *this = mtd->priv;
  556. int syscfg;
  557. init_completion(&this->complete);
  558. if (this->irq <= 0) {
  559. this->wait = onenand_wait;
  560. return;
  561. }
  562. if (request_irq(this->irq, &onenand_interrupt,
  563. IRQF_SHARED, "onenand", this)) {
  564. /* If we can't get irq, use the normal wait */
  565. this->wait = onenand_wait;
  566. return;
  567. }
  568. /* Enable interrupt */
  569. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  570. syscfg |= ONENAND_SYS_CFG1_IOBE;
  571. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  572. this->wait = onenand_try_interrupt_wait;
  573. }
  574. /**
  575. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  576. * @param mtd MTD data structure
  577. * @param area BufferRAM area
  578. * @return offset given area
  579. *
  580. * Return BufferRAM offset given area
  581. */
  582. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  583. {
  584. struct onenand_chip *this = mtd->priv;
  585. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  586. /* Note: the 'this->writesize' is a real page size */
  587. if (area == ONENAND_DATARAM)
  588. return this->writesize;
  589. if (area == ONENAND_SPARERAM)
  590. return mtd->oobsize;
  591. }
  592. return 0;
  593. }
  594. /**
  595. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  596. * @param mtd MTD data structure
  597. * @param area BufferRAM area
  598. * @param buffer the databuffer to put/get data
  599. * @param offset offset to read from or write to
  600. * @param count number of bytes to read/write
  601. *
  602. * Read the BufferRAM area
  603. */
  604. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  605. unsigned char *buffer, int offset, size_t count)
  606. {
  607. struct onenand_chip *this = mtd->priv;
  608. void __iomem *bufferram;
  609. bufferram = this->base + area;
  610. bufferram += onenand_bufferram_offset(mtd, area);
  611. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  612. unsigned short word;
  613. /* Align with word(16-bit) size */
  614. count--;
  615. /* Read word and save byte */
  616. word = this->read_word(bufferram + offset + count);
  617. buffer[count] = (word & 0xff);
  618. }
  619. memcpy(buffer, bufferram + offset, count);
  620. return 0;
  621. }
  622. /**
  623. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  624. * @param mtd MTD data structure
  625. * @param area BufferRAM area
  626. * @param buffer the databuffer to put/get data
  627. * @param offset offset to read from or write to
  628. * @param count number of bytes to read/write
  629. *
  630. * Read the BufferRAM area with Sync. Burst Mode
  631. */
  632. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  633. unsigned char *buffer, int offset, size_t count)
  634. {
  635. struct onenand_chip *this = mtd->priv;
  636. void __iomem *bufferram;
  637. bufferram = this->base + area;
  638. bufferram += onenand_bufferram_offset(mtd, area);
  639. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  640. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  641. unsigned short word;
  642. /* Align with word(16-bit) size */
  643. count--;
  644. /* Read word and save byte */
  645. word = this->read_word(bufferram + offset + count);
  646. buffer[count] = (word & 0xff);
  647. }
  648. memcpy(buffer, bufferram + offset, count);
  649. this->mmcontrol(mtd, 0);
  650. return 0;
  651. }
  652. /**
  653. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  654. * @param mtd MTD data structure
  655. * @param area BufferRAM area
  656. * @param buffer the databuffer to put/get data
  657. * @param offset offset to read from or write to
  658. * @param count number of bytes to read/write
  659. *
  660. * Write the BufferRAM area
  661. */
  662. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  663. const unsigned char *buffer, int offset, size_t count)
  664. {
  665. struct onenand_chip *this = mtd->priv;
  666. void __iomem *bufferram;
  667. bufferram = this->base + area;
  668. bufferram += onenand_bufferram_offset(mtd, area);
  669. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  670. unsigned short word;
  671. int byte_offset;
  672. /* Align with word(16-bit) size */
  673. count--;
  674. /* Calculate byte access offset */
  675. byte_offset = offset + count;
  676. /* Read word and save byte */
  677. word = this->read_word(bufferram + byte_offset);
  678. word = (word & ~0xff) | buffer[count];
  679. this->write_word(word, bufferram + byte_offset);
  680. }
  681. memcpy(bufferram + offset, buffer, count);
  682. return 0;
  683. }
  684. /**
  685. * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
  686. * @param mtd MTD data structure
  687. * @param addr address to check
  688. * @return blockpage address
  689. *
  690. * Get blockpage address at 2x program mode
  691. */
  692. static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
  693. {
  694. struct onenand_chip *this = mtd->priv;
  695. int blockpage, block, page;
  696. /* Calculate the even block number */
  697. block = (int) (addr >> this->erase_shift) & ~1;
  698. /* Is it the odd plane? */
  699. if (addr & this->writesize)
  700. block++;
  701. page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
  702. blockpage = (block << 7) | page;
  703. return blockpage;
  704. }
  705. /**
  706. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  707. * @param mtd MTD data structure
  708. * @param addr address to check
  709. * @return 1 if there are valid data, otherwise 0
  710. *
  711. * Check bufferram if there is data we required
  712. */
  713. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  714. {
  715. struct onenand_chip *this = mtd->priv;
  716. int blockpage, found = 0;
  717. unsigned int i;
  718. if (ONENAND_IS_2PLANE(this))
  719. blockpage = onenand_get_2x_blockpage(mtd, addr);
  720. else
  721. blockpage = (int) (addr >> this->page_shift);
  722. /* Is there valid data? */
  723. i = ONENAND_CURRENT_BUFFERRAM(this);
  724. if (this->bufferram[i].blockpage == blockpage)
  725. found = 1;
  726. else {
  727. /* Check another BufferRAM */
  728. i = ONENAND_NEXT_BUFFERRAM(this);
  729. if (this->bufferram[i].blockpage == blockpage) {
  730. ONENAND_SET_NEXT_BUFFERRAM(this);
  731. found = 1;
  732. }
  733. }
  734. if (found && ONENAND_IS_DDP(this)) {
  735. /* Select DataRAM for DDP */
  736. int block = onenand_block(this, addr);
  737. int value = onenand_bufferram_address(this, block);
  738. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  739. }
  740. return found;
  741. }
  742. /**
  743. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  744. * @param mtd MTD data structure
  745. * @param addr address to update
  746. * @param valid valid flag
  747. *
  748. * Update BufferRAM information
  749. */
  750. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  751. int valid)
  752. {
  753. struct onenand_chip *this = mtd->priv;
  754. int blockpage;
  755. unsigned int i;
  756. if (ONENAND_IS_2PLANE(this))
  757. blockpage = onenand_get_2x_blockpage(mtd, addr);
  758. else
  759. blockpage = (int) (addr >> this->page_shift);
  760. /* Invalidate another BufferRAM */
  761. i = ONENAND_NEXT_BUFFERRAM(this);
  762. if (this->bufferram[i].blockpage == blockpage)
  763. this->bufferram[i].blockpage = -1;
  764. /* Update BufferRAM */
  765. i = ONENAND_CURRENT_BUFFERRAM(this);
  766. if (valid)
  767. this->bufferram[i].blockpage = blockpage;
  768. else
  769. this->bufferram[i].blockpage = -1;
  770. }
  771. /**
  772. * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
  773. * @param mtd MTD data structure
  774. * @param addr start address to invalidate
  775. * @param len length to invalidate
  776. *
  777. * Invalidate BufferRAM information
  778. */
  779. static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
  780. unsigned int len)
  781. {
  782. struct onenand_chip *this = mtd->priv;
  783. int i;
  784. loff_t end_addr = addr + len;
  785. /* Invalidate BufferRAM */
  786. for (i = 0; i < MAX_BUFFERRAM; i++) {
  787. loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
  788. if (buf_addr >= addr && buf_addr < end_addr)
  789. this->bufferram[i].blockpage = -1;
  790. }
  791. }
  792. /**
  793. * onenand_get_device - [GENERIC] Get chip for selected access
  794. * @param mtd MTD device structure
  795. * @param new_state the state which is requested
  796. *
  797. * Get the device and lock it for exclusive access
  798. */
  799. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  800. {
  801. struct onenand_chip *this = mtd->priv;
  802. DECLARE_WAITQUEUE(wait, current);
  803. /*
  804. * Grab the lock and see if the device is available
  805. */
  806. while (1) {
  807. spin_lock(&this->chip_lock);
  808. if (this->state == FL_READY) {
  809. this->state = new_state;
  810. spin_unlock(&this->chip_lock);
  811. break;
  812. }
  813. if (new_state == FL_PM_SUSPENDED) {
  814. spin_unlock(&this->chip_lock);
  815. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  816. }
  817. set_current_state(TASK_UNINTERRUPTIBLE);
  818. add_wait_queue(&this->wq, &wait);
  819. spin_unlock(&this->chip_lock);
  820. schedule();
  821. remove_wait_queue(&this->wq, &wait);
  822. }
  823. return 0;
  824. }
  825. /**
  826. * onenand_release_device - [GENERIC] release chip
  827. * @param mtd MTD device structure
  828. *
  829. * Deselect, release chip lock and wake up anyone waiting on the device
  830. */
  831. static void onenand_release_device(struct mtd_info *mtd)
  832. {
  833. struct onenand_chip *this = mtd->priv;
  834. /* Release the chip */
  835. spin_lock(&this->chip_lock);
  836. this->state = FL_READY;
  837. wake_up(&this->wq);
  838. spin_unlock(&this->chip_lock);
  839. }
  840. /**
  841. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  842. * @param mtd MTD device structure
  843. * @param buf destination address
  844. * @param column oob offset to read from
  845. * @param thislen oob length to read
  846. */
  847. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  848. int thislen)
  849. {
  850. struct onenand_chip *this = mtd->priv;
  851. struct nand_oobfree *free;
  852. int readcol = column;
  853. int readend = column + thislen;
  854. int lastgap = 0;
  855. unsigned int i;
  856. uint8_t *oob_buf = this->oob_buf;
  857. free = this->ecclayout->oobfree;
  858. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  859. if (readcol >= lastgap)
  860. readcol += free->offset - lastgap;
  861. if (readend >= lastgap)
  862. readend += free->offset - lastgap;
  863. lastgap = free->offset + free->length;
  864. }
  865. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  866. free = this->ecclayout->oobfree;
  867. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  868. int free_end = free->offset + free->length;
  869. if (free->offset < readend && free_end > readcol) {
  870. int st = max_t(int,free->offset,readcol);
  871. int ed = min_t(int,free_end,readend);
  872. int n = ed - st;
  873. memcpy(buf, oob_buf + st, n);
  874. buf += n;
  875. } else if (column == 0)
  876. break;
  877. }
  878. return 0;
  879. }
  880. /**
  881. * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
  882. * @param mtd MTD device structure
  883. * @param addr address to recover
  884. * @param status return value from onenand_wait / onenand_bbt_wait
  885. *
  886. * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
  887. * lower page address and MSB page has higher page address in paired pages.
  888. * If power off occurs during MSB page program, the paired LSB page data can
  889. * become corrupt. LSB page recovery read is a way to read LSB page though page
  890. * data are corrupted. When uncorrectable error occurs as a result of LSB page
  891. * read after power up, issue LSB page recovery read.
  892. */
  893. static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
  894. {
  895. struct onenand_chip *this = mtd->priv;
  896. int i;
  897. /* Recovery is only for Flex-OneNAND */
  898. if (!FLEXONENAND(this))
  899. return status;
  900. /* check if we failed due to uncorrectable error */
  901. if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
  902. return status;
  903. /* check if address lies in MLC region */
  904. i = flexonenand_region(mtd, addr);
  905. if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
  906. return status;
  907. /* We are attempting to reread, so decrement stats.failed
  908. * which was incremented by onenand_wait due to read failure
  909. */
  910. printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
  911. __func__);
  912. mtd->ecc_stats.failed--;
  913. /* Issue the LSB page recovery command */
  914. this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
  915. return this->wait(mtd, FL_READING);
  916. }
  917. /**
  918. * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
  919. * @param mtd MTD device structure
  920. * @param from offset to read from
  921. * @param ops: oob operation description structure
  922. *
  923. * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
  924. * So, read-while-load is not present.
  925. */
  926. static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  927. struct mtd_oob_ops *ops)
  928. {
  929. struct onenand_chip *this = mtd->priv;
  930. struct mtd_ecc_stats stats;
  931. size_t len = ops->len;
  932. size_t ooblen = ops->ooblen;
  933. u_char *buf = ops->datbuf;
  934. u_char *oobbuf = ops->oobbuf;
  935. int read = 0, column, thislen;
  936. int oobread = 0, oobcolumn, thisooblen, oobsize;
  937. int ret = 0;
  938. int writesize = this->writesize;
  939. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  940. __func__, (unsigned int) from, (int) len);
  941. if (ops->mode == MTD_OOB_AUTO)
  942. oobsize = this->ecclayout->oobavail;
  943. else
  944. oobsize = mtd->oobsize;
  945. oobcolumn = from & (mtd->oobsize - 1);
  946. /* Do not allow reads past end of device */
  947. if (from + len > mtd->size) {
  948. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  949. __func__);
  950. ops->retlen = 0;
  951. ops->oobretlen = 0;
  952. return -EINVAL;
  953. }
  954. stats = mtd->ecc_stats;
  955. while (read < len) {
  956. cond_resched();
  957. thislen = min_t(int, writesize, len - read);
  958. column = from & (writesize - 1);
  959. if (column + thislen > writesize)
  960. thislen = writesize - column;
  961. if (!onenand_check_bufferram(mtd, from)) {
  962. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  963. ret = this->wait(mtd, FL_READING);
  964. if (unlikely(ret))
  965. ret = onenand_recover_lsb(mtd, from, ret);
  966. onenand_update_bufferram(mtd, from, !ret);
  967. if (ret == -EBADMSG)
  968. ret = 0;
  969. }
  970. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  971. if (oobbuf) {
  972. thisooblen = oobsize - oobcolumn;
  973. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  974. if (ops->mode == MTD_OOB_AUTO)
  975. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  976. else
  977. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  978. oobread += thisooblen;
  979. oobbuf += thisooblen;
  980. oobcolumn = 0;
  981. }
  982. read += thislen;
  983. if (read == len)
  984. break;
  985. from += thislen;
  986. buf += thislen;
  987. }
  988. /*
  989. * Return success, if no ECC failures, else -EBADMSG
  990. * fs driver will take care of that, because
  991. * retlen == desired len and result == -EBADMSG
  992. */
  993. ops->retlen = read;
  994. ops->oobretlen = oobread;
  995. if (ret)
  996. return ret;
  997. if (mtd->ecc_stats.failed - stats.failed)
  998. return -EBADMSG;
  999. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1000. }
  1001. /**
  1002. * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
  1003. * @param mtd MTD device structure
  1004. * @param from offset to read from
  1005. * @param ops: oob operation description structure
  1006. *
  1007. * OneNAND read main and/or out-of-band data
  1008. */
  1009. static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  1010. struct mtd_oob_ops *ops)
  1011. {
  1012. struct onenand_chip *this = mtd->priv;
  1013. struct mtd_ecc_stats stats;
  1014. size_t len = ops->len;
  1015. size_t ooblen = ops->ooblen;
  1016. u_char *buf = ops->datbuf;
  1017. u_char *oobbuf = ops->oobbuf;
  1018. int read = 0, column, thislen;
  1019. int oobread = 0, oobcolumn, thisooblen, oobsize;
  1020. int ret = 0, boundary = 0;
  1021. int writesize = this->writesize;
  1022. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1023. __func__, (unsigned int) from, (int) len);
  1024. if (ops->mode == MTD_OOB_AUTO)
  1025. oobsize = this->ecclayout->oobavail;
  1026. else
  1027. oobsize = mtd->oobsize;
  1028. oobcolumn = from & (mtd->oobsize - 1);
  1029. /* Do not allow reads past end of device */
  1030. if ((from + len) > mtd->size) {
  1031. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1032. __func__);
  1033. ops->retlen = 0;
  1034. ops->oobretlen = 0;
  1035. return -EINVAL;
  1036. }
  1037. stats = mtd->ecc_stats;
  1038. /* Read-while-load method */
  1039. /* Do first load to bufferRAM */
  1040. if (read < len) {
  1041. if (!onenand_check_bufferram(mtd, from)) {
  1042. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1043. ret = this->wait(mtd, FL_READING);
  1044. onenand_update_bufferram(mtd, from, !ret);
  1045. if (ret == -EBADMSG)
  1046. ret = 0;
  1047. }
  1048. }
  1049. thislen = min_t(int, writesize, len - read);
  1050. column = from & (writesize - 1);
  1051. if (column + thislen > writesize)
  1052. thislen = writesize - column;
  1053. while (!ret) {
  1054. /* If there is more to load then start next load */
  1055. from += thislen;
  1056. if (read + thislen < len) {
  1057. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1058. /*
  1059. * Chip boundary handling in DDP
  1060. * Now we issued chip 1 read and pointed chip 1
  1061. * bufferram so we have to point chip 0 bufferram.
  1062. */
  1063. if (ONENAND_IS_DDP(this) &&
  1064. unlikely(from == (this->chipsize >> 1))) {
  1065. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  1066. boundary = 1;
  1067. } else
  1068. boundary = 0;
  1069. ONENAND_SET_PREV_BUFFERRAM(this);
  1070. }
  1071. /* While load is going, read from last bufferRAM */
  1072. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  1073. /* Read oob area if needed */
  1074. if (oobbuf) {
  1075. thisooblen = oobsize - oobcolumn;
  1076. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  1077. if (ops->mode == MTD_OOB_AUTO)
  1078. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  1079. else
  1080. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  1081. oobread += thisooblen;
  1082. oobbuf += thisooblen;
  1083. oobcolumn = 0;
  1084. }
  1085. /* See if we are done */
  1086. read += thislen;
  1087. if (read == len)
  1088. break;
  1089. /* Set up for next read from bufferRAM */
  1090. if (unlikely(boundary))
  1091. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  1092. ONENAND_SET_NEXT_BUFFERRAM(this);
  1093. buf += thislen;
  1094. thislen = min_t(int, writesize, len - read);
  1095. column = 0;
  1096. cond_resched();
  1097. /* Now wait for load */
  1098. ret = this->wait(mtd, FL_READING);
  1099. onenand_update_bufferram(mtd, from, !ret);
  1100. if (ret == -EBADMSG)
  1101. ret = 0;
  1102. }
  1103. /*
  1104. * Return success, if no ECC failures, else -EBADMSG
  1105. * fs driver will take care of that, because
  1106. * retlen == desired len and result == -EBADMSG
  1107. */
  1108. ops->retlen = read;
  1109. ops->oobretlen = oobread;
  1110. if (ret)
  1111. return ret;
  1112. if (mtd->ecc_stats.failed - stats.failed)
  1113. return -EBADMSG;
  1114. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1115. }
  1116. /**
  1117. * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
  1118. * @param mtd MTD device structure
  1119. * @param from offset to read from
  1120. * @param ops: oob operation description structure
  1121. *
  1122. * OneNAND read out-of-band data from the spare area
  1123. */
  1124. static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
  1125. struct mtd_oob_ops *ops)
  1126. {
  1127. struct onenand_chip *this = mtd->priv;
  1128. struct mtd_ecc_stats stats;
  1129. int read = 0, thislen, column, oobsize;
  1130. size_t len = ops->ooblen;
  1131. mtd_oob_mode_t mode = ops->mode;
  1132. u_char *buf = ops->oobbuf;
  1133. int ret = 0, readcmd;
  1134. from += ops->ooboffs;
  1135. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1136. __func__, (unsigned int) from, (int) len);
  1137. /* Initialize return length value */
  1138. ops->oobretlen = 0;
  1139. if (mode == MTD_OOB_AUTO)
  1140. oobsize = this->ecclayout->oobavail;
  1141. else
  1142. oobsize = mtd->oobsize;
  1143. column = from & (mtd->oobsize - 1);
  1144. if (unlikely(column >= oobsize)) {
  1145. printk(KERN_ERR "%s: Attempted to start read outside oob\n",
  1146. __func__);
  1147. return -EINVAL;
  1148. }
  1149. /* Do not allow reads past end of device */
  1150. if (unlikely(from >= mtd->size ||
  1151. column + len > ((mtd->size >> this->page_shift) -
  1152. (from >> this->page_shift)) * oobsize)) {
  1153. printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
  1154. __func__);
  1155. return -EINVAL;
  1156. }
  1157. stats = mtd->ecc_stats;
  1158. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1159. while (read < len) {
  1160. cond_resched();
  1161. thislen = oobsize - column;
  1162. thislen = min_t(int, thislen, len);
  1163. this->command(mtd, readcmd, from, mtd->oobsize);
  1164. onenand_update_bufferram(mtd, from, 0);
  1165. ret = this->wait(mtd, FL_READING);
  1166. if (unlikely(ret))
  1167. ret = onenand_recover_lsb(mtd, from, ret);
  1168. if (ret && ret != -EBADMSG) {
  1169. printk(KERN_ERR "%s: read failed = 0x%x\n",
  1170. __func__, ret);
  1171. break;
  1172. }
  1173. if (mode == MTD_OOB_AUTO)
  1174. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  1175. else
  1176. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1177. read += thislen;
  1178. if (read == len)
  1179. break;
  1180. buf += thislen;
  1181. /* Read more? */
  1182. if (read < len) {
  1183. /* Page size */
  1184. from += mtd->writesize;
  1185. column = 0;
  1186. }
  1187. }
  1188. ops->oobretlen = read;
  1189. if (ret)
  1190. return ret;
  1191. if (mtd->ecc_stats.failed - stats.failed)
  1192. return -EBADMSG;
  1193. return 0;
  1194. }
  1195. /**
  1196. * onenand_read - [MTD Interface] Read data from flash
  1197. * @param mtd MTD device structure
  1198. * @param from offset to read from
  1199. * @param len number of bytes to read
  1200. * @param retlen pointer to variable to store the number of read bytes
  1201. * @param buf the databuffer to put data
  1202. *
  1203. * Read with ecc
  1204. */
  1205. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  1206. size_t *retlen, u_char *buf)
  1207. {
  1208. struct onenand_chip *this = mtd->priv;
  1209. struct mtd_oob_ops ops = {
  1210. .len = len,
  1211. .ooblen = 0,
  1212. .datbuf = buf,
  1213. .oobbuf = NULL,
  1214. };
  1215. int ret;
  1216. onenand_get_device(mtd, FL_READING);
  1217. ret = ONENAND_IS_MLC(this) ?
  1218. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  1219. onenand_read_ops_nolock(mtd, from, &ops);
  1220. onenand_release_device(mtd);
  1221. *retlen = ops.retlen;
  1222. return ret;
  1223. }
  1224. /**
  1225. * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
  1226. * @param mtd: MTD device structure
  1227. * @param from: offset to read from
  1228. * @param ops: oob operation description structure
  1229. * Read main and/or out-of-band
  1230. */
  1231. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  1232. struct mtd_oob_ops *ops)
  1233. {
  1234. struct onenand_chip *this = mtd->priv;
  1235. int ret;
  1236. switch (ops->mode) {
  1237. case MTD_OOB_PLACE:
  1238. case MTD_OOB_AUTO:
  1239. break;
  1240. case MTD_OOB_RAW:
  1241. /* Not implemented yet */
  1242. default:
  1243. return -EINVAL;
  1244. }
  1245. onenand_get_device(mtd, FL_READING);
  1246. if (ops->datbuf)
  1247. ret = ONENAND_IS_MLC(this) ?
  1248. onenand_mlc_read_ops_nolock(mtd, from, ops) :
  1249. onenand_read_ops_nolock(mtd, from, ops);
  1250. else
  1251. ret = onenand_read_oob_nolock(mtd, from, ops);
  1252. onenand_release_device(mtd);
  1253. return ret;
  1254. }
  1255. /**
  1256. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  1257. * @param mtd MTD device structure
  1258. * @param state state to select the max. timeout value
  1259. *
  1260. * Wait for command done.
  1261. */
  1262. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  1263. {
  1264. struct onenand_chip *this = mtd->priv;
  1265. unsigned long timeout;
  1266. unsigned int interrupt;
  1267. unsigned int ctrl;
  1268. /* The 20 msec is enough */
  1269. timeout = jiffies + msecs_to_jiffies(20);
  1270. while (time_before(jiffies, timeout)) {
  1271. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1272. if (interrupt & ONENAND_INT_MASTER)
  1273. break;
  1274. }
  1275. /* To get correct interrupt status in timeout case */
  1276. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1277. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  1278. if (interrupt & ONENAND_INT_READ) {
  1279. int ecc = onenand_read_ecc(this);
  1280. if (ecc & ONENAND_ECC_2BIT_ALL) {
  1281. printk(KERN_WARNING "%s: ecc error = 0x%04x, "
  1282. "controller error 0x%04x\n",
  1283. __func__, ecc, ctrl);
  1284. return ONENAND_BBT_READ_ECC_ERROR;
  1285. }
  1286. } else {
  1287. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  1288. __func__, ctrl, interrupt);
  1289. return ONENAND_BBT_READ_FATAL_ERROR;
  1290. }
  1291. /* Initial bad block case: 0x2400 or 0x0400 */
  1292. if (ctrl & ONENAND_CTRL_ERROR) {
  1293. printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
  1294. __func__, ctrl);
  1295. return ONENAND_BBT_READ_ERROR;
  1296. }
  1297. return 0;
  1298. }
  1299. /**
  1300. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  1301. * @param mtd MTD device structure
  1302. * @param from offset to read from
  1303. * @param ops oob operation description structure
  1304. *
  1305. * OneNAND read out-of-band data from the spare area for bbt scan
  1306. */
  1307. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  1308. struct mtd_oob_ops *ops)
  1309. {
  1310. struct onenand_chip *this = mtd->priv;
  1311. int read = 0, thislen, column;
  1312. int ret = 0, readcmd;
  1313. size_t len = ops->ooblen;
  1314. u_char *buf = ops->oobbuf;
  1315. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
  1316. __func__, (unsigned int) from, len);
  1317. /* Initialize return value */
  1318. ops->oobretlen = 0;
  1319. /* Do not allow reads past end of device */
  1320. if (unlikely((from + len) > mtd->size)) {
  1321. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1322. __func__);
  1323. return ONENAND_BBT_READ_FATAL_ERROR;
  1324. }
  1325. /* Grab the lock and see if the device is available */
  1326. onenand_get_device(mtd, FL_READING);
  1327. column = from & (mtd->oobsize - 1);
  1328. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1329. while (read < len) {
  1330. cond_resched();
  1331. thislen = mtd->oobsize - column;
  1332. thislen = min_t(int, thislen, len);
  1333. this->command(mtd, readcmd, from, mtd->oobsize);
  1334. onenand_update_bufferram(mtd, from, 0);
  1335. ret = this->bbt_wait(mtd, FL_READING);
  1336. if (unlikely(ret))
  1337. ret = onenand_recover_lsb(mtd, from, ret);
  1338. if (ret)
  1339. break;
  1340. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1341. read += thislen;
  1342. if (read == len)
  1343. break;
  1344. buf += thislen;
  1345. /* Read more? */
  1346. if (read < len) {
  1347. /* Update Page size */
  1348. from += this->writesize;
  1349. column = 0;
  1350. }
  1351. }
  1352. /* Deselect and wake up anyone waiting on the device */
  1353. onenand_release_device(mtd);
  1354. ops->oobretlen = read;
  1355. return ret;
  1356. }
  1357. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  1358. /**
  1359. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  1360. * @param mtd MTD device structure
  1361. * @param buf the databuffer to verify
  1362. * @param to offset to read from
  1363. */
  1364. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  1365. {
  1366. struct onenand_chip *this = mtd->priv;
  1367. u_char *oob_buf = this->oob_buf;
  1368. int status, i, readcmd;
  1369. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1370. this->command(mtd, readcmd, to, mtd->oobsize);
  1371. onenand_update_bufferram(mtd, to, 0);
  1372. status = this->wait(mtd, FL_READING);
  1373. if (status)
  1374. return status;
  1375. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  1376. for (i = 0; i < mtd->oobsize; i++)
  1377. if (buf[i] != 0xFF && buf[i] != oob_buf[i])
  1378. return -EBADMSG;
  1379. return 0;
  1380. }
  1381. /**
  1382. * onenand_verify - [GENERIC] verify the chip contents after a write
  1383. * @param mtd MTD device structure
  1384. * @param buf the databuffer to verify
  1385. * @param addr offset to read from
  1386. * @param len number of bytes to read and compare
  1387. */
  1388. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  1389. {
  1390. struct onenand_chip *this = mtd->priv;
  1391. void __iomem *dataram;
  1392. int ret = 0;
  1393. int thislen, column;
  1394. while (len != 0) {
  1395. thislen = min_t(int, this->writesize, len);
  1396. column = addr & (this->writesize - 1);
  1397. if (column + thislen > this->writesize)
  1398. thislen = this->writesize - column;
  1399. this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
  1400. onenand_update_bufferram(mtd, addr, 0);
  1401. ret = this->wait(mtd, FL_READING);
  1402. if (ret)
  1403. return ret;
  1404. onenand_update_bufferram(mtd, addr, 1);
  1405. dataram = this->base + ONENAND_DATARAM;
  1406. dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
  1407. if (memcmp(buf, dataram + column, thislen))
  1408. return -EBADMSG;
  1409. len -= thislen;
  1410. buf += thislen;
  1411. addr += thislen;
  1412. }
  1413. return 0;
  1414. }
  1415. #else
  1416. #define onenand_verify(...) (0)
  1417. #define onenand_verify_oob(...) (0)
  1418. #endif
  1419. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  1420. static void onenand_panic_wait(struct mtd_info *mtd)
  1421. {
  1422. struct onenand_chip *this = mtd->priv;
  1423. unsigned int interrupt;
  1424. int i;
  1425. for (i = 0; i < 2000; i++) {
  1426. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1427. if (interrupt & ONENAND_INT_MASTER)
  1428. break;
  1429. udelay(10);
  1430. }
  1431. }
  1432. /**
  1433. * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
  1434. * @param mtd MTD device structure
  1435. * @param to offset to write to
  1436. * @param len number of bytes to write
  1437. * @param retlen pointer to variable to store the number of written bytes
  1438. * @param buf the data to write
  1439. *
  1440. * Write with ECC
  1441. */
  1442. static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
  1443. size_t *retlen, const u_char *buf)
  1444. {
  1445. struct onenand_chip *this = mtd->priv;
  1446. int column, subpage;
  1447. int written = 0;
  1448. int ret = 0;
  1449. if (this->state == FL_PM_SUSPENDED)
  1450. return -EBUSY;
  1451. /* Wait for any existing operation to clear */
  1452. onenand_panic_wait(mtd);
  1453. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1454. __func__, (unsigned int) to, (int) len);
  1455. /* Initialize retlen, in case of early exit */
  1456. *retlen = 0;
  1457. /* Do not allow writes past end of device */
  1458. if (unlikely((to + len) > mtd->size)) {
  1459. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1460. __func__);
  1461. return -EINVAL;
  1462. }
  1463. /* Reject writes, which are not page aligned */
  1464. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1465. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1466. __func__);
  1467. return -EINVAL;
  1468. }
  1469. column = to & (mtd->writesize - 1);
  1470. /* Loop until all data write */
  1471. while (written < len) {
  1472. int thislen = min_t(int, mtd->writesize - column, len - written);
  1473. u_char *wbuf = (u_char *) buf;
  1474. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1475. /* Partial page write */
  1476. subpage = thislen < mtd->writesize;
  1477. if (subpage) {
  1478. memset(this->page_buf, 0xff, mtd->writesize);
  1479. memcpy(this->page_buf + column, buf, thislen);
  1480. wbuf = this->page_buf;
  1481. }
  1482. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1483. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  1484. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1485. onenand_panic_wait(mtd);
  1486. /* In partial page write we don't update bufferram */
  1487. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1488. if (ONENAND_IS_2PLANE(this)) {
  1489. ONENAND_SET_BUFFERRAM1(this);
  1490. onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
  1491. }
  1492. if (ret) {
  1493. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1494. break;
  1495. }
  1496. written += thislen;
  1497. if (written == len)
  1498. break;
  1499. column = 0;
  1500. to += thislen;
  1501. buf += thislen;
  1502. }
  1503. *retlen = written;
  1504. return ret;
  1505. }
  1506. /**
  1507. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  1508. * @param mtd MTD device structure
  1509. * @param oob_buf oob buffer
  1510. * @param buf source address
  1511. * @param column oob offset to write to
  1512. * @param thislen oob length to write
  1513. */
  1514. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1515. const u_char *buf, int column, int thislen)
  1516. {
  1517. struct onenand_chip *this = mtd->priv;
  1518. struct nand_oobfree *free;
  1519. int writecol = column;
  1520. int writeend = column + thislen;
  1521. int lastgap = 0;
  1522. unsigned int i;
  1523. free = this->ecclayout->oobfree;
  1524. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1525. if (writecol >= lastgap)
  1526. writecol += free->offset - lastgap;
  1527. if (writeend >= lastgap)
  1528. writeend += free->offset - lastgap;
  1529. lastgap = free->offset + free->length;
  1530. }
  1531. free = this->ecclayout->oobfree;
  1532. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1533. int free_end = free->offset + free->length;
  1534. if (free->offset < writeend && free_end > writecol) {
  1535. int st = max_t(int,free->offset,writecol);
  1536. int ed = min_t(int,free_end,writeend);
  1537. int n = ed - st;
  1538. memcpy(oob_buf + st, buf, n);
  1539. buf += n;
  1540. } else if (column == 0)
  1541. break;
  1542. }
  1543. return 0;
  1544. }
  1545. /**
  1546. * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
  1547. * @param mtd MTD device structure
  1548. * @param to offset to write to
  1549. * @param ops oob operation description structure
  1550. *
  1551. * Write main and/or oob with ECC
  1552. */
  1553. static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
  1554. struct mtd_oob_ops *ops)
  1555. {
  1556. struct onenand_chip *this = mtd->priv;
  1557. int written = 0, column, thislen = 0, subpage = 0;
  1558. int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
  1559. int oobwritten = 0, oobcolumn, thisooblen, oobsize;
  1560. size_t len = ops->len;
  1561. size_t ooblen = ops->ooblen;
  1562. const u_char *buf = ops->datbuf;
  1563. const u_char *oob = ops->oobbuf;
  1564. u_char *oobbuf;
  1565. int ret = 0;
  1566. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1567. __func__, (unsigned int) to, (int) len);
  1568. /* Initialize retlen, in case of early exit */
  1569. ops->retlen = 0;
  1570. ops->oobretlen = 0;
  1571. /* Do not allow writes past end of device */
  1572. if (unlikely((to + len) > mtd->size)) {
  1573. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1574. __func__);
  1575. return -EINVAL;
  1576. }
  1577. /* Reject writes, which are not page aligned */
  1578. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1579. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1580. __func__);
  1581. return -EINVAL;
  1582. }
  1583. /* Check zero length */
  1584. if (!len)
  1585. return 0;
  1586. if (ops->mode == MTD_OOB_AUTO)
  1587. oobsize = this->ecclayout->oobavail;
  1588. else
  1589. oobsize = mtd->oobsize;
  1590. oobcolumn = to & (mtd->oobsize - 1);
  1591. column = to & (mtd->writesize - 1);
  1592. /* Loop until all data write */
  1593. while (1) {
  1594. if (written < len) {
  1595. u_char *wbuf = (u_char *) buf;
  1596. thislen = min_t(int, mtd->writesize - column, len - written);
  1597. thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
  1598. cond_resched();
  1599. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1600. /* Partial page write */
  1601. subpage = thislen < mtd->writesize;
  1602. if (subpage) {
  1603. memset(this->page_buf, 0xff, mtd->writesize);
  1604. memcpy(this->page_buf + column, buf, thislen);
  1605. wbuf = this->page_buf;
  1606. }
  1607. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1608. if (oob) {
  1609. oobbuf = this->oob_buf;
  1610. /* We send data to spare ram with oobsize
  1611. * to prevent byte access */
  1612. memset(oobbuf, 0xff, mtd->oobsize);
  1613. if (ops->mode == MTD_OOB_AUTO)
  1614. onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
  1615. else
  1616. memcpy(oobbuf + oobcolumn, oob, thisooblen);
  1617. oobwritten += thisooblen;
  1618. oob += thisooblen;
  1619. oobcolumn = 0;
  1620. } else
  1621. oobbuf = (u_char *) ffchars;
  1622. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1623. } else
  1624. ONENAND_SET_NEXT_BUFFERRAM(this);
  1625. /*
  1626. * 2 PLANE, MLC, and Flex-OneNAND do not support
  1627. * write-while-program feature.
  1628. */
  1629. if (!ONENAND_IS_2PLANE(this) && !first) {
  1630. ONENAND_SET_PREV_BUFFERRAM(this);
  1631. ret = this->wait(mtd, FL_WRITING);
  1632. /* In partial page write we don't update bufferram */
  1633. onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
  1634. if (ret) {
  1635. written -= prevlen;
  1636. printk(KERN_ERR "%s: write failed %d\n",
  1637. __func__, ret);
  1638. break;
  1639. }
  1640. if (written == len) {
  1641. /* Only check verify write turn on */
  1642. ret = onenand_verify(mtd, buf - len, to - len, len);
  1643. if (ret)
  1644. printk(KERN_ERR "%s: verify failed %d\n",
  1645. __func__, ret);
  1646. break;
  1647. }
  1648. ONENAND_SET_NEXT_BUFFERRAM(this);
  1649. }
  1650. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1651. /*
  1652. * 2 PLANE, MLC, and Flex-OneNAND wait here
  1653. */
  1654. if (ONENAND_IS_2PLANE(this)) {
  1655. ret = this->wait(mtd, FL_WRITING);
  1656. /* In partial page write we don't update bufferram */
  1657. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1658. if (ret) {
  1659. printk(KERN_ERR "%s: write failed %d\n",
  1660. __func__, ret);
  1661. break;
  1662. }
  1663. /* Only check verify write turn on */
  1664. ret = onenand_verify(mtd, buf, to, thislen);
  1665. if (ret) {
  1666. printk(KERN_ERR "%s: verify failed %d\n",
  1667. __func__, ret);
  1668. break;
  1669. }
  1670. written += thislen;
  1671. if (written == len)
  1672. break;
  1673. } else
  1674. written += thislen;
  1675. column = 0;
  1676. prev_subpage = subpage;
  1677. prev = to;
  1678. prevlen = thislen;
  1679. to += thislen;
  1680. buf += thislen;
  1681. first = 0;
  1682. }
  1683. /* In error case, clear all bufferrams */
  1684. if (written != len)
  1685. onenand_invalidate_bufferram(mtd, 0, -1);
  1686. ops->retlen = written;
  1687. ops->oobretlen = oobwritten;
  1688. return ret;
  1689. }
  1690. /**
  1691. * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
  1692. * @param mtd MTD device structure
  1693. * @param to offset to write to
  1694. * @param len number of bytes to write
  1695. * @param retlen pointer to variable to store the number of written bytes
  1696. * @param buf the data to write
  1697. * @param mode operation mode
  1698. *
  1699. * OneNAND write out-of-band
  1700. */
  1701. static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  1702. struct mtd_oob_ops *ops)
  1703. {
  1704. struct onenand_chip *this = mtd->priv;
  1705. int column, ret = 0, oobsize;
  1706. int written = 0, oobcmd;
  1707. u_char *oobbuf;
  1708. size_t len = ops->ooblen;
  1709. const u_char *buf = ops->oobbuf;
  1710. mtd_oob_mode_t mode = ops->mode;
  1711. to += ops->ooboffs;
  1712. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1713. __func__, (unsigned int) to, (int) len);
  1714. /* Initialize retlen, in case of early exit */
  1715. ops->oobretlen = 0;
  1716. if (mode == MTD_OOB_AUTO)
  1717. oobsize = this->ecclayout->oobavail;
  1718. else
  1719. oobsize = mtd->oobsize;
  1720. column = to & (mtd->oobsize - 1);
  1721. if (unlikely(column >= oobsize)) {
  1722. printk(KERN_ERR "%s: Attempted to start write outside oob\n",
  1723. __func__);
  1724. return -EINVAL;
  1725. }
  1726. /* For compatibility with NAND: Do not allow write past end of page */
  1727. if (unlikely(column + len > oobsize)) {
  1728. printk(KERN_ERR "%s: Attempt to write past end of page\n",
  1729. __func__);
  1730. return -EINVAL;
  1731. }
  1732. /* Do not allow reads past end of device */
  1733. if (unlikely(to >= mtd->size ||
  1734. column + len > ((mtd->size >> this->page_shift) -
  1735. (to >> this->page_shift)) * oobsize)) {
  1736. printk(KERN_ERR "%s: Attempted to write past end of device\n",
  1737. __func__);
  1738. return -EINVAL;
  1739. }
  1740. oobbuf = this->oob_buf;
  1741. oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
  1742. /* Loop until all data write */
  1743. while (written < len) {
  1744. int thislen = min_t(int, oobsize, len - written);
  1745. cond_resched();
  1746. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1747. /* We send data to spare ram with oobsize
  1748. * to prevent byte access */
  1749. memset(oobbuf, 0xff, mtd->oobsize);
  1750. if (mode == MTD_OOB_AUTO)
  1751. onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
  1752. else
  1753. memcpy(oobbuf + column, buf, thislen);
  1754. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1755. if (ONENAND_IS_MLC(this)) {
  1756. /* Set main area of DataRAM to 0xff*/
  1757. memset(this->page_buf, 0xff, mtd->writesize);
  1758. this->write_bufferram(mtd, ONENAND_DATARAM,
  1759. this->page_buf, 0, mtd->writesize);
  1760. }
  1761. this->command(mtd, oobcmd, to, mtd->oobsize);
  1762. onenand_update_bufferram(mtd, to, 0);
  1763. if (ONENAND_IS_2PLANE(this)) {
  1764. ONENAND_SET_BUFFERRAM1(this);
  1765. onenand_update_bufferram(mtd, to + this->writesize, 0);
  1766. }
  1767. ret = this->wait(mtd, FL_WRITING);
  1768. if (ret) {
  1769. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1770. break;
  1771. }
  1772. ret = onenand_verify_oob(mtd, oobbuf, to);
  1773. if (ret) {
  1774. printk(KERN_ERR "%s: verify failed %d\n",
  1775. __func__, ret);
  1776. break;
  1777. }
  1778. written += thislen;
  1779. if (written == len)
  1780. break;
  1781. to += mtd->writesize;
  1782. buf += thislen;
  1783. column = 0;
  1784. }
  1785. ops->oobretlen = written;
  1786. return ret;
  1787. }
  1788. /**
  1789. * onenand_write - [MTD Interface] write buffer to FLASH
  1790. * @param mtd MTD device structure
  1791. * @param to offset to write to
  1792. * @param len number of bytes to write
  1793. * @param retlen pointer to variable to store the number of written bytes
  1794. * @param buf the data to write
  1795. *
  1796. * Write with ECC
  1797. */
  1798. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1799. size_t *retlen, const u_char *buf)
  1800. {
  1801. struct mtd_oob_ops ops = {
  1802. .len = len,
  1803. .ooblen = 0,
  1804. .datbuf = (u_char *) buf,
  1805. .oobbuf = NULL,
  1806. };
  1807. int ret;
  1808. onenand_get_device(mtd, FL_WRITING);
  1809. ret = onenand_write_ops_nolock(mtd, to, &ops);
  1810. onenand_release_device(mtd);
  1811. *retlen = ops.retlen;
  1812. return ret;
  1813. }
  1814. /**
  1815. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1816. * @param mtd: MTD device structure
  1817. * @param to: offset to write
  1818. * @param ops: oob operation description structure
  1819. */
  1820. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1821. struct mtd_oob_ops *ops)
  1822. {
  1823. int ret;
  1824. switch (ops->mode) {
  1825. case MTD_OOB_PLACE:
  1826. case MTD_OOB_AUTO:
  1827. break;
  1828. case MTD_OOB_RAW:
  1829. /* Not implemented yet */
  1830. default:
  1831. return -EINVAL;
  1832. }
  1833. onenand_get_device(mtd, FL_WRITING);
  1834. if (ops->datbuf)
  1835. ret = onenand_write_ops_nolock(mtd, to, ops);
  1836. else
  1837. ret = onenand_write_oob_nolock(mtd, to, ops);
  1838. onenand_release_device(mtd);
  1839. return ret;
  1840. }
  1841. /**
  1842. * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
  1843. * @param mtd MTD device structure
  1844. * @param ofs offset from device start
  1845. * @param allowbbt 1, if its allowed to access the bbt area
  1846. *
  1847. * Check, if the block is bad. Either by reading the bad block table or
  1848. * calling of the scan function.
  1849. */
  1850. static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  1851. {
  1852. struct onenand_chip *this = mtd->priv;
  1853. struct bbm_info *bbm = this->bbm;
  1854. /* Return info from the table */
  1855. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1856. }
  1857. static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
  1858. struct erase_info *instr)
  1859. {
  1860. struct onenand_chip *this = mtd->priv;
  1861. loff_t addr = instr->addr;
  1862. int len = instr->len;
  1863. unsigned int block_size = (1 << this->erase_shift);
  1864. int ret = 0;
  1865. while (len) {
  1866. this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
  1867. ret = this->wait(mtd, FL_VERIFYING_ERASE);
  1868. if (ret) {
  1869. printk(KERN_ERR "%s: Failed verify, block %d\n",
  1870. __func__, onenand_block(this, addr));
  1871. instr->state = MTD_ERASE_FAILED;
  1872. instr->fail_addr = addr;
  1873. return -1;
  1874. }
  1875. len -= block_size;
  1876. addr += block_size;
  1877. }
  1878. return 0;
  1879. }
  1880. /**
  1881. * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
  1882. * @param mtd MTD device structure
  1883. * @param instr erase instruction
  1884. * @param region erase region
  1885. *
  1886. * Erase one or more blocks up to 64 block at a time
  1887. */
  1888. static int onenand_multiblock_erase(struct mtd_info *mtd,
  1889. struct erase_info *instr,
  1890. unsigned int block_size)
  1891. {
  1892. struct onenand_chip *this = mtd->priv;
  1893. loff_t addr = instr->addr;
  1894. int len = instr->len;
  1895. int eb_count = 0;
  1896. int ret = 0;
  1897. int bdry_block = 0;
  1898. instr->state = MTD_ERASING;
  1899. if (ONENAND_IS_DDP(this)) {
  1900. loff_t bdry_addr = this->chipsize >> 1;
  1901. if (addr < bdry_addr && (addr + len) > bdry_addr)
  1902. bdry_block = bdry_addr >> this->erase_shift;
  1903. }
  1904. /* Pre-check bbs */
  1905. while (len) {
  1906. /* Check if we have a bad block, we do not erase bad blocks */
  1907. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  1908. printk(KERN_WARNING "%s: attempt to erase a bad block "
  1909. "at addr 0x%012llx\n",
  1910. __func__, (unsigned long long) addr);
  1911. instr->state = MTD_ERASE_FAILED;
  1912. return -EIO;
  1913. }
  1914. len -= block_size;
  1915. addr += block_size;
  1916. }
  1917. len = instr->len;
  1918. addr = instr->addr;
  1919. /* loop over 64 eb batches */
  1920. while (len) {
  1921. struct erase_info verify_instr = *instr;
  1922. int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
  1923. verify_instr.addr = addr;
  1924. verify_instr.len = 0;
  1925. /* do not cross chip boundary */
  1926. if (bdry_block) {
  1927. int this_block = (addr >> this->erase_shift);
  1928. if (this_block < bdry_block) {
  1929. max_eb_count = min(max_eb_count,
  1930. (bdry_block - this_block));
  1931. }
  1932. }
  1933. eb_count = 0;
  1934. while (len > block_size && eb_count < (max_eb_count - 1)) {
  1935. this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
  1936. addr, block_size);
  1937. onenand_invalidate_bufferram(mtd, addr, block_size);
  1938. ret = this->wait(mtd, FL_PREPARING_ERASE);
  1939. if (ret) {
  1940. printk(KERN_ERR "%s: Failed multiblock erase, "
  1941. "block %d\n", __func__,
  1942. onenand_block(this, addr));
  1943. instr->state = MTD_ERASE_FAILED;
  1944. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1945. return -EIO;
  1946. }
  1947. len -= block_size;
  1948. addr += block_size;
  1949. eb_count++;
  1950. }
  1951. /* last block of 64-eb series */
  1952. cond_resched();
  1953. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1954. onenand_invalidate_bufferram(mtd, addr, block_size);
  1955. ret = this->wait(mtd, FL_ERASING);
  1956. /* Check if it is write protected */
  1957. if (ret) {
  1958. printk(KERN_ERR "%s: Failed erase, block %d\n",
  1959. __func__, onenand_block(this, addr));
  1960. instr->state = MTD_ERASE_FAILED;
  1961. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1962. return -EIO;
  1963. }
  1964. len -= block_size;
  1965. addr += block_size;
  1966. eb_count++;
  1967. /* verify */
  1968. verify_instr.len = eb_count * block_size;
  1969. if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
  1970. instr->state = verify_instr.state;
  1971. instr->fail_addr = verify_instr.fail_addr;
  1972. return -EIO;
  1973. }
  1974. }
  1975. return 0;
  1976. }
  1977. /**
  1978. * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
  1979. * @param mtd MTD device structure
  1980. * @param instr erase instruction
  1981. * @param region erase region
  1982. * @param block_size erase block size
  1983. *
  1984. * Erase one or more blocks one block at a time
  1985. */
  1986. static int onenand_block_by_block_erase(struct mtd_info *mtd,
  1987. struct erase_info *instr,
  1988. struct mtd_erase_region_info *region,
  1989. unsigned int block_size)
  1990. {
  1991. struct onenand_chip *this = mtd->priv;
  1992. loff_t addr = instr->addr;
  1993. int len = instr->len;
  1994. loff_t region_end = 0;
  1995. int ret = 0;
  1996. if (region) {
  1997. /* region is set for Flex-OneNAND */
  1998. region_end = region->offset + region->erasesize * region->numblocks;
  1999. }
  2000. instr->state = MTD_ERASING;
  2001. /* Loop through the blocks */
  2002. while (len) {
  2003. cond_resched();
  2004. /* Check if we have a bad block, we do not erase bad blocks */
  2005. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  2006. printk(KERN_WARNING "%s: attempt to erase a bad block "
  2007. "at addr 0x%012llx\n",
  2008. __func__, (unsigned long long) addr);
  2009. instr->state = MTD_ERASE_FAILED;
  2010. return -EIO;
  2011. }
  2012. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  2013. onenand_invalidate_bufferram(mtd, addr, block_size);
  2014. ret = this->wait(mtd, FL_ERASING);
  2015. /* Check, if it is write protected */
  2016. if (ret) {
  2017. printk(KERN_ERR "%s: Failed erase, block %d\n",
  2018. __func__, onenand_block(this, addr));
  2019. instr->state = MTD_ERASE_FAILED;
  2020. instr->fail_addr = addr;
  2021. return -EIO;
  2022. }
  2023. len -= block_size;
  2024. addr += block_size;
  2025. if (addr == region_end) {
  2026. if (!len)
  2027. break;
  2028. region++;
  2029. block_size = region->erasesize;
  2030. region_end = region->offset + region->erasesize * region->numblocks;
  2031. if (len & (block_size - 1)) {
  2032. /* FIXME: This should be handled at MTD partitioning level. */
  2033. printk(KERN_ERR "%s: Unaligned address\n",
  2034. __func__);
  2035. return -EIO;
  2036. }
  2037. }
  2038. }
  2039. return 0;
  2040. }
  2041. /**
  2042. * onenand_erase - [MTD Interface] erase block(s)
  2043. * @param mtd MTD device structure
  2044. * @param instr erase instruction
  2045. *
  2046. * Erase one or more blocks
  2047. */
  2048. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  2049. {
  2050. struct onenand_chip *this = mtd->priv;
  2051. unsigned int block_size;
  2052. loff_t addr = instr->addr;
  2053. loff_t len = instr->len;
  2054. int ret = 0;
  2055. struct mtd_erase_region_info *region = NULL;
  2056. loff_t region_offset = 0;
  2057. DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
  2058. (unsigned long long) instr->addr, (unsigned long long) instr->len);
  2059. /* Do not allow erase past end of device */
  2060. if (unlikely((len + addr) > mtd->size)) {
  2061. printk(KERN_ERR "%s: Erase past end of device\n", __func__);
  2062. return -EINVAL;
  2063. }
  2064. if (FLEXONENAND(this)) {
  2065. /* Find the eraseregion of this address */
  2066. int i = flexonenand_region(mtd, addr);
  2067. region = &mtd->eraseregions[i];
  2068. block_size = region->erasesize;
  2069. /* Start address within region must align on block boundary.
  2070. * Erase region's start offset is always block start address.
  2071. */
  2072. region_offset = region->offset;
  2073. } else
  2074. block_size = 1 << this->erase_shift;
  2075. /* Start address must align on block boundary */
  2076. if (unlikely((addr - region_offset) & (block_size - 1))) {
  2077. printk(KERN_ERR "%s: Unaligned address\n", __func__);
  2078. return -EINVAL;
  2079. }
  2080. /* Length must align on block boundary */
  2081. if (unlikely(len & (block_size - 1))) {
  2082. printk(KERN_ERR "%s: Length not block aligned\n", __func__);
  2083. return -EINVAL;
  2084. }
  2085. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  2086. /* Grab the lock and see if the device is available */
  2087. onenand_get_device(mtd, FL_ERASING);
  2088. if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
  2089. /* region is set for Flex-OneNAND (no mb erase) */
  2090. ret = onenand_block_by_block_erase(mtd, instr,
  2091. region, block_size);
  2092. } else {
  2093. ret = onenand_multiblock_erase(mtd, instr, block_size);
  2094. }
  2095. /* Deselect and wake up anyone waiting on the device */
  2096. onenand_release_device(mtd);
  2097. /* Do call back function */
  2098. if (!ret) {
  2099. instr->state = MTD_ERASE_DONE;
  2100. mtd_erase_callback(instr);
  2101. }
  2102. return ret;
  2103. }
  2104. /**
  2105. * onenand_sync - [MTD Interface] sync
  2106. * @param mtd MTD device structure
  2107. *
  2108. * Sync is actually a wait for chip ready function
  2109. */
  2110. static void onenand_sync(struct mtd_info *mtd)
  2111. {
  2112. DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
  2113. /* Grab the lock and see if the device is available */
  2114. onenand_get_device(mtd, FL_SYNCING);
  2115. /* Release it and go back */
  2116. onenand_release_device(mtd);
  2117. }
  2118. /**
  2119. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  2120. * @param mtd MTD device structure
  2121. * @param ofs offset relative to mtd start
  2122. *
  2123. * Check whether the block is bad
  2124. */
  2125. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  2126. {
  2127. int ret;
  2128. /* Check for invalid offset */
  2129. if (ofs > mtd->size)
  2130. return -EINVAL;
  2131. onenand_get_device(mtd, FL_READING);
  2132. ret = onenand_block_isbad_nolock(mtd, ofs, 0);
  2133. onenand_release_device(mtd);
  2134. return ret;
  2135. }
  2136. /**
  2137. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  2138. * @param mtd MTD device structure
  2139. * @param ofs offset from device start
  2140. *
  2141. * This is the default implementation, which can be overridden by
  2142. * a hardware specific driver.
  2143. */
  2144. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2145. {
  2146. struct onenand_chip *this = mtd->priv;
  2147. struct bbm_info *bbm = this->bbm;
  2148. u_char buf[2] = {0, 0};
  2149. struct mtd_oob_ops ops = {
  2150. .mode = MTD_OOB_PLACE,
  2151. .ooblen = 2,
  2152. .oobbuf = buf,
  2153. .ooboffs = 0,
  2154. };
  2155. int block;
  2156. /* Get block number */
  2157. block = onenand_block(this, ofs);
  2158. if (bbm->bbt)
  2159. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  2160. /* We write two bytes, so we don't have to mess with 16-bit access */
  2161. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  2162. /* FIXME : What to do when marking SLC block in partition
  2163. * with MLC erasesize? For now, it is not advisable to
  2164. * create partitions containing both SLC and MLC regions.
  2165. */
  2166. return onenand_write_oob_nolock(mtd, ofs, &ops);
  2167. }
  2168. /**
  2169. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  2170. * @param mtd MTD device structure
  2171. * @param ofs offset relative to mtd start
  2172. *
  2173. * Mark the block as bad
  2174. */
  2175. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2176. {
  2177. struct onenand_chip *this = mtd->priv;
  2178. int ret;
  2179. ret = onenand_block_isbad(mtd, ofs);
  2180. if (ret) {
  2181. /* If it was bad already, return success and do nothing */
  2182. if (ret > 0)
  2183. return 0;
  2184. return ret;
  2185. }
  2186. onenand_get_device(mtd, FL_WRITING);
  2187. ret = this->block_markbad(mtd, ofs);
  2188. onenand_release_device(mtd);
  2189. return ret;
  2190. }
  2191. /**
  2192. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  2193. * @param mtd MTD device structure
  2194. * @param ofs offset relative to mtd start
  2195. * @param len number of bytes to lock or unlock
  2196. * @param cmd lock or unlock command
  2197. *
  2198. * Lock or unlock one or more blocks
  2199. */
  2200. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  2201. {
  2202. struct onenand_chip *this = mtd->priv;
  2203. int start, end, block, value, status;
  2204. int wp_status_mask;
  2205. start = onenand_block(this, ofs);
  2206. end = onenand_block(this, ofs + len) - 1;
  2207. if (cmd == ONENAND_CMD_LOCK)
  2208. wp_status_mask = ONENAND_WP_LS;
  2209. else
  2210. wp_status_mask = ONENAND_WP_US;
  2211. /* Continuous lock scheme */
  2212. if (this->options & ONENAND_HAS_CONT_LOCK) {
  2213. /* Set start block address */
  2214. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2215. /* Set end block address */
  2216. this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  2217. /* Write lock command */
  2218. this->command(mtd, cmd, 0, 0);
  2219. /* There's no return value */
  2220. this->wait(mtd, FL_LOCKING);
  2221. /* Sanity check */
  2222. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2223. & ONENAND_CTRL_ONGO)
  2224. continue;
  2225. /* Check lock status */
  2226. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2227. if (!(status & wp_status_mask))
  2228. printk(KERN_ERR "%s: wp status = 0x%x\n",
  2229. __func__, status);
  2230. return 0;
  2231. }
  2232. /* Block lock scheme */
  2233. for (block = start; block < end + 1; block++) {
  2234. /* Set block address */
  2235. value = onenand_block_address(this, block);
  2236. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2237. /* Select DataRAM for DDP */
  2238. value = onenand_bufferram_address(this, block);
  2239. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2240. /* Set start block address */
  2241. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2242. /* Write lock command */
  2243. this->command(mtd, cmd, 0, 0);
  2244. /* There's no return value */
  2245. this->wait(mtd, FL_LOCKING);
  2246. /* Sanity check */
  2247. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2248. & ONENAND_CTRL_ONGO)
  2249. continue;
  2250. /* Check lock status */
  2251. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2252. if (!(status & wp_status_mask))
  2253. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2254. __func__, block, status);
  2255. }
  2256. return 0;
  2257. }
  2258. /**
  2259. * onenand_lock - [MTD Interface] Lock block(s)
  2260. * @param mtd MTD device structure
  2261. * @param ofs offset relative to mtd start
  2262. * @param len number of bytes to unlock
  2263. *
  2264. * Lock one or more blocks
  2265. */
  2266. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2267. {
  2268. int ret;
  2269. onenand_get_device(mtd, FL_LOCKING);
  2270. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  2271. onenand_release_device(mtd);
  2272. return ret;
  2273. }
  2274. /**
  2275. * onenand_unlock - [MTD Interface] Unlock block(s)
  2276. * @param mtd MTD device structure
  2277. * @param ofs offset relative to mtd start
  2278. * @param len number of bytes to unlock
  2279. *
  2280. * Unlock one or more blocks
  2281. */
  2282. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2283. {
  2284. int ret;
  2285. onenand_get_device(mtd, FL_LOCKING);
  2286. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2287. onenand_release_device(mtd);
  2288. return ret;
  2289. }
  2290. /**
  2291. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  2292. * @param this onenand chip data structure
  2293. *
  2294. * Check lock status
  2295. */
  2296. static int onenand_check_lock_status(struct onenand_chip *this)
  2297. {
  2298. unsigned int value, block, status;
  2299. unsigned int end;
  2300. end = this->chipsize >> this->erase_shift;
  2301. for (block = 0; block < end; block++) {
  2302. /* Set block address */
  2303. value = onenand_block_address(this, block);
  2304. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2305. /* Select DataRAM for DDP */
  2306. value = onenand_bufferram_address(this, block);
  2307. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2308. /* Set start block address */
  2309. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2310. /* Check lock status */
  2311. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2312. if (!(status & ONENAND_WP_US)) {
  2313. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2314. __func__, block, status);
  2315. return 0;
  2316. }
  2317. }
  2318. return 1;
  2319. }
  2320. /**
  2321. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  2322. * @param mtd MTD device structure
  2323. *
  2324. * Unlock all blocks
  2325. */
  2326. static void onenand_unlock_all(struct mtd_info *mtd)
  2327. {
  2328. struct onenand_chip *this = mtd->priv;
  2329. loff_t ofs = 0;
  2330. loff_t len = mtd->size;
  2331. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  2332. /* Set start block address */
  2333. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2334. /* Write unlock command */
  2335. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  2336. /* There's no return value */
  2337. this->wait(mtd, FL_LOCKING);
  2338. /* Sanity check */
  2339. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2340. & ONENAND_CTRL_ONGO)
  2341. continue;
  2342. /* Don't check lock status */
  2343. if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
  2344. return;
  2345. /* Check lock status */
  2346. if (onenand_check_lock_status(this))
  2347. return;
  2348. /* Workaround for all block unlock in DDP */
  2349. if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
  2350. /* All blocks on another chip */
  2351. ofs = this->chipsize >> 1;
  2352. len = this->chipsize >> 1;
  2353. }
  2354. }
  2355. onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2356. }
  2357. #ifdef CONFIG_MTD_ONENAND_OTP
  2358. /**
  2359. * onenand_otp_command - Send OTP specific command to OneNAND device
  2360. * @param mtd MTD device structure
  2361. * @param cmd the command to be sent
  2362. * @param addr offset to read from or write to
  2363. * @param len number of bytes to read or write
  2364. */
  2365. static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
  2366. size_t len)
  2367. {
  2368. struct onenand_chip *this = mtd->priv;
  2369. int value, block, page;
  2370. /* Address translation */
  2371. switch (cmd) {
  2372. case ONENAND_CMD_OTP_ACCESS:
  2373. block = (int) (addr >> this->erase_shift);
  2374. page = -1;
  2375. break;
  2376. default:
  2377. block = (int) (addr >> this->erase_shift);
  2378. page = (int) (addr >> this->page_shift);
  2379. if (ONENAND_IS_2PLANE(this)) {
  2380. /* Make the even block number */
  2381. block &= ~1;
  2382. /* Is it the odd plane? */
  2383. if (addr & this->writesize)
  2384. block++;
  2385. page >>= 1;
  2386. }
  2387. page &= this->page_mask;
  2388. break;
  2389. }
  2390. if (block != -1) {
  2391. /* Write 'DFS, FBA' of Flash */
  2392. value = onenand_block_address(this, block);
  2393. this->write_word(value, this->base +
  2394. ONENAND_REG_START_ADDRESS1);
  2395. }
  2396. if (page != -1) {
  2397. /* Now we use page size operation */
  2398. int sectors = 4, count = 4;
  2399. int dataram;
  2400. switch (cmd) {
  2401. default:
  2402. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  2403. cmd = ONENAND_CMD_2X_PROG;
  2404. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  2405. break;
  2406. }
  2407. /* Write 'FPA, FSA' of Flash */
  2408. value = onenand_page_address(page, sectors);
  2409. this->write_word(value, this->base +
  2410. ONENAND_REG_START_ADDRESS8);
  2411. /* Write 'BSA, BSC' of DataRAM */
  2412. value = onenand_buffer_address(dataram, sectors, count);
  2413. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  2414. }
  2415. /* Interrupt clear */
  2416. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  2417. /* Write command */
  2418. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  2419. return 0;
  2420. }
  2421. /**
  2422. * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
  2423. * @param mtd MTD device structure
  2424. * @param to offset to write to
  2425. * @param len number of bytes to write
  2426. * @param retlen pointer to variable to store the number of written bytes
  2427. * @param buf the data to write
  2428. *
  2429. * OneNAND write out-of-band only for OTP
  2430. */
  2431. static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  2432. struct mtd_oob_ops *ops)
  2433. {
  2434. struct onenand_chip *this = mtd->priv;
  2435. int column, ret = 0, oobsize;
  2436. int written = 0;
  2437. u_char *oobbuf;
  2438. size_t len = ops->ooblen;
  2439. const u_char *buf = ops->oobbuf;
  2440. int block, value, status;
  2441. to += ops->ooboffs;
  2442. /* Initialize retlen, in case of early exit */
  2443. ops->oobretlen = 0;
  2444. oobsize = mtd->oobsize;
  2445. column = to & (mtd->oobsize - 1);
  2446. oobbuf = this->oob_buf;
  2447. /* Loop until all data write */
  2448. while (written < len) {
  2449. int thislen = min_t(int, oobsize, len - written);
  2450. cond_resched();
  2451. block = (int) (to >> this->erase_shift);
  2452. /*
  2453. * Write 'DFS, FBA' of Flash
  2454. * Add: F100h DQ=DFS, FBA
  2455. */
  2456. value = onenand_block_address(this, block);
  2457. this->write_word(value, this->base +
  2458. ONENAND_REG_START_ADDRESS1);
  2459. /*
  2460. * Select DataRAM for DDP
  2461. * Add: F101h DQ=DBS
  2462. */
  2463. value = onenand_bufferram_address(this, block);
  2464. this->write_word(value, this->base +
  2465. ONENAND_REG_START_ADDRESS2);
  2466. ONENAND_SET_NEXT_BUFFERRAM(this);
  2467. /*
  2468. * Enter OTP access mode
  2469. */
  2470. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2471. this->wait(mtd, FL_OTPING);
  2472. /* We send data to spare ram with oobsize
  2473. * to prevent byte access */
  2474. memcpy(oobbuf + column, buf, thislen);
  2475. /*
  2476. * Write Data into DataRAM
  2477. * Add: 8th Word
  2478. * in sector0/spare/page0
  2479. * DQ=XXFCh
  2480. */
  2481. this->write_bufferram(mtd, ONENAND_SPARERAM,
  2482. oobbuf, 0, mtd->oobsize);
  2483. onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  2484. onenand_update_bufferram(mtd, to, 0);
  2485. if (ONENAND_IS_2PLANE(this)) {
  2486. ONENAND_SET_BUFFERRAM1(this);
  2487. onenand_update_bufferram(mtd, to + this->writesize, 0);
  2488. }
  2489. ret = this->wait(mtd, FL_WRITING);
  2490. if (ret) {
  2491. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  2492. break;
  2493. }
  2494. /* Exit OTP access mode */
  2495. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2496. this->wait(mtd, FL_RESETING);
  2497. status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  2498. status &= 0x60;
  2499. if (status == 0x60) {
  2500. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2501. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2502. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2503. } else if (status == 0x20) {
  2504. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2505. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2506. printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
  2507. } else if (status == 0x40) {
  2508. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2509. printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
  2510. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2511. } else {
  2512. printk(KERN_DEBUG "Reboot to check\n");
  2513. }
  2514. written += thislen;
  2515. if (written == len)
  2516. break;
  2517. to += mtd->writesize;
  2518. buf += thislen;
  2519. column = 0;
  2520. }
  2521. ops->oobretlen = written;
  2522. return ret;
  2523. }
  2524. /* Internal OTP operation */
  2525. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  2526. size_t *retlen, u_char *buf);
  2527. /**
  2528. * do_otp_read - [DEFAULT] Read OTP block area
  2529. * @param mtd MTD device structure
  2530. * @param from The offset to read
  2531. * @param len number of bytes to read
  2532. * @param retlen pointer to variable to store the number of readbytes
  2533. * @param buf the databuffer to put/get data
  2534. *
  2535. * Read OTP block area.
  2536. */
  2537. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  2538. size_t *retlen, u_char *buf)
  2539. {
  2540. struct onenand_chip *this = mtd->priv;
  2541. struct mtd_oob_ops ops = {
  2542. .len = len,
  2543. .ooblen = 0,
  2544. .datbuf = buf,
  2545. .oobbuf = NULL,
  2546. };
  2547. int ret;
  2548. /* Enter OTP access mode */
  2549. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2550. this->wait(mtd, FL_OTPING);
  2551. ret = ONENAND_IS_MLC(this) ?
  2552. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  2553. onenand_read_ops_nolock(mtd, from, &ops);
  2554. /* Exit OTP access mode */
  2555. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2556. this->wait(mtd, FL_RESETING);
  2557. return ret;
  2558. }
  2559. /**
  2560. * do_otp_write - [DEFAULT] Write OTP block area
  2561. * @param mtd MTD device structure
  2562. * @param to The offset to write
  2563. * @param len number of bytes to write
  2564. * @param retlen pointer to variable to store the number of write bytes
  2565. * @param buf the databuffer to put/get data
  2566. *
  2567. * Write OTP block area.
  2568. */
  2569. static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
  2570. size_t *retlen, u_char *buf)
  2571. {
  2572. struct onenand_chip *this = mtd->priv;
  2573. unsigned char *pbuf = buf;
  2574. int ret;
  2575. struct mtd_oob_ops ops;
  2576. /* Force buffer page aligned */
  2577. if (len < mtd->writesize) {
  2578. memcpy(this->page_buf, buf, len);
  2579. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  2580. pbuf = this->page_buf;
  2581. len = mtd->writesize;
  2582. }
  2583. /* Enter OTP access mode */
  2584. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2585. this->wait(mtd, FL_OTPING);
  2586. ops.len = len;
  2587. ops.ooblen = 0;
  2588. ops.datbuf = pbuf;
  2589. ops.oobbuf = NULL;
  2590. ret = onenand_write_ops_nolock(mtd, to, &ops);
  2591. *retlen = ops.retlen;
  2592. /* Exit OTP access mode */
  2593. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2594. this->wait(mtd, FL_RESETING);
  2595. return ret;
  2596. }
  2597. /**
  2598. * do_otp_lock - [DEFAULT] Lock OTP block area
  2599. * @param mtd MTD device structure
  2600. * @param from The offset to lock
  2601. * @param len number of bytes to lock
  2602. * @param retlen pointer to variable to store the number of lock bytes
  2603. * @param buf the databuffer to put/get data
  2604. *
  2605. * Lock OTP block area.
  2606. */
  2607. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  2608. size_t *retlen, u_char *buf)
  2609. {
  2610. struct onenand_chip *this = mtd->priv;
  2611. struct mtd_oob_ops ops;
  2612. int ret;
  2613. if (FLEXONENAND(this)) {
  2614. /* Enter OTP access mode */
  2615. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2616. this->wait(mtd, FL_OTPING);
  2617. /*
  2618. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2619. * main area of page 49.
  2620. */
  2621. ops.len = mtd->writesize;
  2622. ops.ooblen = 0;
  2623. ops.datbuf = buf;
  2624. ops.oobbuf = NULL;
  2625. ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
  2626. *retlen = ops.retlen;
  2627. /* Exit OTP access mode */
  2628. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2629. this->wait(mtd, FL_RESETING);
  2630. } else {
  2631. ops.mode = MTD_OOB_PLACE;
  2632. ops.ooblen = len;
  2633. ops.oobbuf = buf;
  2634. ops.ooboffs = 0;
  2635. ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
  2636. *retlen = ops.oobretlen;
  2637. }
  2638. return ret;
  2639. }
  2640. /**
  2641. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  2642. * @param mtd MTD device structure
  2643. * @param from The offset to read/write
  2644. * @param len number of bytes to read/write
  2645. * @param retlen pointer to variable to store the number of read bytes
  2646. * @param buf the databuffer to put/get data
  2647. * @param action do given action
  2648. * @param mode specify user and factory
  2649. *
  2650. * Handle OTP operation.
  2651. */
  2652. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  2653. size_t *retlen, u_char *buf,
  2654. otp_op_t action, int mode)
  2655. {
  2656. struct onenand_chip *this = mtd->priv;
  2657. int otp_pages;
  2658. int density;
  2659. int ret = 0;
  2660. *retlen = 0;
  2661. density = onenand_get_density(this->device_id);
  2662. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  2663. otp_pages = 20;
  2664. else
  2665. otp_pages = 50;
  2666. if (mode == MTD_OTP_FACTORY) {
  2667. from += mtd->writesize * otp_pages;
  2668. otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
  2669. }
  2670. /* Check User/Factory boundary */
  2671. if (mode == MTD_OTP_USER) {
  2672. if (mtd->writesize * otp_pages < from + len)
  2673. return 0;
  2674. } else {
  2675. if (mtd->writesize * otp_pages < len)
  2676. return 0;
  2677. }
  2678. onenand_get_device(mtd, FL_OTPING);
  2679. while (len > 0 && otp_pages > 0) {
  2680. if (!action) { /* OTP Info functions */
  2681. struct otp_info *otpinfo;
  2682. len -= sizeof(struct otp_info);
  2683. if (len <= 0) {
  2684. ret = -ENOSPC;
  2685. break;
  2686. }
  2687. otpinfo = (struct otp_info *) buf;
  2688. otpinfo->start = from;
  2689. otpinfo->length = mtd->writesize;
  2690. otpinfo->locked = 0;
  2691. from += mtd->writesize;
  2692. buf += sizeof(struct otp_info);
  2693. *retlen += sizeof(struct otp_info);
  2694. } else {
  2695. size_t tmp_retlen;
  2696. ret = action(mtd, from, len, &tmp_retlen, buf);
  2697. buf += tmp_retlen;
  2698. len -= tmp_retlen;
  2699. *retlen += tmp_retlen;
  2700. if (ret)
  2701. break;
  2702. }
  2703. otp_pages--;
  2704. }
  2705. onenand_release_device(mtd);
  2706. return ret;
  2707. }
  2708. /**
  2709. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  2710. * @param mtd MTD device structure
  2711. * @param buf the databuffer to put/get data
  2712. * @param len number of bytes to read
  2713. *
  2714. * Read factory OTP info.
  2715. */
  2716. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  2717. struct otp_info *buf, size_t len)
  2718. {
  2719. size_t retlen;
  2720. int ret;
  2721. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  2722. return ret ? : retlen;
  2723. }
  2724. /**
  2725. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  2726. * @param mtd MTD device structure
  2727. * @param from The offset to read
  2728. * @param len number of bytes to read
  2729. * @param retlen pointer to variable to store the number of read bytes
  2730. * @param buf the databuffer to put/get data
  2731. *
  2732. * Read factory OTP area.
  2733. */
  2734. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  2735. size_t len, size_t *retlen, u_char *buf)
  2736. {
  2737. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  2738. }
  2739. /**
  2740. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  2741. * @param mtd MTD device structure
  2742. * @param buf the databuffer to put/get data
  2743. * @param len number of bytes to read
  2744. *
  2745. * Read user OTP info.
  2746. */
  2747. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  2748. struct otp_info *buf, size_t len)
  2749. {
  2750. size_t retlen;
  2751. int ret;
  2752. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  2753. return ret ? : retlen;
  2754. }
  2755. /**
  2756. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  2757. * @param mtd MTD device structure
  2758. * @param from The offset to read
  2759. * @param len number of bytes to read
  2760. * @param retlen pointer to variable to store the number of read bytes
  2761. * @param buf the databuffer to put/get data
  2762. *
  2763. * Read user OTP area.
  2764. */
  2765. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2766. size_t len, size_t *retlen, u_char *buf)
  2767. {
  2768. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  2769. }
  2770. /**
  2771. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  2772. * @param mtd MTD device structure
  2773. * @param from The offset to write
  2774. * @param len number of bytes to write
  2775. * @param retlen pointer to variable to store the number of write bytes
  2776. * @param buf the databuffer to put/get data
  2777. *
  2778. * Write user OTP area.
  2779. */
  2780. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2781. size_t len, size_t *retlen, u_char *buf)
  2782. {
  2783. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  2784. }
  2785. /**
  2786. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  2787. * @param mtd MTD device structure
  2788. * @param from The offset to lock
  2789. * @param len number of bytes to unlock
  2790. *
  2791. * Write lock mark on spare area in page 0 in OTP block
  2792. */
  2793. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2794. size_t len)
  2795. {
  2796. struct onenand_chip *this = mtd->priv;
  2797. u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
  2798. size_t retlen;
  2799. int ret;
  2800. unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
  2801. memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
  2802. : mtd->oobsize);
  2803. /*
  2804. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  2805. * We write 16 bytes spare area instead of 2 bytes.
  2806. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2807. * main area of page 49.
  2808. */
  2809. from = 0;
  2810. len = FLEXONENAND(this) ? mtd->writesize : 16;
  2811. /*
  2812. * Note: OTP lock operation
  2813. * OTP block : 0xXXFC XX 1111 1100
  2814. * 1st block : 0xXXF3 (If chip support) XX 1111 0011
  2815. * Both : 0xXXF0 (If chip support) XX 1111 0000
  2816. */
  2817. if (FLEXONENAND(this))
  2818. otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
  2819. /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
  2820. if (otp == 1)
  2821. buf[otp_lock_offset] = 0xFC;
  2822. else if (otp == 2)
  2823. buf[otp_lock_offset] = 0xF3;
  2824. else if (otp == 3)
  2825. buf[otp_lock_offset] = 0xF0;
  2826. else if (otp != 0)
  2827. printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
  2828. ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
  2829. return ret ? : retlen;
  2830. }
  2831. #endif /* CONFIG_MTD_ONENAND_OTP */
  2832. /**
  2833. * onenand_check_features - Check and set OneNAND features
  2834. * @param mtd MTD data structure
  2835. *
  2836. * Check and set OneNAND features
  2837. * - lock scheme
  2838. * - two plane
  2839. */
  2840. static void onenand_check_features(struct mtd_info *mtd)
  2841. {
  2842. struct onenand_chip *this = mtd->priv;
  2843. unsigned int density, process;
  2844. /* Lock scheme depends on density and process */
  2845. density = onenand_get_density(this->device_id);
  2846. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  2847. /* Lock scheme */
  2848. switch (density) {
  2849. case ONENAND_DEVICE_DENSITY_4Gb:
  2850. this->options |= ONENAND_HAS_2PLANE;
  2851. case ONENAND_DEVICE_DENSITY_2Gb:
  2852. /* 2Gb DDP does not have 2 plane */
  2853. if (!ONENAND_IS_DDP(this))
  2854. this->options |= ONENAND_HAS_2PLANE;
  2855. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2856. case ONENAND_DEVICE_DENSITY_1Gb:
  2857. /* A-Die has all block unlock */
  2858. if (process)
  2859. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2860. break;
  2861. default:
  2862. /* Some OneNAND has continuous lock scheme */
  2863. if (!process)
  2864. this->options |= ONENAND_HAS_CONT_LOCK;
  2865. break;
  2866. }
  2867. if (ONENAND_IS_MLC(this))
  2868. this->options &= ~ONENAND_HAS_2PLANE;
  2869. if (FLEXONENAND(this)) {
  2870. this->options &= ~ONENAND_HAS_CONT_LOCK;
  2871. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2872. }
  2873. if (this->options & ONENAND_HAS_CONT_LOCK)
  2874. printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
  2875. if (this->options & ONENAND_HAS_UNLOCK_ALL)
  2876. printk(KERN_DEBUG "Chip support all block unlock\n");
  2877. if (this->options & ONENAND_HAS_2PLANE)
  2878. printk(KERN_DEBUG "Chip has 2 plane\n");
  2879. }
  2880. /**
  2881. * onenand_print_device_info - Print device & version ID
  2882. * @param device device ID
  2883. * @param version version ID
  2884. *
  2885. * Print device & version ID
  2886. */
  2887. static void onenand_print_device_info(int device, int version)
  2888. {
  2889. int vcc, demuxed, ddp, density, flexonenand;
  2890. vcc = device & ONENAND_DEVICE_VCC_MASK;
  2891. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  2892. ddp = device & ONENAND_DEVICE_IS_DDP;
  2893. density = onenand_get_density(device);
  2894. flexonenand = device & DEVICE_IS_FLEXONENAND;
  2895. printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  2896. demuxed ? "" : "Muxed ",
  2897. flexonenand ? "Flex-" : "",
  2898. ddp ? "(DDP)" : "",
  2899. (16 << density),
  2900. vcc ? "2.65/3.3" : "1.8",
  2901. device);
  2902. printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
  2903. }
  2904. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  2905. {ONENAND_MFR_SAMSUNG, "Samsung"},
  2906. {ONENAND_MFR_NUMONYX, "Numonyx"},
  2907. };
  2908. /**
  2909. * onenand_check_maf - Check manufacturer ID
  2910. * @param manuf manufacturer ID
  2911. *
  2912. * Check manufacturer ID
  2913. */
  2914. static int onenand_check_maf(int manuf)
  2915. {
  2916. int size = ARRAY_SIZE(onenand_manuf_ids);
  2917. char *name;
  2918. int i;
  2919. for (i = 0; i < size; i++)
  2920. if (manuf == onenand_manuf_ids[i].id)
  2921. break;
  2922. if (i < size)
  2923. name = onenand_manuf_ids[i].name;
  2924. else
  2925. name = "Unknown";
  2926. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  2927. return (i == size);
  2928. }
  2929. /**
  2930. * flexonenand_get_boundary - Reads the SLC boundary
  2931. * @param onenand_info - onenand info structure
  2932. **/
  2933. static int flexonenand_get_boundary(struct mtd_info *mtd)
  2934. {
  2935. struct onenand_chip *this = mtd->priv;
  2936. unsigned die, bdry;
  2937. int ret, syscfg, locked;
  2938. /* Disable ECC */
  2939. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  2940. this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
  2941. for (die = 0; die < this->dies; die++) {
  2942. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2943. this->wait(mtd, FL_SYNCING);
  2944. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2945. ret = this->wait(mtd, FL_READING);
  2946. bdry = this->read_word(this->base + ONENAND_DATARAM);
  2947. if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
  2948. locked = 0;
  2949. else
  2950. locked = 1;
  2951. this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
  2952. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2953. ret = this->wait(mtd, FL_RESETING);
  2954. printk(KERN_INFO "Die %d boundary: %d%s\n", die,
  2955. this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
  2956. }
  2957. /* Enable ECC */
  2958. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  2959. return 0;
  2960. }
  2961. /**
  2962. * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
  2963. * boundary[], diesize[], mtd->size, mtd->erasesize
  2964. * @param mtd - MTD device structure
  2965. */
  2966. static void flexonenand_get_size(struct mtd_info *mtd)
  2967. {
  2968. struct onenand_chip *this = mtd->priv;
  2969. int die, i, eraseshift, density;
  2970. int blksperdie, maxbdry;
  2971. loff_t ofs;
  2972. density = onenand_get_density(this->device_id);
  2973. blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
  2974. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2975. maxbdry = blksperdie - 1;
  2976. eraseshift = this->erase_shift - 1;
  2977. mtd->numeraseregions = this->dies << 1;
  2978. /* This fills up the device boundary */
  2979. flexonenand_get_boundary(mtd);
  2980. die = ofs = 0;
  2981. i = -1;
  2982. for (; die < this->dies; die++) {
  2983. if (!die || this->boundary[die-1] != maxbdry) {
  2984. i++;
  2985. mtd->eraseregions[i].offset = ofs;
  2986. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  2987. mtd->eraseregions[i].numblocks =
  2988. this->boundary[die] + 1;
  2989. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  2990. eraseshift++;
  2991. } else {
  2992. mtd->numeraseregions -= 1;
  2993. mtd->eraseregions[i].numblocks +=
  2994. this->boundary[die] + 1;
  2995. ofs += (this->boundary[die] + 1) << (eraseshift - 1);
  2996. }
  2997. if (this->boundary[die] != maxbdry) {
  2998. i++;
  2999. mtd->eraseregions[i].offset = ofs;
  3000. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  3001. mtd->eraseregions[i].numblocks = maxbdry ^
  3002. this->boundary[die];
  3003. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  3004. eraseshift--;
  3005. } else
  3006. mtd->numeraseregions -= 1;
  3007. }
  3008. /* Expose MLC erase size except when all blocks are SLC */
  3009. mtd->erasesize = 1 << this->erase_shift;
  3010. if (mtd->numeraseregions == 1)
  3011. mtd->erasesize >>= 1;
  3012. printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
  3013. for (i = 0; i < mtd->numeraseregions; i++)
  3014. printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
  3015. " numblocks: %04u]\n",
  3016. (unsigned int) mtd->eraseregions[i].offset,
  3017. mtd->eraseregions[i].erasesize,
  3018. mtd->eraseregions[i].numblocks);
  3019. for (die = 0, mtd->size = 0; die < this->dies; die++) {
  3020. this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
  3021. this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
  3022. << (this->erase_shift - 1);
  3023. mtd->size += this->diesize[die];
  3024. }
  3025. }
  3026. /**
  3027. * flexonenand_check_blocks_erased - Check if blocks are erased
  3028. * @param mtd_info - mtd info structure
  3029. * @param start - first erase block to check
  3030. * @param end - last erase block to check
  3031. *
  3032. * Converting an unerased block from MLC to SLC
  3033. * causes byte values to change. Since both data and its ECC
  3034. * have changed, reads on the block give uncorrectable error.
  3035. * This might lead to the block being detected as bad.
  3036. *
  3037. * Avoid this by ensuring that the block to be converted is
  3038. * erased.
  3039. */
  3040. static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
  3041. {
  3042. struct onenand_chip *this = mtd->priv;
  3043. int i, ret;
  3044. int block;
  3045. struct mtd_oob_ops ops = {
  3046. .mode = MTD_OOB_PLACE,
  3047. .ooboffs = 0,
  3048. .ooblen = mtd->oobsize,
  3049. .datbuf = NULL,
  3050. .oobbuf = this->oob_buf,
  3051. };
  3052. loff_t addr;
  3053. printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
  3054. for (block = start; block <= end; block++) {
  3055. addr = flexonenand_addr(this, block);
  3056. if (onenand_block_isbad_nolock(mtd, addr, 0))
  3057. continue;
  3058. /*
  3059. * Since main area write results in ECC write to spare,
  3060. * it is sufficient to check only ECC bytes for change.
  3061. */
  3062. ret = onenand_read_oob_nolock(mtd, addr, &ops);
  3063. if (ret)
  3064. return ret;
  3065. for (i = 0; i < mtd->oobsize; i++)
  3066. if (this->oob_buf[i] != 0xff)
  3067. break;
  3068. if (i != mtd->oobsize) {
  3069. printk(KERN_WARNING "%s: Block %d not erased.\n",
  3070. __func__, block);
  3071. return 1;
  3072. }
  3073. }
  3074. return 0;
  3075. }
  3076. /**
  3077. * flexonenand_set_boundary - Writes the SLC boundary
  3078. * @param mtd - mtd info structure
  3079. */
  3080. int flexonenand_set_boundary(struct mtd_info *mtd, int die,
  3081. int boundary, int lock)
  3082. {
  3083. struct onenand_chip *this = mtd->priv;
  3084. int ret, density, blksperdie, old, new, thisboundary;
  3085. loff_t addr;
  3086. /* Change only once for SDP Flex-OneNAND */
  3087. if (die && (!ONENAND_IS_DDP(this)))
  3088. return 0;
  3089. /* boundary value of -1 indicates no required change */
  3090. if (boundary < 0 || boundary == this->boundary[die])
  3091. return 0;
  3092. density = onenand_get_density(this->device_id);
  3093. blksperdie = ((16 << density) << 20) >> this->erase_shift;
  3094. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  3095. if (boundary >= blksperdie) {
  3096. printk(KERN_ERR "%s: Invalid boundary value. "
  3097. "Boundary not changed.\n", __func__);
  3098. return -EINVAL;
  3099. }
  3100. /* Check if converting blocks are erased */
  3101. old = this->boundary[die] + (die * this->density_mask);
  3102. new = boundary + (die * this->density_mask);
  3103. ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
  3104. if (ret) {
  3105. printk(KERN_ERR "%s: Please erase blocks "
  3106. "before boundary change\n", __func__);
  3107. return ret;
  3108. }
  3109. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  3110. this->wait(mtd, FL_SYNCING);
  3111. /* Check is boundary is locked */
  3112. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  3113. ret = this->wait(mtd, FL_READING);
  3114. thisboundary = this->read_word(this->base + ONENAND_DATARAM);
  3115. if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
  3116. printk(KERN_ERR "%s: boundary locked\n", __func__);
  3117. ret = 1;
  3118. goto out;
  3119. }
  3120. printk(KERN_INFO "Changing die %d boundary: %d%s\n",
  3121. die, boundary, lock ? "(Locked)" : "(Unlocked)");
  3122. addr = die ? this->diesize[0] : 0;
  3123. boundary &= FLEXONENAND_PI_MASK;
  3124. boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
  3125. this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
  3126. ret = this->wait(mtd, FL_ERASING);
  3127. if (ret) {
  3128. printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
  3129. __func__, die);
  3130. goto out;
  3131. }
  3132. this->write_word(boundary, this->base + ONENAND_DATARAM);
  3133. this->command(mtd, ONENAND_CMD_PROG, addr, 0);
  3134. ret = this->wait(mtd, FL_WRITING);
  3135. if (ret) {
  3136. printk(KERN_ERR "%s: Failed PI write for Die %d\n",
  3137. __func__, die);
  3138. goto out;
  3139. }
  3140. this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
  3141. ret = this->wait(mtd, FL_WRITING);
  3142. out:
  3143. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
  3144. this->wait(mtd, FL_RESETING);
  3145. if (!ret)
  3146. /* Recalculate device size on boundary change*/
  3147. flexonenand_get_size(mtd);
  3148. return ret;
  3149. }
  3150. /**
  3151. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  3152. * @param mtd MTD device structure
  3153. *
  3154. * OneNAND detection method:
  3155. * Compare the values from command with ones from register
  3156. */
  3157. static int onenand_probe(struct mtd_info *mtd)
  3158. {
  3159. struct onenand_chip *this = mtd->priv;
  3160. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  3161. int density;
  3162. int syscfg;
  3163. /* Save system configuration 1 */
  3164. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  3165. /* Clear Sync. Burst Read mode to read BootRAM */
  3166. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
  3167. /* Send the command for reading device ID from BootRAM */
  3168. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  3169. /* Read manufacturer and device IDs from BootRAM */
  3170. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  3171. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  3172. /* Reset OneNAND to read default register values */
  3173. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  3174. /* Wait reset */
  3175. this->wait(mtd, FL_RESETING);
  3176. /* Restore system configuration 1 */
  3177. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  3178. /* Check manufacturer ID */
  3179. if (onenand_check_maf(bram_maf_id))
  3180. return -ENXIO;
  3181. /* Read manufacturer and device IDs from Register */
  3182. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3183. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3184. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  3185. this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
  3186. /* Check OneNAND device */
  3187. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  3188. return -ENXIO;
  3189. /* Flash device information */
  3190. onenand_print_device_info(dev_id, ver_id);
  3191. this->device_id = dev_id;
  3192. this->version_id = ver_id;
  3193. density = onenand_get_density(dev_id);
  3194. if (FLEXONENAND(this)) {
  3195. this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
  3196. /* Maximum possible erase regions */
  3197. mtd->numeraseregions = this->dies << 1;
  3198. mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
  3199. * (this->dies << 1), GFP_KERNEL);
  3200. if (!mtd->eraseregions)
  3201. return -ENOMEM;
  3202. }
  3203. /*
  3204. * For Flex-OneNAND, chipsize represents maximum possible device size.
  3205. * mtd->size represents the actual device size.
  3206. */
  3207. this->chipsize = (16 << density) << 20;
  3208. /* OneNAND page size & block size */
  3209. /* The data buffer size is equal to page size */
  3210. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  3211. /* We use the full BufferRAM */
  3212. if (ONENAND_IS_MLC(this))
  3213. mtd->writesize <<= 1;
  3214. mtd->oobsize = mtd->writesize >> 5;
  3215. /* Pages per a block are always 64 in OneNAND */
  3216. mtd->erasesize = mtd->writesize << 6;
  3217. /*
  3218. * Flex-OneNAND SLC area has 64 pages per block.
  3219. * Flex-OneNAND MLC area has 128 pages per block.
  3220. * Expose MLC erase size to find erase_shift and page_mask.
  3221. */
  3222. if (FLEXONENAND(this))
  3223. mtd->erasesize <<= 1;
  3224. this->erase_shift = ffs(mtd->erasesize) - 1;
  3225. this->page_shift = ffs(mtd->writesize) - 1;
  3226. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  3227. /* Set density mask. it is used for DDP */
  3228. if (ONENAND_IS_DDP(this))
  3229. this->density_mask = this->chipsize >> (this->erase_shift + 1);
  3230. /* It's real page size */
  3231. this->writesize = mtd->writesize;
  3232. /* REVISIT: Multichip handling */
  3233. if (FLEXONENAND(this))
  3234. flexonenand_get_size(mtd);
  3235. else
  3236. mtd->size = this->chipsize;
  3237. /* Check OneNAND features */
  3238. onenand_check_features(mtd);
  3239. /*
  3240. * We emulate the 4KiB page and 256KiB erase block size
  3241. * But oobsize is still 64 bytes.
  3242. * It is only valid if you turn on 2X program support,
  3243. * Otherwise it will be ignored by compiler.
  3244. */
  3245. if (ONENAND_IS_2PLANE(this)) {
  3246. mtd->writesize <<= 1;
  3247. mtd->erasesize <<= 1;
  3248. }
  3249. return 0;
  3250. }
  3251. /**
  3252. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  3253. * @param mtd MTD device structure
  3254. */
  3255. static int onenand_suspend(struct mtd_info *mtd)
  3256. {
  3257. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  3258. }
  3259. /**
  3260. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  3261. * @param mtd MTD device structure
  3262. */
  3263. static void onenand_resume(struct mtd_info *mtd)
  3264. {
  3265. struct onenand_chip *this = mtd->priv;
  3266. if (this->state == FL_PM_SUSPENDED)
  3267. onenand_release_device(mtd);
  3268. else
  3269. printk(KERN_ERR "%s: resume() called for the chip which is not "
  3270. "in suspended state\n", __func__);
  3271. }
  3272. /**
  3273. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  3274. * @param mtd MTD device structure
  3275. * @param maxchips Number of chips to scan for
  3276. *
  3277. * This fills out all the not initialized function pointers
  3278. * with the defaults.
  3279. * The flash ID is read and the mtd/chip structures are
  3280. * filled with the appropriate values.
  3281. */
  3282. int onenand_scan(struct mtd_info *mtd, int maxchips)
  3283. {
  3284. int i, ret;
  3285. struct onenand_chip *this = mtd->priv;
  3286. if (!this->read_word)
  3287. this->read_word = onenand_readw;
  3288. if (!this->write_word)
  3289. this->write_word = onenand_writew;
  3290. if (!this->command)
  3291. this->command = onenand_command;
  3292. if (!this->wait)
  3293. onenand_setup_wait(mtd);
  3294. if (!this->bbt_wait)
  3295. this->bbt_wait = onenand_bbt_wait;
  3296. if (!this->unlock_all)
  3297. this->unlock_all = onenand_unlock_all;
  3298. if (!this->read_bufferram)
  3299. this->read_bufferram = onenand_read_bufferram;
  3300. if (!this->write_bufferram)
  3301. this->write_bufferram = onenand_write_bufferram;
  3302. if (!this->block_markbad)
  3303. this->block_markbad = onenand_default_block_markbad;
  3304. if (!this->scan_bbt)
  3305. this->scan_bbt = onenand_default_bbt;
  3306. if (onenand_probe(mtd))
  3307. return -ENXIO;
  3308. /* Set Sync. Burst Read after probing */
  3309. if (this->mmcontrol) {
  3310. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  3311. this->read_bufferram = onenand_sync_read_bufferram;
  3312. }
  3313. /* Allocate buffers, if necessary */
  3314. if (!this->page_buf) {
  3315. this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3316. if (!this->page_buf) {
  3317. printk(KERN_ERR "%s: Can't allocate page_buf\n",
  3318. __func__);
  3319. return -ENOMEM;
  3320. }
  3321. this->options |= ONENAND_PAGEBUF_ALLOC;
  3322. }
  3323. if (!this->oob_buf) {
  3324. this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
  3325. if (!this->oob_buf) {
  3326. printk(KERN_ERR "%s: Can't allocate oob_buf\n",
  3327. __func__);
  3328. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3329. this->options &= ~ONENAND_PAGEBUF_ALLOC;
  3330. kfree(this->page_buf);
  3331. }
  3332. return -ENOMEM;
  3333. }
  3334. this->options |= ONENAND_OOBBUF_ALLOC;
  3335. }
  3336. this->state = FL_READY;
  3337. init_waitqueue_head(&this->wq);
  3338. spin_lock_init(&this->chip_lock);
  3339. /*
  3340. * Allow subpage writes up to oobsize.
  3341. */
  3342. switch (mtd->oobsize) {
  3343. case 128:
  3344. this->ecclayout = &onenand_oob_128;
  3345. mtd->subpage_sft = 0;
  3346. break;
  3347. case 64:
  3348. this->ecclayout = &onenand_oob_64;
  3349. mtd->subpage_sft = 2;
  3350. break;
  3351. case 32:
  3352. this->ecclayout = &onenand_oob_32;
  3353. mtd->subpage_sft = 1;
  3354. break;
  3355. default:
  3356. printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
  3357. __func__, mtd->oobsize);
  3358. mtd->subpage_sft = 0;
  3359. /* To prevent kernel oops */
  3360. this->ecclayout = &onenand_oob_32;
  3361. break;
  3362. }
  3363. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  3364. /*
  3365. * The number of bytes available for a client to place data into
  3366. * the out of band area
  3367. */
  3368. this->ecclayout->oobavail = 0;
  3369. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
  3370. this->ecclayout->oobfree[i].length; i++)
  3371. this->ecclayout->oobavail +=
  3372. this->ecclayout->oobfree[i].length;
  3373. mtd->oobavail = this->ecclayout->oobavail;
  3374. mtd->ecclayout = this->ecclayout;
  3375. /* Fill in remaining MTD driver data */
  3376. mtd->type = MTD_NANDFLASH;
  3377. mtd->flags = MTD_CAP_NANDFLASH;
  3378. mtd->erase = onenand_erase;
  3379. mtd->point = NULL;
  3380. mtd->unpoint = NULL;
  3381. mtd->read = onenand_read;
  3382. mtd->write = onenand_write;
  3383. mtd->read_oob = onenand_read_oob;
  3384. mtd->write_oob = onenand_write_oob;
  3385. mtd->panic_write = onenand_panic_write;
  3386. #ifdef CONFIG_MTD_ONENAND_OTP
  3387. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  3388. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  3389. mtd->get_user_prot_info = onenand_get_user_prot_info;
  3390. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  3391. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  3392. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  3393. #endif
  3394. mtd->sync = onenand_sync;
  3395. mtd->lock = onenand_lock;
  3396. mtd->unlock = onenand_unlock;
  3397. mtd->suspend = onenand_suspend;
  3398. mtd->resume = onenand_resume;
  3399. mtd->block_isbad = onenand_block_isbad;
  3400. mtd->block_markbad = onenand_block_markbad;
  3401. mtd->owner = THIS_MODULE;
  3402. /* Unlock whole block */
  3403. this->unlock_all(mtd);
  3404. ret = this->scan_bbt(mtd);
  3405. if ((!FLEXONENAND(this)) || ret)
  3406. return ret;
  3407. /* Change Flex-OneNAND boundaries if required */
  3408. for (i = 0; i < MAX_DIES; i++)
  3409. flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
  3410. flex_bdry[(2 * i) + 1]);
  3411. return 0;
  3412. }
  3413. /**
  3414. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  3415. * @param mtd MTD device structure
  3416. */
  3417. void onenand_release(struct mtd_info *mtd)
  3418. {
  3419. struct onenand_chip *this = mtd->priv;
  3420. #ifdef CONFIG_MTD_PARTITIONS
  3421. /* Deregister partitions */
  3422. del_mtd_partitions (mtd);
  3423. #endif
  3424. /* Deregister the device */
  3425. del_mtd_device (mtd);
  3426. /* Free bad block table memory, if allocated */
  3427. if (this->bbm) {
  3428. struct bbm_info *bbm = this->bbm;
  3429. kfree(bbm->bbt);
  3430. kfree(this->bbm);
  3431. }
  3432. /* Buffers allocated by onenand_scan */
  3433. if (this->options & ONENAND_PAGEBUF_ALLOC)
  3434. kfree(this->page_buf);
  3435. if (this->options & ONENAND_OOBBUF_ALLOC)
  3436. kfree(this->oob_buf);
  3437. kfree(mtd->eraseregions);
  3438. }
  3439. EXPORT_SYMBOL_GPL(onenand_scan);
  3440. EXPORT_SYMBOL_GPL(onenand_release);
  3441. MODULE_LICENSE("GPL");
  3442. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  3443. MODULE_DESCRIPTION("Generic OneNAND flash driver code");