sdhci-pci.c 19 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/mmc/host.h>
  19. #include <asm/scatterlist.h>
  20. #include <asm/io.h>
  21. #include "sdhci.h"
  22. /*
  23. * PCI registers
  24. */
  25. #define PCI_SDHCI_IFPIO 0x00
  26. #define PCI_SDHCI_IFDMA 0x01
  27. #define PCI_SDHCI_IFVENDOR 0x02
  28. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  29. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  30. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  31. #define MAX_SLOTS 8
  32. struct sdhci_pci_chip;
  33. struct sdhci_pci_slot;
  34. struct sdhci_pci_fixes {
  35. unsigned int quirks;
  36. int (*probe)(struct sdhci_pci_chip*);
  37. int (*probe_slot)(struct sdhci_pci_slot*);
  38. void (*remove_slot)(struct sdhci_pci_slot*, int);
  39. int (*suspend)(struct sdhci_pci_chip*,
  40. pm_message_t);
  41. int (*resume)(struct sdhci_pci_chip*);
  42. };
  43. struct sdhci_pci_slot {
  44. struct sdhci_pci_chip *chip;
  45. struct sdhci_host *host;
  46. int pci_bar;
  47. };
  48. struct sdhci_pci_chip {
  49. struct pci_dev *pdev;
  50. unsigned int quirks;
  51. const struct sdhci_pci_fixes *fixes;
  52. int num_slots; /* Slots on controller */
  53. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  54. };
  55. /*****************************************************************************\
  56. * *
  57. * Hardware specific quirk handling *
  58. * *
  59. \*****************************************************************************/
  60. static int ricoh_probe(struct sdhci_pci_chip *chip)
  61. {
  62. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM)
  63. chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET;
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  65. chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  66. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  67. return 0;
  68. }
  69. static const struct sdhci_pci_fixes sdhci_ricoh = {
  70. .probe = ricoh_probe,
  71. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR,
  72. };
  73. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  74. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  75. SDHCI_QUIRK_BROKEN_DMA,
  76. };
  77. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  78. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  79. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  80. SDHCI_QUIRK_BROKEN_DMA,
  81. };
  82. static const struct sdhci_pci_fixes sdhci_cafe = {
  83. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  84. SDHCI_QUIRK_NO_BUSY_IRQ |
  85. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  86. };
  87. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  88. {
  89. u8 scratch;
  90. int ret;
  91. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  92. if (ret)
  93. return ret;
  94. /*
  95. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  96. * [bit 1:2] and enable over current debouncing [bit 6].
  97. */
  98. if (on)
  99. scratch |= 0x47;
  100. else
  101. scratch &= ~0x47;
  102. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  103. if (ret)
  104. return ret;
  105. return 0;
  106. }
  107. static int jmicron_probe(struct sdhci_pci_chip *chip)
  108. {
  109. int ret;
  110. if (chip->pdev->revision == 0) {
  111. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  112. SDHCI_QUIRK_32BIT_DMA_SIZE |
  113. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  114. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  115. SDHCI_QUIRK_BROKEN_SMALL_PIO;
  116. }
  117. /*
  118. * JMicron chips can have two interfaces to the same hardware
  119. * in order to work around limitations in Microsoft's driver.
  120. * We need to make sure we only bind to one of them.
  121. *
  122. * This code assumes two things:
  123. *
  124. * 1. The PCI code adds subfunctions in order.
  125. *
  126. * 2. The MMC interface has a lower subfunction number
  127. * than the SD interface.
  128. */
  129. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  130. struct pci_dev *sd_dev;
  131. sd_dev = NULL;
  132. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  133. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  134. if ((PCI_SLOT(chip->pdev->devfn) ==
  135. PCI_SLOT(sd_dev->devfn)) &&
  136. (chip->pdev->bus == sd_dev->bus))
  137. break;
  138. }
  139. if (sd_dev) {
  140. pci_dev_put(sd_dev);
  141. dev_info(&chip->pdev->dev, "Refusing to bind to "
  142. "secondary interface.\n");
  143. return -ENODEV;
  144. }
  145. }
  146. /*
  147. * JMicron chips need a bit of a nudge to enable the power
  148. * output pins.
  149. */
  150. ret = jmicron_pmos(chip, 1);
  151. if (ret) {
  152. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  153. return ret;
  154. }
  155. return 0;
  156. }
  157. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  158. {
  159. u8 scratch;
  160. scratch = readb(host->ioaddr + 0xC0);
  161. if (on)
  162. scratch |= 0x01;
  163. else
  164. scratch &= ~0x01;
  165. writeb(scratch, host->ioaddr + 0xC0);
  166. }
  167. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  168. {
  169. if (slot->chip->pdev->revision == 0) {
  170. u16 version;
  171. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  172. version = (version & SDHCI_VENDOR_VER_MASK) >>
  173. SDHCI_VENDOR_VER_SHIFT;
  174. /*
  175. * Older versions of the chip have lots of nasty glitches
  176. * in the ADMA engine. It's best just to avoid it
  177. * completely.
  178. */
  179. if (version < 0xAC)
  180. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  181. }
  182. /*
  183. * The secondary interface requires a bit set to get the
  184. * interrupts.
  185. */
  186. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  187. jmicron_enable_mmc(slot->host, 1);
  188. return 0;
  189. }
  190. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  191. {
  192. if (dead)
  193. return;
  194. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  195. jmicron_enable_mmc(slot->host, 0);
  196. }
  197. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  198. {
  199. int i;
  200. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  201. for (i = 0;i < chip->num_slots;i++)
  202. jmicron_enable_mmc(chip->slots[i]->host, 0);
  203. }
  204. return 0;
  205. }
  206. static int jmicron_resume(struct sdhci_pci_chip *chip)
  207. {
  208. int ret, i;
  209. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  210. for (i = 0;i < chip->num_slots;i++)
  211. jmicron_enable_mmc(chip->slots[i]->host, 1);
  212. }
  213. ret = jmicron_pmos(chip, 1);
  214. if (ret) {
  215. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  216. return ret;
  217. }
  218. return 0;
  219. }
  220. static const struct sdhci_pci_fixes sdhci_jmicron = {
  221. .probe = jmicron_probe,
  222. .probe_slot = jmicron_probe_slot,
  223. .remove_slot = jmicron_remove_slot,
  224. .suspend = jmicron_suspend,
  225. .resume = jmicron_resume,
  226. };
  227. /* SysKonnect CardBus2SDIO extra registers */
  228. #define SYSKT_CTRL 0x200
  229. #define SYSKT_RDFIFO_STAT 0x204
  230. #define SYSKT_WRFIFO_STAT 0x208
  231. #define SYSKT_POWER_DATA 0x20c
  232. #define SYSKT_POWER_330 0xef
  233. #define SYSKT_POWER_300 0xf8
  234. #define SYSKT_POWER_184 0xcc
  235. #define SYSKT_POWER_CMD 0x20d
  236. #define SYSKT_POWER_START (1 << 7)
  237. #define SYSKT_POWER_STATUS 0x20e
  238. #define SYSKT_POWER_STATUS_OK (1 << 0)
  239. #define SYSKT_BOARD_REV 0x210
  240. #define SYSKT_CHIP_REV 0x211
  241. #define SYSKT_CONF_DATA 0x212
  242. #define SYSKT_CONF_DATA_1V8 (1 << 2)
  243. #define SYSKT_CONF_DATA_2V5 (1 << 1)
  244. #define SYSKT_CONF_DATA_3V3 (1 << 0)
  245. static int syskt_probe(struct sdhci_pci_chip *chip)
  246. {
  247. if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  248. chip->pdev->class &= ~0x0000FF;
  249. chip->pdev->class |= PCI_SDHCI_IFDMA;
  250. }
  251. return 0;
  252. }
  253. static int syskt_probe_slot(struct sdhci_pci_slot *slot)
  254. {
  255. int tm, ps;
  256. u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
  257. u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
  258. dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
  259. "board rev %d.%d, chip rev %d.%d\n",
  260. board_rev >> 4, board_rev & 0xf,
  261. chip_rev >> 4, chip_rev & 0xf);
  262. if (chip_rev >= 0x20)
  263. slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
  264. writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
  265. writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
  266. udelay(50);
  267. tm = 10; /* Wait max 1 ms */
  268. do {
  269. ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
  270. if (ps & SYSKT_POWER_STATUS_OK)
  271. break;
  272. udelay(100);
  273. } while (--tm);
  274. if (!tm) {
  275. dev_err(&slot->chip->pdev->dev,
  276. "power regulator never stabilized");
  277. writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
  278. return -ENODEV;
  279. }
  280. return 0;
  281. }
  282. static const struct sdhci_pci_fixes sdhci_syskt = {
  283. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
  284. .probe = syskt_probe,
  285. .probe_slot = syskt_probe_slot,
  286. };
  287. static int via_probe(struct sdhci_pci_chip *chip)
  288. {
  289. if (chip->pdev->revision == 0x10)
  290. chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
  291. return 0;
  292. }
  293. static const struct sdhci_pci_fixes sdhci_via = {
  294. .probe = via_probe,
  295. };
  296. static const struct pci_device_id pci_ids[] __devinitdata = {
  297. {
  298. .vendor = PCI_VENDOR_ID_RICOH,
  299. .device = PCI_DEVICE_ID_RICOH_R5C822,
  300. .subvendor = PCI_ANY_ID,
  301. .subdevice = PCI_ANY_ID,
  302. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  303. },
  304. {
  305. .vendor = PCI_VENDOR_ID_ENE,
  306. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  307. .subvendor = PCI_ANY_ID,
  308. .subdevice = PCI_ANY_ID,
  309. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  310. },
  311. {
  312. .vendor = PCI_VENDOR_ID_ENE,
  313. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  314. .subvendor = PCI_ANY_ID,
  315. .subdevice = PCI_ANY_ID,
  316. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  317. },
  318. {
  319. .vendor = PCI_VENDOR_ID_ENE,
  320. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  321. .subvendor = PCI_ANY_ID,
  322. .subdevice = PCI_ANY_ID,
  323. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  324. },
  325. {
  326. .vendor = PCI_VENDOR_ID_ENE,
  327. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  328. .subvendor = PCI_ANY_ID,
  329. .subdevice = PCI_ANY_ID,
  330. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  331. },
  332. {
  333. .vendor = PCI_VENDOR_ID_MARVELL,
  334. .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
  335. .subvendor = PCI_ANY_ID,
  336. .subdevice = PCI_ANY_ID,
  337. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  338. },
  339. {
  340. .vendor = PCI_VENDOR_ID_JMICRON,
  341. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  342. .subvendor = PCI_ANY_ID,
  343. .subdevice = PCI_ANY_ID,
  344. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  345. },
  346. {
  347. .vendor = PCI_VENDOR_ID_JMICRON,
  348. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  349. .subvendor = PCI_ANY_ID,
  350. .subdevice = PCI_ANY_ID,
  351. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  352. },
  353. {
  354. .vendor = PCI_VENDOR_ID_SYSKONNECT,
  355. .device = 0x8000,
  356. .subvendor = PCI_ANY_ID,
  357. .subdevice = PCI_ANY_ID,
  358. .driver_data = (kernel_ulong_t)&sdhci_syskt,
  359. },
  360. {
  361. .vendor = PCI_VENDOR_ID_VIA,
  362. .device = 0x95d0,
  363. .subvendor = PCI_ANY_ID,
  364. .subdevice = PCI_ANY_ID,
  365. .driver_data = (kernel_ulong_t)&sdhci_via,
  366. },
  367. { /* Generic SD host controller */
  368. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  369. },
  370. { /* end: all zeroes */ },
  371. };
  372. MODULE_DEVICE_TABLE(pci, pci_ids);
  373. /*****************************************************************************\
  374. * *
  375. * SDHCI core callbacks *
  376. * *
  377. \*****************************************************************************/
  378. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  379. {
  380. struct sdhci_pci_slot *slot;
  381. struct pci_dev *pdev;
  382. int ret;
  383. slot = sdhci_priv(host);
  384. pdev = slot->chip->pdev;
  385. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  386. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  387. (host->flags & SDHCI_USE_SDMA)) {
  388. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  389. "doesn't fully claim to support it.\n");
  390. }
  391. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  392. if (ret)
  393. return ret;
  394. pci_set_master(pdev);
  395. return 0;
  396. }
  397. static struct sdhci_ops sdhci_pci_ops = {
  398. .enable_dma = sdhci_pci_enable_dma,
  399. };
  400. /*****************************************************************************\
  401. * *
  402. * Suspend/resume *
  403. * *
  404. \*****************************************************************************/
  405. #ifdef CONFIG_PM
  406. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  407. {
  408. struct sdhci_pci_chip *chip;
  409. struct sdhci_pci_slot *slot;
  410. int i, ret;
  411. chip = pci_get_drvdata(pdev);
  412. if (!chip)
  413. return 0;
  414. for (i = 0;i < chip->num_slots;i++) {
  415. slot = chip->slots[i];
  416. if (!slot)
  417. continue;
  418. ret = sdhci_suspend_host(slot->host, state);
  419. if (ret) {
  420. for (i--;i >= 0;i--)
  421. sdhci_resume_host(chip->slots[i]->host);
  422. return ret;
  423. }
  424. }
  425. if (chip->fixes && chip->fixes->suspend) {
  426. ret = chip->fixes->suspend(chip, state);
  427. if (ret) {
  428. for (i = chip->num_slots - 1;i >= 0;i--)
  429. sdhci_resume_host(chip->slots[i]->host);
  430. return ret;
  431. }
  432. }
  433. pci_save_state(pdev);
  434. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  435. pci_disable_device(pdev);
  436. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  437. return 0;
  438. }
  439. static int sdhci_pci_resume (struct pci_dev *pdev)
  440. {
  441. struct sdhci_pci_chip *chip;
  442. struct sdhci_pci_slot *slot;
  443. int i, ret;
  444. chip = pci_get_drvdata(pdev);
  445. if (!chip)
  446. return 0;
  447. pci_set_power_state(pdev, PCI_D0);
  448. pci_restore_state(pdev);
  449. ret = pci_enable_device(pdev);
  450. if (ret)
  451. return ret;
  452. if (chip->fixes && chip->fixes->resume) {
  453. ret = chip->fixes->resume(chip);
  454. if (ret)
  455. return ret;
  456. }
  457. for (i = 0;i < chip->num_slots;i++) {
  458. slot = chip->slots[i];
  459. if (!slot)
  460. continue;
  461. ret = sdhci_resume_host(slot->host);
  462. if (ret)
  463. return ret;
  464. }
  465. return 0;
  466. }
  467. #else /* CONFIG_PM */
  468. #define sdhci_pci_suspend NULL
  469. #define sdhci_pci_resume NULL
  470. #endif /* CONFIG_PM */
  471. /*****************************************************************************\
  472. * *
  473. * Device probing/removal *
  474. * *
  475. \*****************************************************************************/
  476. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  477. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  478. {
  479. struct sdhci_pci_slot *slot;
  480. struct sdhci_host *host;
  481. resource_size_t addr;
  482. int ret;
  483. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  484. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  485. return ERR_PTR(-ENODEV);
  486. }
  487. if (pci_resource_len(pdev, bar) != 0x100) {
  488. dev_err(&pdev->dev, "Invalid iomem size. You may "
  489. "experience problems.\n");
  490. }
  491. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  492. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  493. return ERR_PTR(-ENODEV);
  494. }
  495. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  496. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  497. return ERR_PTR(-ENODEV);
  498. }
  499. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  500. if (IS_ERR(host)) {
  501. dev_err(&pdev->dev, "cannot allocate host\n");
  502. return ERR_PTR(PTR_ERR(host));
  503. }
  504. slot = sdhci_priv(host);
  505. slot->chip = chip;
  506. slot->host = host;
  507. slot->pci_bar = bar;
  508. host->hw_name = "PCI";
  509. host->ops = &sdhci_pci_ops;
  510. host->quirks = chip->quirks;
  511. host->irq = pdev->irq;
  512. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  513. if (ret) {
  514. dev_err(&pdev->dev, "cannot request region\n");
  515. goto free;
  516. }
  517. addr = pci_resource_start(pdev, bar);
  518. host->ioaddr = pci_ioremap_bar(pdev, bar);
  519. if (!host->ioaddr) {
  520. dev_err(&pdev->dev, "failed to remap registers\n");
  521. goto release;
  522. }
  523. if (chip->fixes && chip->fixes->probe_slot) {
  524. ret = chip->fixes->probe_slot(slot);
  525. if (ret)
  526. goto unmap;
  527. }
  528. ret = sdhci_add_host(host);
  529. if (ret)
  530. goto remove;
  531. return slot;
  532. remove:
  533. if (chip->fixes && chip->fixes->remove_slot)
  534. chip->fixes->remove_slot(slot, 0);
  535. unmap:
  536. iounmap(host->ioaddr);
  537. release:
  538. pci_release_region(pdev, bar);
  539. free:
  540. sdhci_free_host(host);
  541. return ERR_PTR(ret);
  542. }
  543. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  544. {
  545. int dead;
  546. u32 scratch;
  547. dead = 0;
  548. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  549. if (scratch == (u32)-1)
  550. dead = 1;
  551. sdhci_remove_host(slot->host, dead);
  552. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  553. slot->chip->fixes->remove_slot(slot, dead);
  554. pci_release_region(slot->chip->pdev, slot->pci_bar);
  555. sdhci_free_host(slot->host);
  556. }
  557. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  558. const struct pci_device_id *ent)
  559. {
  560. struct sdhci_pci_chip *chip;
  561. struct sdhci_pci_slot *slot;
  562. u8 slots, rev, first_bar;
  563. int ret, i;
  564. BUG_ON(pdev == NULL);
  565. BUG_ON(ent == NULL);
  566. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  567. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  568. (int)pdev->vendor, (int)pdev->device, (int)rev);
  569. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  570. if (ret)
  571. return ret;
  572. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  573. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  574. if (slots == 0)
  575. return -ENODEV;
  576. BUG_ON(slots > MAX_SLOTS);
  577. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  578. if (ret)
  579. return ret;
  580. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  581. if (first_bar > 5) {
  582. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  583. return -ENODEV;
  584. }
  585. ret = pci_enable_device(pdev);
  586. if (ret)
  587. return ret;
  588. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  589. if (!chip) {
  590. ret = -ENOMEM;
  591. goto err;
  592. }
  593. chip->pdev = pdev;
  594. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  595. if (chip->fixes)
  596. chip->quirks = chip->fixes->quirks;
  597. chip->num_slots = slots;
  598. pci_set_drvdata(pdev, chip);
  599. if (chip->fixes && chip->fixes->probe) {
  600. ret = chip->fixes->probe(chip);
  601. if (ret)
  602. goto free;
  603. }
  604. for (i = 0;i < slots;i++) {
  605. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  606. if (IS_ERR(slot)) {
  607. for (i--;i >= 0;i--)
  608. sdhci_pci_remove_slot(chip->slots[i]);
  609. ret = PTR_ERR(slot);
  610. goto free;
  611. }
  612. chip->slots[i] = slot;
  613. }
  614. return 0;
  615. free:
  616. pci_set_drvdata(pdev, NULL);
  617. kfree(chip);
  618. err:
  619. pci_disable_device(pdev);
  620. return ret;
  621. }
  622. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  623. {
  624. int i;
  625. struct sdhci_pci_chip *chip;
  626. chip = pci_get_drvdata(pdev);
  627. if (chip) {
  628. for (i = 0;i < chip->num_slots; i++)
  629. sdhci_pci_remove_slot(chip->slots[i]);
  630. pci_set_drvdata(pdev, NULL);
  631. kfree(chip);
  632. }
  633. pci_disable_device(pdev);
  634. }
  635. static struct pci_driver sdhci_driver = {
  636. .name = "sdhci-pci",
  637. .id_table = pci_ids,
  638. .probe = sdhci_pci_probe,
  639. .remove = __devexit_p(sdhci_pci_remove),
  640. .suspend = sdhci_pci_suspend,
  641. .resume = sdhci_pci_resume,
  642. };
  643. /*****************************************************************************\
  644. * *
  645. * Driver init/exit *
  646. * *
  647. \*****************************************************************************/
  648. static int __init sdhci_drv_init(void)
  649. {
  650. return pci_register_driver(&sdhci_driver);
  651. }
  652. static void __exit sdhci_drv_exit(void)
  653. {
  654. pci_unregister_driver(&sdhci_driver);
  655. }
  656. module_init(sdhci_drv_init);
  657. module_exit(sdhci_drv_exit);
  658. MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
  659. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  660. MODULE_LICENSE("GPL");