grumain.c 26 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
  5. *
  6. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/mm.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sched.h>
  27. #include <linux/device.h>
  28. #include <linux/list.h>
  29. #include <linux/err.h>
  30. #include <asm/uv/uv_hub.h>
  31. #include "gru.h"
  32. #include "grutables.h"
  33. #include "gruhandles.h"
  34. unsigned long gru_options __read_mostly;
  35. static struct device_driver gru_driver = {
  36. .name = "gru"
  37. };
  38. static struct device gru_device = {
  39. .init_name = "",
  40. .driver = &gru_driver,
  41. };
  42. struct device *grudev = &gru_device;
  43. /*
  44. * Select a gru fault map to be used by the current cpu. Note that
  45. * multiple cpus may be using the same map.
  46. * ZZZ should be inline but did not work on emulator
  47. */
  48. int gru_cpu_fault_map_id(void)
  49. {
  50. #ifdef CONFIG_IA64
  51. return uv_blade_processor_id() % GRU_NUM_TFM;
  52. #else
  53. int cpu = smp_processor_id();
  54. int id, core;
  55. core = uv_cpu_core_number(cpu);
  56. id = core + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
  57. return id;
  58. #endif
  59. }
  60. /*--------- ASID Management -------------------------------------------
  61. *
  62. * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
  63. * Once MAX is reached, flush the TLB & start over. However,
  64. * some asids may still be in use. There won't be many (percentage wise) still
  65. * in use. Search active contexts & determine the value of the first
  66. * asid in use ("x"s below). Set "limit" to this value.
  67. * This defines a block of assignable asids.
  68. *
  69. * When "limit" is reached, search forward from limit+1 and determine the
  70. * next block of assignable asids.
  71. *
  72. * Repeat until MAX_ASID is reached, then start over again.
  73. *
  74. * Each time MAX_ASID is reached, increment the asid generation. Since
  75. * the search for in-use asids only checks contexts with GRUs currently
  76. * assigned, asids in some contexts will be missed. Prior to loading
  77. * a context, the asid generation of the GTS asid is rechecked. If it
  78. * doesn't match the current generation, a new asid will be assigned.
  79. *
  80. * 0---------------x------------x---------------------x----|
  81. * ^-next ^-limit ^-MAX_ASID
  82. *
  83. * All asid manipulation & context loading/unloading is protected by the
  84. * gs_lock.
  85. */
  86. /* Hit the asid limit. Start over */
  87. static int gru_wrap_asid(struct gru_state *gru)
  88. {
  89. gru_dbg(grudev, "gid %d\n", gru->gs_gid);
  90. STAT(asid_wrap);
  91. gru->gs_asid_gen++;
  92. return MIN_ASID;
  93. }
  94. /* Find the next chunk of unused asids */
  95. static int gru_reset_asid_limit(struct gru_state *gru, int asid)
  96. {
  97. int i, gid, inuse_asid, limit;
  98. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  99. STAT(asid_next);
  100. limit = MAX_ASID;
  101. if (asid >= limit)
  102. asid = gru_wrap_asid(gru);
  103. gru_flush_all_tlb(gru);
  104. gid = gru->gs_gid;
  105. again:
  106. for (i = 0; i < GRU_NUM_CCH; i++) {
  107. if (!gru->gs_gts[i] || is_kernel_context(gru->gs_gts[i]))
  108. continue;
  109. inuse_asid = gru->gs_gts[i]->ts_gms->ms_asids[gid].mt_asid;
  110. gru_dbg(grudev, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
  111. gru->gs_gid, gru->gs_gts[i], gru->gs_gts[i]->ts_gms,
  112. inuse_asid, i);
  113. if (inuse_asid == asid) {
  114. asid += ASID_INC;
  115. if (asid >= limit) {
  116. /*
  117. * empty range: reset the range limit and
  118. * start over
  119. */
  120. limit = MAX_ASID;
  121. if (asid >= MAX_ASID)
  122. asid = gru_wrap_asid(gru);
  123. goto again;
  124. }
  125. }
  126. if ((inuse_asid > asid) && (inuse_asid < limit))
  127. limit = inuse_asid;
  128. }
  129. gru->gs_asid_limit = limit;
  130. gru->gs_asid = asid;
  131. gru_dbg(grudev, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru->gs_gid,
  132. asid, limit);
  133. return asid;
  134. }
  135. /* Assign a new ASID to a thread context. */
  136. static int gru_assign_asid(struct gru_state *gru)
  137. {
  138. int asid;
  139. gru->gs_asid += ASID_INC;
  140. asid = gru->gs_asid;
  141. if (asid >= gru->gs_asid_limit)
  142. asid = gru_reset_asid_limit(gru, asid);
  143. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  144. return asid;
  145. }
  146. /*
  147. * Clear n bits in a word. Return a word indicating the bits that were cleared.
  148. * Optionally, build an array of chars that contain the bit numbers allocated.
  149. */
  150. static unsigned long reserve_resources(unsigned long *p, int n, int mmax,
  151. char *idx)
  152. {
  153. unsigned long bits = 0;
  154. int i;
  155. while (n--) {
  156. i = find_first_bit(p, mmax);
  157. if (i == mmax)
  158. BUG();
  159. __clear_bit(i, p);
  160. __set_bit(i, &bits);
  161. if (idx)
  162. *idx++ = i;
  163. }
  164. return bits;
  165. }
  166. unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,
  167. char *cbmap)
  168. {
  169. return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,
  170. cbmap);
  171. }
  172. unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,
  173. char *dsmap)
  174. {
  175. return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,
  176. dsmap);
  177. }
  178. static void reserve_gru_resources(struct gru_state *gru,
  179. struct gru_thread_state *gts)
  180. {
  181. gru->gs_active_contexts++;
  182. gts->ts_cbr_map =
  183. gru_reserve_cb_resources(gru, gts->ts_cbr_au_count,
  184. gts->ts_cbr_idx);
  185. gts->ts_dsr_map =
  186. gru_reserve_ds_resources(gru, gts->ts_dsr_au_count, NULL);
  187. }
  188. static void free_gru_resources(struct gru_state *gru,
  189. struct gru_thread_state *gts)
  190. {
  191. gru->gs_active_contexts--;
  192. gru->gs_cbr_map |= gts->ts_cbr_map;
  193. gru->gs_dsr_map |= gts->ts_dsr_map;
  194. }
  195. /*
  196. * Check if a GRU has sufficient free resources to satisfy an allocation
  197. * request. Note: GRU locks may or may not be held when this is called. If
  198. * not held, recheck after acquiring the appropriate locks.
  199. *
  200. * Returns 1 if sufficient resources, 0 if not
  201. */
  202. static int check_gru_resources(struct gru_state *gru, int cbr_au_count,
  203. int dsr_au_count, int max_active_contexts)
  204. {
  205. return hweight64(gru->gs_cbr_map) >= cbr_au_count
  206. && hweight64(gru->gs_dsr_map) >= dsr_au_count
  207. && gru->gs_active_contexts < max_active_contexts;
  208. }
  209. /*
  210. * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
  211. * context.
  212. */
  213. static int gru_load_mm_tracker(struct gru_state *gru,
  214. struct gru_thread_state *gts)
  215. {
  216. struct gru_mm_struct *gms = gts->ts_gms;
  217. struct gru_mm_tracker *asids = &gms->ms_asids[gru->gs_gid];
  218. unsigned short ctxbitmap = (1 << gts->ts_ctxnum);
  219. int asid;
  220. spin_lock(&gms->ms_asid_lock);
  221. asid = asids->mt_asid;
  222. spin_lock(&gru->gs_asid_lock);
  223. if (asid == 0 || (asids->mt_ctxbitmap == 0 && asids->mt_asid_gen !=
  224. gru->gs_asid_gen)) {
  225. asid = gru_assign_asid(gru);
  226. asids->mt_asid = asid;
  227. asids->mt_asid_gen = gru->gs_asid_gen;
  228. STAT(asid_new);
  229. } else {
  230. STAT(asid_reuse);
  231. }
  232. spin_unlock(&gru->gs_asid_lock);
  233. BUG_ON(asids->mt_ctxbitmap & ctxbitmap);
  234. asids->mt_ctxbitmap |= ctxbitmap;
  235. if (!test_bit(gru->gs_gid, gms->ms_asidmap))
  236. __set_bit(gru->gs_gid, gms->ms_asidmap);
  237. spin_unlock(&gms->ms_asid_lock);
  238. gru_dbg(grudev,
  239. "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
  240. gru->gs_gid, gts, gms, gts->ts_ctxnum, asid,
  241. gms->ms_asidmap[0]);
  242. return asid;
  243. }
  244. static void gru_unload_mm_tracker(struct gru_state *gru,
  245. struct gru_thread_state *gts)
  246. {
  247. struct gru_mm_struct *gms = gts->ts_gms;
  248. struct gru_mm_tracker *asids;
  249. unsigned short ctxbitmap;
  250. asids = &gms->ms_asids[gru->gs_gid];
  251. ctxbitmap = (1 << gts->ts_ctxnum);
  252. spin_lock(&gms->ms_asid_lock);
  253. spin_lock(&gru->gs_asid_lock);
  254. BUG_ON((asids->mt_ctxbitmap & ctxbitmap) != ctxbitmap);
  255. asids->mt_ctxbitmap ^= ctxbitmap;
  256. gru_dbg(grudev, "gid %d, gts %p, gms %p, ctxnum 0x%d, asidmap 0x%lx\n",
  257. gru->gs_gid, gts, gms, gts->ts_ctxnum, gms->ms_asidmap[0]);
  258. spin_unlock(&gru->gs_asid_lock);
  259. spin_unlock(&gms->ms_asid_lock);
  260. }
  261. /*
  262. * Decrement the reference count on a GTS structure. Free the structure
  263. * if the reference count goes to zero.
  264. */
  265. void gts_drop(struct gru_thread_state *gts)
  266. {
  267. if (gts && atomic_dec_return(&gts->ts_refcnt) == 0) {
  268. if (gts->ts_gms)
  269. gru_drop_mmu_notifier(gts->ts_gms);
  270. kfree(gts);
  271. STAT(gts_free);
  272. }
  273. }
  274. /*
  275. * Locate the GTS structure for the current thread.
  276. */
  277. static struct gru_thread_state *gru_find_current_gts_nolock(struct gru_vma_data
  278. *vdata, int tsid)
  279. {
  280. struct gru_thread_state *gts;
  281. list_for_each_entry(gts, &vdata->vd_head, ts_next)
  282. if (gts->ts_tsid == tsid)
  283. return gts;
  284. return NULL;
  285. }
  286. /*
  287. * Allocate a thread state structure.
  288. */
  289. struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
  290. int cbr_au_count, int dsr_au_count,
  291. unsigned char tlb_preload_count, int options, int tsid)
  292. {
  293. struct gru_thread_state *gts;
  294. struct gru_mm_struct *gms;
  295. int bytes;
  296. bytes = DSR_BYTES(dsr_au_count) + CBR_BYTES(cbr_au_count);
  297. bytes += sizeof(struct gru_thread_state);
  298. gts = kmalloc(bytes, GFP_KERNEL);
  299. if (!gts)
  300. return ERR_PTR(-ENOMEM);
  301. STAT(gts_alloc);
  302. memset(gts, 0, sizeof(struct gru_thread_state)); /* zero out header */
  303. atomic_set(&gts->ts_refcnt, 1);
  304. mutex_init(&gts->ts_ctxlock);
  305. gts->ts_cbr_au_count = cbr_au_count;
  306. gts->ts_dsr_au_count = dsr_au_count;
  307. gts->ts_tlb_preload_count = tlb_preload_count;
  308. gts->ts_user_options = options;
  309. gts->ts_user_blade_id = -1;
  310. gts->ts_user_chiplet_id = -1;
  311. gts->ts_tsid = tsid;
  312. gts->ts_ctxnum = NULLCTX;
  313. gts->ts_tlb_int_select = -1;
  314. gts->ts_cch_req_slice = -1;
  315. gts->ts_sizeavail = GRU_SIZEAVAIL(PAGE_SHIFT);
  316. if (vma) {
  317. gts->ts_mm = current->mm;
  318. gts->ts_vma = vma;
  319. gms = gru_register_mmu_notifier();
  320. if (IS_ERR(gms))
  321. goto err;
  322. gts->ts_gms = gms;
  323. }
  324. gru_dbg(grudev, "alloc gts %p\n", gts);
  325. return gts;
  326. err:
  327. gts_drop(gts);
  328. return ERR_CAST(gms);
  329. }
  330. /*
  331. * Allocate a vma private data structure.
  332. */
  333. struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma, int tsid)
  334. {
  335. struct gru_vma_data *vdata = NULL;
  336. vdata = kmalloc(sizeof(*vdata), GFP_KERNEL);
  337. if (!vdata)
  338. return NULL;
  339. STAT(vdata_alloc);
  340. INIT_LIST_HEAD(&vdata->vd_head);
  341. spin_lock_init(&vdata->vd_lock);
  342. gru_dbg(grudev, "alloc vdata %p\n", vdata);
  343. return vdata;
  344. }
  345. /*
  346. * Find the thread state structure for the current thread.
  347. */
  348. struct gru_thread_state *gru_find_thread_state(struct vm_area_struct *vma,
  349. int tsid)
  350. {
  351. struct gru_vma_data *vdata = vma->vm_private_data;
  352. struct gru_thread_state *gts;
  353. spin_lock(&vdata->vd_lock);
  354. gts = gru_find_current_gts_nolock(vdata, tsid);
  355. spin_unlock(&vdata->vd_lock);
  356. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  357. return gts;
  358. }
  359. /*
  360. * Allocate a new thread state for a GSEG. Note that races may allow
  361. * another thread to race to create a gts.
  362. */
  363. struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct *vma,
  364. int tsid)
  365. {
  366. struct gru_vma_data *vdata = vma->vm_private_data;
  367. struct gru_thread_state *gts, *ngts;
  368. gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count,
  369. vdata->vd_dsr_au_count,
  370. vdata->vd_tlb_preload_count,
  371. vdata->vd_user_options, tsid);
  372. if (IS_ERR(gts))
  373. return gts;
  374. spin_lock(&vdata->vd_lock);
  375. ngts = gru_find_current_gts_nolock(vdata, tsid);
  376. if (ngts) {
  377. gts_drop(gts);
  378. gts = ngts;
  379. STAT(gts_double_allocate);
  380. } else {
  381. list_add(&gts->ts_next, &vdata->vd_head);
  382. }
  383. spin_unlock(&vdata->vd_lock);
  384. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  385. return gts;
  386. }
  387. /*
  388. * Free the GRU context assigned to the thread state.
  389. */
  390. static void gru_free_gru_context(struct gru_thread_state *gts)
  391. {
  392. struct gru_state *gru;
  393. gru = gts->ts_gru;
  394. gru_dbg(grudev, "gts %p, gid %d\n", gts, gru->gs_gid);
  395. spin_lock(&gru->gs_lock);
  396. gru->gs_gts[gts->ts_ctxnum] = NULL;
  397. free_gru_resources(gru, gts);
  398. BUG_ON(test_bit(gts->ts_ctxnum, &gru->gs_context_map) == 0);
  399. __clear_bit(gts->ts_ctxnum, &gru->gs_context_map);
  400. gts->ts_ctxnum = NULLCTX;
  401. gts->ts_gru = NULL;
  402. gts->ts_blade = -1;
  403. spin_unlock(&gru->gs_lock);
  404. gts_drop(gts);
  405. STAT(free_context);
  406. }
  407. /*
  408. * Prefetching cachelines help hardware performance.
  409. * (Strictly a performance enhancement. Not functionally required).
  410. */
  411. static void prefetch_data(void *p, int num, int stride)
  412. {
  413. while (num-- > 0) {
  414. prefetchw(p);
  415. p += stride;
  416. }
  417. }
  418. static inline long gru_copy_handle(void *d, void *s)
  419. {
  420. memcpy(d, s, GRU_HANDLE_BYTES);
  421. return GRU_HANDLE_BYTES;
  422. }
  423. static void gru_prefetch_context(void *gseg, void *cb, void *cbe,
  424. unsigned long cbrmap, unsigned long length)
  425. {
  426. int i, scr;
  427. prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES,
  428. GRU_CACHE_LINE_BYTES);
  429. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  430. prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES);
  431. prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1,
  432. GRU_CACHE_LINE_BYTES);
  433. cb += GRU_HANDLE_STRIDE;
  434. }
  435. }
  436. static void gru_load_context_data(void *save, void *grubase, int ctxnum,
  437. unsigned long cbrmap, unsigned long dsrmap,
  438. int data_valid)
  439. {
  440. void *gseg, *cb, *cbe;
  441. unsigned long length;
  442. int i, scr;
  443. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  444. cb = gseg + GRU_CB_BASE;
  445. cbe = grubase + GRU_CBE_BASE;
  446. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  447. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  448. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  449. if (data_valid) {
  450. save += gru_copy_handle(cb, save);
  451. save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE,
  452. save);
  453. } else {
  454. memset(cb, 0, GRU_CACHE_LINE_BYTES);
  455. memset(cbe + i * GRU_HANDLE_STRIDE, 0,
  456. GRU_CACHE_LINE_BYTES);
  457. }
  458. /* Flush CBE to hide race in context restart */
  459. mb();
  460. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  461. cb += GRU_HANDLE_STRIDE;
  462. }
  463. if (data_valid)
  464. memcpy(gseg + GRU_DS_BASE, save, length);
  465. else
  466. memset(gseg + GRU_DS_BASE, 0, length);
  467. }
  468. static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
  469. unsigned long cbrmap, unsigned long dsrmap)
  470. {
  471. void *gseg, *cb, *cbe;
  472. unsigned long length;
  473. int i, scr;
  474. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  475. cb = gseg + GRU_CB_BASE;
  476. cbe = grubase + GRU_CBE_BASE;
  477. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  478. /* CBEs may not be coherent. Flush them from cache */
  479. for_each_cbr_in_allocation_map(i, &cbrmap, scr)
  480. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  481. mb(); /* Let the CL flush complete */
  482. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  483. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  484. save += gru_copy_handle(save, cb);
  485. save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE);
  486. cb += GRU_HANDLE_STRIDE;
  487. }
  488. memcpy(save, gseg + GRU_DS_BASE, length);
  489. }
  490. void gru_unload_context(struct gru_thread_state *gts, int savestate)
  491. {
  492. struct gru_state *gru = gts->ts_gru;
  493. struct gru_context_configuration_handle *cch;
  494. int ctxnum = gts->ts_ctxnum;
  495. if (!is_kernel_context(gts))
  496. zap_vma_ptes(gts->ts_vma, UGRUADDR(gts), GRU_GSEG_PAGESIZE);
  497. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  498. gru_dbg(grudev, "gts %p, cbrmap 0x%lx, dsrmap 0x%lx\n",
  499. gts, gts->ts_cbr_map, gts->ts_dsr_map);
  500. lock_cch_handle(cch);
  501. if (cch_interrupt_sync(cch))
  502. BUG();
  503. if (!is_kernel_context(gts))
  504. gru_unload_mm_tracker(gru, gts);
  505. if (savestate) {
  506. gru_unload_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr,
  507. ctxnum, gts->ts_cbr_map,
  508. gts->ts_dsr_map);
  509. gts->ts_data_valid = 1;
  510. }
  511. if (cch_deallocate(cch))
  512. BUG();
  513. unlock_cch_handle(cch);
  514. gru_free_gru_context(gts);
  515. }
  516. /*
  517. * Load a GRU context by copying it from the thread data structure in memory
  518. * to the GRU.
  519. */
  520. void gru_load_context(struct gru_thread_state *gts)
  521. {
  522. struct gru_state *gru = gts->ts_gru;
  523. struct gru_context_configuration_handle *cch;
  524. int i, err, asid, ctxnum = gts->ts_ctxnum;
  525. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  526. lock_cch_handle(cch);
  527. cch->tfm_fault_bit_enable =
  528. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  529. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  530. cch->tlb_int_enable = (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  531. if (cch->tlb_int_enable) {
  532. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  533. cch->tlb_int_select = gts->ts_tlb_int_select;
  534. }
  535. if (gts->ts_cch_req_slice >= 0) {
  536. cch->req_slice_set_enable = 1;
  537. cch->req_slice = gts->ts_cch_req_slice;
  538. } else {
  539. cch->req_slice_set_enable =0;
  540. }
  541. cch->tfm_done_bit_enable = 0;
  542. cch->dsr_allocation_map = gts->ts_dsr_map;
  543. cch->cbr_allocation_map = gts->ts_cbr_map;
  544. if (is_kernel_context(gts)) {
  545. cch->unmap_enable = 1;
  546. cch->tfm_done_bit_enable = 1;
  547. cch->cb_int_enable = 1;
  548. cch->tlb_int_select = 0; /* For now, ints go to cpu 0 */
  549. } else {
  550. cch->unmap_enable = 0;
  551. cch->tfm_done_bit_enable = 0;
  552. cch->cb_int_enable = 0;
  553. asid = gru_load_mm_tracker(gru, gts);
  554. for (i = 0; i < 8; i++) {
  555. cch->asid[i] = asid + i;
  556. cch->sizeavail[i] = gts->ts_sizeavail;
  557. }
  558. }
  559. err = cch_allocate(cch);
  560. if (err) {
  561. gru_dbg(grudev,
  562. "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
  563. err, cch, gts, gts->ts_cbr_map, gts->ts_dsr_map);
  564. BUG();
  565. }
  566. gru_load_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr, ctxnum,
  567. gts->ts_cbr_map, gts->ts_dsr_map, gts->ts_data_valid);
  568. if (cch_start(cch))
  569. BUG();
  570. unlock_cch_handle(cch);
  571. gru_dbg(grudev, "gid %d, gts %p, cbrmap 0x%lx, dsrmap 0x%lx, tie %d, tis %d\n",
  572. gts->ts_gru->gs_gid, gts, gts->ts_cbr_map, gts->ts_dsr_map,
  573. (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR), gts->ts_tlb_int_select);
  574. }
  575. /*
  576. * Update fields in an active CCH:
  577. * - retarget interrupts on local blade
  578. * - update sizeavail mask
  579. */
  580. int gru_update_cch(struct gru_thread_state *gts)
  581. {
  582. struct gru_context_configuration_handle *cch;
  583. struct gru_state *gru = gts->ts_gru;
  584. int i, ctxnum = gts->ts_ctxnum, ret = 0;
  585. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  586. lock_cch_handle(cch);
  587. if (cch->state == CCHSTATE_ACTIVE) {
  588. if (gru->gs_gts[gts->ts_ctxnum] != gts)
  589. goto exit;
  590. if (cch_interrupt(cch))
  591. BUG();
  592. for (i = 0; i < 8; i++)
  593. cch->sizeavail[i] = gts->ts_sizeavail;
  594. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  595. cch->tlb_int_select = gru_cpu_fault_map_id();
  596. cch->tfm_fault_bit_enable =
  597. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  598. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  599. if (cch_start(cch))
  600. BUG();
  601. ret = 1;
  602. }
  603. exit:
  604. unlock_cch_handle(cch);
  605. return ret;
  606. }
  607. /*
  608. * Update CCH tlb interrupt select. Required when all the following is true:
  609. * - task's GRU context is loaded into a GRU
  610. * - task is using interrupt notification for TLB faults
  611. * - task has migrated to a different cpu on the same blade where
  612. * it was previously running.
  613. */
  614. static int gru_retarget_intr(struct gru_thread_state *gts)
  615. {
  616. if (gts->ts_tlb_int_select < 0
  617. || gts->ts_tlb_int_select == gru_cpu_fault_map_id())
  618. return 0;
  619. gru_dbg(grudev, "retarget from %d to %d\n", gts->ts_tlb_int_select,
  620. gru_cpu_fault_map_id());
  621. return gru_update_cch(gts);
  622. }
  623. /*
  624. * Check if a GRU context is allowed to use a specific chiplet. By default
  625. * a context is assigned to any blade-local chiplet. However, users can
  626. * override this.
  627. * Returns 1 if assignment allowed, 0 otherwise
  628. */
  629. static int gru_check_chiplet_assignment(struct gru_state *gru,
  630. struct gru_thread_state *gts)
  631. {
  632. int blade_id;
  633. int chiplet_id;
  634. blade_id = gts->ts_user_blade_id;
  635. if (blade_id < 0)
  636. blade_id = uv_numa_blade_id();
  637. chiplet_id = gts->ts_user_chiplet_id;
  638. return gru->gs_blade_id == blade_id &&
  639. (chiplet_id < 0 || chiplet_id == gru->gs_chiplet_id);
  640. }
  641. /*
  642. * Unload the gru context if it is not assigned to the correct blade or
  643. * chiplet. Misassignment can occur if the process migrates to a different
  644. * blade or if the user changes the selected blade/chiplet.
  645. */
  646. void gru_check_context_placement(struct gru_thread_state *gts)
  647. {
  648. struct gru_state *gru;
  649. /*
  650. * If the current task is the context owner, verify that the
  651. * context is correctly placed. This test is skipped for non-owner
  652. * references. Pthread apps use non-owner references to the CBRs.
  653. */
  654. gru = gts->ts_gru;
  655. if (!gru || gts->ts_tgid_owner != current->tgid)
  656. return;
  657. if (!gru_check_chiplet_assignment(gru, gts)) {
  658. STAT(check_context_unload);
  659. gru_unload_context(gts, 1);
  660. } else if (gru_retarget_intr(gts)) {
  661. STAT(check_context_retarget_intr);
  662. }
  663. }
  664. /*
  665. * Insufficient GRU resources available on the local blade. Steal a context from
  666. * a process. This is a hack until a _real_ resource scheduler is written....
  667. */
  668. #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
  669. #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
  670. ((g)+1) : &(b)->bs_grus[0])
  671. static int is_gts_stealable(struct gru_thread_state *gts,
  672. struct gru_blade_state *bs)
  673. {
  674. if (is_kernel_context(gts))
  675. return down_write_trylock(&bs->bs_kgts_sema);
  676. else
  677. return mutex_trylock(&gts->ts_ctxlock);
  678. }
  679. static void gts_stolen(struct gru_thread_state *gts,
  680. struct gru_blade_state *bs)
  681. {
  682. if (is_kernel_context(gts)) {
  683. up_write(&bs->bs_kgts_sema);
  684. STAT(steal_kernel_context);
  685. } else {
  686. mutex_unlock(&gts->ts_ctxlock);
  687. STAT(steal_user_context);
  688. }
  689. }
  690. void gru_steal_context(struct gru_thread_state *gts)
  691. {
  692. struct gru_blade_state *blade;
  693. struct gru_state *gru, *gru0;
  694. struct gru_thread_state *ngts = NULL;
  695. int ctxnum, ctxnum0, flag = 0, cbr, dsr;
  696. int blade_id;
  697. blade_id = gts->ts_user_blade_id;
  698. if (blade_id < 0)
  699. blade_id = uv_numa_blade_id();
  700. cbr = gts->ts_cbr_au_count;
  701. dsr = gts->ts_dsr_au_count;
  702. blade = gru_base[blade_id];
  703. spin_lock(&blade->bs_lock);
  704. ctxnum = next_ctxnum(blade->bs_lru_ctxnum);
  705. gru = blade->bs_lru_gru;
  706. if (ctxnum == 0)
  707. gru = next_gru(blade, gru);
  708. blade->bs_lru_gru = gru;
  709. blade->bs_lru_ctxnum = ctxnum;
  710. ctxnum0 = ctxnum;
  711. gru0 = gru;
  712. while (1) {
  713. if (gru_check_chiplet_assignment(gru, gts)) {
  714. if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
  715. break;
  716. spin_lock(&gru->gs_lock);
  717. for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
  718. if (flag && gru == gru0 && ctxnum == ctxnum0)
  719. break;
  720. ngts = gru->gs_gts[ctxnum];
  721. /*
  722. * We are grabbing locks out of order, so trylock is
  723. * needed. GTSs are usually not locked, so the odds of
  724. * success are high. If trylock fails, try to steal a
  725. * different GSEG.
  726. */
  727. if (ngts && is_gts_stealable(ngts, blade))
  728. break;
  729. ngts = NULL;
  730. }
  731. spin_unlock(&gru->gs_lock);
  732. if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
  733. break;
  734. }
  735. if (flag && gru == gru0)
  736. break;
  737. flag = 1;
  738. ctxnum = 0;
  739. gru = next_gru(blade, gru);
  740. }
  741. spin_unlock(&blade->bs_lock);
  742. if (ngts) {
  743. gts->ustats.context_stolen++;
  744. ngts->ts_steal_jiffies = jiffies;
  745. gru_unload_context(ngts, is_kernel_context(ngts) ? 0 : 1);
  746. gts_stolen(ngts, blade);
  747. } else {
  748. STAT(steal_context_failed);
  749. }
  750. gru_dbg(grudev,
  751. "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
  752. " avail cb %ld, ds %ld\n",
  753. gru->gs_gid, ctxnum, ngts, cbr, dsr, hweight64(gru->gs_cbr_map),
  754. hweight64(gru->gs_dsr_map));
  755. }
  756. /*
  757. * Assign a gru context.
  758. */
  759. static int gru_assign_context_number(struct gru_state *gru)
  760. {
  761. int ctxnum;
  762. ctxnum = find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
  763. __set_bit(ctxnum, &gru->gs_context_map);
  764. return ctxnum;
  765. }
  766. /*
  767. * Scan the GRUs on the local blade & assign a GRU context.
  768. */
  769. struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts)
  770. {
  771. struct gru_state *gru, *grux;
  772. int i, max_active_contexts;
  773. int blade_id = gts->ts_user_blade_id;
  774. if (blade_id < 0)
  775. blade_id = uv_numa_blade_id();
  776. again:
  777. gru = NULL;
  778. max_active_contexts = GRU_NUM_CCH;
  779. for_each_gru_on_blade(grux, blade_id, i) {
  780. if (!gru_check_chiplet_assignment(grux, gts))
  781. continue;
  782. if (check_gru_resources(grux, gts->ts_cbr_au_count,
  783. gts->ts_dsr_au_count,
  784. max_active_contexts)) {
  785. gru = grux;
  786. max_active_contexts = grux->gs_active_contexts;
  787. if (max_active_contexts == 0)
  788. break;
  789. }
  790. }
  791. if (gru) {
  792. spin_lock(&gru->gs_lock);
  793. if (!check_gru_resources(gru, gts->ts_cbr_au_count,
  794. gts->ts_dsr_au_count, GRU_NUM_CCH)) {
  795. spin_unlock(&gru->gs_lock);
  796. goto again;
  797. }
  798. reserve_gru_resources(gru, gts);
  799. gts->ts_gru = gru;
  800. gts->ts_blade = gru->gs_blade_id;
  801. gts->ts_ctxnum = gru_assign_context_number(gru);
  802. atomic_inc(&gts->ts_refcnt);
  803. gru->gs_gts[gts->ts_ctxnum] = gts;
  804. spin_unlock(&gru->gs_lock);
  805. STAT(assign_context);
  806. gru_dbg(grudev,
  807. "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
  808. gseg_virtual_address(gts->ts_gru, gts->ts_ctxnum), gts,
  809. gts->ts_gru->gs_gid, gts->ts_ctxnum,
  810. gts->ts_cbr_au_count, gts->ts_dsr_au_count);
  811. } else {
  812. gru_dbg(grudev, "failed to allocate a GTS %s\n", "");
  813. STAT(assign_context_failed);
  814. }
  815. return gru;
  816. }
  817. /*
  818. * gru_nopage
  819. *
  820. * Map the user's GRU segment
  821. *
  822. * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
  823. */
  824. int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  825. {
  826. struct gru_thread_state *gts;
  827. unsigned long paddr, vaddr;
  828. vaddr = (unsigned long)vmf->virtual_address;
  829. gru_dbg(grudev, "vma %p, vaddr 0x%lx (0x%lx)\n",
  830. vma, vaddr, GSEG_BASE(vaddr));
  831. STAT(nopfn);
  832. /* The following check ensures vaddr is a valid address in the VMA */
  833. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  834. if (!gts)
  835. return VM_FAULT_SIGBUS;
  836. again:
  837. mutex_lock(&gts->ts_ctxlock);
  838. preempt_disable();
  839. gru_check_context_placement(gts);
  840. if (!gts->ts_gru) {
  841. STAT(load_user_context);
  842. if (!gru_assign_gru_context(gts)) {
  843. preempt_enable();
  844. mutex_unlock(&gts->ts_ctxlock);
  845. set_current_state(TASK_INTERRUPTIBLE);
  846. schedule_timeout(GRU_ASSIGN_DELAY); /* true hack ZZZ */
  847. if (gts->ts_steal_jiffies + GRU_STEAL_DELAY < jiffies)
  848. gru_steal_context(gts);
  849. goto again;
  850. }
  851. gru_load_context(gts);
  852. paddr = gseg_physical_address(gts->ts_gru, gts->ts_ctxnum);
  853. remap_pfn_range(vma, vaddr & ~(GRU_GSEG_PAGESIZE - 1),
  854. paddr >> PAGE_SHIFT, GRU_GSEG_PAGESIZE,
  855. vma->vm_page_prot);
  856. }
  857. preempt_enable();
  858. mutex_unlock(&gts->ts_ctxlock);
  859. return VM_FAULT_NOPAGE;
  860. }