wm8350-core.c 17 KB

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  1. /*
  2. * wm8350-core.c -- Device access for Wolfson WM8350
  3. *
  4. * Copyright 2007, 2008 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Liam Girdwood, Mark Brown
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/bug.h>
  18. #include <linux/device.h>
  19. #include <linux/delay.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/workqueue.h>
  22. #include <linux/mfd/wm8350/core.h>
  23. #include <linux/mfd/wm8350/audio.h>
  24. #include <linux/mfd/wm8350/comparator.h>
  25. #include <linux/mfd/wm8350/gpio.h>
  26. #include <linux/mfd/wm8350/pmic.h>
  27. #include <linux/mfd/wm8350/rtc.h>
  28. #include <linux/mfd/wm8350/supply.h>
  29. #include <linux/mfd/wm8350/wdt.h>
  30. #define WM8350_UNLOCK_KEY 0x0013
  31. #define WM8350_LOCK_KEY 0x0000
  32. #define WM8350_CLOCK_CONTROL_1 0x28
  33. #define WM8350_AIF_TEST 0x74
  34. /* debug */
  35. #define WM8350_BUS_DEBUG 0
  36. #if WM8350_BUS_DEBUG
  37. #define dump(regs, src) do { \
  38. int i_; \
  39. u16 *src_ = src; \
  40. printk(KERN_DEBUG); \
  41. for (i_ = 0; i_ < regs; i_++) \
  42. printk(" 0x%4.4x", *src_++); \
  43. printk("\n"); \
  44. } while (0);
  45. #else
  46. #define dump(bytes, src)
  47. #endif
  48. #define WM8350_LOCK_DEBUG 0
  49. #if WM8350_LOCK_DEBUG
  50. #define ldbg(format, arg...) printk(format, ## arg)
  51. #else
  52. #define ldbg(format, arg...)
  53. #endif
  54. /*
  55. * WM8350 Device IO
  56. */
  57. static DEFINE_MUTEX(io_mutex);
  58. static DEFINE_MUTEX(reg_lock_mutex);
  59. /* Perform a physical read from the device.
  60. */
  61. static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
  62. u16 *dest)
  63. {
  64. int i, ret;
  65. int bytes = num_regs * 2;
  66. dev_dbg(wm8350->dev, "volatile read\n");
  67. ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
  68. for (i = reg; i < reg + num_regs; i++) {
  69. /* Cache is CPU endian */
  70. dest[i - reg] = be16_to_cpu(dest[i - reg]);
  71. /* Mask out non-readable bits */
  72. dest[i - reg] &= wm8350_reg_io_map[i].readable;
  73. }
  74. dump(num_regs, dest);
  75. return ret;
  76. }
  77. static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
  78. {
  79. int i;
  80. int end = reg + num_regs;
  81. int ret = 0;
  82. int bytes = num_regs * 2;
  83. if (wm8350->read_dev == NULL)
  84. return -ENODEV;
  85. if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
  86. dev_err(wm8350->dev, "invalid reg %x\n",
  87. reg + num_regs - 1);
  88. return -EINVAL;
  89. }
  90. dev_dbg(wm8350->dev,
  91. "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
  92. #if WM8350_BUS_DEBUG
  93. /* we can _safely_ read any register, but warn if read not supported */
  94. for (i = reg; i < end; i++) {
  95. if (!wm8350_reg_io_map[i].readable)
  96. dev_warn(wm8350->dev,
  97. "reg R%d is not readable\n", i);
  98. }
  99. #endif
  100. /* if any volatile registers are required, then read back all */
  101. for (i = reg; i < end; i++)
  102. if (wm8350_reg_io_map[i].vol)
  103. return wm8350_phys_read(wm8350, reg, num_regs, dest);
  104. /* no volatiles, then cache is good */
  105. dev_dbg(wm8350->dev, "cache read\n");
  106. memcpy(dest, &wm8350->reg_cache[reg], bytes);
  107. dump(num_regs, dest);
  108. return ret;
  109. }
  110. static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
  111. {
  112. if (reg == WM8350_SECURITY ||
  113. wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
  114. return 0;
  115. if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
  116. (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
  117. reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
  118. (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
  119. reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
  120. return 1;
  121. return 0;
  122. }
  123. static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
  124. {
  125. int i;
  126. int end = reg + num_regs;
  127. int bytes = num_regs * 2;
  128. if (wm8350->write_dev == NULL)
  129. return -ENODEV;
  130. if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
  131. dev_err(wm8350->dev, "invalid reg %x\n",
  132. reg + num_regs - 1);
  133. return -EINVAL;
  134. }
  135. /* it's generally not a good idea to write to RO or locked registers */
  136. for (i = reg; i < end; i++) {
  137. if (!wm8350_reg_io_map[i].writable) {
  138. dev_err(wm8350->dev,
  139. "attempted write to read only reg R%d\n", i);
  140. return -EINVAL;
  141. }
  142. if (is_reg_locked(wm8350, i)) {
  143. dev_err(wm8350->dev,
  144. "attempted write to locked reg R%d\n", i);
  145. return -EINVAL;
  146. }
  147. src[i - reg] &= wm8350_reg_io_map[i].writable;
  148. wm8350->reg_cache[i] =
  149. (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
  150. | src[i - reg];
  151. src[i - reg] = cpu_to_be16(src[i - reg]);
  152. }
  153. /* Actually write it out */
  154. return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
  155. }
  156. /*
  157. * Safe read, modify, write methods
  158. */
  159. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
  160. {
  161. u16 data;
  162. int err;
  163. mutex_lock(&io_mutex);
  164. err = wm8350_read(wm8350, reg, 1, &data);
  165. if (err) {
  166. dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
  167. goto out;
  168. }
  169. data &= ~mask;
  170. err = wm8350_write(wm8350, reg, 1, &data);
  171. if (err)
  172. dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
  173. out:
  174. mutex_unlock(&io_mutex);
  175. return err;
  176. }
  177. EXPORT_SYMBOL_GPL(wm8350_clear_bits);
  178. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
  179. {
  180. u16 data;
  181. int err;
  182. mutex_lock(&io_mutex);
  183. err = wm8350_read(wm8350, reg, 1, &data);
  184. if (err) {
  185. dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
  186. goto out;
  187. }
  188. data |= mask;
  189. err = wm8350_write(wm8350, reg, 1, &data);
  190. if (err)
  191. dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
  192. out:
  193. mutex_unlock(&io_mutex);
  194. return err;
  195. }
  196. EXPORT_SYMBOL_GPL(wm8350_set_bits);
  197. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
  198. {
  199. u16 data;
  200. int err;
  201. mutex_lock(&io_mutex);
  202. err = wm8350_read(wm8350, reg, 1, &data);
  203. if (err)
  204. dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
  205. mutex_unlock(&io_mutex);
  206. return data;
  207. }
  208. EXPORT_SYMBOL_GPL(wm8350_reg_read);
  209. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
  210. {
  211. int ret;
  212. u16 data = val;
  213. mutex_lock(&io_mutex);
  214. ret = wm8350_write(wm8350, reg, 1, &data);
  215. if (ret)
  216. dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
  217. mutex_unlock(&io_mutex);
  218. return ret;
  219. }
  220. EXPORT_SYMBOL_GPL(wm8350_reg_write);
  221. int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
  222. u16 *dest)
  223. {
  224. int err = 0;
  225. mutex_lock(&io_mutex);
  226. err = wm8350_read(wm8350, start_reg, regs, dest);
  227. if (err)
  228. dev_err(wm8350->dev, "block read starting from R%d failed\n",
  229. start_reg);
  230. mutex_unlock(&io_mutex);
  231. return err;
  232. }
  233. EXPORT_SYMBOL_GPL(wm8350_block_read);
  234. int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
  235. u16 *src)
  236. {
  237. int ret = 0;
  238. mutex_lock(&io_mutex);
  239. ret = wm8350_write(wm8350, start_reg, regs, src);
  240. if (ret)
  241. dev_err(wm8350->dev, "block write starting at R%d failed\n",
  242. start_reg);
  243. mutex_unlock(&io_mutex);
  244. return ret;
  245. }
  246. EXPORT_SYMBOL_GPL(wm8350_block_write);
  247. /**
  248. * wm8350_reg_lock()
  249. *
  250. * The WM8350 has a hardware lock which can be used to prevent writes to
  251. * some registers (generally those which can cause particularly serious
  252. * problems if misused). This function enables that lock.
  253. */
  254. int wm8350_reg_lock(struct wm8350 *wm8350)
  255. {
  256. u16 key = WM8350_LOCK_KEY;
  257. int ret;
  258. ldbg(__func__);
  259. mutex_lock(&io_mutex);
  260. ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
  261. if (ret)
  262. dev_err(wm8350->dev, "lock failed\n");
  263. mutex_unlock(&io_mutex);
  264. return ret;
  265. }
  266. EXPORT_SYMBOL_GPL(wm8350_reg_lock);
  267. /**
  268. * wm8350_reg_unlock()
  269. *
  270. * The WM8350 has a hardware lock which can be used to prevent writes to
  271. * some registers (generally those which can cause particularly serious
  272. * problems if misused). This function disables that lock so updates
  273. * can be performed. For maximum safety this should be done only when
  274. * required.
  275. */
  276. int wm8350_reg_unlock(struct wm8350 *wm8350)
  277. {
  278. u16 key = WM8350_UNLOCK_KEY;
  279. int ret;
  280. ldbg(__func__);
  281. mutex_lock(&io_mutex);
  282. ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
  283. if (ret)
  284. dev_err(wm8350->dev, "unlock failed\n");
  285. mutex_unlock(&io_mutex);
  286. return ret;
  287. }
  288. EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
  289. int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
  290. {
  291. u16 reg, result = 0;
  292. int tries = 5;
  293. if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
  294. return -EINVAL;
  295. if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
  296. && (scale != 0 || vref != 0))
  297. return -EINVAL;
  298. mutex_lock(&wm8350->auxadc_mutex);
  299. /* Turn on the ADC */
  300. reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
  301. wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
  302. if (scale || vref) {
  303. reg = scale << 13;
  304. reg |= vref << 12;
  305. wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
  306. }
  307. reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
  308. reg |= 1 << channel | WM8350_AUXADC_POLL;
  309. wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
  310. do {
  311. schedule_timeout_interruptible(1);
  312. reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
  313. } while ((reg & WM8350_AUXADC_POLL) && --tries);
  314. if (!tries)
  315. dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
  316. else
  317. result = wm8350_reg_read(wm8350,
  318. WM8350_AUX1_READBACK + channel);
  319. /* Turn off the ADC */
  320. reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
  321. wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
  322. reg & ~WM8350_AUXADC_ENA);
  323. mutex_unlock(&wm8350->auxadc_mutex);
  324. return result & WM8350_AUXADC_DATA1_MASK;
  325. }
  326. EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
  327. /*
  328. * Cache is always host endian.
  329. */
  330. static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
  331. {
  332. int i, ret = 0;
  333. u16 value;
  334. const u16 *reg_map;
  335. switch (type) {
  336. case 0:
  337. switch (mode) {
  338. #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
  339. case 0:
  340. reg_map = wm8350_mode0_defaults;
  341. break;
  342. #endif
  343. #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
  344. case 1:
  345. reg_map = wm8350_mode1_defaults;
  346. break;
  347. #endif
  348. #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
  349. case 2:
  350. reg_map = wm8350_mode2_defaults;
  351. break;
  352. #endif
  353. #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
  354. case 3:
  355. reg_map = wm8350_mode3_defaults;
  356. break;
  357. #endif
  358. default:
  359. dev_err(wm8350->dev,
  360. "WM8350 configuration mode %d not supported\n",
  361. mode);
  362. return -EINVAL;
  363. }
  364. break;
  365. case 1:
  366. switch (mode) {
  367. #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
  368. case 0:
  369. reg_map = wm8351_mode0_defaults;
  370. break;
  371. #endif
  372. #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
  373. case 1:
  374. reg_map = wm8351_mode1_defaults;
  375. break;
  376. #endif
  377. #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
  378. case 2:
  379. reg_map = wm8351_mode2_defaults;
  380. break;
  381. #endif
  382. #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
  383. case 3:
  384. reg_map = wm8351_mode3_defaults;
  385. break;
  386. #endif
  387. default:
  388. dev_err(wm8350->dev,
  389. "WM8351 configuration mode %d not supported\n",
  390. mode);
  391. return -EINVAL;
  392. }
  393. break;
  394. case 2:
  395. switch (mode) {
  396. #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
  397. case 0:
  398. reg_map = wm8352_mode0_defaults;
  399. break;
  400. #endif
  401. #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
  402. case 1:
  403. reg_map = wm8352_mode1_defaults;
  404. break;
  405. #endif
  406. #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
  407. case 2:
  408. reg_map = wm8352_mode2_defaults;
  409. break;
  410. #endif
  411. #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
  412. case 3:
  413. reg_map = wm8352_mode3_defaults;
  414. break;
  415. #endif
  416. default:
  417. dev_err(wm8350->dev,
  418. "WM8352 configuration mode %d not supported\n",
  419. mode);
  420. return -EINVAL;
  421. }
  422. break;
  423. default:
  424. dev_err(wm8350->dev,
  425. "WM835x configuration mode %d not supported\n",
  426. mode);
  427. return -EINVAL;
  428. }
  429. wm8350->reg_cache =
  430. kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
  431. if (wm8350->reg_cache == NULL)
  432. return -ENOMEM;
  433. /* Read the initial cache state back from the device - this is
  434. * a PMIC so the device many not be in a virgin state and we
  435. * can't rely on the silicon values.
  436. */
  437. ret = wm8350->read_dev(wm8350, 0,
  438. sizeof(u16) * (WM8350_MAX_REGISTER + 1),
  439. wm8350->reg_cache);
  440. if (ret < 0) {
  441. dev_err(wm8350->dev,
  442. "failed to read initial cache values\n");
  443. goto out;
  444. }
  445. /* Mask out uncacheable/unreadable bits and the audio. */
  446. for (i = 0; i < WM8350_MAX_REGISTER; i++) {
  447. if (wm8350_reg_io_map[i].readable &&
  448. (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
  449. value = be16_to_cpu(wm8350->reg_cache[i]);
  450. value &= wm8350_reg_io_map[i].readable;
  451. wm8350->reg_cache[i] = value;
  452. } else
  453. wm8350->reg_cache[i] = reg_map[i];
  454. }
  455. out:
  456. return ret;
  457. }
  458. /*
  459. * Register a client device. This is non-fatal since there is no need to
  460. * fail the entire device init due to a single platform device failing.
  461. */
  462. static void wm8350_client_dev_register(struct wm8350 *wm8350,
  463. const char *name,
  464. struct platform_device **pdev)
  465. {
  466. int ret;
  467. *pdev = platform_device_alloc(name, -1);
  468. if (*pdev == NULL) {
  469. dev_err(wm8350->dev, "Failed to allocate %s\n", name);
  470. return;
  471. }
  472. (*pdev)->dev.parent = wm8350->dev;
  473. platform_set_drvdata(*pdev, wm8350);
  474. ret = platform_device_add(*pdev);
  475. if (ret != 0) {
  476. dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
  477. platform_device_put(*pdev);
  478. *pdev = NULL;
  479. }
  480. }
  481. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  482. struct wm8350_platform_data *pdata)
  483. {
  484. int ret;
  485. u16 id1, id2, mask_rev;
  486. u16 cust_id, mode, chip_rev;
  487. /* get WM8350 revision and config mode */
  488. ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
  489. if (ret != 0) {
  490. dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
  491. goto err;
  492. }
  493. ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
  494. if (ret != 0) {
  495. dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
  496. goto err;
  497. }
  498. ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
  499. &mask_rev);
  500. if (ret != 0) {
  501. dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
  502. goto err;
  503. }
  504. id1 = be16_to_cpu(id1);
  505. id2 = be16_to_cpu(id2);
  506. mask_rev = be16_to_cpu(mask_rev);
  507. if (id1 != 0x6143) {
  508. dev_err(wm8350->dev,
  509. "Device with ID %x is not a WM8350\n", id1);
  510. ret = -ENODEV;
  511. goto err;
  512. }
  513. mode = id2 & WM8350_CONF_STS_MASK >> 10;
  514. cust_id = id2 & WM8350_CUST_ID_MASK;
  515. chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
  516. dev_info(wm8350->dev,
  517. "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
  518. mode, cust_id, mask_rev, chip_rev);
  519. if (cust_id != 0) {
  520. dev_err(wm8350->dev, "Unsupported CUST_ID\n");
  521. ret = -ENODEV;
  522. goto err;
  523. }
  524. switch (mask_rev) {
  525. case 0:
  526. wm8350->pmic.max_dcdc = WM8350_DCDC_6;
  527. wm8350->pmic.max_isink = WM8350_ISINK_B;
  528. switch (chip_rev) {
  529. case WM8350_REV_E:
  530. dev_info(wm8350->dev, "WM8350 Rev E\n");
  531. break;
  532. case WM8350_REV_F:
  533. dev_info(wm8350->dev, "WM8350 Rev F\n");
  534. break;
  535. case WM8350_REV_G:
  536. dev_info(wm8350->dev, "WM8350 Rev G\n");
  537. wm8350->power.rev_g_coeff = 1;
  538. break;
  539. case WM8350_REV_H:
  540. dev_info(wm8350->dev, "WM8350 Rev H\n");
  541. wm8350->power.rev_g_coeff = 1;
  542. break;
  543. default:
  544. /* For safety we refuse to run on unknown hardware */
  545. dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
  546. ret = -ENODEV;
  547. goto err;
  548. }
  549. break;
  550. case 1:
  551. wm8350->pmic.max_dcdc = WM8350_DCDC_4;
  552. wm8350->pmic.max_isink = WM8350_ISINK_A;
  553. switch (chip_rev) {
  554. case 0:
  555. dev_info(wm8350->dev, "WM8351 Rev A\n");
  556. wm8350->power.rev_g_coeff = 1;
  557. break;
  558. case 1:
  559. dev_info(wm8350->dev, "WM8351 Rev B\n");
  560. wm8350->power.rev_g_coeff = 1;
  561. break;
  562. default:
  563. dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
  564. ret = -ENODEV;
  565. goto err;
  566. }
  567. break;
  568. case 2:
  569. wm8350->pmic.max_dcdc = WM8350_DCDC_6;
  570. wm8350->pmic.max_isink = WM8350_ISINK_B;
  571. switch (chip_rev) {
  572. case 0:
  573. dev_info(wm8350->dev, "WM8352 Rev A\n");
  574. wm8350->power.rev_g_coeff = 1;
  575. break;
  576. default:
  577. dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
  578. ret = -ENODEV;
  579. goto err;
  580. }
  581. break;
  582. default:
  583. dev_err(wm8350->dev, "Unknown MASK_REV\n");
  584. ret = -ENODEV;
  585. goto err;
  586. }
  587. ret = wm8350_create_cache(wm8350, mask_rev, mode);
  588. if (ret < 0) {
  589. dev_err(wm8350->dev, "Failed to create register cache\n");
  590. return ret;
  591. }
  592. mutex_init(&wm8350->auxadc_mutex);
  593. ret = wm8350_irq_init(wm8350, irq, pdata);
  594. if (ret < 0)
  595. goto err;
  596. if (pdata && pdata->init) {
  597. ret = pdata->init(wm8350);
  598. if (ret != 0) {
  599. dev_err(wm8350->dev, "Platform init() failed: %d\n",
  600. ret);
  601. goto err_irq;
  602. }
  603. }
  604. wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
  605. wm8350_client_dev_register(wm8350, "wm8350-codec",
  606. &(wm8350->codec.pdev));
  607. wm8350_client_dev_register(wm8350, "wm8350-gpio",
  608. &(wm8350->gpio.pdev));
  609. wm8350_client_dev_register(wm8350, "wm8350-hwmon",
  610. &(wm8350->hwmon.pdev));
  611. wm8350_client_dev_register(wm8350, "wm8350-power",
  612. &(wm8350->power.pdev));
  613. wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
  614. wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
  615. return 0;
  616. err_irq:
  617. wm8350_irq_exit(wm8350);
  618. err:
  619. kfree(wm8350->reg_cache);
  620. return ret;
  621. }
  622. EXPORT_SYMBOL_GPL(wm8350_device_init);
  623. void wm8350_device_exit(struct wm8350 *wm8350)
  624. {
  625. int i;
  626. for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
  627. platform_device_unregister(wm8350->pmic.led[i].pdev);
  628. for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
  629. platform_device_unregister(wm8350->pmic.pdev[i]);
  630. platform_device_unregister(wm8350->wdt.pdev);
  631. platform_device_unregister(wm8350->rtc.pdev);
  632. platform_device_unregister(wm8350->power.pdev);
  633. platform_device_unregister(wm8350->hwmon.pdev);
  634. platform_device_unregister(wm8350->gpio.pdev);
  635. platform_device_unregister(wm8350->codec.pdev);
  636. wm8350_irq_exit(wm8350);
  637. kfree(wm8350->reg_cache);
  638. }
  639. EXPORT_SYMBOL_GPL(wm8350_device_exit);
  640. MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
  641. MODULE_LICENSE("GPL");