twl6030-irq.c 8.4 KB

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  1. /*
  2. * twl6030-irq.c - TWL6030 irq support
  3. *
  4. * Copyright (C) 2005-2009 Texas Instruments, Inc.
  5. *
  6. * Modifications to defer interrupt handling to a kernel thread:
  7. * Copyright (C) 2006 MontaVista Software, Inc.
  8. *
  9. * Based on tlv320aic23.c:
  10. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  11. *
  12. * Code cleanup and modifications to IRQ handler.
  13. * by syed khasim <x0khasim@ti.com>
  14. *
  15. * TWL6030 specific code and IRQ handling changes by
  16. * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
  17. * Balaji T K <balajitk@ti.com>
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. */
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/irq.h>
  36. #include <linux/kthread.h>
  37. #include <linux/i2c/twl.h>
  38. /*
  39. * TWL6030 (unlike its predecessors, which had two level interrupt handling)
  40. * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
  41. * It exposes status bits saying who has raised an interrupt. There are
  42. * three mask registers that corresponds to these status registers, that
  43. * enables/disables these interrupts.
  44. *
  45. * We set up IRQs starting at a platform-specified base. An interrupt map table,
  46. * specifies mapping between interrupt number and the associated module.
  47. *
  48. */
  49. static int twl6030_interrupt_mapping[24] = {
  50. PWR_INTR_OFFSET, /* Bit 0 PWRON */
  51. PWR_INTR_OFFSET, /* Bit 1 RPWRON */
  52. PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
  53. RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
  54. RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
  55. HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
  56. SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
  57. SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
  58. SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
  59. BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
  60. SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
  61. MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
  62. RSV_INTR_OFFSET, /* Bit 12 Reserved */
  63. MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
  64. MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
  65. GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
  66. USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
  67. USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
  68. USBOTG_INTR_OFFSET, /* Bit 18 ID */
  69. USBOTG_INTR_OFFSET, /* Bit 19 VBUS */
  70. CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
  71. CHARGER_INTR_OFFSET, /* Bit 21 EXT_CHRG */
  72. CHARGER_INTR_OFFSET, /* Bit 22 INT_CHRG */
  73. RSV_INTR_OFFSET, /* Bit 23 Reserved */
  74. };
  75. /*----------------------------------------------------------------------*/
  76. static unsigned twl6030_irq_base;
  77. static struct completion irq_event;
  78. /*
  79. * This thread processes interrupts reported by the Primary Interrupt Handler.
  80. */
  81. static int twl6030_irq_thread(void *data)
  82. {
  83. long irq = (long)data;
  84. static unsigned i2c_errors;
  85. static const unsigned max_i2c_errors = 100;
  86. int ret;
  87. current->flags |= PF_NOFREEZE;
  88. while (!kthread_should_stop()) {
  89. int i;
  90. union {
  91. u8 bytes[4];
  92. u32 int_sts;
  93. } sts;
  94. /* Wait for IRQ, then read PIH irq status (also blocking) */
  95. wait_for_completion_interruptible(&irq_event);
  96. /* read INT_STS_A, B and C in one shot using a burst read */
  97. ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
  98. REG_INT_STS_A, 3);
  99. if (ret) {
  100. pr_warning("twl6030: I2C error %d reading PIH ISR\n",
  101. ret);
  102. if (++i2c_errors >= max_i2c_errors) {
  103. printk(KERN_ERR "Maximum I2C error count"
  104. " exceeded. Terminating %s.\n",
  105. __func__);
  106. break;
  107. }
  108. complete(&irq_event);
  109. continue;
  110. }
  111. sts.bytes[3] = 0; /* Only 24 bits are valid*/
  112. for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
  113. local_irq_disable();
  114. if (sts.int_sts & 0x1) {
  115. int module_irq = twl6030_irq_base +
  116. twl6030_interrupt_mapping[i];
  117. struct irq_desc *d = irq_to_desc(module_irq);
  118. if (!d) {
  119. pr_err("twl6030: Invalid SIH IRQ: %d\n",
  120. module_irq);
  121. return -EINVAL;
  122. }
  123. /* These can't be masked ... always warn
  124. * if we get any surprises.
  125. */
  126. if (d->status & IRQ_DISABLED)
  127. note_interrupt(module_irq, d,
  128. IRQ_NONE);
  129. else
  130. d->handle_irq(module_irq, d);
  131. }
  132. local_irq_enable();
  133. }
  134. ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
  135. REG_INT_STS_A, 3); /* clear INT_STS_A */
  136. if (ret)
  137. pr_warning("twl6030: I2C error in clearing PIH ISR\n");
  138. enable_irq(irq);
  139. }
  140. return 0;
  141. }
  142. /*
  143. * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
  144. * This is a chained interrupt, so there is no desc->action method for it.
  145. * Now we need to query the interrupt controller in the twl6030 to determine
  146. * which module is generating the interrupt request. However, we can't do i2c
  147. * transactions in interrupt context, so we must defer that work to a kernel
  148. * thread. All we do here is acknowledge and mask the interrupt and wakeup
  149. * the kernel thread.
  150. */
  151. static irqreturn_t handle_twl6030_pih(int irq, void *devid)
  152. {
  153. disable_irq_nosync(irq);
  154. complete(devid);
  155. return IRQ_HANDLED;
  156. }
  157. /*----------------------------------------------------------------------*/
  158. static inline void activate_irq(int irq)
  159. {
  160. #ifdef CONFIG_ARM
  161. /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
  162. * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
  163. */
  164. set_irq_flags(irq, IRQF_VALID);
  165. #else
  166. /* same effect on other architectures */
  167. set_irq_noprobe(irq);
  168. #endif
  169. }
  170. /*----------------------------------------------------------------------*/
  171. static unsigned twl6030_irq_next;
  172. /*----------------------------------------------------------------------*/
  173. int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
  174. {
  175. int ret;
  176. u8 unmask_value;
  177. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
  178. REG_INT_STS_A + offset);
  179. unmask_value &= (~(bit_mask));
  180. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
  181. REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
  182. return ret;
  183. }
  184. EXPORT_SYMBOL(twl6030_interrupt_unmask);
  185. int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
  186. {
  187. int ret;
  188. u8 mask_value;
  189. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
  190. REG_INT_STS_A + offset);
  191. mask_value |= (bit_mask);
  192. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
  193. REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
  194. return ret;
  195. }
  196. EXPORT_SYMBOL(twl6030_interrupt_mask);
  197. int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
  198. {
  199. int status = 0;
  200. int i;
  201. struct task_struct *task;
  202. int ret;
  203. u8 mask[4];
  204. static struct irq_chip twl6030_irq_chip;
  205. mask[1] = 0xFF;
  206. mask[2] = 0xFF;
  207. mask[3] = 0xFF;
  208. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  209. REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
  210. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  211. REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
  212. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  213. REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
  214. twl6030_irq_base = irq_base;
  215. /* install an irq handler for each of the modules;
  216. * clone dummy irq_chip since PIH can't *do* anything
  217. */
  218. twl6030_irq_chip = dummy_irq_chip;
  219. twl6030_irq_chip.name = "twl6030";
  220. twl6030_irq_chip.set_type = NULL;
  221. for (i = irq_base; i < irq_end; i++) {
  222. set_irq_chip_and_handler(i, &twl6030_irq_chip,
  223. handle_simple_irq);
  224. activate_irq(i);
  225. }
  226. twl6030_irq_next = i;
  227. pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
  228. irq_num, irq_base, twl6030_irq_next - 1);
  229. /* install an irq handler to demultiplex the TWL6030 interrupt */
  230. init_completion(&irq_event);
  231. task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
  232. if (IS_ERR(task)) {
  233. pr_err("twl6030: could not create irq %d thread!\n", irq_num);
  234. status = PTR_ERR(task);
  235. goto fail_kthread;
  236. }
  237. status = request_irq(irq_num, handle_twl6030_pih, IRQF_DISABLED,
  238. "TWL6030-PIH", &irq_event);
  239. if (status < 0) {
  240. pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
  241. goto fail_irq;
  242. }
  243. return status;
  244. fail_irq:
  245. free_irq(irq_num, &irq_event);
  246. fail_kthread:
  247. for (i = irq_base; i < irq_end; i++)
  248. set_irq_chip_and_handler(i, NULL, NULL);
  249. return status;
  250. }
  251. int twl6030_exit_irq(void)
  252. {
  253. if (twl6030_irq_base) {
  254. pr_err("twl6030: can't yet clean up IRQs?\n");
  255. return -ENOSYS;
  256. }
  257. return 0;
  258. }