twl4030-power.c 12 KB

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  1. /*
  2. * linux/drivers/i2c/chips/twl4030-power.c
  3. *
  4. * Handle TWL4030 Power initialization
  5. *
  6. * Copyright (C) 2008 Nokia Corporation
  7. * Copyright (C) 2006 Texas Instruments, Inc
  8. *
  9. * Written by Kalle Jokiniemi
  10. * Peter De Schrijver <peter.de-schrijver@nokia.com>
  11. * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
  12. *
  13. * This file is subject to the terms and conditions of the GNU General
  14. * Public License. See the file "COPYING" in the main directory of this
  15. * archive for more details.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/pm.h>
  28. #include <linux/i2c/twl.h>
  29. #include <linux/platform_device.h>
  30. #include <asm/mach-types.h>
  31. static u8 twl4030_start_script_address = 0x2b;
  32. #define PWR_P1_SW_EVENTS 0x10
  33. #define PWR_DEVOFF (1<<0)
  34. #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
  35. #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
  36. /* resource - hfclk */
  37. #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
  38. /* PM events */
  39. #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
  40. #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
  41. #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
  42. #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
  43. #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
  44. #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
  45. #define LVL_WAKEUP 0x08
  46. #define ENABLE_WARMRESET (1<<4)
  47. #define END_OF_SCRIPT 0x3f
  48. #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
  49. #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
  50. #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
  51. #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
  52. #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
  53. #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
  54. #define R_PROTECT_KEY 0x0E
  55. #define R_KEY_1 0xC0
  56. #define R_KEY_2 0x0C
  57. /* resource configuration registers
  58. <RESOURCE>_DEV_GRP at address 'n+0'
  59. <RESOURCE>_TYPE at address 'n+1'
  60. <RESOURCE>_REMAP at address 'n+2'
  61. <RESOURCE>_DEDICATED at address 'n+3'
  62. */
  63. #define DEV_GRP_OFFSET 0
  64. #define TYPE_OFFSET 1
  65. #define REMAP_OFFSET 2
  66. #define DEDICATED_OFFSET 3
  67. /* Bit positions in the registers */
  68. /* <RESOURCE>_DEV_GRP */
  69. #define DEV_GRP_SHIFT 5
  70. #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
  71. /* <RESOURCE>_TYPE */
  72. #define TYPE_SHIFT 0
  73. #define TYPE_MASK (7 << TYPE_SHIFT)
  74. #define TYPE2_SHIFT 3
  75. #define TYPE2_MASK (3 << TYPE2_SHIFT)
  76. /* <RESOURCE>_REMAP */
  77. #define SLEEP_STATE_SHIFT 0
  78. #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT)
  79. #define OFF_STATE_SHIFT 4
  80. #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT)
  81. static u8 res_config_addrs[] = {
  82. [RES_VAUX1] = 0x17,
  83. [RES_VAUX2] = 0x1b,
  84. [RES_VAUX3] = 0x1f,
  85. [RES_VAUX4] = 0x23,
  86. [RES_VMMC1] = 0x27,
  87. [RES_VMMC2] = 0x2b,
  88. [RES_VPLL1] = 0x2f,
  89. [RES_VPLL2] = 0x33,
  90. [RES_VSIM] = 0x37,
  91. [RES_VDAC] = 0x3b,
  92. [RES_VINTANA1] = 0x3f,
  93. [RES_VINTANA2] = 0x43,
  94. [RES_VINTDIG] = 0x47,
  95. [RES_VIO] = 0x4b,
  96. [RES_VDD1] = 0x55,
  97. [RES_VDD2] = 0x63,
  98. [RES_VUSB_1V5] = 0x71,
  99. [RES_VUSB_1V8] = 0x74,
  100. [RES_VUSB_3V1] = 0x77,
  101. [RES_VUSBCP] = 0x7a,
  102. [RES_REGEN] = 0x7f,
  103. [RES_NRES_PWRON] = 0x82,
  104. [RES_CLKEN] = 0x85,
  105. [RES_SYSEN] = 0x88,
  106. [RES_HFCLKOUT] = 0x8b,
  107. [RES_32KCLKOUT] = 0x8e,
  108. [RES_RESET] = 0x91,
  109. [RES_Main_Ref] = 0x94,
  110. };
  111. static int __init twl4030_write_script_byte(u8 address, u8 byte)
  112. {
  113. int err;
  114. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
  115. R_MEMORY_ADDRESS);
  116. if (err)
  117. goto out;
  118. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte,
  119. R_MEMORY_DATA);
  120. out:
  121. return err;
  122. }
  123. static int __init twl4030_write_script_ins(u8 address, u16 pmb_message,
  124. u8 delay, u8 next)
  125. {
  126. int err;
  127. address *= 4;
  128. err = twl4030_write_script_byte(address++, pmb_message >> 8);
  129. if (err)
  130. goto out;
  131. err = twl4030_write_script_byte(address++, pmb_message & 0xff);
  132. if (err)
  133. goto out;
  134. err = twl4030_write_script_byte(address++, delay);
  135. if (err)
  136. goto out;
  137. err = twl4030_write_script_byte(address++, next);
  138. out:
  139. return err;
  140. }
  141. static int __init twl4030_write_script(u8 address, struct twl4030_ins *script,
  142. int len)
  143. {
  144. int err;
  145. for (; len; len--, address++, script++) {
  146. if (len == 1) {
  147. err = twl4030_write_script_ins(address,
  148. script->pmb_message,
  149. script->delay,
  150. END_OF_SCRIPT);
  151. if (err)
  152. break;
  153. } else {
  154. err = twl4030_write_script_ins(address,
  155. script->pmb_message,
  156. script->delay,
  157. address + 1);
  158. if (err)
  159. break;
  160. }
  161. }
  162. return err;
  163. }
  164. static int __init twl4030_config_wakeup3_sequence(u8 address)
  165. {
  166. int err;
  167. u8 data;
  168. /* Set SLEEP to ACTIVE SEQ address for P3 */
  169. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
  170. R_SEQ_ADD_S2A3);
  171. if (err)
  172. goto out;
  173. /* P3 LVL_WAKEUP should be on LEVEL */
  174. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
  175. R_P3_SW_EVENTS);
  176. if (err)
  177. goto out;
  178. data |= LVL_WAKEUP;
  179. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
  180. R_P3_SW_EVENTS);
  181. out:
  182. if (err)
  183. pr_err("TWL4030 wakeup sequence for P3 config error\n");
  184. return err;
  185. }
  186. static int __init twl4030_config_wakeup12_sequence(u8 address)
  187. {
  188. int err = 0;
  189. u8 data;
  190. /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
  191. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
  192. R_SEQ_ADD_S2A12);
  193. if (err)
  194. goto out;
  195. /* P1/P2 LVL_WAKEUP should be on LEVEL */
  196. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
  197. R_P1_SW_EVENTS);
  198. if (err)
  199. goto out;
  200. data |= LVL_WAKEUP;
  201. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
  202. R_P1_SW_EVENTS);
  203. if (err)
  204. goto out;
  205. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
  206. R_P2_SW_EVENTS);
  207. if (err)
  208. goto out;
  209. data |= LVL_WAKEUP;
  210. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
  211. R_P2_SW_EVENTS);
  212. if (err)
  213. goto out;
  214. if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
  215. /* Disabling AC charger effect on sleep-active transitions */
  216. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
  217. R_CFG_P1_TRANSITION);
  218. if (err)
  219. goto out;
  220. data &= ~(1<<1);
  221. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data ,
  222. R_CFG_P1_TRANSITION);
  223. if (err)
  224. goto out;
  225. }
  226. out:
  227. if (err)
  228. pr_err("TWL4030 wakeup sequence for P1 and P2" \
  229. "config error\n");
  230. return err;
  231. }
  232. static int __init twl4030_config_sleep_sequence(u8 address)
  233. {
  234. int err;
  235. /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
  236. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
  237. R_SEQ_ADD_A2S);
  238. if (err)
  239. pr_err("TWL4030 sleep sequence config error\n");
  240. return err;
  241. }
  242. static int __init twl4030_config_warmreset_sequence(u8 address)
  243. {
  244. int err;
  245. u8 rd_data;
  246. /* Set WARM RESET SEQ address for P1 */
  247. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
  248. R_SEQ_ADD_WARM);
  249. if (err)
  250. goto out;
  251. /* P1/P2/P3 enable WARMRESET */
  252. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
  253. R_P1_SW_EVENTS);
  254. if (err)
  255. goto out;
  256. rd_data |= ENABLE_WARMRESET;
  257. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
  258. R_P1_SW_EVENTS);
  259. if (err)
  260. goto out;
  261. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
  262. R_P2_SW_EVENTS);
  263. if (err)
  264. goto out;
  265. rd_data |= ENABLE_WARMRESET;
  266. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
  267. R_P2_SW_EVENTS);
  268. if (err)
  269. goto out;
  270. err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
  271. R_P3_SW_EVENTS);
  272. if (err)
  273. goto out;
  274. rd_data |= ENABLE_WARMRESET;
  275. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
  276. R_P3_SW_EVENTS);
  277. out:
  278. if (err)
  279. pr_err("TWL4030 warmreset seq config error\n");
  280. return err;
  281. }
  282. static int __init twl4030_configure_resource(struct twl4030_resconfig *rconfig)
  283. {
  284. int rconfig_addr;
  285. int err;
  286. u8 type;
  287. u8 grp;
  288. u8 remap;
  289. if (rconfig->resource > TOTAL_RESOURCES) {
  290. pr_err("TWL4030 Resource %d does not exist\n",
  291. rconfig->resource);
  292. return -EINVAL;
  293. }
  294. rconfig_addr = res_config_addrs[rconfig->resource];
  295. /* Set resource group */
  296. err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp,
  297. rconfig_addr + DEV_GRP_OFFSET);
  298. if (err) {
  299. pr_err("TWL4030 Resource %d group could not be read\n",
  300. rconfig->resource);
  301. return err;
  302. }
  303. if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
  304. grp &= ~DEV_GRP_MASK;
  305. grp |= rconfig->devgroup << DEV_GRP_SHIFT;
  306. err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
  307. grp, rconfig_addr + DEV_GRP_OFFSET);
  308. if (err < 0) {
  309. pr_err("TWL4030 failed to program devgroup\n");
  310. return err;
  311. }
  312. }
  313. /* Set resource types */
  314. err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type,
  315. rconfig_addr + TYPE_OFFSET);
  316. if (err < 0) {
  317. pr_err("TWL4030 Resource %d type could not be read\n",
  318. rconfig->resource);
  319. return err;
  320. }
  321. if (rconfig->type != TWL4030_RESCONFIG_UNDEF) {
  322. type &= ~TYPE_MASK;
  323. type |= rconfig->type << TYPE_SHIFT;
  324. }
  325. if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) {
  326. type &= ~TYPE2_MASK;
  327. type |= rconfig->type2 << TYPE2_SHIFT;
  328. }
  329. err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
  330. type, rconfig_addr + TYPE_OFFSET);
  331. if (err < 0) {
  332. pr_err("TWL4030 failed to program resource type\n");
  333. return err;
  334. }
  335. /* Set remap states */
  336. err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &remap,
  337. rconfig_addr + REMAP_OFFSET);
  338. if (err < 0) {
  339. pr_err("TWL4030 Resource %d remap could not be read\n",
  340. rconfig->resource);
  341. return err;
  342. }
  343. if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) {
  344. remap &= ~OFF_STATE_MASK;
  345. remap |= rconfig->remap_off << OFF_STATE_SHIFT;
  346. }
  347. if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) {
  348. remap &= ~SLEEP_STATE_MASK;
  349. remap |= rconfig->remap_off << SLEEP_STATE_SHIFT;
  350. }
  351. err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
  352. remap,
  353. rconfig_addr + REMAP_OFFSET);
  354. if (err < 0) {
  355. pr_err("TWL4030 failed to program remap\n");
  356. return err;
  357. }
  358. return 0;
  359. }
  360. static int __init load_twl4030_script(struct twl4030_script *tscript,
  361. u8 address)
  362. {
  363. int err;
  364. static int order;
  365. /* Make sure the script isn't going beyond last valid address (0x3f) */
  366. if ((address + tscript->size) > END_OF_SCRIPT) {
  367. pr_err("TWL4030 scripts too big error\n");
  368. return -EINVAL;
  369. }
  370. err = twl4030_write_script(address, tscript->script, tscript->size);
  371. if (err)
  372. goto out;
  373. if (tscript->flags & TWL4030_WRST_SCRIPT) {
  374. err = twl4030_config_warmreset_sequence(address);
  375. if (err)
  376. goto out;
  377. }
  378. if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
  379. err = twl4030_config_wakeup12_sequence(address);
  380. if (err)
  381. goto out;
  382. order = 1;
  383. }
  384. if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
  385. err = twl4030_config_wakeup3_sequence(address);
  386. if (err)
  387. goto out;
  388. }
  389. if (tscript->flags & TWL4030_SLEEP_SCRIPT)
  390. if (order)
  391. pr_warning("TWL4030: Bad order of scripts (sleep "\
  392. "script before wakeup) Leads to boot"\
  393. "failure on some boards\n");
  394. err = twl4030_config_sleep_sequence(address);
  395. out:
  396. return err;
  397. }
  398. void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
  399. {
  400. int err = 0;
  401. int i;
  402. struct twl4030_resconfig *resconfig;
  403. u8 address = twl4030_start_script_address;
  404. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_1,
  405. R_PROTECT_KEY);
  406. if (err)
  407. goto unlock;
  408. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_2,
  409. R_PROTECT_KEY);
  410. if (err)
  411. goto unlock;
  412. for (i = 0; i < twl4030_scripts->num; i++) {
  413. err = load_twl4030_script(twl4030_scripts->scripts[i], address);
  414. if (err)
  415. goto load;
  416. address += twl4030_scripts->scripts[i]->size;
  417. }
  418. resconfig = twl4030_scripts->resource_config;
  419. if (resconfig) {
  420. while (resconfig->resource) {
  421. err = twl4030_configure_resource(resconfig);
  422. if (err)
  423. goto resource;
  424. resconfig++;
  425. }
  426. }
  427. err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, R_PROTECT_KEY);
  428. if (err)
  429. pr_err("TWL4030 Unable to relock registers\n");
  430. return;
  431. unlock:
  432. if (err)
  433. pr_err("TWL4030 Unable to unlock registers\n");
  434. return;
  435. load:
  436. if (err)
  437. pr_err("TWL4030 failed to load scripts\n");
  438. return;
  439. resource:
  440. if (err)
  441. pr_err("TWL4030 failed to configure resource\n");
  442. return;
  443. }