mx3_camera.c 35 KB

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  1. /*
  2. * V4L2 Driver for i.MX3x camera host
  3. *
  4. * Copyright (C) 2008
  5. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/version.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <media/v4l2-common.h>
  21. #include <media/v4l2-dev.h>
  22. #include <media/videobuf-dma-contig.h>
  23. #include <media/soc_camera.h>
  24. #include <media/soc_mediabus.h>
  25. #include <mach/ipu.h>
  26. #include <mach/mx3_camera.h>
  27. #define MX3_CAM_DRV_NAME "mx3-camera"
  28. /* CMOS Sensor Interface Registers */
  29. #define CSI_REG_START 0x60
  30. #define CSI_SENS_CONF (0x60 - CSI_REG_START)
  31. #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
  32. #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
  33. #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
  34. #define CSI_TST_CTRL (0x70 - CSI_REG_START)
  35. #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
  36. #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
  37. #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
  38. #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
  39. #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
  40. #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
  41. #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
  42. #define CSI_SENS_CONF_DATA_POL_SHIFT 2
  43. #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
  44. #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
  45. #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
  46. #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
  47. #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
  48. #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
  49. #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
  50. #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  51. #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  52. #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  53. #define MAX_VIDEO_MEM 16
  54. struct mx3_camera_buffer {
  55. /* common v4l buffer stuff -- must be first */
  56. struct videobuf_buffer vb;
  57. enum v4l2_mbus_pixelcode code;
  58. /* One descriptot per scatterlist (per frame) */
  59. struct dma_async_tx_descriptor *txd;
  60. /* We have to "build" a scatterlist ourselves - one element per frame */
  61. struct scatterlist sg;
  62. };
  63. /**
  64. * struct mx3_camera_dev - i.MX3x camera (CSI) object
  65. * @dev: camera device, to which the coherent buffer is attached
  66. * @icd: currently attached camera sensor
  67. * @clk: pointer to clock
  68. * @base: remapped register base address
  69. * @pdata: platform data
  70. * @platform_flags: platform flags
  71. * @mclk: master clock frequency in Hz
  72. * @capture: list of capture videobuffers
  73. * @lock: protects video buffer lists
  74. * @active: active video buffer
  75. * @idmac_channel: array of pointers to IPU DMAC DMA channels
  76. * @soc_host: embedded soc_host object
  77. */
  78. struct mx3_camera_dev {
  79. /*
  80. * i.MX3x is only supposed to handle one camera on its Camera Sensor
  81. * Interface. If anyone ever builds hardware to enable more than one
  82. * camera _simultaneously_, they will have to modify this driver too
  83. */
  84. struct soc_camera_device *icd;
  85. struct clk *clk;
  86. void __iomem *base;
  87. struct mx3_camera_pdata *pdata;
  88. unsigned long platform_flags;
  89. unsigned long mclk;
  90. struct list_head capture;
  91. spinlock_t lock; /* Protects video buffer lists */
  92. struct mx3_camera_buffer *active;
  93. /* IDMAC / dmaengine interface */
  94. struct idmac_channel *idmac_channel[1]; /* We need one channel */
  95. struct soc_camera_host soc_host;
  96. };
  97. struct dma_chan_request {
  98. struct mx3_camera_dev *mx3_cam;
  99. enum ipu_channel id;
  100. };
  101. static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
  102. {
  103. return __raw_readl(mx3->base + reg);
  104. }
  105. static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
  106. {
  107. __raw_writel(value, mx3->base + reg);
  108. }
  109. /* Called from the IPU IDMAC ISR */
  110. static void mx3_cam_dma_done(void *arg)
  111. {
  112. struct idmac_tx_desc *desc = to_tx_desc(arg);
  113. struct dma_chan *chan = desc->txd.chan;
  114. struct idmac_channel *ichannel = to_idmac_chan(chan);
  115. struct mx3_camera_dev *mx3_cam = ichannel->client;
  116. struct videobuf_buffer *vb;
  117. dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
  118. desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
  119. spin_lock(&mx3_cam->lock);
  120. if (mx3_cam->active) {
  121. vb = &mx3_cam->active->vb;
  122. list_del_init(&vb->queue);
  123. vb->state = VIDEOBUF_DONE;
  124. do_gettimeofday(&vb->ts);
  125. vb->field_count++;
  126. wake_up(&vb->done);
  127. }
  128. if (list_empty(&mx3_cam->capture)) {
  129. mx3_cam->active = NULL;
  130. spin_unlock(&mx3_cam->lock);
  131. /*
  132. * stop capture - without further buffers IPU_CHA_BUF0_RDY will
  133. * not get updated
  134. */
  135. return;
  136. }
  137. mx3_cam->active = list_entry(mx3_cam->capture.next,
  138. struct mx3_camera_buffer, vb.queue);
  139. mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
  140. spin_unlock(&mx3_cam->lock);
  141. }
  142. static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
  143. {
  144. struct soc_camera_device *icd = vq->priv_data;
  145. struct videobuf_buffer *vb = &buf->vb;
  146. struct dma_async_tx_descriptor *txd = buf->txd;
  147. struct idmac_channel *ichan;
  148. BUG_ON(in_interrupt());
  149. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  150. vb, vb->baddr, vb->bsize);
  151. /*
  152. * This waits until this buffer is out of danger, i.e., until it is no
  153. * longer in STATE_QUEUED or STATE_ACTIVE
  154. */
  155. videobuf_waiton(vb, 0, 0);
  156. if (txd) {
  157. ichan = to_idmac_chan(txd->chan);
  158. async_tx_ack(txd);
  159. }
  160. videobuf_dma_contig_free(vq, vb);
  161. buf->txd = NULL;
  162. vb->state = VIDEOBUF_NEEDS_INIT;
  163. }
  164. /*
  165. * Videobuf operations
  166. */
  167. /*
  168. * Calculate the __buffer__ (not data) size and number of buffers.
  169. * Called with .vb_lock held
  170. */
  171. static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  172. unsigned int *size)
  173. {
  174. struct soc_camera_device *icd = vq->priv_data;
  175. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  176. struct mx3_camera_dev *mx3_cam = ici->priv;
  177. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  178. icd->current_fmt->host_fmt);
  179. if (bytes_per_line < 0)
  180. return bytes_per_line;
  181. if (!mx3_cam->idmac_channel[0])
  182. return -EINVAL;
  183. *size = bytes_per_line * icd->user_height;
  184. if (!*count)
  185. *count = 32;
  186. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  187. *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
  188. return 0;
  189. }
  190. /* Called with .vb_lock held */
  191. static int mx3_videobuf_prepare(struct videobuf_queue *vq,
  192. struct videobuf_buffer *vb, enum v4l2_field field)
  193. {
  194. struct soc_camera_device *icd = vq->priv_data;
  195. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  196. struct mx3_camera_dev *mx3_cam = ici->priv;
  197. struct mx3_camera_buffer *buf =
  198. container_of(vb, struct mx3_camera_buffer, vb);
  199. size_t new_size;
  200. int ret;
  201. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  202. icd->current_fmt->host_fmt);
  203. if (bytes_per_line < 0)
  204. return bytes_per_line;
  205. new_size = bytes_per_line * icd->user_height;
  206. /*
  207. * I think, in buf_prepare you only have to protect global data,
  208. * the actual buffer is yours
  209. */
  210. if (buf->code != icd->current_fmt->code ||
  211. vb->width != icd->user_width ||
  212. vb->height != icd->user_height ||
  213. vb->field != field) {
  214. buf->code = icd->current_fmt->code;
  215. vb->width = icd->user_width;
  216. vb->height = icd->user_height;
  217. vb->field = field;
  218. if (vb->state != VIDEOBUF_NEEDS_INIT)
  219. free_buffer(vq, buf);
  220. }
  221. if (vb->baddr && vb->bsize < new_size) {
  222. /* User provided buffer, but it is too small */
  223. ret = -ENOMEM;
  224. goto out;
  225. }
  226. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  227. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  228. struct scatterlist *sg = &buf->sg;
  229. /*
  230. * The total size of video-buffers that will be allocated / mapped.
  231. * *size that we calculated in videobuf_setup gets assigned to
  232. * vb->bsize, and now we use the same calculation to get vb->size.
  233. */
  234. vb->size = new_size;
  235. /* This actually (allocates and) maps buffers */
  236. ret = videobuf_iolock(vq, vb, NULL);
  237. if (ret)
  238. goto fail;
  239. /*
  240. * We will have to configure the IDMAC channel. It has two slots
  241. * for DMA buffers, we shall enter the first two buffers there,
  242. * and then submit new buffers in DMA-ready interrupts
  243. */
  244. sg_init_table(sg, 1);
  245. sg_dma_address(sg) = videobuf_to_dma_contig(vb);
  246. sg_dma_len(sg) = vb->size;
  247. buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
  248. &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
  249. DMA_PREP_INTERRUPT);
  250. if (!buf->txd) {
  251. ret = -EIO;
  252. goto fail;
  253. }
  254. buf->txd->callback_param = buf->txd;
  255. buf->txd->callback = mx3_cam_dma_done;
  256. vb->state = VIDEOBUF_PREPARED;
  257. }
  258. return 0;
  259. fail:
  260. free_buffer(vq, buf);
  261. out:
  262. return ret;
  263. }
  264. static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
  265. {
  266. /* Add more formats as need arises and test possibilities appear... */
  267. switch (fourcc) {
  268. case V4L2_PIX_FMT_RGB565:
  269. return IPU_PIX_FMT_RGB565;
  270. case V4L2_PIX_FMT_RGB24:
  271. return IPU_PIX_FMT_RGB24;
  272. case V4L2_PIX_FMT_RGB332:
  273. return IPU_PIX_FMT_RGB332;
  274. case V4L2_PIX_FMT_YUV422P:
  275. return IPU_PIX_FMT_YVU422P;
  276. default:
  277. return IPU_PIX_FMT_GENERIC;
  278. }
  279. }
  280. /*
  281. * Called with .vb_lock mutex held and
  282. * under spinlock_irqsave(&mx3_cam->lock, ...)
  283. */
  284. static void mx3_videobuf_queue(struct videobuf_queue *vq,
  285. struct videobuf_buffer *vb)
  286. {
  287. struct soc_camera_device *icd = vq->priv_data;
  288. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  289. struct mx3_camera_dev *mx3_cam = ici->priv;
  290. struct mx3_camera_buffer *buf =
  291. container_of(vb, struct mx3_camera_buffer, vb);
  292. struct dma_async_tx_descriptor *txd = buf->txd;
  293. struct idmac_channel *ichan = to_idmac_chan(txd->chan);
  294. struct idmac_video_param *video = &ichan->params.video;
  295. dma_cookie_t cookie;
  296. u32 fourcc = icd->current_fmt->host_fmt->fourcc;
  297. BUG_ON(!irqs_disabled());
  298. /* This is the configuration of one sg-element */
  299. video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc);
  300. video->out_width = icd->user_width;
  301. video->out_height = icd->user_height;
  302. video->out_stride = icd->user_width;
  303. #ifdef DEBUG
  304. /* helps to see what DMA actually has written */
  305. memset((void *)vb->baddr, 0xaa, vb->bsize);
  306. #endif
  307. list_add_tail(&vb->queue, &mx3_cam->capture);
  308. if (!mx3_cam->active) {
  309. mx3_cam->active = buf;
  310. vb->state = VIDEOBUF_ACTIVE;
  311. } else {
  312. vb->state = VIDEOBUF_QUEUED;
  313. }
  314. spin_unlock_irq(&mx3_cam->lock);
  315. cookie = txd->tx_submit(txd);
  316. dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
  317. cookie, sg_dma_address(&buf->sg));
  318. spin_lock_irq(&mx3_cam->lock);
  319. if (cookie >= 0)
  320. return;
  321. /* Submit error */
  322. vb->state = VIDEOBUF_PREPARED;
  323. list_del_init(&vb->queue);
  324. if (mx3_cam->active == buf)
  325. mx3_cam->active = NULL;
  326. }
  327. /* Called with .vb_lock held */
  328. static void mx3_videobuf_release(struct videobuf_queue *vq,
  329. struct videobuf_buffer *vb)
  330. {
  331. struct soc_camera_device *icd = vq->priv_data;
  332. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  333. struct mx3_camera_dev *mx3_cam = ici->priv;
  334. struct mx3_camera_buffer *buf =
  335. container_of(vb, struct mx3_camera_buffer, vb);
  336. unsigned long flags;
  337. dev_dbg(icd->dev.parent,
  338. "Release%s DMA 0x%08x (state %d), queue %sempty\n",
  339. mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
  340. vb->state, list_empty(&vb->queue) ? "" : "not ");
  341. spin_lock_irqsave(&mx3_cam->lock, flags);
  342. if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
  343. !list_empty(&vb->queue)) {
  344. vb->state = VIDEOBUF_ERROR;
  345. list_del_init(&vb->queue);
  346. if (mx3_cam->active == buf)
  347. mx3_cam->active = NULL;
  348. }
  349. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  350. free_buffer(vq, buf);
  351. }
  352. static struct videobuf_queue_ops mx3_videobuf_ops = {
  353. .buf_setup = mx3_videobuf_setup,
  354. .buf_prepare = mx3_videobuf_prepare,
  355. .buf_queue = mx3_videobuf_queue,
  356. .buf_release = mx3_videobuf_release,
  357. };
  358. static void mx3_camera_init_videobuf(struct videobuf_queue *q,
  359. struct soc_camera_device *icd)
  360. {
  361. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  362. struct mx3_camera_dev *mx3_cam = ici->priv;
  363. videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
  364. &mx3_cam->lock,
  365. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  366. V4L2_FIELD_NONE,
  367. sizeof(struct mx3_camera_buffer), icd);
  368. }
  369. /* First part of ipu_csi_init_interface() */
  370. static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
  371. struct soc_camera_device *icd)
  372. {
  373. u32 conf;
  374. long rate;
  375. /* Set default size: ipu_csi_set_window_size() */
  376. csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
  377. /* ...and position to 0:0: ipu_csi_set_window_pos() */
  378. conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  379. csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
  380. /* We use only gated clock synchronisation mode so far */
  381. conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
  382. /* Set generic data, platform-biggest bus-width */
  383. conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  384. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  385. conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  386. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  387. conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  388. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  389. conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  390. else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
  391. conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  392. if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
  393. conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
  394. if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
  395. conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
  396. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  397. conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  398. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  399. conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  400. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  401. conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  402. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  403. conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  404. /* ipu_csi_init_interface() */
  405. csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
  406. clk_enable(mx3_cam->clk);
  407. rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
  408. dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
  409. if (rate)
  410. clk_set_rate(mx3_cam->clk, rate);
  411. }
  412. /* Called with .video_lock held */
  413. static int mx3_camera_add_device(struct soc_camera_device *icd)
  414. {
  415. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  416. struct mx3_camera_dev *mx3_cam = ici->priv;
  417. if (mx3_cam->icd)
  418. return -EBUSY;
  419. mx3_camera_activate(mx3_cam, icd);
  420. mx3_cam->icd = icd;
  421. dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
  422. icd->devnum);
  423. return 0;
  424. }
  425. /* Called with .video_lock held */
  426. static void mx3_camera_remove_device(struct soc_camera_device *icd)
  427. {
  428. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  429. struct mx3_camera_dev *mx3_cam = ici->priv;
  430. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  431. BUG_ON(icd != mx3_cam->icd);
  432. if (*ichan) {
  433. dma_release_channel(&(*ichan)->dma_chan);
  434. *ichan = NULL;
  435. }
  436. clk_disable(mx3_cam->clk);
  437. mx3_cam->icd = NULL;
  438. dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
  439. icd->devnum);
  440. }
  441. static bool channel_change_requested(struct soc_camera_device *icd,
  442. struct v4l2_rect *rect)
  443. {
  444. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  445. struct mx3_camera_dev *mx3_cam = ici->priv;
  446. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  447. /* Do buffers have to be re-allocated or channel re-configured? */
  448. return ichan && rect->width * rect->height >
  449. icd->user_width * icd->user_height;
  450. }
  451. static int test_platform_param(struct mx3_camera_dev *mx3_cam,
  452. unsigned char buswidth, unsigned long *flags)
  453. {
  454. /*
  455. * Platform specified synchronization and pixel clock polarities are
  456. * only a recommendation and are only used during probing. MX3x
  457. * camera interface only works in master mode, i.e., uses HSYNC and
  458. * VSYNC signals from the sensor
  459. */
  460. *flags = SOCAM_MASTER |
  461. SOCAM_HSYNC_ACTIVE_HIGH |
  462. SOCAM_HSYNC_ACTIVE_LOW |
  463. SOCAM_VSYNC_ACTIVE_HIGH |
  464. SOCAM_VSYNC_ACTIVE_LOW |
  465. SOCAM_PCLK_SAMPLE_RISING |
  466. SOCAM_PCLK_SAMPLE_FALLING |
  467. SOCAM_DATA_ACTIVE_HIGH |
  468. SOCAM_DATA_ACTIVE_LOW;
  469. /*
  470. * If requested data width is supported by the platform, use it or any
  471. * possible lower value - i.MX31 is smart enough to schift bits
  472. */
  473. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  474. *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
  475. SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  476. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  477. *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
  478. SOCAM_DATAWIDTH_4;
  479. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  480. *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  481. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
  482. *flags |= SOCAM_DATAWIDTH_4;
  483. switch (buswidth) {
  484. case 15:
  485. if (!(*flags & SOCAM_DATAWIDTH_15))
  486. return -EINVAL;
  487. break;
  488. case 10:
  489. if (!(*flags & SOCAM_DATAWIDTH_10))
  490. return -EINVAL;
  491. break;
  492. case 8:
  493. if (!(*flags & SOCAM_DATAWIDTH_8))
  494. return -EINVAL;
  495. break;
  496. case 4:
  497. if (!(*flags & SOCAM_DATAWIDTH_4))
  498. return -EINVAL;
  499. break;
  500. default:
  501. dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
  502. "Unsupported bus width %d\n", buswidth);
  503. return -EINVAL;
  504. }
  505. return 0;
  506. }
  507. static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
  508. const unsigned int depth)
  509. {
  510. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  511. struct mx3_camera_dev *mx3_cam = ici->priv;
  512. unsigned long bus_flags, camera_flags;
  513. int ret = test_platform_param(mx3_cam, depth, &bus_flags);
  514. dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
  515. if (ret < 0)
  516. return ret;
  517. camera_flags = icd->ops->query_bus_param(icd);
  518. ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  519. if (ret < 0)
  520. dev_warn(icd->dev.parent,
  521. "Flags incompatible: camera %lx, host %lx\n",
  522. camera_flags, bus_flags);
  523. return ret;
  524. }
  525. static bool chan_filter(struct dma_chan *chan, void *arg)
  526. {
  527. struct dma_chan_request *rq = arg;
  528. struct mx3_camera_pdata *pdata;
  529. if (!rq)
  530. return false;
  531. pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
  532. return rq->id == chan->chan_id &&
  533. pdata->dma_dev == chan->device->dev;
  534. }
  535. static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
  536. {
  537. .fourcc = V4L2_PIX_FMT_SBGGR8,
  538. .name = "Bayer BGGR (sRGB) 8 bit",
  539. .bits_per_sample = 8,
  540. .packing = SOC_MBUS_PACKING_NONE,
  541. .order = SOC_MBUS_ORDER_LE,
  542. }, {
  543. .fourcc = V4L2_PIX_FMT_GREY,
  544. .name = "Monochrome 8 bit",
  545. .bits_per_sample = 8,
  546. .packing = SOC_MBUS_PACKING_NONE,
  547. .order = SOC_MBUS_ORDER_LE,
  548. },
  549. };
  550. /* This will be corrected as we get more formats */
  551. static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  552. {
  553. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  554. (fmt->bits_per_sample == 8 &&
  555. fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
  556. (fmt->bits_per_sample > 8 &&
  557. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  558. }
  559. static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
  560. struct soc_camera_format_xlate *xlate)
  561. {
  562. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  563. struct device *dev = icd->dev.parent;
  564. int formats = 0, ret;
  565. enum v4l2_mbus_pixelcode code;
  566. const struct soc_mbus_pixelfmt *fmt;
  567. ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
  568. if (ret < 0)
  569. /* No more formats */
  570. return 0;
  571. fmt = soc_mbus_get_fmtdesc(code);
  572. if (!fmt) {
  573. dev_err(icd->dev.parent,
  574. "Invalid format code #%d: %d\n", idx, code);
  575. return 0;
  576. }
  577. /* This also checks support for the requested bits-per-sample */
  578. ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
  579. if (ret < 0)
  580. return 0;
  581. switch (code) {
  582. case V4L2_MBUS_FMT_SBGGR10_1X10:
  583. formats++;
  584. if (xlate) {
  585. xlate->host_fmt = &mx3_camera_formats[0];
  586. xlate->code = code;
  587. xlate++;
  588. dev_dbg(dev, "Providing format %s using code %d\n",
  589. mx3_camera_formats[0].name, code);
  590. }
  591. break;
  592. case V4L2_MBUS_FMT_Y10_1X10:
  593. formats++;
  594. if (xlate) {
  595. xlate->host_fmt = &mx3_camera_formats[1];
  596. xlate->code = code;
  597. xlate++;
  598. dev_dbg(dev, "Providing format %s using code %d\n",
  599. mx3_camera_formats[1].name, code);
  600. }
  601. break;
  602. default:
  603. if (!mx3_camera_packing_supported(fmt))
  604. return 0;
  605. }
  606. /* Generic pass-through */
  607. formats++;
  608. if (xlate) {
  609. xlate->host_fmt = fmt;
  610. xlate->code = code;
  611. xlate++;
  612. dev_dbg(dev, "Providing format %x in pass-through mode\n",
  613. xlate->host_fmt->fourcc);
  614. }
  615. return formats;
  616. }
  617. static void configure_geometry(struct mx3_camera_dev *mx3_cam,
  618. unsigned int width, unsigned int height)
  619. {
  620. u32 ctrl, width_field, height_field;
  621. /* Setup frame size - this cannot be changed on-the-fly... */
  622. width_field = width - 1;
  623. height_field = height - 1;
  624. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
  625. csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
  626. csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
  627. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
  628. /* ...and position */
  629. ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  630. /* Sensor does the cropping */
  631. csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
  632. }
  633. static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
  634. {
  635. dma_cap_mask_t mask;
  636. struct dma_chan *chan;
  637. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  638. /* We have to use IDMAC_IC_7 for Bayer / generic data */
  639. struct dma_chan_request rq = {.mx3_cam = mx3_cam,
  640. .id = IDMAC_IC_7};
  641. if (*ichan) {
  642. struct videobuf_buffer *vb, *_vb;
  643. dma_release_channel(&(*ichan)->dma_chan);
  644. *ichan = NULL;
  645. mx3_cam->active = NULL;
  646. list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
  647. list_del_init(&vb->queue);
  648. vb->state = VIDEOBUF_ERROR;
  649. wake_up(&vb->done);
  650. }
  651. }
  652. dma_cap_zero(mask);
  653. dma_cap_set(DMA_SLAVE, mask);
  654. dma_cap_set(DMA_PRIVATE, mask);
  655. chan = dma_request_channel(mask, chan_filter, &rq);
  656. if (!chan)
  657. return -EBUSY;
  658. *ichan = to_idmac_chan(chan);
  659. (*ichan)->client = mx3_cam;
  660. return 0;
  661. }
  662. /*
  663. * FIXME: learn to use stride != width, then we can keep stride properly aligned
  664. * and support arbitrary (even) widths.
  665. */
  666. static inline void stride_align(__s32 *width)
  667. {
  668. if (((*width + 7) & ~7) < 4096)
  669. *width = (*width + 7) & ~7;
  670. else
  671. *width = *width & ~7;
  672. }
  673. /*
  674. * As long as we don't implement host-side cropping and scaling, we can use
  675. * default g_crop and cropcap from soc_camera.c
  676. */
  677. static int mx3_camera_set_crop(struct soc_camera_device *icd,
  678. struct v4l2_crop *a)
  679. {
  680. struct v4l2_rect *rect = &a->c;
  681. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  682. struct mx3_camera_dev *mx3_cam = ici->priv;
  683. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  684. struct v4l2_mbus_framefmt mf;
  685. int ret;
  686. soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
  687. soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
  688. ret = v4l2_subdev_call(sd, video, s_crop, a);
  689. if (ret < 0)
  690. return ret;
  691. /* The capture device might have changed its output */
  692. ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
  693. if (ret < 0)
  694. return ret;
  695. if (mf.width & 7) {
  696. /* Ouch! We can only handle 8-byte aligned width... */
  697. stride_align(&mf.width);
  698. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  699. if (ret < 0)
  700. return ret;
  701. }
  702. if (mf.width != icd->user_width || mf.height != icd->user_height) {
  703. /*
  704. * We now know pixel formats and can decide upon DMA-channel(s)
  705. * So far only direct camera-to-memory is supported
  706. */
  707. if (channel_change_requested(icd, rect)) {
  708. int ret = acquire_dma_channel(mx3_cam);
  709. if (ret < 0)
  710. return ret;
  711. }
  712. configure_geometry(mx3_cam, mf.width, mf.height);
  713. }
  714. dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
  715. mf.width, mf.height);
  716. icd->user_width = mf.width;
  717. icd->user_height = mf.height;
  718. return ret;
  719. }
  720. static int mx3_camera_set_fmt(struct soc_camera_device *icd,
  721. struct v4l2_format *f)
  722. {
  723. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  724. struct mx3_camera_dev *mx3_cam = ici->priv;
  725. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  726. const struct soc_camera_format_xlate *xlate;
  727. struct v4l2_pix_format *pix = &f->fmt.pix;
  728. struct v4l2_mbus_framefmt mf;
  729. int ret;
  730. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  731. if (!xlate) {
  732. dev_warn(icd->dev.parent, "Format %x not found\n",
  733. pix->pixelformat);
  734. return -EINVAL;
  735. }
  736. stride_align(&pix->width);
  737. dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
  738. ret = acquire_dma_channel(mx3_cam);
  739. if (ret < 0)
  740. return ret;
  741. /*
  742. * Might have to perform a complete interface initialisation like in
  743. * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
  744. * mxc_v4l2_s_fmt()
  745. */
  746. configure_geometry(mx3_cam, pix->width, pix->height);
  747. mf.width = pix->width;
  748. mf.height = pix->height;
  749. mf.field = pix->field;
  750. mf.colorspace = pix->colorspace;
  751. mf.code = xlate->code;
  752. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  753. if (ret < 0)
  754. return ret;
  755. if (mf.code != xlate->code)
  756. return -EINVAL;
  757. pix->width = mf.width;
  758. pix->height = mf.height;
  759. pix->field = mf.field;
  760. pix->colorspace = mf.colorspace;
  761. icd->current_fmt = xlate;
  762. dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
  763. return ret;
  764. }
  765. static int mx3_camera_try_fmt(struct soc_camera_device *icd,
  766. struct v4l2_format *f)
  767. {
  768. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  769. const struct soc_camera_format_xlate *xlate;
  770. struct v4l2_pix_format *pix = &f->fmt.pix;
  771. struct v4l2_mbus_framefmt mf;
  772. __u32 pixfmt = pix->pixelformat;
  773. int ret;
  774. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  775. if (pixfmt && !xlate) {
  776. dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
  777. return -EINVAL;
  778. }
  779. /* limit to MX3 hardware capabilities */
  780. if (pix->height > 4096)
  781. pix->height = 4096;
  782. if (pix->width > 4096)
  783. pix->width = 4096;
  784. pix->bytesperline = soc_mbus_bytes_per_line(pix->width,
  785. xlate->host_fmt);
  786. if (pix->bytesperline < 0)
  787. return pix->bytesperline;
  788. pix->sizeimage = pix->height * pix->bytesperline;
  789. /* limit to sensor capabilities */
  790. mf.width = pix->width;
  791. mf.height = pix->height;
  792. mf.field = pix->field;
  793. mf.colorspace = pix->colorspace;
  794. mf.code = xlate->code;
  795. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  796. if (ret < 0)
  797. return ret;
  798. pix->width = mf.width;
  799. pix->height = mf.height;
  800. pix->colorspace = mf.colorspace;
  801. switch (mf.field) {
  802. case V4L2_FIELD_ANY:
  803. pix->field = V4L2_FIELD_NONE;
  804. break;
  805. case V4L2_FIELD_NONE:
  806. break;
  807. default:
  808. dev_err(icd->dev.parent, "Field type %d unsupported.\n",
  809. mf.field);
  810. ret = -EINVAL;
  811. }
  812. return ret;
  813. }
  814. static int mx3_camera_reqbufs(struct soc_camera_file *icf,
  815. struct v4l2_requestbuffers *p)
  816. {
  817. return 0;
  818. }
  819. static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
  820. {
  821. struct soc_camera_file *icf = file->private_data;
  822. return videobuf_poll_stream(file, &icf->vb_vidq, pt);
  823. }
  824. static int mx3_camera_querycap(struct soc_camera_host *ici,
  825. struct v4l2_capability *cap)
  826. {
  827. /* cap->name is set by the firendly caller:-> */
  828. strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
  829. cap->version = KERNEL_VERSION(0, 2, 2);
  830. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  831. return 0;
  832. }
  833. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  834. {
  835. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  836. struct mx3_camera_dev *mx3_cam = ici->priv;
  837. unsigned long bus_flags, camera_flags, common_flags;
  838. u32 dw, sens_conf;
  839. const struct soc_mbus_pixelfmt *fmt;
  840. int buswidth;
  841. int ret;
  842. const struct soc_camera_format_xlate *xlate;
  843. struct device *dev = icd->dev.parent;
  844. fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
  845. if (!fmt)
  846. return -EINVAL;
  847. buswidth = fmt->bits_per_sample;
  848. ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
  849. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  850. if (!xlate) {
  851. dev_warn(dev, "Format %x not found\n", pixfmt);
  852. return -EINVAL;
  853. }
  854. dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
  855. if (ret < 0)
  856. return ret;
  857. camera_flags = icd->ops->query_bus_param(icd);
  858. common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  859. dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
  860. camera_flags, bus_flags, common_flags);
  861. if (!common_flags) {
  862. dev_dbg(dev, "no common flags");
  863. return -EINVAL;
  864. }
  865. /* Make choices, based on platform preferences */
  866. if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
  867. (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
  868. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  869. common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
  870. else
  871. common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
  872. }
  873. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  874. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  875. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  876. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  877. else
  878. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  879. }
  880. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  881. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  882. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  883. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  884. else
  885. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  886. }
  887. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  888. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  889. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  890. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  891. else
  892. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  893. }
  894. /*
  895. * Make the camera work in widest common mode, we'll take care of
  896. * the rest
  897. */
  898. if (common_flags & SOCAM_DATAWIDTH_15)
  899. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  900. SOCAM_DATAWIDTH_15;
  901. else if (common_flags & SOCAM_DATAWIDTH_10)
  902. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  903. SOCAM_DATAWIDTH_10;
  904. else if (common_flags & SOCAM_DATAWIDTH_8)
  905. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  906. SOCAM_DATAWIDTH_8;
  907. else
  908. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  909. SOCAM_DATAWIDTH_4;
  910. ret = icd->ops->set_bus_param(icd, common_flags);
  911. if (ret < 0) {
  912. dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
  913. common_flags, ret);
  914. return ret;
  915. }
  916. /*
  917. * So far only gated clock mode is supported. Add a line
  918. * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
  919. * below and select the required mode when supporting other
  920. * synchronisation protocols.
  921. */
  922. sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
  923. ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
  924. (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
  925. (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
  926. (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
  927. (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
  928. (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
  929. /* TODO: Support RGB and YUV formats */
  930. /* This has been set in mx3_camera_activate(), but we clear it above */
  931. sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  932. if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
  933. sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  934. if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
  935. sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  936. if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
  937. sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  938. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  939. sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  940. /* Just do what we're asked to do */
  941. switch (xlate->host_fmt->bits_per_sample) {
  942. case 4:
  943. dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  944. break;
  945. case 8:
  946. dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  947. break;
  948. case 10:
  949. dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  950. break;
  951. default:
  952. /*
  953. * Actually it can only be 15 now, default is just to silence
  954. * compiler warnings
  955. */
  956. case 15:
  957. dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  958. }
  959. csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
  960. dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
  961. return 0;
  962. }
  963. static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
  964. .owner = THIS_MODULE,
  965. .add = mx3_camera_add_device,
  966. .remove = mx3_camera_remove_device,
  967. .set_crop = mx3_camera_set_crop,
  968. .set_fmt = mx3_camera_set_fmt,
  969. .try_fmt = mx3_camera_try_fmt,
  970. .get_formats = mx3_camera_get_formats,
  971. .init_videobuf = mx3_camera_init_videobuf,
  972. .reqbufs = mx3_camera_reqbufs,
  973. .poll = mx3_camera_poll,
  974. .querycap = mx3_camera_querycap,
  975. .set_bus_param = mx3_camera_set_bus_param,
  976. };
  977. static int __devinit mx3_camera_probe(struct platform_device *pdev)
  978. {
  979. struct mx3_camera_dev *mx3_cam;
  980. struct resource *res;
  981. void __iomem *base;
  982. int err = 0;
  983. struct soc_camera_host *soc_host;
  984. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  985. if (!res) {
  986. err = -ENODEV;
  987. goto egetres;
  988. }
  989. mx3_cam = vmalloc(sizeof(*mx3_cam));
  990. if (!mx3_cam) {
  991. dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
  992. err = -ENOMEM;
  993. goto ealloc;
  994. }
  995. memset(mx3_cam, 0, sizeof(*mx3_cam));
  996. mx3_cam->clk = clk_get(&pdev->dev, NULL);
  997. if (IS_ERR(mx3_cam->clk)) {
  998. err = PTR_ERR(mx3_cam->clk);
  999. goto eclkget;
  1000. }
  1001. mx3_cam->pdata = pdev->dev.platform_data;
  1002. mx3_cam->platform_flags = mx3_cam->pdata->flags;
  1003. if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
  1004. MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
  1005. MX3_CAMERA_DATAWIDTH_15))) {
  1006. /*
  1007. * Platform hasn't set available data widths. This is bad.
  1008. * Warn and use a default.
  1009. */
  1010. dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
  1011. "data widths, using default 8 bit\n");
  1012. mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
  1013. }
  1014. mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
  1015. if (!mx3_cam->mclk) {
  1016. dev_warn(&pdev->dev,
  1017. "mclk_10khz == 0! Please, fix your platform data. "
  1018. "Using default 20MHz\n");
  1019. mx3_cam->mclk = 20000000;
  1020. }
  1021. /* list of video-buffers */
  1022. INIT_LIST_HEAD(&mx3_cam->capture);
  1023. spin_lock_init(&mx3_cam->lock);
  1024. base = ioremap(res->start, resource_size(res));
  1025. if (!base) {
  1026. pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
  1027. err = -ENOMEM;
  1028. goto eioremap;
  1029. }
  1030. mx3_cam->base = base;
  1031. soc_host = &mx3_cam->soc_host;
  1032. soc_host->drv_name = MX3_CAM_DRV_NAME;
  1033. soc_host->ops = &mx3_soc_camera_host_ops;
  1034. soc_host->priv = mx3_cam;
  1035. soc_host->v4l2_dev.dev = &pdev->dev;
  1036. soc_host->nr = pdev->id;
  1037. err = soc_camera_host_register(soc_host);
  1038. if (err)
  1039. goto ecamhostreg;
  1040. /* IDMAC interface */
  1041. dmaengine_get();
  1042. return 0;
  1043. ecamhostreg:
  1044. iounmap(base);
  1045. eioremap:
  1046. clk_put(mx3_cam->clk);
  1047. eclkget:
  1048. vfree(mx3_cam);
  1049. ealloc:
  1050. egetres:
  1051. return err;
  1052. }
  1053. static int __devexit mx3_camera_remove(struct platform_device *pdev)
  1054. {
  1055. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  1056. struct mx3_camera_dev *mx3_cam = container_of(soc_host,
  1057. struct mx3_camera_dev, soc_host);
  1058. clk_put(mx3_cam->clk);
  1059. soc_camera_host_unregister(soc_host);
  1060. iounmap(mx3_cam->base);
  1061. /*
  1062. * The channel has either not been allocated,
  1063. * or should have been released
  1064. */
  1065. if (WARN_ON(mx3_cam->idmac_channel[0]))
  1066. dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
  1067. vfree(mx3_cam);
  1068. dmaengine_put();
  1069. dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
  1070. return 0;
  1071. }
  1072. static struct platform_driver mx3_camera_driver = {
  1073. .driver = {
  1074. .name = MX3_CAM_DRV_NAME,
  1075. },
  1076. .probe = mx3_camera_probe,
  1077. .remove = __devexit_p(mx3_camera_remove),
  1078. };
  1079. static int __init mx3_camera_init(void)
  1080. {
  1081. return platform_driver_register(&mx3_camera_driver);
  1082. }
  1083. static void __exit mx3_camera_exit(void)
  1084. {
  1085. platform_driver_unregister(&mx3_camera_driver);
  1086. }
  1087. module_init(mx3_camera_init);
  1088. module_exit(mx3_camera_exit);
  1089. MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
  1090. MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
  1091. MODULE_LICENSE("GPL v2");
  1092. MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);