mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/time.h>
  32. #include <linux/version.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <media/soc_mediabus.h>
  39. #include <asm/dma.h>
  40. #include <asm/fiq.h>
  41. #include <mach/dma-mx1-mx2.h>
  42. #include <mach/hardware.h>
  43. #include <mach/mx1_camera.h>
  44. /*
  45. * CSI registers
  46. */
  47. #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
  48. #define DMA_DIMR 0x08 /* Interrupt mask Register */
  49. #define CSICR1 0x00 /* CSI Control Register 1 */
  50. #define CSISR 0x08 /* CSI Status Register */
  51. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  52. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  53. #define CSICR1_SOF_POL (1 << 17)
  54. #define CSICR1_SOF_INTEN (1 << 16)
  55. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  56. #define CSICR1_MCLKEN (1 << 9)
  57. #define CSICR1_FCC (1 << 8)
  58. #define CSICR1_BIG_ENDIAN (1 << 7)
  59. #define CSICR1_CLR_RXFIFO (1 << 5)
  60. #define CSICR1_GCLK_MODE (1 << 4)
  61. #define CSICR1_DATA_POL (1 << 2)
  62. #define CSICR1_REDGE (1 << 1)
  63. #define CSICR1_EN (1 << 0)
  64. #define CSISR_SFF_OR_INT (1 << 25)
  65. #define CSISR_RFF_OR_INT (1 << 24)
  66. #define CSISR_STATFF_INT (1 << 21)
  67. #define CSISR_RXFF_INT (1 << 18)
  68. #define CSISR_SOF_INT (1 << 16)
  69. #define CSISR_DRDY (1 << 0)
  70. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  71. #define DRIVER_NAME "mx1-camera"
  72. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  73. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  74. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  75. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  76. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  77. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  78. SOCAM_DATAWIDTH_8)
  79. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  80. /*
  81. * Structures
  82. */
  83. /* buffer for one video frame */
  84. struct mx1_buffer {
  85. /* common v4l buffer stuff -- must be first */
  86. struct videobuf_buffer vb;
  87. enum v4l2_mbus_pixelcode code;
  88. int inwork;
  89. };
  90. /*
  91. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  92. * Interface. If anyone ever builds hardware to enable more than
  93. * one camera, they will have to modify this driver too
  94. */
  95. struct mx1_camera_dev {
  96. struct soc_camera_host soc_host;
  97. struct soc_camera_device *icd;
  98. struct mx1_camera_pdata *pdata;
  99. struct mx1_buffer *active;
  100. struct resource *res;
  101. struct clk *clk;
  102. struct list_head capture;
  103. void __iomem *base;
  104. int dma_chan;
  105. unsigned int irq;
  106. unsigned long mclk;
  107. spinlock_t lock;
  108. };
  109. /*
  110. * Videobuf operations
  111. */
  112. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  113. unsigned int *size)
  114. {
  115. struct soc_camera_device *icd = vq->priv_data;
  116. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  117. icd->current_fmt->host_fmt);
  118. if (bytes_per_line < 0)
  119. return bytes_per_line;
  120. *size = bytes_per_line * icd->user_height;
  121. if (!*count)
  122. *count = 32;
  123. while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  124. (*count)--;
  125. dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
  126. return 0;
  127. }
  128. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  129. {
  130. struct soc_camera_device *icd = vq->priv_data;
  131. struct videobuf_buffer *vb = &buf->vb;
  132. BUG_ON(in_interrupt());
  133. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  134. vb, vb->baddr, vb->bsize);
  135. /*
  136. * This waits until this buffer is out of danger, i.e., until it is no
  137. * longer in STATE_QUEUED or STATE_ACTIVE
  138. */
  139. videobuf_waiton(vb, 0, 0);
  140. videobuf_dma_contig_free(vq, vb);
  141. vb->state = VIDEOBUF_NEEDS_INIT;
  142. }
  143. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  144. struct videobuf_buffer *vb, enum v4l2_field field)
  145. {
  146. struct soc_camera_device *icd = vq->priv_data;
  147. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  148. int ret;
  149. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  150. icd->current_fmt->host_fmt);
  151. if (bytes_per_line < 0)
  152. return bytes_per_line;
  153. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  154. vb, vb->baddr, vb->bsize);
  155. /* Added list head initialization on alloc */
  156. WARN_ON(!list_empty(&vb->queue));
  157. BUG_ON(NULL == icd->current_fmt);
  158. /*
  159. * I think, in buf_prepare you only have to protect global data,
  160. * the actual buffer is yours
  161. */
  162. buf->inwork = 1;
  163. if (buf->code != icd->current_fmt->code ||
  164. vb->width != icd->user_width ||
  165. vb->height != icd->user_height ||
  166. vb->field != field) {
  167. buf->code = icd->current_fmt->code;
  168. vb->width = icd->user_width;
  169. vb->height = icd->user_height;
  170. vb->field = field;
  171. vb->state = VIDEOBUF_NEEDS_INIT;
  172. }
  173. vb->size = bytes_per_line * vb->height;
  174. if (0 != vb->baddr && vb->bsize < vb->size) {
  175. ret = -EINVAL;
  176. goto out;
  177. }
  178. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  179. ret = videobuf_iolock(vq, vb, NULL);
  180. if (ret)
  181. goto fail;
  182. vb->state = VIDEOBUF_PREPARED;
  183. }
  184. buf->inwork = 0;
  185. return 0;
  186. fail:
  187. free_buffer(vq, buf);
  188. out:
  189. buf->inwork = 0;
  190. return ret;
  191. }
  192. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  193. {
  194. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  195. struct device *dev = pcdev->icd->dev.parent;
  196. int ret;
  197. if (unlikely(!pcdev->active)) {
  198. dev_err(dev, "DMA End IRQ with no active buffer\n");
  199. return -EFAULT;
  200. }
  201. /* setup sg list for future DMA */
  202. ret = imx_dma_setup_single(pcdev->dma_chan,
  203. videobuf_to_dma_contig(vbuf),
  204. vbuf->size, pcdev->res->start +
  205. CSIRXR, DMA_MODE_READ);
  206. if (unlikely(ret))
  207. dev_err(dev, "Failed to setup DMA sg list\n");
  208. return ret;
  209. }
  210. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  211. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  212. struct videobuf_buffer *vb)
  213. {
  214. struct soc_camera_device *icd = vq->priv_data;
  215. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  216. struct mx1_camera_dev *pcdev = ici->priv;
  217. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  218. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  219. vb, vb->baddr, vb->bsize);
  220. list_add_tail(&vb->queue, &pcdev->capture);
  221. vb->state = VIDEOBUF_ACTIVE;
  222. if (!pcdev->active) {
  223. pcdev->active = buf;
  224. /* setup sg list for future DMA */
  225. if (!mx1_camera_setup_dma(pcdev)) {
  226. unsigned int temp;
  227. /* enable SOF irq */
  228. temp = __raw_readl(pcdev->base + CSICR1) |
  229. CSICR1_SOF_INTEN;
  230. __raw_writel(temp, pcdev->base + CSICR1);
  231. }
  232. }
  233. }
  234. static void mx1_videobuf_release(struct videobuf_queue *vq,
  235. struct videobuf_buffer *vb)
  236. {
  237. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  238. #ifdef DEBUG
  239. struct soc_camera_device *icd = vq->priv_data;
  240. struct device *dev = icd->dev.parent;
  241. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  242. vb, vb->baddr, vb->bsize);
  243. switch (vb->state) {
  244. case VIDEOBUF_ACTIVE:
  245. dev_dbg(dev, "%s (active)\n", __func__);
  246. break;
  247. case VIDEOBUF_QUEUED:
  248. dev_dbg(dev, "%s (queued)\n", __func__);
  249. break;
  250. case VIDEOBUF_PREPARED:
  251. dev_dbg(dev, "%s (prepared)\n", __func__);
  252. break;
  253. default:
  254. dev_dbg(dev, "%s (unknown)\n", __func__);
  255. break;
  256. }
  257. #endif
  258. free_buffer(vq, buf);
  259. }
  260. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  261. struct videobuf_buffer *vb,
  262. struct mx1_buffer *buf)
  263. {
  264. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  265. list_del_init(&vb->queue);
  266. vb->state = VIDEOBUF_DONE;
  267. do_gettimeofday(&vb->ts);
  268. vb->field_count++;
  269. wake_up(&vb->done);
  270. if (list_empty(&pcdev->capture)) {
  271. pcdev->active = NULL;
  272. return;
  273. }
  274. pcdev->active = list_entry(pcdev->capture.next,
  275. struct mx1_buffer, vb.queue);
  276. /* setup sg list for future DMA */
  277. if (likely(!mx1_camera_setup_dma(pcdev))) {
  278. unsigned int temp;
  279. /* enable SOF irq */
  280. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  281. __raw_writel(temp, pcdev->base + CSICR1);
  282. }
  283. }
  284. static void mx1_camera_dma_irq(int channel, void *data)
  285. {
  286. struct mx1_camera_dev *pcdev = data;
  287. struct device *dev = pcdev->icd->dev.parent;
  288. struct mx1_buffer *buf;
  289. struct videobuf_buffer *vb;
  290. unsigned long flags;
  291. spin_lock_irqsave(&pcdev->lock, flags);
  292. imx_dma_disable(channel);
  293. if (unlikely(!pcdev->active)) {
  294. dev_err(dev, "DMA End IRQ with no active buffer\n");
  295. goto out;
  296. }
  297. vb = &pcdev->active->vb;
  298. buf = container_of(vb, struct mx1_buffer, vb);
  299. WARN_ON(buf->inwork || list_empty(&vb->queue));
  300. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  301. vb, vb->baddr, vb->bsize);
  302. mx1_camera_wakeup(pcdev, vb, buf);
  303. out:
  304. spin_unlock_irqrestore(&pcdev->lock, flags);
  305. }
  306. static struct videobuf_queue_ops mx1_videobuf_ops = {
  307. .buf_setup = mx1_videobuf_setup,
  308. .buf_prepare = mx1_videobuf_prepare,
  309. .buf_queue = mx1_videobuf_queue,
  310. .buf_release = mx1_videobuf_release,
  311. };
  312. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  313. struct soc_camera_device *icd)
  314. {
  315. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  316. struct mx1_camera_dev *pcdev = ici->priv;
  317. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
  318. &pcdev->lock,
  319. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  320. V4L2_FIELD_NONE,
  321. sizeof(struct mx1_buffer), icd);
  322. }
  323. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  324. {
  325. unsigned int mclk = pcdev->mclk;
  326. unsigned long div;
  327. unsigned long lcdclk;
  328. lcdclk = clk_get_rate(pcdev->clk);
  329. /*
  330. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  331. * they get a nice Oops
  332. */
  333. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  334. dev_dbg(pcdev->icd->dev.parent,
  335. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  336. lcdclk / 1000, mclk / 1000, div);
  337. return div;
  338. }
  339. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  340. {
  341. unsigned int csicr1 = CSICR1_EN;
  342. dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
  343. clk_enable(pcdev->clk);
  344. /* enable CSI before doing anything else */
  345. __raw_writel(csicr1, pcdev->base + CSICR1);
  346. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  347. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  348. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  349. __raw_writel(csicr1, pcdev->base + CSICR1);
  350. }
  351. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  352. {
  353. dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
  354. /* Disable all CSI interface */
  355. __raw_writel(0x00, pcdev->base + CSICR1);
  356. clk_disable(pcdev->clk);
  357. }
  358. /*
  359. * The following two functions absolutely depend on the fact, that
  360. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  361. */
  362. static int mx1_camera_add_device(struct soc_camera_device *icd)
  363. {
  364. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  365. struct mx1_camera_dev *pcdev = ici->priv;
  366. int ret;
  367. if (pcdev->icd) {
  368. ret = -EBUSY;
  369. goto ebusy;
  370. }
  371. dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
  372. icd->devnum);
  373. mx1_camera_activate(pcdev);
  374. pcdev->icd = icd;
  375. ebusy:
  376. return ret;
  377. }
  378. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  379. {
  380. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  381. struct mx1_camera_dev *pcdev = ici->priv;
  382. unsigned int csicr1;
  383. BUG_ON(icd != pcdev->icd);
  384. /* disable interrupts */
  385. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  386. __raw_writel(csicr1, pcdev->base + CSICR1);
  387. /* Stop DMA engine */
  388. imx_dma_disable(pcdev->dma_chan);
  389. dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
  390. icd->devnum);
  391. mx1_camera_deactivate(pcdev);
  392. pcdev->icd = NULL;
  393. }
  394. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  395. struct v4l2_crop *a)
  396. {
  397. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  398. return v4l2_subdev_call(sd, video, s_crop, a);
  399. }
  400. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  401. {
  402. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  403. struct mx1_camera_dev *pcdev = ici->priv;
  404. unsigned long camera_flags, common_flags;
  405. unsigned int csicr1;
  406. int ret;
  407. camera_flags = icd->ops->query_bus_param(icd);
  408. /* MX1 supports only 8bit buswidth */
  409. common_flags = soc_camera_bus_param_compatible(camera_flags,
  410. CSI_BUS_FLAGS);
  411. if (!common_flags)
  412. return -EINVAL;
  413. /* Make choises, based on platform choice */
  414. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  415. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  416. if (!pcdev->pdata ||
  417. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  418. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  419. else
  420. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  421. }
  422. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  423. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  424. if (!pcdev->pdata ||
  425. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  426. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  427. else
  428. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  429. }
  430. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  431. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  432. if (!pcdev->pdata ||
  433. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  434. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  435. else
  436. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  437. }
  438. ret = icd->ops->set_bus_param(icd, common_flags);
  439. if (ret < 0)
  440. return ret;
  441. csicr1 = __raw_readl(pcdev->base + CSICR1);
  442. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  443. csicr1 |= CSICR1_REDGE;
  444. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  445. csicr1 |= CSICR1_SOF_POL;
  446. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  447. csicr1 |= CSICR1_DATA_POL;
  448. __raw_writel(csicr1, pcdev->base + CSICR1);
  449. return 0;
  450. }
  451. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  452. struct v4l2_format *f)
  453. {
  454. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  455. const struct soc_camera_format_xlate *xlate;
  456. struct v4l2_pix_format *pix = &f->fmt.pix;
  457. struct v4l2_mbus_framefmt mf;
  458. int ret, buswidth;
  459. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  460. if (!xlate) {
  461. dev_warn(icd->dev.parent, "Format %x not found\n",
  462. pix->pixelformat);
  463. return -EINVAL;
  464. }
  465. buswidth = xlate->host_fmt->bits_per_sample;
  466. if (buswidth > 8) {
  467. dev_warn(icd->dev.parent,
  468. "bits-per-sample %d for format %x unsupported\n",
  469. buswidth, pix->pixelformat);
  470. return -EINVAL;
  471. }
  472. mf.width = pix->width;
  473. mf.height = pix->height;
  474. mf.field = pix->field;
  475. mf.colorspace = pix->colorspace;
  476. mf.code = xlate->code;
  477. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  478. if (ret < 0)
  479. return ret;
  480. if (mf.code != xlate->code)
  481. return -EINVAL;
  482. pix->width = mf.width;
  483. pix->height = mf.height;
  484. pix->field = mf.field;
  485. pix->colorspace = mf.colorspace;
  486. icd->current_fmt = xlate;
  487. return ret;
  488. }
  489. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  490. struct v4l2_format *f)
  491. {
  492. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  493. const struct soc_camera_format_xlate *xlate;
  494. struct v4l2_pix_format *pix = &f->fmt.pix;
  495. struct v4l2_mbus_framefmt mf;
  496. int ret;
  497. /* TODO: limit to mx1 hardware capabilities */
  498. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  499. if (!xlate) {
  500. dev_warn(icd->dev.parent, "Format %x not found\n",
  501. pix->pixelformat);
  502. return -EINVAL;
  503. }
  504. mf.width = pix->width;
  505. mf.height = pix->height;
  506. mf.field = pix->field;
  507. mf.colorspace = pix->colorspace;
  508. mf.code = xlate->code;
  509. /* limit to sensor capabilities */
  510. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  511. if (ret < 0)
  512. return ret;
  513. pix->width = mf.width;
  514. pix->height = mf.height;
  515. pix->field = mf.field;
  516. pix->colorspace = mf.colorspace;
  517. return 0;
  518. }
  519. static int mx1_camera_reqbufs(struct soc_camera_file *icf,
  520. struct v4l2_requestbuffers *p)
  521. {
  522. int i;
  523. /*
  524. * This is for locking debugging only. I removed spinlocks and now I
  525. * check whether .prepare is ever called on a linked buffer, or whether
  526. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  527. * it hadn't triggered
  528. */
  529. for (i = 0; i < p->count; i++) {
  530. struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
  531. struct mx1_buffer, vb);
  532. buf->inwork = 0;
  533. INIT_LIST_HEAD(&buf->vb.queue);
  534. }
  535. return 0;
  536. }
  537. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  538. {
  539. struct soc_camera_file *icf = file->private_data;
  540. struct mx1_buffer *buf;
  541. buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
  542. vb.stream);
  543. poll_wait(file, &buf->vb.done, pt);
  544. if (buf->vb.state == VIDEOBUF_DONE ||
  545. buf->vb.state == VIDEOBUF_ERROR)
  546. return POLLIN | POLLRDNORM;
  547. return 0;
  548. }
  549. static int mx1_camera_querycap(struct soc_camera_host *ici,
  550. struct v4l2_capability *cap)
  551. {
  552. /* cap->name is set by the friendly caller:-> */
  553. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  554. cap->version = VERSION_CODE;
  555. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  556. return 0;
  557. }
  558. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  559. .owner = THIS_MODULE,
  560. .add = mx1_camera_add_device,
  561. .remove = mx1_camera_remove_device,
  562. .set_bus_param = mx1_camera_set_bus_param,
  563. .set_crop = mx1_camera_set_crop,
  564. .set_fmt = mx1_camera_set_fmt,
  565. .try_fmt = mx1_camera_try_fmt,
  566. .init_videobuf = mx1_camera_init_videobuf,
  567. .reqbufs = mx1_camera_reqbufs,
  568. .poll = mx1_camera_poll,
  569. .querycap = mx1_camera_querycap,
  570. };
  571. static struct fiq_handler fh = {
  572. .name = "csi_sof"
  573. };
  574. static int __init mx1_camera_probe(struct platform_device *pdev)
  575. {
  576. struct mx1_camera_dev *pcdev;
  577. struct resource *res;
  578. struct pt_regs regs;
  579. struct clk *clk;
  580. void __iomem *base;
  581. unsigned int irq;
  582. int err = 0;
  583. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  584. irq = platform_get_irq(pdev, 0);
  585. if (!res || !irq) {
  586. err = -ENODEV;
  587. goto exit;
  588. }
  589. clk = clk_get(&pdev->dev, "csi_clk");
  590. if (IS_ERR(clk)) {
  591. err = PTR_ERR(clk);
  592. goto exit;
  593. }
  594. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  595. if (!pcdev) {
  596. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  597. err = -ENOMEM;
  598. goto exit_put_clk;
  599. }
  600. pcdev->res = res;
  601. pcdev->clk = clk;
  602. pcdev->pdata = pdev->dev.platform_data;
  603. if (pcdev->pdata)
  604. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  605. if (!pcdev->mclk) {
  606. dev_warn(&pdev->dev,
  607. "mclk_10khz == 0! Please, fix your platform data. "
  608. "Using default 20MHz\n");
  609. pcdev->mclk = 20000000;
  610. }
  611. INIT_LIST_HEAD(&pcdev->capture);
  612. spin_lock_init(&pcdev->lock);
  613. /*
  614. * Request the regions.
  615. */
  616. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  617. err = -EBUSY;
  618. goto exit_kfree;
  619. }
  620. base = ioremap(res->start, resource_size(res));
  621. if (!base) {
  622. err = -ENOMEM;
  623. goto exit_release;
  624. }
  625. pcdev->irq = irq;
  626. pcdev->base = base;
  627. /* request dma */
  628. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  629. if (pcdev->dma_chan < 0) {
  630. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  631. err = -EBUSY;
  632. goto exit_iounmap;
  633. }
  634. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  635. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  636. pcdev);
  637. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  638. IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
  639. /* burst length : 16 words = 64 bytes */
  640. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  641. /* request irq */
  642. err = claim_fiq(&fh);
  643. if (err) {
  644. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  645. goto exit_free_dma;
  646. }
  647. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  648. &mx1_camera_sof_fiq_start);
  649. regs.ARM_r8 = DMA_BASE + DMA_DIMR;
  650. regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
  651. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  652. regs.ARM_fp = (long)pcdev->base + CSISR;
  653. regs.ARM_sp = 1 << pcdev->dma_chan;
  654. set_fiq_regs(&regs);
  655. mxc_set_irq_fiq(irq, 1);
  656. enable_fiq(irq);
  657. pcdev->soc_host.drv_name = DRIVER_NAME;
  658. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  659. pcdev->soc_host.priv = pcdev;
  660. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  661. pcdev->soc_host.nr = pdev->id;
  662. err = soc_camera_host_register(&pcdev->soc_host);
  663. if (err)
  664. goto exit_free_irq;
  665. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  666. return 0;
  667. exit_free_irq:
  668. disable_fiq(irq);
  669. mxc_set_irq_fiq(irq, 0);
  670. release_fiq(&fh);
  671. exit_free_dma:
  672. imx_dma_free(pcdev->dma_chan);
  673. exit_iounmap:
  674. iounmap(base);
  675. exit_release:
  676. release_mem_region(res->start, resource_size(res));
  677. exit_kfree:
  678. kfree(pcdev);
  679. exit_put_clk:
  680. clk_put(clk);
  681. exit:
  682. return err;
  683. }
  684. static int __exit mx1_camera_remove(struct platform_device *pdev)
  685. {
  686. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  687. struct mx1_camera_dev *pcdev = container_of(soc_host,
  688. struct mx1_camera_dev, soc_host);
  689. struct resource *res;
  690. imx_dma_free(pcdev->dma_chan);
  691. disable_fiq(pcdev->irq);
  692. mxc_set_irq_fiq(pcdev->irq, 0);
  693. release_fiq(&fh);
  694. clk_put(pcdev->clk);
  695. soc_camera_host_unregister(soc_host);
  696. iounmap(pcdev->base);
  697. res = pcdev->res;
  698. release_mem_region(res->start, resource_size(res));
  699. kfree(pcdev);
  700. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  701. return 0;
  702. }
  703. static struct platform_driver mx1_camera_driver = {
  704. .driver = {
  705. .name = DRIVER_NAME,
  706. },
  707. .remove = __exit_p(mx1_camera_remove),
  708. };
  709. static int __init mx1_camera_init(void)
  710. {
  711. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  712. }
  713. static void __exit mx1_camera_exit(void)
  714. {
  715. return platform_driver_unregister(&mx1_camera_driver);
  716. }
  717. module_init(mx1_camera_init);
  718. module_exit(mx1_camera_exit);
  719. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  720. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  721. MODULE_LICENSE("GPL v2");
  722. MODULE_ALIAS("platform:" DRIVER_NAME);