pt1.c 22 KB

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  1. /*
  2. * driver for Earthsoft PT1
  3. *
  4. * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
  5. *
  6. * based on pt1dvr - http://pt1dvr.sourceforge.jp/
  7. * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/pci.h>
  27. #include <linux/kthread.h>
  28. #include <linux/freezer.h>
  29. #include "dvbdev.h"
  30. #include "dvb_demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_net.h"
  33. #include "dvb_frontend.h"
  34. #include "va1j5jf8007t.h"
  35. #include "va1j5jf8007s.h"
  36. #define DRIVER_NAME "earth-pt1"
  37. #define PT1_PAGE_SHIFT 12
  38. #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
  39. #define PT1_NR_UPACKETS 1024
  40. #define PT1_NR_BUFS 511
  41. struct pt1_buffer_page {
  42. __le32 upackets[PT1_NR_UPACKETS];
  43. };
  44. struct pt1_table_page {
  45. __le32 next_pfn;
  46. __le32 buf_pfns[PT1_NR_BUFS];
  47. };
  48. struct pt1_buffer {
  49. struct pt1_buffer_page *page;
  50. dma_addr_t addr;
  51. };
  52. struct pt1_table {
  53. struct pt1_table_page *page;
  54. dma_addr_t addr;
  55. struct pt1_buffer bufs[PT1_NR_BUFS];
  56. };
  57. #define PT1_NR_ADAPS 4
  58. struct pt1_adapter;
  59. struct pt1 {
  60. struct pci_dev *pdev;
  61. void __iomem *regs;
  62. struct i2c_adapter i2c_adap;
  63. int i2c_running;
  64. struct pt1_adapter *adaps[PT1_NR_ADAPS];
  65. struct pt1_table *tables;
  66. struct task_struct *kthread;
  67. };
  68. struct pt1_adapter {
  69. struct pt1 *pt1;
  70. int index;
  71. u8 *buf;
  72. int upacket_count;
  73. int packet_count;
  74. struct dvb_adapter adap;
  75. struct dvb_demux demux;
  76. int users;
  77. struct dmxdev dmxdev;
  78. struct dvb_net net;
  79. struct dvb_frontend *fe;
  80. int (*orig_set_voltage)(struct dvb_frontend *fe,
  81. fe_sec_voltage_t voltage);
  82. };
  83. #define pt1_printk(level, pt1, format, arg...) \
  84. dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
  85. static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
  86. {
  87. writel(data, pt1->regs + reg * 4);
  88. }
  89. static u32 pt1_read_reg(struct pt1 *pt1, int reg)
  90. {
  91. return readl(pt1->regs + reg * 4);
  92. }
  93. static int pt1_nr_tables = 64;
  94. module_param_named(nr_tables, pt1_nr_tables, int, 0);
  95. static void pt1_increment_table_count(struct pt1 *pt1)
  96. {
  97. pt1_write_reg(pt1, 0, 0x00000020);
  98. }
  99. static void pt1_init_table_count(struct pt1 *pt1)
  100. {
  101. pt1_write_reg(pt1, 0, 0x00000010);
  102. }
  103. static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
  104. {
  105. pt1_write_reg(pt1, 5, first_pfn);
  106. pt1_write_reg(pt1, 0, 0x0c000040);
  107. }
  108. static void pt1_unregister_tables(struct pt1 *pt1)
  109. {
  110. pt1_write_reg(pt1, 0, 0x08080000);
  111. }
  112. static int pt1_sync(struct pt1 *pt1)
  113. {
  114. int i;
  115. for (i = 0; i < 57; i++) {
  116. if (pt1_read_reg(pt1, 0) & 0x20000000)
  117. return 0;
  118. pt1_write_reg(pt1, 0, 0x00000008);
  119. }
  120. pt1_printk(KERN_ERR, pt1, "could not sync\n");
  121. return -EIO;
  122. }
  123. static u64 pt1_identify(struct pt1 *pt1)
  124. {
  125. int i;
  126. u64 id;
  127. id = 0;
  128. for (i = 0; i < 57; i++) {
  129. id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
  130. pt1_write_reg(pt1, 0, 0x00000008);
  131. }
  132. return id;
  133. }
  134. static int pt1_unlock(struct pt1 *pt1)
  135. {
  136. int i;
  137. pt1_write_reg(pt1, 0, 0x00000008);
  138. for (i = 0; i < 3; i++) {
  139. if (pt1_read_reg(pt1, 0) & 0x80000000)
  140. return 0;
  141. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  142. }
  143. pt1_printk(KERN_ERR, pt1, "could not unlock\n");
  144. return -EIO;
  145. }
  146. static int pt1_reset_pci(struct pt1 *pt1)
  147. {
  148. int i;
  149. pt1_write_reg(pt1, 0, 0x01010000);
  150. pt1_write_reg(pt1, 0, 0x01000000);
  151. for (i = 0; i < 10; i++) {
  152. if (pt1_read_reg(pt1, 0) & 0x00000001)
  153. return 0;
  154. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  155. }
  156. pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
  157. return -EIO;
  158. }
  159. static int pt1_reset_ram(struct pt1 *pt1)
  160. {
  161. int i;
  162. pt1_write_reg(pt1, 0, 0x02020000);
  163. pt1_write_reg(pt1, 0, 0x02000000);
  164. for (i = 0; i < 10; i++) {
  165. if (pt1_read_reg(pt1, 0) & 0x00000002)
  166. return 0;
  167. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  168. }
  169. pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
  170. return -EIO;
  171. }
  172. static int pt1_do_enable_ram(struct pt1 *pt1)
  173. {
  174. int i, j;
  175. u32 status;
  176. status = pt1_read_reg(pt1, 0) & 0x00000004;
  177. pt1_write_reg(pt1, 0, 0x00000002);
  178. for (i = 0; i < 10; i++) {
  179. for (j = 0; j < 1024; j++) {
  180. if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
  181. return 0;
  182. }
  183. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  184. }
  185. pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
  186. return -EIO;
  187. }
  188. static int pt1_enable_ram(struct pt1 *pt1)
  189. {
  190. int i, ret;
  191. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  192. for (i = 0; i < 10; i++) {
  193. ret = pt1_do_enable_ram(pt1);
  194. if (ret < 0)
  195. return ret;
  196. }
  197. return 0;
  198. }
  199. static void pt1_disable_ram(struct pt1 *pt1)
  200. {
  201. pt1_write_reg(pt1, 0, 0x0b0b0000);
  202. }
  203. static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
  204. {
  205. pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
  206. }
  207. static void pt1_init_streams(struct pt1 *pt1)
  208. {
  209. int i;
  210. for (i = 0; i < PT1_NR_ADAPS; i++)
  211. pt1_set_stream(pt1, i, 0);
  212. }
  213. static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
  214. {
  215. u32 upacket;
  216. int i;
  217. int index;
  218. struct pt1_adapter *adap;
  219. int offset;
  220. u8 *buf;
  221. if (!page->upackets[PT1_NR_UPACKETS - 1])
  222. return 0;
  223. for (i = 0; i < PT1_NR_UPACKETS; i++) {
  224. upacket = le32_to_cpu(page->upackets[i]);
  225. index = (upacket >> 29) - 1;
  226. if (index < 0 || index >= PT1_NR_ADAPS)
  227. continue;
  228. adap = pt1->adaps[index];
  229. if (upacket >> 25 & 1)
  230. adap->upacket_count = 0;
  231. else if (!adap->upacket_count)
  232. continue;
  233. buf = adap->buf;
  234. offset = adap->packet_count * 188 + adap->upacket_count * 3;
  235. buf[offset] = upacket >> 16;
  236. buf[offset + 1] = upacket >> 8;
  237. if (adap->upacket_count != 62)
  238. buf[offset + 2] = upacket;
  239. if (++adap->upacket_count >= 63) {
  240. adap->upacket_count = 0;
  241. if (++adap->packet_count >= 21) {
  242. dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
  243. adap->packet_count = 0;
  244. }
  245. }
  246. }
  247. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  248. return 1;
  249. }
  250. static int pt1_thread(void *data)
  251. {
  252. struct pt1 *pt1;
  253. int table_index;
  254. int buf_index;
  255. struct pt1_buffer_page *page;
  256. pt1 = data;
  257. set_freezable();
  258. table_index = 0;
  259. buf_index = 0;
  260. while (!kthread_should_stop()) {
  261. try_to_freeze();
  262. page = pt1->tables[table_index].bufs[buf_index].page;
  263. if (!pt1_filter(pt1, page)) {
  264. schedule_timeout_interruptible((HZ + 999) / 1000);
  265. continue;
  266. }
  267. if (++buf_index >= PT1_NR_BUFS) {
  268. pt1_increment_table_count(pt1);
  269. buf_index = 0;
  270. if (++table_index >= pt1_nr_tables)
  271. table_index = 0;
  272. }
  273. }
  274. return 0;
  275. }
  276. static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
  277. {
  278. dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
  279. }
  280. static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
  281. {
  282. void *page;
  283. dma_addr_t addr;
  284. page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
  285. GFP_KERNEL);
  286. if (page == NULL)
  287. return NULL;
  288. BUG_ON(addr & (PT1_PAGE_SIZE - 1));
  289. BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
  290. *addrp = addr;
  291. *pfnp = addr >> PT1_PAGE_SHIFT;
  292. return page;
  293. }
  294. static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
  295. {
  296. pt1_free_page(pt1, buf->page, buf->addr);
  297. }
  298. static int
  299. pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
  300. {
  301. struct pt1_buffer_page *page;
  302. dma_addr_t addr;
  303. page = pt1_alloc_page(pt1, &addr, pfnp);
  304. if (page == NULL)
  305. return -ENOMEM;
  306. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  307. buf->page = page;
  308. buf->addr = addr;
  309. return 0;
  310. }
  311. static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
  312. {
  313. int i;
  314. for (i = 0; i < PT1_NR_BUFS; i++)
  315. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  316. pt1_free_page(pt1, table->page, table->addr);
  317. }
  318. static int
  319. pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
  320. {
  321. struct pt1_table_page *page;
  322. dma_addr_t addr;
  323. int i, ret;
  324. u32 buf_pfn;
  325. page = pt1_alloc_page(pt1, &addr, pfnp);
  326. if (page == NULL)
  327. return -ENOMEM;
  328. for (i = 0; i < PT1_NR_BUFS; i++) {
  329. ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
  330. if (ret < 0)
  331. goto err;
  332. page->buf_pfns[i] = cpu_to_le32(buf_pfn);
  333. }
  334. pt1_increment_table_count(pt1);
  335. table->page = page;
  336. table->addr = addr;
  337. return 0;
  338. err:
  339. while (i--)
  340. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  341. pt1_free_page(pt1, page, addr);
  342. return ret;
  343. }
  344. static void pt1_cleanup_tables(struct pt1 *pt1)
  345. {
  346. struct pt1_table *tables;
  347. int i;
  348. tables = pt1->tables;
  349. pt1_unregister_tables(pt1);
  350. for (i = 0; i < pt1_nr_tables; i++)
  351. pt1_cleanup_table(pt1, &tables[i]);
  352. vfree(tables);
  353. }
  354. static int pt1_init_tables(struct pt1 *pt1)
  355. {
  356. struct pt1_table *tables;
  357. int i, ret;
  358. u32 first_pfn, pfn;
  359. tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
  360. if (tables == NULL)
  361. return -ENOMEM;
  362. pt1_init_table_count(pt1);
  363. i = 0;
  364. if (pt1_nr_tables) {
  365. ret = pt1_init_table(pt1, &tables[0], &first_pfn);
  366. if (ret)
  367. goto err;
  368. i++;
  369. }
  370. while (i < pt1_nr_tables) {
  371. ret = pt1_init_table(pt1, &tables[i], &pfn);
  372. if (ret)
  373. goto err;
  374. tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
  375. i++;
  376. }
  377. tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
  378. pt1_register_tables(pt1, first_pfn);
  379. pt1->tables = tables;
  380. return 0;
  381. err:
  382. while (i--)
  383. pt1_cleanup_table(pt1, &tables[i]);
  384. vfree(tables);
  385. return ret;
  386. }
  387. static int pt1_start_feed(struct dvb_demux_feed *feed)
  388. {
  389. struct pt1_adapter *adap;
  390. adap = container_of(feed->demux, struct pt1_adapter, demux);
  391. if (!adap->users++)
  392. pt1_set_stream(adap->pt1, adap->index, 1);
  393. return 0;
  394. }
  395. static int pt1_stop_feed(struct dvb_demux_feed *feed)
  396. {
  397. struct pt1_adapter *adap;
  398. adap = container_of(feed->demux, struct pt1_adapter, demux);
  399. if (!--adap->users)
  400. pt1_set_stream(adap->pt1, adap->index, 0);
  401. return 0;
  402. }
  403. static void
  404. pt1_set_power(struct pt1 *pt1, int power, int lnb, int reset)
  405. {
  406. pt1_write_reg(pt1, 1, power | lnb << 1 | !reset << 3);
  407. }
  408. static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  409. {
  410. struct pt1_adapter *adap;
  411. int lnb;
  412. adap = container_of(fe->dvb, struct pt1_adapter, adap);
  413. switch (voltage) {
  414. case SEC_VOLTAGE_13: /* actually 11V */
  415. lnb = 2;
  416. break;
  417. case SEC_VOLTAGE_18: /* actually 15V */
  418. lnb = 3;
  419. break;
  420. case SEC_VOLTAGE_OFF:
  421. lnb = 0;
  422. break;
  423. default:
  424. return -EINVAL;
  425. }
  426. pt1_set_power(adap->pt1, 1, lnb, 0);
  427. if (adap->orig_set_voltage)
  428. return adap->orig_set_voltage(fe, voltage);
  429. else
  430. return 0;
  431. }
  432. static void pt1_free_adapter(struct pt1_adapter *adap)
  433. {
  434. dvb_unregister_frontend(adap->fe);
  435. dvb_net_release(&adap->net);
  436. adap->demux.dmx.close(&adap->demux.dmx);
  437. dvb_dmxdev_release(&adap->dmxdev);
  438. dvb_dmx_release(&adap->demux);
  439. dvb_unregister_adapter(&adap->adap);
  440. free_page((unsigned long)adap->buf);
  441. kfree(adap);
  442. }
  443. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  444. static struct pt1_adapter *
  445. pt1_alloc_adapter(struct pt1 *pt1, struct dvb_frontend *fe)
  446. {
  447. struct pt1_adapter *adap;
  448. void *buf;
  449. struct dvb_adapter *dvb_adap;
  450. struct dvb_demux *demux;
  451. struct dmxdev *dmxdev;
  452. int ret;
  453. adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
  454. if (!adap) {
  455. ret = -ENOMEM;
  456. goto err;
  457. }
  458. adap->pt1 = pt1;
  459. adap->orig_set_voltage = fe->ops.set_voltage;
  460. fe->ops.set_voltage = pt1_set_voltage;
  461. buf = (u8 *)__get_free_page(GFP_KERNEL);
  462. if (!buf) {
  463. ret = -ENOMEM;
  464. goto err_kfree;
  465. }
  466. adap->buf = buf;
  467. adap->upacket_count = 0;
  468. adap->packet_count = 0;
  469. dvb_adap = &adap->adap;
  470. dvb_adap->priv = adap;
  471. ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
  472. &pt1->pdev->dev, adapter_nr);
  473. if (ret < 0)
  474. goto err_free_page;
  475. demux = &adap->demux;
  476. demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
  477. demux->priv = adap;
  478. demux->feednum = 256;
  479. demux->filternum = 256;
  480. demux->start_feed = pt1_start_feed;
  481. demux->stop_feed = pt1_stop_feed;
  482. demux->write_to_decoder = NULL;
  483. ret = dvb_dmx_init(demux);
  484. if (ret < 0)
  485. goto err_unregister_adapter;
  486. dmxdev = &adap->dmxdev;
  487. dmxdev->filternum = 256;
  488. dmxdev->demux = &demux->dmx;
  489. dmxdev->capabilities = 0;
  490. ret = dvb_dmxdev_init(dmxdev, dvb_adap);
  491. if (ret < 0)
  492. goto err_dmx_release;
  493. dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
  494. ret = dvb_register_frontend(dvb_adap, fe);
  495. if (ret < 0)
  496. goto err_net_release;
  497. adap->fe = fe;
  498. return adap;
  499. err_net_release:
  500. dvb_net_release(&adap->net);
  501. adap->demux.dmx.close(&adap->demux.dmx);
  502. dvb_dmxdev_release(&adap->dmxdev);
  503. err_dmx_release:
  504. dvb_dmx_release(demux);
  505. err_unregister_adapter:
  506. dvb_unregister_adapter(dvb_adap);
  507. err_free_page:
  508. free_page((unsigned long)buf);
  509. err_kfree:
  510. kfree(adap);
  511. err:
  512. return ERR_PTR(ret);
  513. }
  514. static void pt1_cleanup_adapters(struct pt1 *pt1)
  515. {
  516. int i;
  517. for (i = 0; i < PT1_NR_ADAPS; i++)
  518. pt1_free_adapter(pt1->adaps[i]);
  519. }
  520. struct pt1_config {
  521. struct va1j5jf8007s_config va1j5jf8007s_config;
  522. struct va1j5jf8007t_config va1j5jf8007t_config;
  523. };
  524. static const struct pt1_config pt1_configs[2] = {
  525. {
  526. { .demod_address = 0x1b },
  527. { .demod_address = 0x1a },
  528. }, {
  529. { .demod_address = 0x19 },
  530. { .demod_address = 0x18 },
  531. },
  532. };
  533. static int pt1_init_adapters(struct pt1 *pt1)
  534. {
  535. int i, j;
  536. struct i2c_adapter *i2c_adap;
  537. const struct pt1_config *config;
  538. struct dvb_frontend *fe[4];
  539. struct pt1_adapter *adap;
  540. int ret;
  541. i = 0;
  542. j = 0;
  543. i2c_adap = &pt1->i2c_adap;
  544. do {
  545. config = &pt1_configs[i / 2];
  546. fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
  547. i2c_adap);
  548. if (!fe[i]) {
  549. ret = -ENODEV; /* This does not sound nice... */
  550. goto err;
  551. }
  552. i++;
  553. fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
  554. i2c_adap);
  555. if (!fe[i]) {
  556. ret = -ENODEV;
  557. goto err;
  558. }
  559. i++;
  560. ret = va1j5jf8007s_prepare(fe[i - 2]);
  561. if (ret < 0)
  562. goto err;
  563. ret = va1j5jf8007t_prepare(fe[i - 1]);
  564. if (ret < 0)
  565. goto err;
  566. } while (i < 4);
  567. do {
  568. adap = pt1_alloc_adapter(pt1, fe[j]);
  569. if (IS_ERR(adap))
  570. goto err;
  571. adap->index = j;
  572. pt1->adaps[j] = adap;
  573. } while (++j < 4);
  574. return 0;
  575. err:
  576. while (i-- > j)
  577. fe[i]->ops.release(fe[i]);
  578. while (j--)
  579. pt1_free_adapter(pt1->adaps[j]);
  580. return ret;
  581. }
  582. static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
  583. int clock, int data, int next_addr)
  584. {
  585. pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
  586. !clock << 11 | !data << 10 | next_addr);
  587. }
  588. static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
  589. {
  590. pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
  591. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
  592. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
  593. *addrp = addr + 3;
  594. }
  595. static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
  596. {
  597. pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
  598. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
  599. pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
  600. pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
  601. *addrp = addr + 4;
  602. }
  603. static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
  604. {
  605. int i;
  606. for (i = 0; i < 8; i++)
  607. pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
  608. pt1_i2c_write_bit(pt1, addr, &addr, 1);
  609. *addrp = addr;
  610. }
  611. static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
  612. {
  613. int i;
  614. for (i = 0; i < 8; i++)
  615. pt1_i2c_read_bit(pt1, addr, &addr);
  616. pt1_i2c_write_bit(pt1, addr, &addr, last);
  617. *addrp = addr;
  618. }
  619. static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
  620. {
  621. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  622. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  623. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
  624. *addrp = addr + 3;
  625. }
  626. static void
  627. pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  628. {
  629. int i;
  630. pt1_i2c_prepare(pt1, addr, &addr);
  631. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
  632. for (i = 0; i < msg->len; i++)
  633. pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
  634. *addrp = addr;
  635. }
  636. static void
  637. pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  638. {
  639. int i;
  640. pt1_i2c_prepare(pt1, addr, &addr);
  641. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
  642. for (i = 0; i < msg->len; i++)
  643. pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
  644. *addrp = addr;
  645. }
  646. static int pt1_i2c_end(struct pt1 *pt1, int addr)
  647. {
  648. pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
  649. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  650. pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
  651. pt1_write_reg(pt1, 0, 0x00000004);
  652. do {
  653. if (signal_pending(current))
  654. return -EINTR;
  655. schedule_timeout_interruptible((HZ + 999) / 1000);
  656. } while (pt1_read_reg(pt1, 0) & 0x00000080);
  657. return 0;
  658. }
  659. static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
  660. {
  661. int addr;
  662. addr = 0;
  663. pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
  664. addr = addr + 1;
  665. if (!pt1->i2c_running) {
  666. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  667. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  668. addr = addr + 2;
  669. pt1->i2c_running = 1;
  670. }
  671. *addrp = addr;
  672. }
  673. static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  674. {
  675. struct pt1 *pt1;
  676. int i;
  677. struct i2c_msg *msg, *next_msg;
  678. int addr, ret;
  679. u16 len;
  680. u32 word;
  681. pt1 = i2c_get_adapdata(adap);
  682. for (i = 0; i < num; i++) {
  683. msg = &msgs[i];
  684. if (msg->flags & I2C_M_RD)
  685. return -ENOTSUPP;
  686. if (i + 1 < num)
  687. next_msg = &msgs[i + 1];
  688. else
  689. next_msg = NULL;
  690. if (next_msg && next_msg->flags & I2C_M_RD) {
  691. i++;
  692. len = next_msg->len;
  693. if (len > 4)
  694. return -ENOTSUPP;
  695. pt1_i2c_begin(pt1, &addr);
  696. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  697. pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
  698. ret = pt1_i2c_end(pt1, addr);
  699. if (ret < 0)
  700. return ret;
  701. word = pt1_read_reg(pt1, 2);
  702. while (len--) {
  703. next_msg->buf[len] = word;
  704. word >>= 8;
  705. }
  706. } else {
  707. pt1_i2c_begin(pt1, &addr);
  708. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  709. ret = pt1_i2c_end(pt1, addr);
  710. if (ret < 0)
  711. return ret;
  712. }
  713. }
  714. return num;
  715. }
  716. static u32 pt1_i2c_func(struct i2c_adapter *adap)
  717. {
  718. return I2C_FUNC_I2C;
  719. }
  720. static const struct i2c_algorithm pt1_i2c_algo = {
  721. .master_xfer = pt1_i2c_xfer,
  722. .functionality = pt1_i2c_func,
  723. };
  724. static void pt1_i2c_wait(struct pt1 *pt1)
  725. {
  726. int i;
  727. for (i = 0; i < 128; i++)
  728. pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
  729. }
  730. static void pt1_i2c_init(struct pt1 *pt1)
  731. {
  732. int i;
  733. for (i = 0; i < 1024; i++)
  734. pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
  735. }
  736. static void __devexit pt1_remove(struct pci_dev *pdev)
  737. {
  738. struct pt1 *pt1;
  739. void __iomem *regs;
  740. pt1 = pci_get_drvdata(pdev);
  741. regs = pt1->regs;
  742. kthread_stop(pt1->kthread);
  743. pt1_cleanup_tables(pt1);
  744. pt1_cleanup_adapters(pt1);
  745. pt1_disable_ram(pt1);
  746. pt1_set_power(pt1, 0, 0, 1);
  747. i2c_del_adapter(&pt1->i2c_adap);
  748. pci_set_drvdata(pdev, NULL);
  749. kfree(pt1);
  750. pci_iounmap(pdev, regs);
  751. pci_release_regions(pdev);
  752. pci_disable_device(pdev);
  753. }
  754. static int __devinit
  755. pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  756. {
  757. int ret;
  758. void __iomem *regs;
  759. struct pt1 *pt1;
  760. struct i2c_adapter *i2c_adap;
  761. struct task_struct *kthread;
  762. ret = pci_enable_device(pdev);
  763. if (ret < 0)
  764. goto err;
  765. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  766. if (ret < 0)
  767. goto err_pci_disable_device;
  768. pci_set_master(pdev);
  769. ret = pci_request_regions(pdev, DRIVER_NAME);
  770. if (ret < 0)
  771. goto err_pci_disable_device;
  772. regs = pci_iomap(pdev, 0, 0);
  773. if (!regs) {
  774. ret = -EIO;
  775. goto err_pci_release_regions;
  776. }
  777. pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
  778. if (!pt1) {
  779. ret = -ENOMEM;
  780. goto err_pci_iounmap;
  781. }
  782. pt1->pdev = pdev;
  783. pt1->regs = regs;
  784. pci_set_drvdata(pdev, pt1);
  785. i2c_adap = &pt1->i2c_adap;
  786. i2c_adap->class = I2C_CLASS_TV_DIGITAL;
  787. i2c_adap->algo = &pt1_i2c_algo;
  788. i2c_adap->algo_data = NULL;
  789. i2c_adap->dev.parent = &pdev->dev;
  790. i2c_set_adapdata(i2c_adap, pt1);
  791. ret = i2c_add_adapter(i2c_adap);
  792. if (ret < 0)
  793. goto err_kfree;
  794. pt1_set_power(pt1, 0, 0, 1);
  795. pt1_i2c_init(pt1);
  796. pt1_i2c_wait(pt1);
  797. ret = pt1_sync(pt1);
  798. if (ret < 0)
  799. goto err_i2c_del_adapter;
  800. pt1_identify(pt1);
  801. ret = pt1_unlock(pt1);
  802. if (ret < 0)
  803. goto err_i2c_del_adapter;
  804. ret = pt1_reset_pci(pt1);
  805. if (ret < 0)
  806. goto err_i2c_del_adapter;
  807. ret = pt1_reset_ram(pt1);
  808. if (ret < 0)
  809. goto err_i2c_del_adapter;
  810. ret = pt1_enable_ram(pt1);
  811. if (ret < 0)
  812. goto err_i2c_del_adapter;
  813. pt1_init_streams(pt1);
  814. pt1_set_power(pt1, 1, 0, 1);
  815. schedule_timeout_uninterruptible((HZ + 49) / 50);
  816. pt1_set_power(pt1, 1, 0, 0);
  817. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  818. ret = pt1_init_adapters(pt1);
  819. if (ret < 0)
  820. goto err_pt1_disable_ram;
  821. ret = pt1_init_tables(pt1);
  822. if (ret < 0)
  823. goto err_pt1_cleanup_adapters;
  824. kthread = kthread_run(pt1_thread, pt1, "pt1");
  825. if (IS_ERR(kthread)) {
  826. ret = PTR_ERR(kthread);
  827. goto err_pt1_cleanup_tables;
  828. }
  829. pt1->kthread = kthread;
  830. return 0;
  831. err_pt1_cleanup_tables:
  832. pt1_cleanup_tables(pt1);
  833. err_pt1_cleanup_adapters:
  834. pt1_cleanup_adapters(pt1);
  835. err_pt1_disable_ram:
  836. pt1_disable_ram(pt1);
  837. pt1_set_power(pt1, 0, 0, 1);
  838. err_i2c_del_adapter:
  839. i2c_del_adapter(i2c_adap);
  840. err_kfree:
  841. pci_set_drvdata(pdev, NULL);
  842. kfree(pt1);
  843. err_pci_iounmap:
  844. pci_iounmap(pdev, regs);
  845. err_pci_release_regions:
  846. pci_release_regions(pdev);
  847. err_pci_disable_device:
  848. pci_disable_device(pdev);
  849. err:
  850. return ret;
  851. }
  852. static struct pci_device_id pt1_id_table[] = {
  853. { PCI_DEVICE(0x10ee, 0x211a) },
  854. { },
  855. };
  856. MODULE_DEVICE_TABLE(pci, pt1_id_table);
  857. static struct pci_driver pt1_driver = {
  858. .name = DRIVER_NAME,
  859. .probe = pt1_probe,
  860. .remove = __devexit_p(pt1_remove),
  861. .id_table = pt1_id_table,
  862. };
  863. static int __init pt1_init(void)
  864. {
  865. return pci_register_driver(&pt1_driver);
  866. }
  867. static void __exit pt1_cleanup(void)
  868. {
  869. pci_unregister_driver(&pt1_driver);
  870. }
  871. module_init(pt1_init);
  872. module_exit(pt1_cleanup);
  873. MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
  874. MODULE_DESCRIPTION("Earthsoft PT1 Driver");
  875. MODULE_LICENSE("GPL");