pluto2.c 20 KB

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  1. /*
  2. * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
  3. *
  4. * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
  5. *
  6. * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
  7. * by Dany Salman <salmandany@yahoo.fr>
  8. * Copyright (c) 2004 TDF
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. */
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include "demux.h"
  33. #include "dmxdev.h"
  34. #include "dvb_demux.h"
  35. #include "dvb_frontend.h"
  36. #include "dvb_net.h"
  37. #include "dvbdev.h"
  38. #include "tda1004x.h"
  39. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  40. #define DRIVER_NAME "pluto2"
  41. #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
  42. #define REG_PCAR 0x0020 /* PC address register */
  43. #define REG_TSCR 0x0024 /* TS ctrl & status */
  44. #define REG_MISC 0x0028 /* miscellaneous */
  45. #define REG_MMAC 0x002c /* MSB MAC address */
  46. #define REG_IMAC 0x0030 /* ISB MAC address */
  47. #define REG_LMAC 0x0034 /* LSB MAC address */
  48. #define REG_SPID 0x0038 /* SPI data */
  49. #define REG_SLCS 0x003c /* serial links ctrl/status */
  50. #define PID0_NOFIL (0x0001 << 16)
  51. #define PIDn_ENP (0x0001 << 15)
  52. #define PID0_END (0x0001 << 14)
  53. #define PID0_AFIL (0x0001 << 13)
  54. #define PIDn_PID (0x1fff << 0)
  55. #define TSCR_NBPACKETS (0x00ff << 24)
  56. #define TSCR_DEM (0x0001 << 17)
  57. #define TSCR_DE (0x0001 << 16)
  58. #define TSCR_RSTN (0x0001 << 15)
  59. #define TSCR_MSKO (0x0001 << 14)
  60. #define TSCR_MSKA (0x0001 << 13)
  61. #define TSCR_MSKL (0x0001 << 12)
  62. #define TSCR_OVR (0x0001 << 11)
  63. #define TSCR_AFUL (0x0001 << 10)
  64. #define TSCR_LOCK (0x0001 << 9)
  65. #define TSCR_IACK (0x0001 << 8)
  66. #define TSCR_ADEF (0x007f << 0)
  67. #define MISC_DVR (0x0fff << 4)
  68. #define MISC_ALED (0x0001 << 3)
  69. #define MISC_FRST (0x0001 << 2)
  70. #define MISC_LED1 (0x0001 << 1)
  71. #define MISC_LED0 (0x0001 << 0)
  72. #define SPID_SPIDR (0x00ff << 0)
  73. #define SLCS_SCL (0x0001 << 7)
  74. #define SLCS_SDA (0x0001 << 6)
  75. #define SLCS_CSN (0x0001 << 2)
  76. #define SLCS_OVR (0x0001 << 1)
  77. #define SLCS_SWC (0x0001 << 0)
  78. #define TS_DMA_PACKETS (8)
  79. #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
  80. #define I2C_ADDR_TDA10046 0x10
  81. #define I2C_ADDR_TUA6034 0xc2
  82. #define NHWFILTERS 8
  83. struct pluto {
  84. /* pci */
  85. struct pci_dev *pdev;
  86. u8 __iomem *io_mem;
  87. /* dvb */
  88. struct dmx_frontend hw_frontend;
  89. struct dmx_frontend mem_frontend;
  90. struct dmxdev dmxdev;
  91. struct dvb_adapter dvb_adapter;
  92. struct dvb_demux demux;
  93. struct dvb_frontend *fe;
  94. struct dvb_net dvbnet;
  95. unsigned int full_ts_users;
  96. unsigned int users;
  97. /* i2c */
  98. struct i2c_algo_bit_data i2c_bit;
  99. struct i2c_adapter i2c_adap;
  100. unsigned int i2cbug;
  101. /* irq */
  102. unsigned int overflow;
  103. unsigned int dead;
  104. /* dma */
  105. dma_addr_t dma_addr;
  106. u8 dma_buf[TS_DMA_BYTES];
  107. u8 dummy[4096];
  108. };
  109. static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
  110. {
  111. return container_of(feed->demux, struct pluto, demux);
  112. }
  113. static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
  114. {
  115. return container_of(fe->dvb, struct pluto, dvb_adapter);
  116. }
  117. static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
  118. {
  119. return readl(&pluto->io_mem[reg]);
  120. }
  121. static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
  122. {
  123. writel(val, &pluto->io_mem[reg]);
  124. }
  125. static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
  126. {
  127. u32 val = readl(&pluto->io_mem[reg]);
  128. val &= ~mask;
  129. val |= bits;
  130. writel(val, &pluto->io_mem[reg]);
  131. }
  132. static void pluto_write_tscr(struct pluto *pluto, u32 val)
  133. {
  134. /* set the number of packets */
  135. val &= ~TSCR_ADEF;
  136. val |= TS_DMA_PACKETS / 2;
  137. pluto_writereg(pluto, REG_TSCR, val);
  138. }
  139. static void pluto_setsda(void *data, int state)
  140. {
  141. struct pluto *pluto = data;
  142. if (state)
  143. pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
  144. else
  145. pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
  146. }
  147. static void pluto_setscl(void *data, int state)
  148. {
  149. struct pluto *pluto = data;
  150. if (state)
  151. pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
  152. else
  153. pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
  154. /* try to detect i2c_inb() to workaround hardware bug:
  155. * reset SDA to high after SCL has been set to low */
  156. if ((state) && (pluto->i2cbug == 0)) {
  157. pluto->i2cbug = 1;
  158. } else {
  159. if ((!state) && (pluto->i2cbug == 1))
  160. pluto_setsda(pluto, 1);
  161. pluto->i2cbug = 0;
  162. }
  163. }
  164. static int pluto_getsda(void *data)
  165. {
  166. struct pluto *pluto = data;
  167. return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
  168. }
  169. static int pluto_getscl(void *data)
  170. {
  171. struct pluto *pluto = data;
  172. return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
  173. }
  174. static void pluto_reset_frontend(struct pluto *pluto, int reenable)
  175. {
  176. u32 val = pluto_readreg(pluto, REG_MISC);
  177. if (val & MISC_FRST) {
  178. val &= ~MISC_FRST;
  179. pluto_writereg(pluto, REG_MISC, val);
  180. }
  181. if (reenable) {
  182. val |= MISC_FRST;
  183. pluto_writereg(pluto, REG_MISC, val);
  184. }
  185. }
  186. static void pluto_reset_ts(struct pluto *pluto, int reenable)
  187. {
  188. u32 val = pluto_readreg(pluto, REG_TSCR);
  189. if (val & TSCR_RSTN) {
  190. val &= ~TSCR_RSTN;
  191. pluto_write_tscr(pluto, val);
  192. }
  193. if (reenable) {
  194. val |= TSCR_RSTN;
  195. pluto_write_tscr(pluto, val);
  196. }
  197. }
  198. static void pluto_set_dma_addr(struct pluto *pluto)
  199. {
  200. pluto_writereg(pluto, REG_PCAR, pluto->dma_addr);
  201. }
  202. static int __devinit pluto_dma_map(struct pluto *pluto)
  203. {
  204. pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
  205. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  206. return pci_dma_mapping_error(pluto->pdev, pluto->dma_addr);
  207. }
  208. static void pluto_dma_unmap(struct pluto *pluto)
  209. {
  210. pci_unmap_single(pluto->pdev, pluto->dma_addr,
  211. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  212. }
  213. static int pluto_start_feed(struct dvb_demux_feed *f)
  214. {
  215. struct pluto *pluto = feed_to_pluto(f);
  216. /* enable PID filtering */
  217. if (pluto->users++ == 0)
  218. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
  219. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  220. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
  221. else if (pluto->full_ts_users++ == 0)
  222. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
  223. return 0;
  224. }
  225. static int pluto_stop_feed(struct dvb_demux_feed *f)
  226. {
  227. struct pluto *pluto = feed_to_pluto(f);
  228. /* disable PID filtering */
  229. if (--pluto->users == 0)
  230. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
  231. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  232. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
  233. else if (--pluto->full_ts_users == 0)
  234. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
  235. return 0;
  236. }
  237. static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
  238. {
  239. /* synchronize the DMA transfer with the CPU
  240. * first so that we see updated contents. */
  241. pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
  242. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  243. /* Workaround for broken hardware:
  244. * [1] On startup NBPACKETS seems to contain an uninitialized value,
  245. * but no packets have been transfered.
  246. * [2] Sometimes (actually very often) NBPACKETS stays at zero
  247. * although one packet has been transfered.
  248. * [3] Sometimes (actually rarely), the card gets into an erroneous
  249. * mode where it continuously generates interrupts, claiming it
  250. * has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
  251. * has been transfered. Only a reset seems to solve this
  252. */
  253. if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
  254. unsigned int i = 0;
  255. while (pluto->dma_buf[i] == 0x47)
  256. i += 188;
  257. nbpackets = i / 188;
  258. if (i == 0) {
  259. pluto_reset_ts(pluto, 1);
  260. dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n");
  261. }
  262. }
  263. dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
  264. /* clear the dma buffer. this is needed to be able to identify
  265. * new valid ts packets above */
  266. memset(pluto->dma_buf, 0, nbpackets * 188);
  267. /* reset the dma address */
  268. pluto_set_dma_addr(pluto);
  269. /* sync the buffer and give it back to the card */
  270. pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
  271. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  272. }
  273. static irqreturn_t pluto_irq(int irq, void *dev_id)
  274. {
  275. struct pluto *pluto = dev_id;
  276. u32 tscr;
  277. /* check whether an interrupt occured on this device */
  278. tscr = pluto_readreg(pluto, REG_TSCR);
  279. if (!(tscr & (TSCR_DE | TSCR_OVR)))
  280. return IRQ_NONE;
  281. if (tscr == 0xffffffff) {
  282. if (pluto->dead == 0)
  283. dev_err(&pluto->pdev->dev, "card has hung or been ejected.\n");
  284. /* It's dead Jim */
  285. pluto->dead = 1;
  286. return IRQ_HANDLED;
  287. }
  288. /* dma end interrupt */
  289. if (tscr & TSCR_DE) {
  290. pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
  291. /* overflow interrupt */
  292. if (tscr & TSCR_OVR)
  293. pluto->overflow++;
  294. if (pluto->overflow) {
  295. dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
  296. pluto->overflow);
  297. pluto_reset_ts(pluto, 1);
  298. pluto->overflow = 0;
  299. }
  300. } else if (tscr & TSCR_OVR) {
  301. pluto->overflow++;
  302. }
  303. /* ACK the interrupt */
  304. pluto_write_tscr(pluto, tscr | TSCR_IACK);
  305. return IRQ_HANDLED;
  306. }
  307. static void __devinit pluto_enable_irqs(struct pluto *pluto)
  308. {
  309. u32 val = pluto_readreg(pluto, REG_TSCR);
  310. /* disable AFUL and LOCK interrupts */
  311. val |= (TSCR_MSKA | TSCR_MSKL);
  312. /* enable DMA and OVERFLOW interrupts */
  313. val &= ~(TSCR_DEM | TSCR_MSKO);
  314. /* clear pending interrupts */
  315. val |= TSCR_IACK;
  316. pluto_write_tscr(pluto, val);
  317. }
  318. static void pluto_disable_irqs(struct pluto *pluto)
  319. {
  320. u32 val = pluto_readreg(pluto, REG_TSCR);
  321. /* disable all interrupts */
  322. val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
  323. /* clear pending interrupts */
  324. val |= TSCR_IACK;
  325. pluto_write_tscr(pluto, val);
  326. }
  327. static int __devinit pluto_hw_init(struct pluto *pluto)
  328. {
  329. pluto_reset_frontend(pluto, 1);
  330. /* set automatic LED control by FPGA */
  331. pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
  332. /* set data endianess */
  333. #ifdef __LITTLE_ENDIAN
  334. pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
  335. #else
  336. pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
  337. #endif
  338. /* map DMA and set address */
  339. pluto_dma_map(pluto);
  340. pluto_set_dma_addr(pluto);
  341. /* enable interrupts */
  342. pluto_enable_irqs(pluto);
  343. /* reset TS logic */
  344. pluto_reset_ts(pluto, 1);
  345. return 0;
  346. }
  347. static void pluto_hw_exit(struct pluto *pluto)
  348. {
  349. /* disable interrupts */
  350. pluto_disable_irqs(pluto);
  351. pluto_reset_ts(pluto, 0);
  352. /* LED: disable automatic control, enable yellow, disable green */
  353. pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
  354. /* unmap DMA */
  355. pluto_dma_unmap(pluto);
  356. pluto_reset_frontend(pluto, 0);
  357. }
  358. static inline u32 divide(u32 numerator, u32 denominator)
  359. {
  360. if (denominator == 0)
  361. return ~0;
  362. return DIV_ROUND_CLOSEST(numerator, denominator);
  363. }
  364. /* LG Innotek TDTE-E001P (Infineon TUA6034) */
  365. static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
  366. struct dvb_frontend_parameters *p)
  367. {
  368. struct pluto *pluto = frontend_to_pluto(fe);
  369. struct i2c_msg msg;
  370. int ret;
  371. u8 buf[4];
  372. u32 div;
  373. // Fref = 166.667 Hz
  374. // Fref * 3 = 500.000 Hz
  375. // IF = 36166667
  376. // IF / Fref = 217
  377. //div = divide(p->frequency + 36166667, 166667);
  378. div = divide(p->frequency * 3, 500000) + 217;
  379. buf[0] = (div >> 8) & 0x7f;
  380. buf[1] = (div >> 0) & 0xff;
  381. if (p->frequency < 611000000)
  382. buf[2] = 0xb4;
  383. else if (p->frequency < 811000000)
  384. buf[2] = 0xbc;
  385. else
  386. buf[2] = 0xf4;
  387. // VHF: 174-230 MHz
  388. // center: 350 MHz
  389. // UHF: 470-862 MHz
  390. if (p->frequency < 350000000)
  391. buf[3] = 0x02;
  392. else
  393. buf[3] = 0x04;
  394. if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
  395. buf[3] |= 0x08;
  396. if (sizeof(buf) == 6) {
  397. buf[4] = buf[2];
  398. buf[4] &= ~0x1c;
  399. buf[4] |= 0x18;
  400. buf[5] = (0 << 7) | (2 << 4);
  401. }
  402. msg.addr = I2C_ADDR_TUA6034 >> 1;
  403. msg.flags = 0;
  404. msg.buf = buf;
  405. msg.len = sizeof(buf);
  406. if (fe->ops.i2c_gate_ctrl)
  407. fe->ops.i2c_gate_ctrl(fe, 1);
  408. ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
  409. if (ret < 0)
  410. return ret;
  411. else if (ret == 0)
  412. return -EREMOTEIO;
  413. return 0;
  414. }
  415. static int pluto2_request_firmware(struct dvb_frontend *fe,
  416. const struct firmware **fw, char *name)
  417. {
  418. struct pluto *pluto = frontend_to_pluto(fe);
  419. return request_firmware(fw, name, &pluto->pdev->dev);
  420. }
  421. static struct tda1004x_config pluto2_fe_config __devinitdata = {
  422. .demod_address = I2C_ADDR_TDA10046 >> 1,
  423. .invert = 1,
  424. .invert_oclk = 0,
  425. .xtal_freq = TDA10046_XTAL_16M,
  426. .agc_config = TDA10046_AGC_DEFAULT,
  427. .if_freq = TDA10046_FREQ_3617,
  428. .request_firmware = pluto2_request_firmware,
  429. };
  430. static int __devinit frontend_init(struct pluto *pluto)
  431. {
  432. int ret;
  433. pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
  434. if (!pluto->fe) {
  435. dev_err(&pluto->pdev->dev, "could not attach frontend\n");
  436. return -ENODEV;
  437. }
  438. pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
  439. ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
  440. if (ret < 0) {
  441. if (pluto->fe->ops.release)
  442. pluto->fe->ops.release(pluto->fe);
  443. return ret;
  444. }
  445. return 0;
  446. }
  447. static void __devinit pluto_read_rev(struct pluto *pluto)
  448. {
  449. u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
  450. dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
  451. (val >> 12) & 0x0f, (val >> 4) & 0xff);
  452. }
  453. static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
  454. {
  455. u32 val = pluto_readreg(pluto, REG_MMAC);
  456. mac[0] = (val >> 8) & 0xff;
  457. mac[1] = (val >> 0) & 0xff;
  458. val = pluto_readreg(pluto, REG_IMAC);
  459. mac[2] = (val >> 8) & 0xff;
  460. mac[3] = (val >> 0) & 0xff;
  461. val = pluto_readreg(pluto, REG_LMAC);
  462. mac[4] = (val >> 8) & 0xff;
  463. mac[5] = (val >> 0) & 0xff;
  464. dev_info(&pluto->pdev->dev, "MAC %pM\n", mac);
  465. }
  466. static int __devinit pluto_read_serial(struct pluto *pluto)
  467. {
  468. struct pci_dev *pdev = pluto->pdev;
  469. unsigned int i, j;
  470. u8 __iomem *cis;
  471. cis = pci_iomap(pdev, 1, 0);
  472. if (!cis)
  473. return -EIO;
  474. dev_info(&pdev->dev, "S/N ");
  475. for (i = 0xe0; i < 0x100; i += 4) {
  476. u32 val = readl(&cis[i]);
  477. for (j = 0; j < 32; j += 8) {
  478. if ((val & 0xff) == 0xff)
  479. goto out;
  480. printk("%c", val & 0xff);
  481. val >>= 8;
  482. }
  483. }
  484. out:
  485. printk("\n");
  486. pci_iounmap(pdev, cis);
  487. return 0;
  488. }
  489. static int __devinit pluto2_probe(struct pci_dev *pdev,
  490. const struct pci_device_id *ent)
  491. {
  492. struct pluto *pluto;
  493. struct dvb_adapter *dvb_adapter;
  494. struct dvb_demux *dvbdemux;
  495. struct dmx_demux *dmx;
  496. int ret = -ENOMEM;
  497. pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
  498. if (!pluto)
  499. goto out;
  500. pluto->pdev = pdev;
  501. ret = pci_enable_device(pdev);
  502. if (ret < 0)
  503. goto err_kfree;
  504. /* enable interrupts */
  505. pci_write_config_dword(pdev, 0x6c, 0x8000);
  506. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  507. if (ret < 0)
  508. goto err_pci_disable_device;
  509. pci_set_master(pdev);
  510. ret = pci_request_regions(pdev, DRIVER_NAME);
  511. if (ret < 0)
  512. goto err_pci_disable_device;
  513. pluto->io_mem = pci_iomap(pdev, 0, 0x40);
  514. if (!pluto->io_mem) {
  515. ret = -EIO;
  516. goto err_pci_release_regions;
  517. }
  518. pci_set_drvdata(pdev, pluto);
  519. ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
  520. if (ret < 0)
  521. goto err_pci_iounmap;
  522. ret = pluto_hw_init(pluto);
  523. if (ret < 0)
  524. goto err_free_irq;
  525. /* i2c */
  526. i2c_set_adapdata(&pluto->i2c_adap, pluto);
  527. strcpy(pluto->i2c_adap.name, DRIVER_NAME);
  528. pluto->i2c_adap.owner = THIS_MODULE;
  529. pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  530. pluto->i2c_adap.dev.parent = &pdev->dev;
  531. pluto->i2c_adap.algo_data = &pluto->i2c_bit;
  532. pluto->i2c_bit.data = pluto;
  533. pluto->i2c_bit.setsda = pluto_setsda;
  534. pluto->i2c_bit.setscl = pluto_setscl;
  535. pluto->i2c_bit.getsda = pluto_getsda;
  536. pluto->i2c_bit.getscl = pluto_getscl;
  537. pluto->i2c_bit.udelay = 10;
  538. pluto->i2c_bit.timeout = 10;
  539. /* Raise SCL and SDA */
  540. pluto_setsda(pluto, 1);
  541. pluto_setscl(pluto, 1);
  542. ret = i2c_bit_add_bus(&pluto->i2c_adap);
  543. if (ret < 0)
  544. goto err_pluto_hw_exit;
  545. /* dvb */
  546. ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME,
  547. THIS_MODULE, &pdev->dev, adapter_nr);
  548. if (ret < 0)
  549. goto err_i2c_del_adapter;
  550. dvb_adapter = &pluto->dvb_adapter;
  551. pluto_read_rev(pluto);
  552. pluto_read_serial(pluto);
  553. pluto_read_mac(pluto, dvb_adapter->proposed_mac);
  554. dvbdemux = &pluto->demux;
  555. dvbdemux->filternum = 256;
  556. dvbdemux->feednum = 256;
  557. dvbdemux->start_feed = pluto_start_feed;
  558. dvbdemux->stop_feed = pluto_stop_feed;
  559. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  560. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  561. ret = dvb_dmx_init(dvbdemux);
  562. if (ret < 0)
  563. goto err_dvb_unregister_adapter;
  564. dmx = &dvbdemux->dmx;
  565. pluto->hw_frontend.source = DMX_FRONTEND_0;
  566. pluto->mem_frontend.source = DMX_MEMORY_FE;
  567. pluto->dmxdev.filternum = NHWFILTERS;
  568. pluto->dmxdev.demux = dmx;
  569. ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
  570. if (ret < 0)
  571. goto err_dvb_dmx_release;
  572. ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
  573. if (ret < 0)
  574. goto err_dvb_dmxdev_release;
  575. ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
  576. if (ret < 0)
  577. goto err_remove_hw_frontend;
  578. ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
  579. if (ret < 0)
  580. goto err_remove_mem_frontend;
  581. ret = frontend_init(pluto);
  582. if (ret < 0)
  583. goto err_disconnect_frontend;
  584. dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
  585. out:
  586. return ret;
  587. err_disconnect_frontend:
  588. dmx->disconnect_frontend(dmx);
  589. err_remove_mem_frontend:
  590. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  591. err_remove_hw_frontend:
  592. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  593. err_dvb_dmxdev_release:
  594. dvb_dmxdev_release(&pluto->dmxdev);
  595. err_dvb_dmx_release:
  596. dvb_dmx_release(dvbdemux);
  597. err_dvb_unregister_adapter:
  598. dvb_unregister_adapter(dvb_adapter);
  599. err_i2c_del_adapter:
  600. i2c_del_adapter(&pluto->i2c_adap);
  601. err_pluto_hw_exit:
  602. pluto_hw_exit(pluto);
  603. err_free_irq:
  604. free_irq(pdev->irq, pluto);
  605. err_pci_iounmap:
  606. pci_iounmap(pdev, pluto->io_mem);
  607. err_pci_release_regions:
  608. pci_release_regions(pdev);
  609. err_pci_disable_device:
  610. pci_disable_device(pdev);
  611. err_kfree:
  612. pci_set_drvdata(pdev, NULL);
  613. kfree(pluto);
  614. goto out;
  615. }
  616. static void __devexit pluto2_remove(struct pci_dev *pdev)
  617. {
  618. struct pluto *pluto = pci_get_drvdata(pdev);
  619. struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
  620. struct dvb_demux *dvbdemux = &pluto->demux;
  621. struct dmx_demux *dmx = &dvbdemux->dmx;
  622. dmx->close(dmx);
  623. dvb_net_release(&pluto->dvbnet);
  624. if (pluto->fe)
  625. dvb_unregister_frontend(pluto->fe);
  626. dmx->disconnect_frontend(dmx);
  627. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  628. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  629. dvb_dmxdev_release(&pluto->dmxdev);
  630. dvb_dmx_release(dvbdemux);
  631. dvb_unregister_adapter(dvb_adapter);
  632. i2c_del_adapter(&pluto->i2c_adap);
  633. pluto_hw_exit(pluto);
  634. free_irq(pdev->irq, pluto);
  635. pci_iounmap(pdev, pluto->io_mem);
  636. pci_release_regions(pdev);
  637. pci_disable_device(pdev);
  638. pci_set_drvdata(pdev, NULL);
  639. kfree(pluto);
  640. }
  641. #ifndef PCI_VENDOR_ID_SCM
  642. #define PCI_VENDOR_ID_SCM 0x0432
  643. #endif
  644. #ifndef PCI_DEVICE_ID_PLUTO2
  645. #define PCI_DEVICE_ID_PLUTO2 0x0001
  646. #endif
  647. static struct pci_device_id pluto2_id_table[] __devinitdata = {
  648. {
  649. .vendor = PCI_VENDOR_ID_SCM,
  650. .device = PCI_DEVICE_ID_PLUTO2,
  651. .subvendor = PCI_ANY_ID,
  652. .subdevice = PCI_ANY_ID,
  653. }, {
  654. /* empty */
  655. },
  656. };
  657. MODULE_DEVICE_TABLE(pci, pluto2_id_table);
  658. static struct pci_driver pluto2_driver = {
  659. .name = DRIVER_NAME,
  660. .id_table = pluto2_id_table,
  661. .probe = pluto2_probe,
  662. .remove = __devexit_p(pluto2_remove),
  663. };
  664. static int __init pluto2_init(void)
  665. {
  666. return pci_register_driver(&pluto2_driver);
  667. }
  668. static void __exit pluto2_exit(void)
  669. {
  670. pci_unregister_driver(&pluto2_driver);
  671. }
  672. module_init(pluto2_init);
  673. module_exit(pluto2_exit);
  674. MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
  675. MODULE_DESCRIPTION("Pluto2 driver");
  676. MODULE_LICENSE("GPL");