via-pmu.c 61 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/smp_lock.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/sysdev.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <asm/prom.h>
  49. #include <asm/machdep.h>
  50. #include <asm/io.h>
  51. #include <asm/pgtable.h>
  52. #include <asm/system.h>
  53. #include <asm/sections.h>
  54. #include <asm/irq.h>
  55. #include <asm/pmac_feature.h>
  56. #include <asm/pmac_pfunc.h>
  57. #include <asm/pmac_low_i2c.h>
  58. #include <asm/uaccess.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/cputable.h>
  61. #include <asm/time.h>
  62. #include <asm/backlight.h>
  63. #include "via-pmu-event.h"
  64. /* Some compile options */
  65. #undef DEBUG_SLEEP
  66. /* Misc minor number allocated for /dev/pmu */
  67. #define PMU_MINOR 154
  68. /* How many iterations between battery polls */
  69. #define BATTERY_POLLING_COUNT 2
  70. static volatile unsigned char __iomem *via;
  71. /* VIA registers - spaced 0x200 bytes apart */
  72. #define RS 0x200 /* skip between registers */
  73. #define B 0 /* B-side data */
  74. #define A RS /* A-side data */
  75. #define DIRB (2*RS) /* B-side direction (1=output) */
  76. #define DIRA (3*RS) /* A-side direction (1=output) */
  77. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  78. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  79. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  80. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  81. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  82. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  83. #define SR (10*RS) /* Shift register */
  84. #define ACR (11*RS) /* Auxiliary control register */
  85. #define PCR (12*RS) /* Peripheral control register */
  86. #define IFR (13*RS) /* Interrupt flag register */
  87. #define IER (14*RS) /* Interrupt enable register */
  88. #define ANH (15*RS) /* A-side data, no handshake */
  89. /* Bits in B data register: both active low */
  90. #define TACK 0x08 /* Transfer acknowledge (input) */
  91. #define TREQ 0x10 /* Transfer request (output) */
  92. /* Bits in ACR */
  93. #define SR_CTRL 0x1c /* Shift register control bits */
  94. #define SR_EXT 0x0c /* Shift on external clock */
  95. #define SR_OUT 0x10 /* Shift out if 1 */
  96. /* Bits in IFR and IER */
  97. #define IER_SET 0x80 /* set bits in IER */
  98. #define IER_CLR 0 /* clear bits in IER */
  99. #define SR_INT 0x04 /* Shift register full/empty */
  100. #define CB2_INT 0x08
  101. #define CB1_INT 0x10 /* transition on CB1 input */
  102. static volatile enum pmu_state {
  103. idle,
  104. sending,
  105. intack,
  106. reading,
  107. reading_intr,
  108. locked,
  109. } pmu_state;
  110. static volatile enum int_data_state {
  111. int_data_empty,
  112. int_data_fill,
  113. int_data_ready,
  114. int_data_flush
  115. } int_data_state[2] = { int_data_empty, int_data_empty };
  116. static struct adb_request *current_req;
  117. static struct adb_request *last_req;
  118. static struct adb_request *req_awaiting_reply;
  119. static unsigned char interrupt_data[2][32];
  120. static int interrupt_data_len[2];
  121. static int int_data_last;
  122. static unsigned char *reply_ptr;
  123. static int data_index;
  124. static int data_len;
  125. static volatile int adb_int_pending;
  126. static volatile int disable_poll;
  127. static struct device_node *vias;
  128. static int pmu_kind = PMU_UNKNOWN;
  129. static int pmu_fully_inited;
  130. static int pmu_has_adb;
  131. static struct device_node *gpio_node;
  132. static unsigned char __iomem *gpio_reg;
  133. static int gpio_irq = NO_IRQ;
  134. static int gpio_irq_enabled = -1;
  135. static volatile int pmu_suspended;
  136. static spinlock_t pmu_lock;
  137. static u8 pmu_intr_mask;
  138. static int pmu_version;
  139. static int drop_interrupts;
  140. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  141. static int option_lid_wakeup = 1;
  142. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  143. static unsigned long async_req_locks;
  144. static unsigned int pmu_irq_stats[11];
  145. static struct proc_dir_entry *proc_pmu_root;
  146. static struct proc_dir_entry *proc_pmu_info;
  147. static struct proc_dir_entry *proc_pmu_irqstats;
  148. static struct proc_dir_entry *proc_pmu_options;
  149. static int option_server_mode;
  150. int pmu_battery_count;
  151. int pmu_cur_battery;
  152. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  153. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  154. static int query_batt_timer = BATTERY_POLLING_COUNT;
  155. static struct adb_request batt_req;
  156. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  157. int __fake_sleep;
  158. int asleep;
  159. #ifdef CONFIG_ADB
  160. static int adb_dev_map;
  161. static int pmu_adb_flags;
  162. static int pmu_probe(void);
  163. static int pmu_init(void);
  164. static int pmu_send_request(struct adb_request *req, int sync);
  165. static int pmu_adb_autopoll(int devs);
  166. static int pmu_adb_reset_bus(void);
  167. #endif /* CONFIG_ADB */
  168. static int init_pmu(void);
  169. static void pmu_start(void);
  170. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  171. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  172. static const struct file_operations pmu_info_proc_fops;
  173. static const struct file_operations pmu_irqstats_proc_fops;
  174. static void pmu_pass_intr(unsigned char *data, int len);
  175. static const struct file_operations pmu_battery_proc_fops;
  176. static const struct file_operations pmu_options_proc_fops;
  177. #ifdef CONFIG_ADB
  178. struct adb_driver via_pmu_driver = {
  179. "PMU",
  180. pmu_probe,
  181. pmu_init,
  182. pmu_send_request,
  183. pmu_adb_autopoll,
  184. pmu_poll_adb,
  185. pmu_adb_reset_bus
  186. };
  187. #endif /* CONFIG_ADB */
  188. extern void low_sleep_handler(void);
  189. extern void enable_kernel_altivec(void);
  190. extern void enable_kernel_fp(void);
  191. #ifdef DEBUG_SLEEP
  192. int pmu_polled_request(struct adb_request *req);
  193. void pmu_blink(int n);
  194. #endif
  195. /*
  196. * This table indicates for each PMU opcode:
  197. * - the number of data bytes to be sent with the command, or -1
  198. * if a length byte should be sent,
  199. * - the number of response bytes which the PMU will return, or
  200. * -1 if it will send a length byte.
  201. */
  202. static const s8 pmu_data_len[256][2] = {
  203. /* 0 1 2 3 4 5 6 7 */
  204. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  205. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  206. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  207. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  208. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  209. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  210. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  211. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  212. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  213. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  214. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  215. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  216. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  217. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  218. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  219. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  220. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  221. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  222. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  223. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  224. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  225. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  226. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  227. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  228. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  229. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  230. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  231. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  232. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  233. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  234. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  235. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  236. };
  237. static char *pbook_type[] = {
  238. "Unknown PowerBook",
  239. "PowerBook 2400/3400/3500(G3)",
  240. "PowerBook G3 Series",
  241. "1999 PowerBook G3",
  242. "Core99"
  243. };
  244. int __init find_via_pmu(void)
  245. {
  246. u64 taddr;
  247. const u32 *reg;
  248. if (via != 0)
  249. return 1;
  250. vias = of_find_node_by_name(NULL, "via-pmu");
  251. if (vias == NULL)
  252. return 0;
  253. reg = of_get_property(vias, "reg", NULL);
  254. if (reg == NULL) {
  255. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  256. goto fail;
  257. }
  258. taddr = of_translate_address(vias, reg);
  259. if (taddr == OF_BAD_ADDR) {
  260. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  261. goto fail;
  262. }
  263. spin_lock_init(&pmu_lock);
  264. pmu_has_adb = 1;
  265. pmu_intr_mask = PMU_INT_PCEJECT |
  266. PMU_INT_SNDBRT |
  267. PMU_INT_ADB |
  268. PMU_INT_TICK;
  269. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  270. || of_device_is_compatible(vias->parent, "ohare")))
  271. pmu_kind = PMU_OHARE_BASED;
  272. else if (of_device_is_compatible(vias->parent, "paddington"))
  273. pmu_kind = PMU_PADDINGTON_BASED;
  274. else if (of_device_is_compatible(vias->parent, "heathrow"))
  275. pmu_kind = PMU_HEATHROW_BASED;
  276. else if (of_device_is_compatible(vias->parent, "Keylargo")
  277. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  278. struct device_node *gpiop;
  279. struct device_node *adbp;
  280. u64 gaddr = OF_BAD_ADDR;
  281. pmu_kind = PMU_KEYLARGO_BASED;
  282. adbp = of_find_node_by_type(NULL, "adb");
  283. pmu_has_adb = (adbp != NULL);
  284. of_node_put(adbp);
  285. pmu_intr_mask = PMU_INT_PCEJECT |
  286. PMU_INT_SNDBRT |
  287. PMU_INT_ADB |
  288. PMU_INT_TICK |
  289. PMU_INT_ENVIRONMENT;
  290. gpiop = of_find_node_by_name(NULL, "gpio");
  291. if (gpiop) {
  292. reg = of_get_property(gpiop, "reg", NULL);
  293. if (reg)
  294. gaddr = of_translate_address(gpiop, reg);
  295. if (gaddr != OF_BAD_ADDR)
  296. gpio_reg = ioremap(gaddr, 0x10);
  297. }
  298. if (gpio_reg == NULL) {
  299. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  300. goto fail_gpio;
  301. }
  302. } else
  303. pmu_kind = PMU_UNKNOWN;
  304. via = ioremap(taddr, 0x2000);
  305. if (via == NULL) {
  306. printk(KERN_ERR "via-pmu: Can't map address !\n");
  307. goto fail;
  308. }
  309. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  310. out_8(&via[IFR], 0x7f); /* clear IFR */
  311. pmu_state = idle;
  312. if (!init_pmu()) {
  313. via = NULL;
  314. return 0;
  315. }
  316. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  317. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  318. sys_ctrler = SYS_CTRLER_PMU;
  319. return 1;
  320. fail:
  321. of_node_put(vias);
  322. iounmap(gpio_reg);
  323. gpio_reg = NULL;
  324. fail_gpio:
  325. vias = NULL;
  326. return 0;
  327. }
  328. #ifdef CONFIG_ADB
  329. static int pmu_probe(void)
  330. {
  331. return vias == NULL? -ENODEV: 0;
  332. }
  333. static int __init pmu_init(void)
  334. {
  335. if (vias == NULL)
  336. return -ENODEV;
  337. return 0;
  338. }
  339. #endif /* CONFIG_ADB */
  340. /*
  341. * We can't wait until pmu_init gets called, that happens too late.
  342. * It happens after IDE and SCSI initialization, which can take a few
  343. * seconds, and by that time the PMU could have given up on us and
  344. * turned us off.
  345. * Thus this is called with arch_initcall rather than device_initcall.
  346. */
  347. static int __init via_pmu_start(void)
  348. {
  349. unsigned int irq;
  350. if (vias == NULL)
  351. return -ENODEV;
  352. batt_req.complete = 1;
  353. irq = irq_of_parse_and_map(vias, 0);
  354. if (irq == NO_IRQ) {
  355. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  356. return -ENODEV;
  357. }
  358. /* We set IRQF_TIMER because we don't want the interrupt to be disabled
  359. * between the 2 passes of driver suspend, we control our own disabling
  360. * for that one
  361. */
  362. if (request_irq(irq, via_pmu_interrupt, IRQF_TIMER, "VIA-PMU", (void *)0)) {
  363. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  364. return -ENODEV;
  365. }
  366. if (pmu_kind == PMU_KEYLARGO_BASED) {
  367. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  368. if (gpio_node == NULL)
  369. gpio_node = of_find_node_by_name(NULL,
  370. "pmu-interrupt");
  371. if (gpio_node)
  372. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  373. if (gpio_irq != NO_IRQ) {
  374. if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
  375. "GPIO1 ADB", (void *)0))
  376. printk(KERN_ERR "pmu: can't get irq %d"
  377. " (GPIO1)\n", gpio_irq);
  378. else
  379. gpio_irq_enabled = 1;
  380. }
  381. }
  382. /* Enable interrupts */
  383. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  384. pmu_fully_inited = 1;
  385. /* Make sure PMU settle down before continuing. This is _very_ important
  386. * since the IDE probe may shut interrupts down for quite a bit of time. If
  387. * a PMU communication is pending while this happens, the PMU may timeout
  388. * Not that on Core99 machines, the PMU keeps sending us environement
  389. * messages, we should find a way to either fix IDE or make it call
  390. * pmu_suspend() before masking interrupts. This can also happens while
  391. * scolling with some fbdevs.
  392. */
  393. do {
  394. pmu_poll();
  395. } while (pmu_state != idle);
  396. return 0;
  397. }
  398. arch_initcall(via_pmu_start);
  399. /*
  400. * This has to be done after pci_init, which is a subsys_initcall.
  401. */
  402. static int __init via_pmu_dev_init(void)
  403. {
  404. if (vias == NULL)
  405. return -ENODEV;
  406. #ifdef CONFIG_PMAC_BACKLIGHT
  407. /* Initialize backlight */
  408. pmu_backlight_init();
  409. #endif
  410. #ifdef CONFIG_PPC32
  411. if (machine_is_compatible("AAPL,3400/2400") ||
  412. machine_is_compatible("AAPL,3500")) {
  413. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  414. NULL, PMAC_MB_INFO_MODEL, 0);
  415. pmu_battery_count = 1;
  416. if (mb == PMAC_TYPE_COMET)
  417. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  418. else
  419. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  420. } else if (machine_is_compatible("AAPL,PowerBook1998") ||
  421. machine_is_compatible("PowerBook1,1")) {
  422. pmu_battery_count = 2;
  423. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  424. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  425. } else {
  426. struct device_node* prim =
  427. of_find_node_by_name(NULL, "power-mgt");
  428. const u32 *prim_info = NULL;
  429. if (prim)
  430. prim_info = of_get_property(prim, "prim-info", NULL);
  431. if (prim_info) {
  432. /* Other stuffs here yet unknown */
  433. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  434. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  435. if (pmu_battery_count > 1)
  436. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  437. }
  438. of_node_put(prim);
  439. }
  440. #endif /* CONFIG_PPC32 */
  441. /* Create /proc/pmu */
  442. proc_pmu_root = proc_mkdir("pmu", NULL);
  443. if (proc_pmu_root) {
  444. long i;
  445. for (i=0; i<pmu_battery_count; i++) {
  446. char title[16];
  447. sprintf(title, "battery_%ld", i);
  448. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  449. &pmu_battery_proc_fops, (void *)i);
  450. }
  451. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  452. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  453. &pmu_irqstats_proc_fops);
  454. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  455. &pmu_options_proc_fops);
  456. }
  457. return 0;
  458. }
  459. device_initcall(via_pmu_dev_init);
  460. static int
  461. init_pmu(void)
  462. {
  463. int timeout;
  464. struct adb_request req;
  465. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  466. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  467. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  468. timeout = 100000;
  469. while (!req.complete) {
  470. if (--timeout < 0) {
  471. printk(KERN_ERR "init_pmu: no response from PMU\n");
  472. return 0;
  473. }
  474. udelay(10);
  475. pmu_poll();
  476. }
  477. /* ack all pending interrupts */
  478. timeout = 100000;
  479. interrupt_data[0][0] = 1;
  480. while (interrupt_data[0][0] || pmu_state != idle) {
  481. if (--timeout < 0) {
  482. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  483. return 0;
  484. }
  485. if (pmu_state == idle)
  486. adb_int_pending = 1;
  487. via_pmu_interrupt(0, NULL);
  488. udelay(10);
  489. }
  490. /* Tell PMU we are ready. */
  491. if (pmu_kind == PMU_KEYLARGO_BASED) {
  492. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  493. while (!req.complete)
  494. pmu_poll();
  495. }
  496. /* Read PMU version */
  497. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  498. pmu_wait_complete(&req);
  499. if (req.reply_len > 0)
  500. pmu_version = req.reply[0];
  501. /* Read server mode setting */
  502. if (pmu_kind == PMU_KEYLARGO_BASED) {
  503. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  504. PMU_PWR_GET_POWERUP_EVENTS);
  505. pmu_wait_complete(&req);
  506. if (req.reply_len == 2) {
  507. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  508. option_server_mode = 1;
  509. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  510. option_server_mode ? "enabled" : "disabled");
  511. }
  512. }
  513. return 1;
  514. }
  515. int
  516. pmu_get_model(void)
  517. {
  518. return pmu_kind;
  519. }
  520. static void pmu_set_server_mode(int server_mode)
  521. {
  522. struct adb_request req;
  523. if (pmu_kind != PMU_KEYLARGO_BASED)
  524. return;
  525. option_server_mode = server_mode;
  526. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  527. pmu_wait_complete(&req);
  528. if (req.reply_len < 2)
  529. return;
  530. if (server_mode)
  531. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  532. PMU_PWR_SET_POWERUP_EVENTS,
  533. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  534. else
  535. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  536. PMU_PWR_CLR_POWERUP_EVENTS,
  537. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  538. pmu_wait_complete(&req);
  539. }
  540. /* This new version of the code for 2400/3400/3500 powerbooks
  541. * is inspired from the implementation in gkrellm-pmu
  542. */
  543. static void
  544. done_battery_state_ohare(struct adb_request* req)
  545. {
  546. /* format:
  547. * [0] : flags
  548. * 0x01 : AC indicator
  549. * 0x02 : charging
  550. * 0x04 : battery exist
  551. * 0x08 :
  552. * 0x10 :
  553. * 0x20 : full charged
  554. * 0x40 : pcharge reset
  555. * 0x80 : battery exist
  556. *
  557. * [1][2] : battery voltage
  558. * [3] : CPU temperature
  559. * [4] : battery temperature
  560. * [5] : current
  561. * [6][7] : pcharge
  562. * --tkoba
  563. */
  564. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  565. long pcharge, charge, vb, vmax, lmax;
  566. long vmax_charging, vmax_charged;
  567. long amperage, voltage, time, max;
  568. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  569. NULL, PMAC_MB_INFO_MODEL, 0);
  570. if (req->reply[0] & 0x01)
  571. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  572. else
  573. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  574. if (mb == PMAC_TYPE_COMET) {
  575. vmax_charged = 189;
  576. vmax_charging = 213;
  577. lmax = 6500;
  578. } else {
  579. vmax_charged = 330;
  580. vmax_charging = 330;
  581. lmax = 6500;
  582. }
  583. vmax = vmax_charged;
  584. /* If battery installed */
  585. if (req->reply[0] & 0x04) {
  586. bat_flags |= PMU_BATT_PRESENT;
  587. if (req->reply[0] & 0x02)
  588. bat_flags |= PMU_BATT_CHARGING;
  589. vb = (req->reply[1] << 8) | req->reply[2];
  590. voltage = (vb * 265 + 72665) / 10;
  591. amperage = req->reply[5];
  592. if ((req->reply[0] & 0x01) == 0) {
  593. if (amperage > 200)
  594. vb += ((amperage - 200) * 15)/100;
  595. } else if (req->reply[0] & 0x02) {
  596. vb = (vb * 97) / 100;
  597. vmax = vmax_charging;
  598. }
  599. charge = (100 * vb) / vmax;
  600. if (req->reply[0] & 0x40) {
  601. pcharge = (req->reply[6] << 8) + req->reply[7];
  602. if (pcharge > lmax)
  603. pcharge = lmax;
  604. pcharge *= 100;
  605. pcharge = 100 - pcharge / lmax;
  606. if (pcharge < charge)
  607. charge = pcharge;
  608. }
  609. if (amperage > 0)
  610. time = (charge * 16440) / amperage;
  611. else
  612. time = 0;
  613. max = 100;
  614. amperage = -amperage;
  615. } else
  616. charge = max = amperage = voltage = time = 0;
  617. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  618. pmu_batteries[pmu_cur_battery].charge = charge;
  619. pmu_batteries[pmu_cur_battery].max_charge = max;
  620. pmu_batteries[pmu_cur_battery].amperage = amperage;
  621. pmu_batteries[pmu_cur_battery].voltage = voltage;
  622. pmu_batteries[pmu_cur_battery].time_remaining = time;
  623. clear_bit(0, &async_req_locks);
  624. }
  625. static void
  626. done_battery_state_smart(struct adb_request* req)
  627. {
  628. /* format:
  629. * [0] : format of this structure (known: 3,4,5)
  630. * [1] : flags
  631. *
  632. * format 3 & 4:
  633. *
  634. * [2] : charge
  635. * [3] : max charge
  636. * [4] : current
  637. * [5] : voltage
  638. *
  639. * format 5:
  640. *
  641. * [2][3] : charge
  642. * [4][5] : max charge
  643. * [6][7] : current
  644. * [8][9] : voltage
  645. */
  646. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  647. int amperage;
  648. unsigned int capa, max, voltage;
  649. if (req->reply[1] & 0x01)
  650. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  651. else
  652. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  653. capa = max = amperage = voltage = 0;
  654. if (req->reply[1] & 0x04) {
  655. bat_flags |= PMU_BATT_PRESENT;
  656. switch(req->reply[0]) {
  657. case 3:
  658. case 4: capa = req->reply[2];
  659. max = req->reply[3];
  660. amperage = *((signed char *)&req->reply[4]);
  661. voltage = req->reply[5];
  662. break;
  663. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  664. max = (req->reply[4] << 8) | req->reply[5];
  665. amperage = *((signed short *)&req->reply[6]);
  666. voltage = (req->reply[8] << 8) | req->reply[9];
  667. break;
  668. default:
  669. printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
  670. req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
  671. break;
  672. }
  673. }
  674. if ((req->reply[1] & 0x01) && (amperage > 0))
  675. bat_flags |= PMU_BATT_CHARGING;
  676. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  677. pmu_batteries[pmu_cur_battery].charge = capa;
  678. pmu_batteries[pmu_cur_battery].max_charge = max;
  679. pmu_batteries[pmu_cur_battery].amperage = amperage;
  680. pmu_batteries[pmu_cur_battery].voltage = voltage;
  681. if (amperage) {
  682. if ((req->reply[1] & 0x01) && (amperage > 0))
  683. pmu_batteries[pmu_cur_battery].time_remaining
  684. = ((max-capa) * 3600) / amperage;
  685. else
  686. pmu_batteries[pmu_cur_battery].time_remaining
  687. = (capa * 3600) / (-amperage);
  688. } else
  689. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  690. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  691. clear_bit(0, &async_req_locks);
  692. }
  693. static void
  694. query_battery_state(void)
  695. {
  696. if (test_and_set_bit(0, &async_req_locks))
  697. return;
  698. if (pmu_kind == PMU_OHARE_BASED)
  699. pmu_request(&batt_req, done_battery_state_ohare,
  700. 1, PMU_BATTERY_STATE);
  701. else
  702. pmu_request(&batt_req, done_battery_state_smart,
  703. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  704. }
  705. static int pmu_info_proc_show(struct seq_file *m, void *v)
  706. {
  707. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  708. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  709. seq_printf(m, "AC Power : %d\n",
  710. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  711. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  712. return 0;
  713. }
  714. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  715. {
  716. return single_open(file, pmu_info_proc_show, NULL);
  717. }
  718. static const struct file_operations pmu_info_proc_fops = {
  719. .owner = THIS_MODULE,
  720. .open = pmu_info_proc_open,
  721. .read = seq_read,
  722. .llseek = seq_lseek,
  723. .release = single_release,
  724. };
  725. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  726. {
  727. int i;
  728. static const char *irq_names[] = {
  729. "Total CB1 triggered events",
  730. "Total GPIO1 triggered events",
  731. "PC-Card eject button",
  732. "Sound/Brightness button",
  733. "ADB message",
  734. "Battery state change",
  735. "Environment interrupt",
  736. "Tick timer",
  737. "Ghost interrupt (zero len)",
  738. "Empty interrupt (empty mask)",
  739. "Max irqs in a row"
  740. };
  741. for (i=0; i<11; i++) {
  742. seq_printf(m, " %2u: %10u (%s)\n",
  743. i, pmu_irq_stats[i], irq_names[i]);
  744. }
  745. return 0;
  746. }
  747. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  748. {
  749. return single_open(file, pmu_irqstats_proc_show, NULL);
  750. }
  751. static const struct file_operations pmu_irqstats_proc_fops = {
  752. .owner = THIS_MODULE,
  753. .open = pmu_irqstats_proc_open,
  754. .read = seq_read,
  755. .llseek = seq_lseek,
  756. .release = single_release,
  757. };
  758. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  759. {
  760. long batnum = (long)m->private;
  761. seq_putc(m, '\n');
  762. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  763. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  764. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  765. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  766. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  767. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  768. return 0;
  769. }
  770. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  771. {
  772. return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
  773. }
  774. static const struct file_operations pmu_battery_proc_fops = {
  775. .owner = THIS_MODULE,
  776. .open = pmu_battery_proc_open,
  777. .read = seq_read,
  778. .llseek = seq_lseek,
  779. .release = single_release,
  780. };
  781. static int pmu_options_proc_show(struct seq_file *m, void *v)
  782. {
  783. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  784. if (pmu_kind == PMU_KEYLARGO_BASED &&
  785. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  786. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  787. #endif
  788. if (pmu_kind == PMU_KEYLARGO_BASED)
  789. seq_printf(m, "server_mode=%d\n", option_server_mode);
  790. return 0;
  791. }
  792. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  793. {
  794. return single_open(file, pmu_options_proc_show, NULL);
  795. }
  796. static ssize_t pmu_options_proc_write(struct file *file,
  797. const char __user *buffer, size_t count, loff_t *pos)
  798. {
  799. char tmp[33];
  800. char *label, *val;
  801. size_t fcount = count;
  802. if (!count)
  803. return -EINVAL;
  804. if (count > 32)
  805. count = 32;
  806. if (copy_from_user(tmp, buffer, count))
  807. return -EFAULT;
  808. tmp[count] = 0;
  809. label = tmp;
  810. while(*label == ' ')
  811. label++;
  812. val = label;
  813. while(*val && (*val != '=')) {
  814. if (*val == ' ')
  815. *val = 0;
  816. val++;
  817. }
  818. if ((*val) == 0)
  819. return -EINVAL;
  820. *(val++) = 0;
  821. while(*val == ' ')
  822. val++;
  823. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  824. if (pmu_kind == PMU_KEYLARGO_BASED &&
  825. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  826. if (!strcmp(label, "lid_wakeup"))
  827. option_lid_wakeup = ((*val) == '1');
  828. #endif
  829. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  830. int new_value;
  831. new_value = ((*val) == '1');
  832. if (new_value != option_server_mode)
  833. pmu_set_server_mode(new_value);
  834. }
  835. return fcount;
  836. }
  837. static const struct file_operations pmu_options_proc_fops = {
  838. .owner = THIS_MODULE,
  839. .open = pmu_options_proc_open,
  840. .read = seq_read,
  841. .llseek = seq_lseek,
  842. .release = single_release,
  843. .write = pmu_options_proc_write,
  844. };
  845. #ifdef CONFIG_ADB
  846. /* Send an ADB command */
  847. static int pmu_send_request(struct adb_request *req, int sync)
  848. {
  849. int i, ret;
  850. if ((vias == NULL) || (!pmu_fully_inited)) {
  851. req->complete = 1;
  852. return -ENXIO;
  853. }
  854. ret = -EINVAL;
  855. switch (req->data[0]) {
  856. case PMU_PACKET:
  857. for (i = 0; i < req->nbytes - 1; ++i)
  858. req->data[i] = req->data[i+1];
  859. --req->nbytes;
  860. if (pmu_data_len[req->data[0]][1] != 0) {
  861. req->reply[0] = ADB_RET_OK;
  862. req->reply_len = 1;
  863. } else
  864. req->reply_len = 0;
  865. ret = pmu_queue_request(req);
  866. break;
  867. case CUDA_PACKET:
  868. switch (req->data[1]) {
  869. case CUDA_GET_TIME:
  870. if (req->nbytes != 2)
  871. break;
  872. req->data[0] = PMU_READ_RTC;
  873. req->nbytes = 1;
  874. req->reply_len = 3;
  875. req->reply[0] = CUDA_PACKET;
  876. req->reply[1] = 0;
  877. req->reply[2] = CUDA_GET_TIME;
  878. ret = pmu_queue_request(req);
  879. break;
  880. case CUDA_SET_TIME:
  881. if (req->nbytes != 6)
  882. break;
  883. req->data[0] = PMU_SET_RTC;
  884. req->nbytes = 5;
  885. for (i = 1; i <= 4; ++i)
  886. req->data[i] = req->data[i+1];
  887. req->reply_len = 3;
  888. req->reply[0] = CUDA_PACKET;
  889. req->reply[1] = 0;
  890. req->reply[2] = CUDA_SET_TIME;
  891. ret = pmu_queue_request(req);
  892. break;
  893. }
  894. break;
  895. case ADB_PACKET:
  896. if (!pmu_has_adb)
  897. return -ENXIO;
  898. for (i = req->nbytes - 1; i > 1; --i)
  899. req->data[i+2] = req->data[i];
  900. req->data[3] = req->nbytes - 2;
  901. req->data[2] = pmu_adb_flags;
  902. /*req->data[1] = req->data[1];*/
  903. req->data[0] = PMU_ADB_CMD;
  904. req->nbytes += 2;
  905. req->reply_expected = 1;
  906. req->reply_len = 0;
  907. ret = pmu_queue_request(req);
  908. break;
  909. }
  910. if (ret) {
  911. req->complete = 1;
  912. return ret;
  913. }
  914. if (sync)
  915. while (!req->complete)
  916. pmu_poll();
  917. return 0;
  918. }
  919. /* Enable/disable autopolling */
  920. static int __pmu_adb_autopoll(int devs)
  921. {
  922. struct adb_request req;
  923. if (devs) {
  924. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  925. adb_dev_map >> 8, adb_dev_map);
  926. pmu_adb_flags = 2;
  927. } else {
  928. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  929. pmu_adb_flags = 0;
  930. }
  931. while (!req.complete)
  932. pmu_poll();
  933. return 0;
  934. }
  935. static int pmu_adb_autopoll(int devs)
  936. {
  937. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  938. return -ENXIO;
  939. adb_dev_map = devs;
  940. return __pmu_adb_autopoll(devs);
  941. }
  942. /* Reset the ADB bus */
  943. static int pmu_adb_reset_bus(void)
  944. {
  945. struct adb_request req;
  946. int save_autopoll = adb_dev_map;
  947. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  948. return -ENXIO;
  949. /* anyone got a better idea?? */
  950. __pmu_adb_autopoll(0);
  951. req.nbytes = 4;
  952. req.done = NULL;
  953. req.data[0] = PMU_ADB_CMD;
  954. req.data[1] = ADB_BUSRESET;
  955. req.data[2] = 0;
  956. req.data[3] = 0;
  957. req.data[4] = 0;
  958. req.reply_len = 0;
  959. req.reply_expected = 1;
  960. if (pmu_queue_request(&req) != 0) {
  961. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  962. return -EIO;
  963. }
  964. pmu_wait_complete(&req);
  965. if (save_autopoll != 0)
  966. __pmu_adb_autopoll(save_autopoll);
  967. return 0;
  968. }
  969. #endif /* CONFIG_ADB */
  970. /* Construct and send a pmu request */
  971. int
  972. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  973. int nbytes, ...)
  974. {
  975. va_list list;
  976. int i;
  977. if (vias == NULL)
  978. return -ENXIO;
  979. if (nbytes < 0 || nbytes > 32) {
  980. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  981. req->complete = 1;
  982. return -EINVAL;
  983. }
  984. req->nbytes = nbytes;
  985. req->done = done;
  986. va_start(list, nbytes);
  987. for (i = 0; i < nbytes; ++i)
  988. req->data[i] = va_arg(list, int);
  989. va_end(list);
  990. req->reply_len = 0;
  991. req->reply_expected = 0;
  992. return pmu_queue_request(req);
  993. }
  994. int
  995. pmu_queue_request(struct adb_request *req)
  996. {
  997. unsigned long flags;
  998. int nsend;
  999. if (via == NULL) {
  1000. req->complete = 1;
  1001. return -ENXIO;
  1002. }
  1003. if (req->nbytes <= 0) {
  1004. req->complete = 1;
  1005. return 0;
  1006. }
  1007. nsend = pmu_data_len[req->data[0]][0];
  1008. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1009. req->complete = 1;
  1010. return -EINVAL;
  1011. }
  1012. req->next = NULL;
  1013. req->sent = 0;
  1014. req->complete = 0;
  1015. spin_lock_irqsave(&pmu_lock, flags);
  1016. if (current_req != 0) {
  1017. last_req->next = req;
  1018. last_req = req;
  1019. } else {
  1020. current_req = req;
  1021. last_req = req;
  1022. if (pmu_state == idle)
  1023. pmu_start();
  1024. }
  1025. spin_unlock_irqrestore(&pmu_lock, flags);
  1026. return 0;
  1027. }
  1028. static inline void
  1029. wait_for_ack(void)
  1030. {
  1031. /* Sightly increased the delay, I had one occurrence of the message
  1032. * reported
  1033. */
  1034. int timeout = 4000;
  1035. while ((in_8(&via[B]) & TACK) == 0) {
  1036. if (--timeout < 0) {
  1037. printk(KERN_ERR "PMU not responding (!ack)\n");
  1038. return;
  1039. }
  1040. udelay(10);
  1041. }
  1042. }
  1043. /* New PMU seems to be very sensitive to those timings, so we make sure
  1044. * PCI is flushed immediately */
  1045. static inline void
  1046. send_byte(int x)
  1047. {
  1048. volatile unsigned char __iomem *v = via;
  1049. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1050. out_8(&v[SR], x);
  1051. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1052. (void)in_8(&v[B]);
  1053. }
  1054. static inline void
  1055. recv_byte(void)
  1056. {
  1057. volatile unsigned char __iomem *v = via;
  1058. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1059. in_8(&v[SR]); /* resets SR */
  1060. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1061. (void)in_8(&v[B]);
  1062. }
  1063. static inline void
  1064. pmu_done(struct adb_request *req)
  1065. {
  1066. void (*done)(struct adb_request *) = req->done;
  1067. mb();
  1068. req->complete = 1;
  1069. /* Here, we assume that if the request has a done member, the
  1070. * struct request will survive to setting req->complete to 1
  1071. */
  1072. if (done)
  1073. (*done)(req);
  1074. }
  1075. static void
  1076. pmu_start(void)
  1077. {
  1078. struct adb_request *req;
  1079. /* assert pmu_state == idle */
  1080. /* get the packet to send */
  1081. req = current_req;
  1082. if (req == 0 || pmu_state != idle
  1083. || (/*req->reply_expected && */req_awaiting_reply))
  1084. return;
  1085. pmu_state = sending;
  1086. data_index = 1;
  1087. data_len = pmu_data_len[req->data[0]][0];
  1088. /* Sounds safer to make sure ACK is high before writing. This helped
  1089. * kill a problem with ADB and some iBooks
  1090. */
  1091. wait_for_ack();
  1092. /* set the shift register to shift out and send a byte */
  1093. send_byte(req->data[0]);
  1094. }
  1095. void
  1096. pmu_poll(void)
  1097. {
  1098. if (!via)
  1099. return;
  1100. if (disable_poll)
  1101. return;
  1102. via_pmu_interrupt(0, NULL);
  1103. }
  1104. void
  1105. pmu_poll_adb(void)
  1106. {
  1107. if (!via)
  1108. return;
  1109. if (disable_poll)
  1110. return;
  1111. /* Kicks ADB read when PMU is suspended */
  1112. adb_int_pending = 1;
  1113. do {
  1114. via_pmu_interrupt(0, NULL);
  1115. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1116. || req_awaiting_reply));
  1117. }
  1118. void
  1119. pmu_wait_complete(struct adb_request *req)
  1120. {
  1121. if (!via)
  1122. return;
  1123. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1124. via_pmu_interrupt(0, NULL);
  1125. }
  1126. /* This function loops until the PMU is idle and prevents it from
  1127. * anwsering to ADB interrupts. pmu_request can still be called.
  1128. * This is done to avoid spurrious shutdowns when we know we'll have
  1129. * interrupts switched off for a long time
  1130. */
  1131. void
  1132. pmu_suspend(void)
  1133. {
  1134. unsigned long flags;
  1135. if (!via)
  1136. return;
  1137. spin_lock_irqsave(&pmu_lock, flags);
  1138. pmu_suspended++;
  1139. if (pmu_suspended > 1) {
  1140. spin_unlock_irqrestore(&pmu_lock, flags);
  1141. return;
  1142. }
  1143. do {
  1144. spin_unlock_irqrestore(&pmu_lock, flags);
  1145. if (req_awaiting_reply)
  1146. adb_int_pending = 1;
  1147. via_pmu_interrupt(0, NULL);
  1148. spin_lock_irqsave(&pmu_lock, flags);
  1149. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1150. if (gpio_irq >= 0)
  1151. disable_irq_nosync(gpio_irq);
  1152. out_8(&via[IER], CB1_INT | IER_CLR);
  1153. spin_unlock_irqrestore(&pmu_lock, flags);
  1154. break;
  1155. }
  1156. } while (1);
  1157. }
  1158. void
  1159. pmu_resume(void)
  1160. {
  1161. unsigned long flags;
  1162. if (!via || (pmu_suspended < 1))
  1163. return;
  1164. spin_lock_irqsave(&pmu_lock, flags);
  1165. pmu_suspended--;
  1166. if (pmu_suspended > 0) {
  1167. spin_unlock_irqrestore(&pmu_lock, flags);
  1168. return;
  1169. }
  1170. adb_int_pending = 1;
  1171. if (gpio_irq >= 0)
  1172. enable_irq(gpio_irq);
  1173. out_8(&via[IER], CB1_INT | IER_SET);
  1174. spin_unlock_irqrestore(&pmu_lock, flags);
  1175. pmu_poll();
  1176. }
  1177. /* Interrupt data could be the result data from an ADB cmd */
  1178. static void
  1179. pmu_handle_data(unsigned char *data, int len)
  1180. {
  1181. unsigned char ints, pirq;
  1182. int i = 0;
  1183. asleep = 0;
  1184. if (drop_interrupts || len < 1) {
  1185. adb_int_pending = 0;
  1186. pmu_irq_stats[8]++;
  1187. return;
  1188. }
  1189. /* Get PMU interrupt mask */
  1190. ints = data[0];
  1191. /* Record zero interrupts for stats */
  1192. if (ints == 0)
  1193. pmu_irq_stats[9]++;
  1194. /* Hack to deal with ADB autopoll flag */
  1195. if (ints & PMU_INT_ADB)
  1196. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1197. next:
  1198. if (ints == 0) {
  1199. if (i > pmu_irq_stats[10])
  1200. pmu_irq_stats[10] = i;
  1201. return;
  1202. }
  1203. for (pirq = 0; pirq < 8; pirq++)
  1204. if (ints & (1 << pirq))
  1205. break;
  1206. pmu_irq_stats[pirq]++;
  1207. i++;
  1208. ints &= ~(1 << pirq);
  1209. /* Note: for some reason, we get an interrupt with len=1,
  1210. * data[0]==0 after each normal ADB interrupt, at least
  1211. * on the Pismo. Still investigating... --BenH
  1212. */
  1213. if ((1 << pirq) & PMU_INT_ADB) {
  1214. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1215. struct adb_request *req = req_awaiting_reply;
  1216. if (req == 0) {
  1217. printk(KERN_ERR "PMU: extra ADB reply\n");
  1218. return;
  1219. }
  1220. req_awaiting_reply = NULL;
  1221. if (len <= 2)
  1222. req->reply_len = 0;
  1223. else {
  1224. memcpy(req->reply, data + 1, len - 1);
  1225. req->reply_len = len - 1;
  1226. }
  1227. pmu_done(req);
  1228. } else {
  1229. if (len == 4 && data[1] == 0x2c) {
  1230. extern int xmon_wants_key, xmon_adb_keycode;
  1231. if (xmon_wants_key) {
  1232. xmon_adb_keycode = data[2];
  1233. return;
  1234. }
  1235. }
  1236. #ifdef CONFIG_ADB
  1237. /*
  1238. * XXX On the [23]400 the PMU gives us an up
  1239. * event for keycodes 0x74 or 0x75 when the PC
  1240. * card eject buttons are released, so we
  1241. * ignore those events.
  1242. */
  1243. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1244. && data[1] == 0x2c && data[3] == 0xff
  1245. && (data[2] & ~1) == 0xf4))
  1246. adb_input(data+1, len-1, 1);
  1247. #endif /* CONFIG_ADB */
  1248. }
  1249. }
  1250. /* Sound/brightness button pressed */
  1251. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1252. #ifdef CONFIG_PMAC_BACKLIGHT
  1253. if (len == 3)
  1254. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1255. #endif
  1256. }
  1257. /* Tick interrupt */
  1258. else if ((1 << pirq) & PMU_INT_TICK) {
  1259. /* Environement or tick interrupt, query batteries */
  1260. if (pmu_battery_count) {
  1261. if ((--query_batt_timer) == 0) {
  1262. query_battery_state();
  1263. query_batt_timer = BATTERY_POLLING_COUNT;
  1264. }
  1265. }
  1266. }
  1267. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1268. if (pmu_battery_count)
  1269. query_battery_state();
  1270. pmu_pass_intr(data, len);
  1271. /* len == 6 is probably a bad check. But how do I
  1272. * know what PMU versions send what events here? */
  1273. if (len == 6) {
  1274. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1275. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1276. }
  1277. } else {
  1278. pmu_pass_intr(data, len);
  1279. }
  1280. goto next;
  1281. }
  1282. static struct adb_request*
  1283. pmu_sr_intr(void)
  1284. {
  1285. struct adb_request *req;
  1286. int bite = 0;
  1287. if (via[B] & TREQ) {
  1288. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1289. out_8(&via[IFR], SR_INT);
  1290. return NULL;
  1291. }
  1292. /* The ack may not yet be low when we get the interrupt */
  1293. while ((in_8(&via[B]) & TACK) != 0)
  1294. ;
  1295. /* if reading grab the byte, and reset the interrupt */
  1296. if (pmu_state == reading || pmu_state == reading_intr)
  1297. bite = in_8(&via[SR]);
  1298. /* reset TREQ and wait for TACK to go high */
  1299. out_8(&via[B], in_8(&via[B]) | TREQ);
  1300. wait_for_ack();
  1301. switch (pmu_state) {
  1302. case sending:
  1303. req = current_req;
  1304. if (data_len < 0) {
  1305. data_len = req->nbytes - 1;
  1306. send_byte(data_len);
  1307. break;
  1308. }
  1309. if (data_index <= data_len) {
  1310. send_byte(req->data[data_index++]);
  1311. break;
  1312. }
  1313. req->sent = 1;
  1314. data_len = pmu_data_len[req->data[0]][1];
  1315. if (data_len == 0) {
  1316. pmu_state = idle;
  1317. current_req = req->next;
  1318. if (req->reply_expected)
  1319. req_awaiting_reply = req;
  1320. else
  1321. return req;
  1322. } else {
  1323. pmu_state = reading;
  1324. data_index = 0;
  1325. reply_ptr = req->reply + req->reply_len;
  1326. recv_byte();
  1327. }
  1328. break;
  1329. case intack:
  1330. data_index = 0;
  1331. data_len = -1;
  1332. pmu_state = reading_intr;
  1333. reply_ptr = interrupt_data[int_data_last];
  1334. recv_byte();
  1335. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1336. enable_irq(gpio_irq);
  1337. gpio_irq_enabled = 1;
  1338. }
  1339. break;
  1340. case reading:
  1341. case reading_intr:
  1342. if (data_len == -1) {
  1343. data_len = bite;
  1344. if (bite > 32)
  1345. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1346. } else if (data_index < 32) {
  1347. reply_ptr[data_index++] = bite;
  1348. }
  1349. if (data_index < data_len) {
  1350. recv_byte();
  1351. break;
  1352. }
  1353. if (pmu_state == reading_intr) {
  1354. pmu_state = idle;
  1355. int_data_state[int_data_last] = int_data_ready;
  1356. interrupt_data_len[int_data_last] = data_len;
  1357. } else {
  1358. req = current_req;
  1359. /*
  1360. * For PMU sleep and freq change requests, we lock the
  1361. * PMU until it's explicitly unlocked. This avoids any
  1362. * spurrious event polling getting in
  1363. */
  1364. current_req = req->next;
  1365. req->reply_len += data_index;
  1366. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1367. pmu_state = locked;
  1368. else
  1369. pmu_state = idle;
  1370. return req;
  1371. }
  1372. break;
  1373. default:
  1374. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1375. pmu_state);
  1376. }
  1377. return NULL;
  1378. }
  1379. static irqreturn_t
  1380. via_pmu_interrupt(int irq, void *arg)
  1381. {
  1382. unsigned long flags;
  1383. int intr;
  1384. int nloop = 0;
  1385. int int_data = -1;
  1386. struct adb_request *req = NULL;
  1387. int handled = 0;
  1388. /* This is a bit brutal, we can probably do better */
  1389. spin_lock_irqsave(&pmu_lock, flags);
  1390. ++disable_poll;
  1391. for (;;) {
  1392. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1393. if (intr == 0)
  1394. break;
  1395. handled = 1;
  1396. if (++nloop > 1000) {
  1397. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1398. "intr=%x, ier=%x pmu_state=%d\n",
  1399. intr, in_8(&via[IER]), pmu_state);
  1400. break;
  1401. }
  1402. out_8(&via[IFR], intr);
  1403. if (intr & CB1_INT) {
  1404. adb_int_pending = 1;
  1405. pmu_irq_stats[0]++;
  1406. }
  1407. if (intr & SR_INT) {
  1408. req = pmu_sr_intr();
  1409. if (req)
  1410. break;
  1411. }
  1412. }
  1413. recheck:
  1414. if (pmu_state == idle) {
  1415. if (adb_int_pending) {
  1416. if (int_data_state[0] == int_data_empty)
  1417. int_data_last = 0;
  1418. else if (int_data_state[1] == int_data_empty)
  1419. int_data_last = 1;
  1420. else
  1421. goto no_free_slot;
  1422. pmu_state = intack;
  1423. int_data_state[int_data_last] = int_data_fill;
  1424. /* Sounds safer to make sure ACK is high before writing.
  1425. * This helped kill a problem with ADB and some iBooks
  1426. */
  1427. wait_for_ack();
  1428. send_byte(PMU_INT_ACK);
  1429. adb_int_pending = 0;
  1430. } else if (current_req)
  1431. pmu_start();
  1432. }
  1433. no_free_slot:
  1434. /* Mark the oldest buffer for flushing */
  1435. if (int_data_state[!int_data_last] == int_data_ready) {
  1436. int_data_state[!int_data_last] = int_data_flush;
  1437. int_data = !int_data_last;
  1438. } else if (int_data_state[int_data_last] == int_data_ready) {
  1439. int_data_state[int_data_last] = int_data_flush;
  1440. int_data = int_data_last;
  1441. }
  1442. --disable_poll;
  1443. spin_unlock_irqrestore(&pmu_lock, flags);
  1444. /* Deal with completed PMU requests outside of the lock */
  1445. if (req) {
  1446. pmu_done(req);
  1447. req = NULL;
  1448. }
  1449. /* Deal with interrupt datas outside of the lock */
  1450. if (int_data >= 0) {
  1451. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1452. spin_lock_irqsave(&pmu_lock, flags);
  1453. ++disable_poll;
  1454. int_data_state[int_data] = int_data_empty;
  1455. int_data = -1;
  1456. goto recheck;
  1457. }
  1458. return IRQ_RETVAL(handled);
  1459. }
  1460. void
  1461. pmu_unlock(void)
  1462. {
  1463. unsigned long flags;
  1464. spin_lock_irqsave(&pmu_lock, flags);
  1465. if (pmu_state == locked)
  1466. pmu_state = idle;
  1467. adb_int_pending = 1;
  1468. spin_unlock_irqrestore(&pmu_lock, flags);
  1469. }
  1470. static irqreturn_t
  1471. gpio1_interrupt(int irq, void *arg)
  1472. {
  1473. unsigned long flags;
  1474. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1475. spin_lock_irqsave(&pmu_lock, flags);
  1476. if (gpio_irq_enabled > 0) {
  1477. disable_irq_nosync(gpio_irq);
  1478. gpio_irq_enabled = 0;
  1479. }
  1480. pmu_irq_stats[1]++;
  1481. adb_int_pending = 1;
  1482. spin_unlock_irqrestore(&pmu_lock, flags);
  1483. via_pmu_interrupt(0, NULL);
  1484. return IRQ_HANDLED;
  1485. }
  1486. return IRQ_NONE;
  1487. }
  1488. void
  1489. pmu_enable_irled(int on)
  1490. {
  1491. struct adb_request req;
  1492. if (vias == NULL)
  1493. return ;
  1494. if (pmu_kind == PMU_KEYLARGO_BASED)
  1495. return ;
  1496. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1497. (on ? PMU_POW_ON : PMU_POW_OFF));
  1498. pmu_wait_complete(&req);
  1499. }
  1500. void
  1501. pmu_restart(void)
  1502. {
  1503. struct adb_request req;
  1504. if (via == NULL)
  1505. return;
  1506. local_irq_disable();
  1507. drop_interrupts = 1;
  1508. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1509. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1510. PMU_INT_TICK );
  1511. while(!req.complete)
  1512. pmu_poll();
  1513. }
  1514. pmu_request(&req, NULL, 1, PMU_RESET);
  1515. pmu_wait_complete(&req);
  1516. for (;;)
  1517. ;
  1518. }
  1519. void
  1520. pmu_shutdown(void)
  1521. {
  1522. struct adb_request req;
  1523. if (via == NULL)
  1524. return;
  1525. local_irq_disable();
  1526. drop_interrupts = 1;
  1527. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1528. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1529. PMU_INT_TICK );
  1530. pmu_wait_complete(&req);
  1531. } else {
  1532. /* Disable server mode on shutdown or we'll just
  1533. * wake up again
  1534. */
  1535. pmu_set_server_mode(0);
  1536. }
  1537. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1538. 'M', 'A', 'T', 'T');
  1539. pmu_wait_complete(&req);
  1540. for (;;)
  1541. ;
  1542. }
  1543. int
  1544. pmu_present(void)
  1545. {
  1546. return via != 0;
  1547. }
  1548. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1549. /*
  1550. * Put the powerbook to sleep.
  1551. */
  1552. static u32 save_via[8];
  1553. static void
  1554. save_via_state(void)
  1555. {
  1556. save_via[0] = in_8(&via[ANH]);
  1557. save_via[1] = in_8(&via[DIRA]);
  1558. save_via[2] = in_8(&via[B]);
  1559. save_via[3] = in_8(&via[DIRB]);
  1560. save_via[4] = in_8(&via[PCR]);
  1561. save_via[5] = in_8(&via[ACR]);
  1562. save_via[6] = in_8(&via[T1CL]);
  1563. save_via[7] = in_8(&via[T1CH]);
  1564. }
  1565. static void
  1566. restore_via_state(void)
  1567. {
  1568. out_8(&via[ANH], save_via[0]);
  1569. out_8(&via[DIRA], save_via[1]);
  1570. out_8(&via[B], save_via[2]);
  1571. out_8(&via[DIRB], save_via[3]);
  1572. out_8(&via[PCR], save_via[4]);
  1573. out_8(&via[ACR], save_via[5]);
  1574. out_8(&via[T1CL], save_via[6]);
  1575. out_8(&via[T1CH], save_via[7]);
  1576. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1577. out_8(&via[IFR], 0x7f); /* clear IFR */
  1578. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1579. }
  1580. #define GRACKLE_PM (1<<7)
  1581. #define GRACKLE_DOZE (1<<5)
  1582. #define GRACKLE_NAP (1<<4)
  1583. #define GRACKLE_SLEEP (1<<3)
  1584. static int powerbook_sleep_grackle(void)
  1585. {
  1586. unsigned long save_l2cr;
  1587. unsigned short pmcr1;
  1588. struct adb_request req;
  1589. struct pci_dev *grackle;
  1590. grackle = pci_get_bus_and_slot(0, 0);
  1591. if (!grackle)
  1592. return -ENODEV;
  1593. /* Turn off various things. Darwin does some retry tests here... */
  1594. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1595. pmu_wait_complete(&req);
  1596. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1597. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1598. pmu_wait_complete(&req);
  1599. /* For 750, save backside cache setting and disable it */
  1600. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1601. if (!__fake_sleep) {
  1602. /* Ask the PMU to put us to sleep */
  1603. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1604. pmu_wait_complete(&req);
  1605. }
  1606. /* The VIA is supposed not to be restored correctly*/
  1607. save_via_state();
  1608. /* We shut down some HW */
  1609. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1610. pci_read_config_word(grackle, 0x70, &pmcr1);
  1611. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1612. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1613. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1614. pci_write_config_word(grackle, 0x70, pmcr1);
  1615. /* Call low-level ASM sleep handler */
  1616. if (__fake_sleep)
  1617. mdelay(5000);
  1618. else
  1619. low_sleep_handler();
  1620. /* We're awake again, stop grackle PM */
  1621. pci_read_config_word(grackle, 0x70, &pmcr1);
  1622. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1623. pci_write_config_word(grackle, 0x70, pmcr1);
  1624. pci_dev_put(grackle);
  1625. /* Make sure the PMU is idle */
  1626. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1627. restore_via_state();
  1628. /* Restore L2 cache */
  1629. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1630. _set_L2CR(save_l2cr);
  1631. /* Restore userland MMU context */
  1632. switch_mmu_context(NULL, current->active_mm);
  1633. /* Power things up */
  1634. pmu_unlock();
  1635. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1636. pmu_wait_complete(&req);
  1637. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1638. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1639. pmu_wait_complete(&req);
  1640. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1641. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1642. pmu_wait_complete(&req);
  1643. return 0;
  1644. }
  1645. static int
  1646. powerbook_sleep_Core99(void)
  1647. {
  1648. unsigned long save_l2cr;
  1649. unsigned long save_l3cr;
  1650. struct adb_request req;
  1651. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1652. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1653. return -ENOSYS;
  1654. }
  1655. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1656. return -EAGAIN;
  1657. /* Stop environment and ADB interrupts */
  1658. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1659. pmu_wait_complete(&req);
  1660. /* Tell PMU what events will wake us up */
  1661. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1662. 0xff, 0xff);
  1663. pmu_wait_complete(&req);
  1664. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1665. 0, PMU_PWR_WAKEUP_KEY |
  1666. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1667. pmu_wait_complete(&req);
  1668. /* Save the state of the L2 and L3 caches */
  1669. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1670. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1671. if (!__fake_sleep) {
  1672. /* Ask the PMU to put us to sleep */
  1673. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1674. pmu_wait_complete(&req);
  1675. }
  1676. /* The VIA is supposed not to be restored correctly*/
  1677. save_via_state();
  1678. /* Shut down various ASICs. There's a chance that we can no longer
  1679. * talk to the PMU after this, so I moved it to _after_ sending the
  1680. * sleep command to it. Still need to be checked.
  1681. */
  1682. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1683. /* Call low-level ASM sleep handler */
  1684. if (__fake_sleep)
  1685. mdelay(5000);
  1686. else
  1687. low_sleep_handler();
  1688. /* Restore Apple core ASICs state */
  1689. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1690. /* Restore VIA */
  1691. restore_via_state();
  1692. /* tweak LPJ before cpufreq is there */
  1693. loops_per_jiffy *= 2;
  1694. /* Restore video */
  1695. pmac_call_early_video_resume();
  1696. /* Restore L2 cache */
  1697. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1698. _set_L2CR(save_l2cr);
  1699. /* Restore L3 cache */
  1700. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1701. _set_L3CR(save_l3cr);
  1702. /* Restore userland MMU context */
  1703. switch_mmu_context(NULL, current->active_mm);
  1704. /* Tell PMU we are ready */
  1705. pmu_unlock();
  1706. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1707. pmu_wait_complete(&req);
  1708. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1709. pmu_wait_complete(&req);
  1710. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1711. loops_per_jiffy /= 2;
  1712. return 0;
  1713. }
  1714. #define PB3400_MEM_CTRL 0xf8000000
  1715. #define PB3400_MEM_CTRL_SLEEP 0x70
  1716. static void __iomem *pb3400_mem_ctrl;
  1717. static void powerbook_sleep_init_3400(void)
  1718. {
  1719. /* map in the memory controller registers */
  1720. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1721. if (pb3400_mem_ctrl == NULL)
  1722. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1723. }
  1724. static int powerbook_sleep_3400(void)
  1725. {
  1726. int i, x;
  1727. unsigned int hid0;
  1728. unsigned long msr;
  1729. struct adb_request sleep_req;
  1730. unsigned int __iomem *mem_ctrl_sleep;
  1731. if (pb3400_mem_ctrl == NULL)
  1732. return -ENOMEM;
  1733. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1734. /* Set the memory controller to keep the memory refreshed
  1735. while we're asleep */
  1736. for (i = 0x403f; i >= 0x4000; --i) {
  1737. out_be32(mem_ctrl_sleep, i);
  1738. do {
  1739. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1740. } while (x == 0);
  1741. if (x >= 0x100)
  1742. break;
  1743. }
  1744. /* Ask the PMU to put us to sleep */
  1745. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1746. pmu_wait_complete(&sleep_req);
  1747. pmu_unlock();
  1748. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1749. asleep = 1;
  1750. /* Put the CPU into sleep mode */
  1751. hid0 = mfspr(SPRN_HID0);
  1752. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1753. mtspr(SPRN_HID0, hid0);
  1754. local_irq_enable();
  1755. msr = mfmsr() | MSR_POW;
  1756. while (asleep) {
  1757. mb();
  1758. mtmsr(msr);
  1759. isync();
  1760. }
  1761. local_irq_disable();
  1762. /* OK, we're awake again, start restoring things */
  1763. out_be32(mem_ctrl_sleep, 0x3f);
  1764. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1765. return 0;
  1766. }
  1767. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1768. /*
  1769. * Support for /dev/pmu device
  1770. */
  1771. #define RB_SIZE 0x10
  1772. struct pmu_private {
  1773. struct list_head list;
  1774. int rb_get;
  1775. int rb_put;
  1776. struct rb_entry {
  1777. unsigned short len;
  1778. unsigned char data[16];
  1779. } rb_buf[RB_SIZE];
  1780. wait_queue_head_t wait;
  1781. spinlock_t lock;
  1782. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1783. int backlight_locker;
  1784. #endif
  1785. };
  1786. static LIST_HEAD(all_pmu_pvt);
  1787. static DEFINE_SPINLOCK(all_pvt_lock);
  1788. static void
  1789. pmu_pass_intr(unsigned char *data, int len)
  1790. {
  1791. struct pmu_private *pp;
  1792. struct list_head *list;
  1793. int i;
  1794. unsigned long flags;
  1795. if (len > sizeof(pp->rb_buf[0].data))
  1796. len = sizeof(pp->rb_buf[0].data);
  1797. spin_lock_irqsave(&all_pvt_lock, flags);
  1798. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1799. pp = list_entry(list, struct pmu_private, list);
  1800. spin_lock(&pp->lock);
  1801. i = pp->rb_put + 1;
  1802. if (i >= RB_SIZE)
  1803. i = 0;
  1804. if (i != pp->rb_get) {
  1805. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1806. rp->len = len;
  1807. memcpy(rp->data, data, len);
  1808. pp->rb_put = i;
  1809. wake_up_interruptible(&pp->wait);
  1810. }
  1811. spin_unlock(&pp->lock);
  1812. }
  1813. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1814. }
  1815. static int
  1816. pmu_open(struct inode *inode, struct file *file)
  1817. {
  1818. struct pmu_private *pp;
  1819. unsigned long flags;
  1820. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1821. if (pp == 0)
  1822. return -ENOMEM;
  1823. pp->rb_get = pp->rb_put = 0;
  1824. spin_lock_init(&pp->lock);
  1825. init_waitqueue_head(&pp->wait);
  1826. lock_kernel();
  1827. spin_lock_irqsave(&all_pvt_lock, flags);
  1828. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1829. pp->backlight_locker = 0;
  1830. #endif
  1831. list_add(&pp->list, &all_pmu_pvt);
  1832. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1833. file->private_data = pp;
  1834. unlock_kernel();
  1835. return 0;
  1836. }
  1837. static ssize_t
  1838. pmu_read(struct file *file, char __user *buf,
  1839. size_t count, loff_t *ppos)
  1840. {
  1841. struct pmu_private *pp = file->private_data;
  1842. DECLARE_WAITQUEUE(wait, current);
  1843. unsigned long flags;
  1844. int ret = 0;
  1845. if (count < 1 || pp == 0)
  1846. return -EINVAL;
  1847. if (!access_ok(VERIFY_WRITE, buf, count))
  1848. return -EFAULT;
  1849. spin_lock_irqsave(&pp->lock, flags);
  1850. add_wait_queue(&pp->wait, &wait);
  1851. current->state = TASK_INTERRUPTIBLE;
  1852. for (;;) {
  1853. ret = -EAGAIN;
  1854. if (pp->rb_get != pp->rb_put) {
  1855. int i = pp->rb_get;
  1856. struct rb_entry *rp = &pp->rb_buf[i];
  1857. ret = rp->len;
  1858. spin_unlock_irqrestore(&pp->lock, flags);
  1859. if (ret > count)
  1860. ret = count;
  1861. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1862. ret = -EFAULT;
  1863. if (++i >= RB_SIZE)
  1864. i = 0;
  1865. spin_lock_irqsave(&pp->lock, flags);
  1866. pp->rb_get = i;
  1867. }
  1868. if (ret >= 0)
  1869. break;
  1870. if (file->f_flags & O_NONBLOCK)
  1871. break;
  1872. ret = -ERESTARTSYS;
  1873. if (signal_pending(current))
  1874. break;
  1875. spin_unlock_irqrestore(&pp->lock, flags);
  1876. schedule();
  1877. spin_lock_irqsave(&pp->lock, flags);
  1878. }
  1879. current->state = TASK_RUNNING;
  1880. remove_wait_queue(&pp->wait, &wait);
  1881. spin_unlock_irqrestore(&pp->lock, flags);
  1882. return ret;
  1883. }
  1884. static ssize_t
  1885. pmu_write(struct file *file, const char __user *buf,
  1886. size_t count, loff_t *ppos)
  1887. {
  1888. return 0;
  1889. }
  1890. static unsigned int
  1891. pmu_fpoll(struct file *filp, poll_table *wait)
  1892. {
  1893. struct pmu_private *pp = filp->private_data;
  1894. unsigned int mask = 0;
  1895. unsigned long flags;
  1896. if (pp == 0)
  1897. return 0;
  1898. poll_wait(filp, &pp->wait, wait);
  1899. spin_lock_irqsave(&pp->lock, flags);
  1900. if (pp->rb_get != pp->rb_put)
  1901. mask |= POLLIN;
  1902. spin_unlock_irqrestore(&pp->lock, flags);
  1903. return mask;
  1904. }
  1905. static int
  1906. pmu_release(struct inode *inode, struct file *file)
  1907. {
  1908. struct pmu_private *pp = file->private_data;
  1909. unsigned long flags;
  1910. if (pp != 0) {
  1911. file->private_data = NULL;
  1912. spin_lock_irqsave(&all_pvt_lock, flags);
  1913. list_del(&pp->list);
  1914. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1915. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1916. if (pp->backlight_locker)
  1917. pmac_backlight_enable();
  1918. #endif
  1919. kfree(pp);
  1920. }
  1921. return 0;
  1922. }
  1923. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1924. static void pmac_suspend_disable_irqs(void)
  1925. {
  1926. /* Call platform functions marked "on sleep" */
  1927. pmac_pfunc_i2c_suspend();
  1928. pmac_pfunc_base_suspend();
  1929. }
  1930. static int powerbook_sleep(suspend_state_t state)
  1931. {
  1932. int error = 0;
  1933. /* Wait for completion of async requests */
  1934. while (!batt_req.complete)
  1935. pmu_poll();
  1936. /* Giveup the lazy FPU & vec so we don't have to back them
  1937. * up from the low level code
  1938. */
  1939. enable_kernel_fp();
  1940. #ifdef CONFIG_ALTIVEC
  1941. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1942. enable_kernel_altivec();
  1943. #endif /* CONFIG_ALTIVEC */
  1944. switch (pmu_kind) {
  1945. case PMU_OHARE_BASED:
  1946. error = powerbook_sleep_3400();
  1947. break;
  1948. case PMU_HEATHROW_BASED:
  1949. case PMU_PADDINGTON_BASED:
  1950. error = powerbook_sleep_grackle();
  1951. break;
  1952. case PMU_KEYLARGO_BASED:
  1953. error = powerbook_sleep_Core99();
  1954. break;
  1955. default:
  1956. return -ENOSYS;
  1957. }
  1958. if (error)
  1959. return error;
  1960. mdelay(100);
  1961. return 0;
  1962. }
  1963. static void pmac_suspend_enable_irqs(void)
  1964. {
  1965. /* Force a poll of ADB interrupts */
  1966. adb_int_pending = 1;
  1967. via_pmu_interrupt(0, NULL);
  1968. mdelay(10);
  1969. /* Call platform functions marked "on wake" */
  1970. pmac_pfunc_base_resume();
  1971. pmac_pfunc_i2c_resume();
  1972. }
  1973. static int pmu_sleep_valid(suspend_state_t state)
  1974. {
  1975. return state == PM_SUSPEND_MEM
  1976. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1977. }
  1978. static struct platform_suspend_ops pmu_pm_ops = {
  1979. .enter = powerbook_sleep,
  1980. .valid = pmu_sleep_valid,
  1981. };
  1982. static int register_pmu_pm_ops(void)
  1983. {
  1984. if (pmu_kind == PMU_OHARE_BASED)
  1985. powerbook_sleep_init_3400();
  1986. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1987. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1988. suspend_set_ops(&pmu_pm_ops);
  1989. return 0;
  1990. }
  1991. device_initcall(register_pmu_pm_ops);
  1992. #endif
  1993. static int
  1994. pmu_ioctl(struct inode * inode, struct file *filp,
  1995. u_int cmd, u_long arg)
  1996. {
  1997. __u32 __user *argp = (__u32 __user *)arg;
  1998. int error = -EINVAL;
  1999. switch (cmd) {
  2000. case PMU_IOC_SLEEP:
  2001. if (!capable(CAP_SYS_ADMIN))
  2002. return -EACCES;
  2003. return pm_suspend(PM_SUSPEND_MEM);
  2004. case PMU_IOC_CAN_SLEEP:
  2005. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2006. return put_user(0, argp);
  2007. else
  2008. return put_user(1, argp);
  2009. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2010. /* Compatibility ioctl's for backlight */
  2011. case PMU_IOC_GET_BACKLIGHT:
  2012. {
  2013. int brightness;
  2014. brightness = pmac_backlight_get_legacy_brightness();
  2015. if (brightness < 0)
  2016. return brightness;
  2017. else
  2018. return put_user(brightness, argp);
  2019. }
  2020. case PMU_IOC_SET_BACKLIGHT:
  2021. {
  2022. int brightness;
  2023. error = get_user(brightness, argp);
  2024. if (error)
  2025. return error;
  2026. return pmac_backlight_set_legacy_brightness(brightness);
  2027. }
  2028. #ifdef CONFIG_INPUT_ADBHID
  2029. case PMU_IOC_GRAB_BACKLIGHT: {
  2030. struct pmu_private *pp = filp->private_data;
  2031. if (pp->backlight_locker)
  2032. return 0;
  2033. pp->backlight_locker = 1;
  2034. pmac_backlight_disable();
  2035. return 0;
  2036. }
  2037. #endif /* CONFIG_INPUT_ADBHID */
  2038. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2039. case PMU_IOC_GET_MODEL:
  2040. return put_user(pmu_kind, argp);
  2041. case PMU_IOC_HAS_ADB:
  2042. return put_user(pmu_has_adb, argp);
  2043. }
  2044. return error;
  2045. }
  2046. static const struct file_operations pmu_device_fops = {
  2047. .read = pmu_read,
  2048. .write = pmu_write,
  2049. .poll = pmu_fpoll,
  2050. .ioctl = pmu_ioctl,
  2051. .open = pmu_open,
  2052. .release = pmu_release,
  2053. };
  2054. static struct miscdevice pmu_device = {
  2055. PMU_MINOR, "pmu", &pmu_device_fops
  2056. };
  2057. static int pmu_device_init(void)
  2058. {
  2059. if (!via)
  2060. return 0;
  2061. if (misc_register(&pmu_device) < 0)
  2062. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2063. return 0;
  2064. }
  2065. device_initcall(pmu_device_init);
  2066. #ifdef DEBUG_SLEEP
  2067. static inline void
  2068. polled_handshake(volatile unsigned char __iomem *via)
  2069. {
  2070. via[B] &= ~TREQ; eieio();
  2071. while ((via[B] & TACK) != 0)
  2072. ;
  2073. via[B] |= TREQ; eieio();
  2074. while ((via[B] & TACK) == 0)
  2075. ;
  2076. }
  2077. static inline void
  2078. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2079. {
  2080. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2081. via[SR] = x; eieio();
  2082. polled_handshake(via);
  2083. }
  2084. static inline int
  2085. polled_recv_byte(volatile unsigned char __iomem *via)
  2086. {
  2087. int x;
  2088. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2089. x = via[SR]; eieio();
  2090. polled_handshake(via);
  2091. x = via[SR]; eieio();
  2092. return x;
  2093. }
  2094. int
  2095. pmu_polled_request(struct adb_request *req)
  2096. {
  2097. unsigned long flags;
  2098. int i, l, c;
  2099. volatile unsigned char __iomem *v = via;
  2100. req->complete = 1;
  2101. c = req->data[0];
  2102. l = pmu_data_len[c][0];
  2103. if (l >= 0 && req->nbytes != l + 1)
  2104. return -EINVAL;
  2105. local_irq_save(flags);
  2106. while (pmu_state != idle)
  2107. pmu_poll();
  2108. while ((via[B] & TACK) == 0)
  2109. ;
  2110. polled_send_byte(v, c);
  2111. if (l < 0) {
  2112. l = req->nbytes - 1;
  2113. polled_send_byte(v, l);
  2114. }
  2115. for (i = 1; i <= l; ++i)
  2116. polled_send_byte(v, req->data[i]);
  2117. l = pmu_data_len[c][1];
  2118. if (l < 0)
  2119. l = polled_recv_byte(v);
  2120. for (i = 0; i < l; ++i)
  2121. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2122. if (req->done)
  2123. (*req->done)(req);
  2124. local_irq_restore(flags);
  2125. return 0;
  2126. }
  2127. /* N.B. This doesn't work on the 3400 */
  2128. void pmu_blink(int n)
  2129. {
  2130. struct adb_request req;
  2131. memset(&req, 0, sizeof(req));
  2132. for (; n > 0; --n) {
  2133. req.nbytes = 4;
  2134. req.done = NULL;
  2135. req.data[0] = 0xee;
  2136. req.data[1] = 4;
  2137. req.data[2] = 0;
  2138. req.data[3] = 1;
  2139. req.reply[0] = ADB_RET_OK;
  2140. req.reply_len = 1;
  2141. req.reply_expected = 0;
  2142. pmu_polled_request(&req);
  2143. mdelay(50);
  2144. req.nbytes = 4;
  2145. req.done = NULL;
  2146. req.data[0] = 0xee;
  2147. req.data[1] = 4;
  2148. req.data[2] = 0;
  2149. req.data[3] = 0;
  2150. req.reply[0] = ADB_RET_OK;
  2151. req.reply_len = 1;
  2152. req.reply_expected = 0;
  2153. pmu_polled_request(&req);
  2154. mdelay(50);
  2155. }
  2156. mdelay(50);
  2157. }
  2158. #endif /* DEBUG_SLEEP */
  2159. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2160. int pmu_sys_suspended;
  2161. static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
  2162. {
  2163. if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
  2164. return 0;
  2165. /* Suspend PMU event interrupts */\
  2166. pmu_suspend();
  2167. pmu_sys_suspended = 1;
  2168. #ifdef CONFIG_PMAC_BACKLIGHT
  2169. /* Tell backlight code not to muck around with the chip anymore */
  2170. pmu_backlight_set_sleep(1);
  2171. #endif
  2172. return 0;
  2173. }
  2174. static int pmu_sys_resume(struct sys_device *sysdev)
  2175. {
  2176. struct adb_request req;
  2177. if (!pmu_sys_suspended)
  2178. return 0;
  2179. /* Tell PMU we are ready */
  2180. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2181. pmu_wait_complete(&req);
  2182. #ifdef CONFIG_PMAC_BACKLIGHT
  2183. /* Tell backlight code it can use the chip again */
  2184. pmu_backlight_set_sleep(0);
  2185. #endif
  2186. /* Resume PMU event interrupts */
  2187. pmu_resume();
  2188. pmu_sys_suspended = 0;
  2189. return 0;
  2190. }
  2191. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2192. static struct sysdev_class pmu_sysclass = {
  2193. .name = "pmu",
  2194. };
  2195. static struct sys_device device_pmu = {
  2196. .cls = &pmu_sysclass,
  2197. };
  2198. static struct sysdev_driver driver_pmu = {
  2199. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2200. .suspend = &pmu_sys_suspend,
  2201. .resume = &pmu_sys_resume,
  2202. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2203. };
  2204. static int __init init_pmu_sysfs(void)
  2205. {
  2206. int rc;
  2207. rc = sysdev_class_register(&pmu_sysclass);
  2208. if (rc) {
  2209. printk(KERN_ERR "Failed registering PMU sys class\n");
  2210. return -ENODEV;
  2211. }
  2212. rc = sysdev_register(&device_pmu);
  2213. if (rc) {
  2214. printk(KERN_ERR "Failed registering PMU sys device\n");
  2215. return -ENODEV;
  2216. }
  2217. rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
  2218. if (rc) {
  2219. printk(KERN_ERR "Failed registering PMU sys driver\n");
  2220. return -ENODEV;
  2221. }
  2222. return 0;
  2223. }
  2224. subsys_initcall(init_pmu_sysfs);
  2225. EXPORT_SYMBOL(pmu_request);
  2226. EXPORT_SYMBOL(pmu_queue_request);
  2227. EXPORT_SYMBOL(pmu_poll);
  2228. EXPORT_SYMBOL(pmu_poll_adb);
  2229. EXPORT_SYMBOL(pmu_wait_complete);
  2230. EXPORT_SYMBOL(pmu_suspend);
  2231. EXPORT_SYMBOL(pmu_resume);
  2232. EXPORT_SYMBOL(pmu_unlock);
  2233. #if defined(CONFIG_PPC32)
  2234. EXPORT_SYMBOL(pmu_enable_irled);
  2235. EXPORT_SYMBOL(pmu_battery_count);
  2236. EXPORT_SYMBOL(pmu_batteries);
  2237. EXPORT_SYMBOL(pmu_power_flags);
  2238. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */