w6692.c 36 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/delay.h>
  26. #include <linux/mISDNhw.h>
  27. #include "w6692.h"
  28. #define W6692_REV "2.0"
  29. #define DBUSY_TIMER_VALUE 80
  30. enum {
  31. W6692_ASUS,
  32. W6692_WINBOND,
  33. W6692_USR
  34. };
  35. /* private data in the PCI devices list */
  36. struct w6692map {
  37. u_int subtype;
  38. char *name;
  39. };
  40. static const struct w6692map w6692_map[] =
  41. {
  42. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  43. {W6692_WINBOND, "Winbond W6692"},
  44. {W6692_USR, "USR W6692"}
  45. };
  46. #ifndef PCI_VENDOR_ID_USR
  47. #define PCI_VENDOR_ID_USR 0x16ec
  48. #define PCI_DEVICE_ID_USR_6692 0x3409
  49. #endif
  50. struct w6692_ch {
  51. struct bchannel bch;
  52. u32 addr;
  53. struct timer_list timer;
  54. u8 b_mode;
  55. };
  56. struct w6692_hw {
  57. struct list_head list;
  58. struct pci_dev *pdev;
  59. char name[MISDN_MAX_IDLEN];
  60. u32 irq;
  61. u32 irqcnt;
  62. u32 addr;
  63. u32 fmask; /* feature mask - bit set per card nr */
  64. int subtype;
  65. spinlock_t lock; /* hw lock */
  66. u8 imask;
  67. u8 pctl;
  68. u8 xaddr;
  69. u8 xdata;
  70. u8 state;
  71. struct w6692_ch bc[2];
  72. struct dchannel dch;
  73. char log[64];
  74. };
  75. static LIST_HEAD(Cards);
  76. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  77. static int w6692_cnt;
  78. static int debug;
  79. static u32 led;
  80. static u32 pots;
  81. static void
  82. _set_debug(struct w6692_hw *card)
  83. {
  84. card->dch.debug = debug;
  85. card->bc[0].bch.debug = debug;
  86. card->bc[1].bch.debug = debug;
  87. }
  88. static int
  89. set_debug(const char *val, struct kernel_param *kp)
  90. {
  91. int ret;
  92. struct w6692_hw *card;
  93. ret = param_set_uint(val, kp);
  94. if (!ret) {
  95. read_lock(&card_lock);
  96. list_for_each_entry(card, &Cards, list)
  97. _set_debug(card);
  98. read_unlock(&card_lock);
  99. }
  100. return ret;
  101. }
  102. MODULE_AUTHOR("Karsten Keil");
  103. MODULE_LICENSE("GPL v2");
  104. MODULE_VERSION(W6692_REV);
  105. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  106. MODULE_PARM_DESC(debug, "W6692 debug mask");
  107. module_param(led, uint, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  109. module_param(pots, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  111. static inline u8
  112. ReadW6692(struct w6692_hw *card, u8 offset)
  113. {
  114. return inb(card->addr + offset);
  115. }
  116. static inline void
  117. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  118. {
  119. outb(value, card->addr + offset);
  120. }
  121. static inline u8
  122. ReadW6692B(struct w6692_ch *bc, u8 offset)
  123. {
  124. return inb(bc->addr + offset);
  125. }
  126. static inline void
  127. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  128. {
  129. outb(value, bc->addr + offset);
  130. }
  131. static void
  132. enable_hwirq(struct w6692_hw *card)
  133. {
  134. WriteW6692(card, W_IMASK, card->imask);
  135. }
  136. static void
  137. disable_hwirq(struct w6692_hw *card)
  138. {
  139. WriteW6692(card, W_IMASK, 0xff);
  140. }
  141. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  142. static void
  143. W6692Version(struct w6692_hw *card)
  144. {
  145. int val;
  146. val = ReadW6692(card, W_D_RBCH);
  147. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  148. W6692Ver[(val >> 6) & 3]);
  149. }
  150. static void
  151. w6692_led_handler(struct w6692_hw *card, int on)
  152. {
  153. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  154. return;
  155. if (on) {
  156. card->xdata &= 0xfb; /* LED ON */
  157. WriteW6692(card, W_XDATA, card->xdata);
  158. } else {
  159. card->xdata |= 0x04; /* LED OFF */
  160. WriteW6692(card, W_XDATA, card->xdata);
  161. }
  162. }
  163. static void
  164. ph_command(struct w6692_hw *card, u8 cmd)
  165. {
  166. pr_debug("%s: ph_command %x\n", card->name, cmd);
  167. WriteW6692(card, W_CIX, cmd);
  168. }
  169. static void
  170. W6692_new_ph(struct w6692_hw *card)
  171. {
  172. if (card->state == W_L1CMD_RST)
  173. ph_command(card, W_L1CMD_DRC);
  174. schedule_event(&card->dch, FLG_PHCHANGE);
  175. }
  176. static void
  177. W6692_ph_bh(struct dchannel *dch)
  178. {
  179. struct w6692_hw *card = dch->hw;
  180. switch (card->state) {
  181. case W_L1CMD_RST:
  182. dch->state = 0;
  183. l1_event(dch->l1, HW_RESET_IND);
  184. break;
  185. case W_L1IND_CD:
  186. dch->state = 3;
  187. l1_event(dch->l1, HW_DEACT_CNF);
  188. break;
  189. case W_L1IND_DRD:
  190. dch->state = 3;
  191. l1_event(dch->l1, HW_DEACT_IND);
  192. break;
  193. case W_L1IND_CE:
  194. dch->state = 4;
  195. l1_event(dch->l1, HW_POWERUP_IND);
  196. break;
  197. case W_L1IND_LD:
  198. if (dch->state <= 5) {
  199. dch->state = 5;
  200. l1_event(dch->l1, ANYSIGNAL);
  201. } else {
  202. dch->state = 8;
  203. l1_event(dch->l1, LOSTFRAMING);
  204. }
  205. break;
  206. case W_L1IND_ARD:
  207. dch->state = 6;
  208. l1_event(dch->l1, INFO2);
  209. break;
  210. case W_L1IND_AI8:
  211. dch->state = 7;
  212. l1_event(dch->l1, INFO4_P8);
  213. break;
  214. case W_L1IND_AI10:
  215. dch->state = 7;
  216. l1_event(dch->l1, INFO4_P10);
  217. break;
  218. default:
  219. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  220. card->name, card->state, dch->state);
  221. break;
  222. }
  223. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  224. }
  225. static void
  226. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  227. {
  228. struct dchannel *dch = &card->dch;
  229. u8 *ptr;
  230. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  231. if (!dch->rx_skb) {
  232. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  233. if (!dch->rx_skb) {
  234. pr_info("%s: D receive out of memory\n", card->name);
  235. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  236. return;
  237. }
  238. }
  239. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  240. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  241. dch->rx_skb->len + count);
  242. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  243. return;
  244. }
  245. ptr = skb_put(dch->rx_skb, count);
  246. insb(card->addr + W_D_RFIFO, ptr, count);
  247. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  248. if (debug & DEBUG_HW_DFIFO) {
  249. snprintf(card->log, 63, "D-recv %s %d ",
  250. card->name, count);
  251. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  252. }
  253. }
  254. static void
  255. W6692_fill_Dfifo(struct w6692_hw *card)
  256. {
  257. struct dchannel *dch = &card->dch;
  258. int count;
  259. u8 *ptr;
  260. u8 cmd = W_D_CMDR_XMS;
  261. pr_debug("%s: fill_Dfifo\n", card->name);
  262. if (!dch->tx_skb)
  263. return;
  264. count = dch->tx_skb->len - dch->tx_idx;
  265. if (count <= 0)
  266. return;
  267. if (count > W_D_FIFO_THRESH)
  268. count = W_D_FIFO_THRESH;
  269. else
  270. cmd |= W_D_CMDR_XME;
  271. ptr = dch->tx_skb->data + dch->tx_idx;
  272. dch->tx_idx += count;
  273. outsb(card->addr + W_D_XFIFO, ptr, count);
  274. WriteW6692(card, W_D_CMDR, cmd);
  275. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  276. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  277. del_timer(&dch->timer);
  278. }
  279. init_timer(&dch->timer);
  280. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
  281. add_timer(&dch->timer);
  282. if (debug & DEBUG_HW_DFIFO) {
  283. snprintf(card->log, 63, "D-send %s %d ",
  284. card->name, count);
  285. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  286. }
  287. }
  288. static void
  289. d_retransmit(struct w6692_hw *card)
  290. {
  291. struct dchannel *dch = &card->dch;
  292. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  293. del_timer(&dch->timer);
  294. #ifdef FIXME
  295. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  296. dchannel_sched_event(dch, D_CLEARBUSY);
  297. #endif
  298. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  299. /* Restart frame */
  300. dch->tx_idx = 0;
  301. W6692_fill_Dfifo(card);
  302. } else if (dch->tx_skb) { /* should not happen */
  303. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  304. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  305. dch->tx_idx = 0;
  306. W6692_fill_Dfifo(card);
  307. } else {
  308. pr_info("%s: XDU no TX_BUSY\n", card->name);
  309. if (get_next_dframe(dch))
  310. W6692_fill_Dfifo(card);
  311. }
  312. }
  313. static void
  314. handle_rxD(struct w6692_hw *card) {
  315. u8 stat;
  316. int count;
  317. stat = ReadW6692(card, W_D_RSTA);
  318. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  319. if (stat & W_D_RSTA_RDOV) {
  320. pr_debug("%s: D-channel RDOV\n", card->name);
  321. #ifdef ERROR_STATISTIC
  322. card->dch.err_rx++;
  323. #endif
  324. }
  325. if (stat & W_D_RSTA_CRCE) {
  326. pr_debug("%s: D-channel CRC error\n", card->name);
  327. #ifdef ERROR_STATISTIC
  328. card->dch.err_crc++;
  329. #endif
  330. }
  331. if (stat & W_D_RSTA_RMB) {
  332. pr_debug("%s: D-channel ABORT\n", card->name);
  333. #ifdef ERROR_STATISTIC
  334. card->dch.err_rx++;
  335. #endif
  336. }
  337. if (card->dch.rx_skb)
  338. dev_kfree_skb(card->dch.rx_skb);
  339. card->dch.rx_skb = NULL;
  340. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  341. } else {
  342. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  343. if (count == 0)
  344. count = W_D_FIFO_THRESH;
  345. W6692_empty_Dfifo(card, count);
  346. recv_Dchannel(&card->dch);
  347. }
  348. }
  349. static void
  350. handle_txD(struct w6692_hw *card) {
  351. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  352. del_timer(&card->dch.timer);
  353. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  354. W6692_fill_Dfifo(card);
  355. } else {
  356. if (card->dch.tx_skb)
  357. dev_kfree_skb(card->dch.tx_skb);
  358. if (get_next_dframe(&card->dch))
  359. W6692_fill_Dfifo(card);
  360. }
  361. }
  362. static void
  363. handle_statusD(struct w6692_hw *card)
  364. {
  365. struct dchannel *dch = &card->dch;
  366. u8 exval, v1, cir;
  367. exval = ReadW6692(card, W_D_EXIR);
  368. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  369. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  370. /* Transmit underrun/collision */
  371. pr_debug("%s: D-channel underrun/collision\n", card->name);
  372. #ifdef ERROR_STATISTIC
  373. dch->err_tx++;
  374. #endif
  375. d_retransmit(card);
  376. }
  377. if (exval & W_D_EXI_RDOV) { /* RDOV */
  378. pr_debug("%s: D-channel RDOV\n", card->name);
  379. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  380. }
  381. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  382. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  383. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  384. v1 = ReadW6692(card, W_MOSR);
  385. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  386. card->name, v1);
  387. }
  388. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  389. cir = ReadW6692(card, W_CIR);
  390. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  391. if (cir & W_CIR_ICC) {
  392. v1 = cir & W_CIR_COD_MASK;
  393. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  394. dch->state, v1);
  395. card->state = v1;
  396. if (card->fmask & led) {
  397. switch (v1) {
  398. case W_L1IND_AI8:
  399. case W_L1IND_AI10:
  400. w6692_led_handler(card, 1);
  401. break;
  402. default:
  403. w6692_led_handler(card, 0);
  404. break;
  405. }
  406. }
  407. W6692_new_ph(card);
  408. }
  409. if (cir & W_CIR_SCC) {
  410. v1 = ReadW6692(card, W_SQR);
  411. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  412. }
  413. }
  414. if (exval & W_D_EXI_WEXP)
  415. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  416. if (exval & W_D_EXI_TEXP)
  417. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  418. }
  419. static void
  420. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  421. {
  422. struct w6692_hw *card = wch->bch.hw;
  423. u8 *ptr;
  424. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  425. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  426. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  427. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  428. if (wch->bch.rx_skb)
  429. skb_trim(wch->bch.rx_skb, 0);
  430. return;
  431. }
  432. if (!wch->bch.rx_skb) {
  433. wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
  434. if (unlikely(!wch->bch.rx_skb)) {
  435. pr_info("%s: B receive out of memory\n", card->name);
  436. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  437. W_B_CMDR_RACT);
  438. return;
  439. }
  440. }
  441. if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
  442. pr_debug("%s: empty_Bfifo incoming packet too large\n",
  443. card->name);
  444. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  445. skb_trim(wch->bch.rx_skb, 0);
  446. return;
  447. }
  448. ptr = skb_put(wch->bch.rx_skb, count);
  449. insb(wch->addr + W_B_RFIFO, ptr, count);
  450. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  451. if (debug & DEBUG_HW_DFIFO) {
  452. snprintf(card->log, 63, "B%1d-recv %s %d ",
  453. wch->bch.nr, card->name, count);
  454. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  455. }
  456. }
  457. static void
  458. W6692_fill_Bfifo(struct w6692_ch *wch)
  459. {
  460. struct w6692_hw *card = wch->bch.hw;
  461. int count;
  462. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  463. pr_debug("%s: fill Bfifo\n", card->name);
  464. if (!wch->bch.tx_skb)
  465. return;
  466. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  467. if (count <= 0)
  468. return;
  469. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  470. if (count > W_B_FIFO_THRESH)
  471. count = W_B_FIFO_THRESH;
  472. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  473. cmd |= W_B_CMDR_XME;
  474. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  475. count, wch->bch.tx_idx);
  476. wch->bch.tx_idx += count;
  477. outsb(wch->addr + W_B_XFIFO, ptr, count);
  478. WriteW6692B(wch, W_B_CMDR, cmd);
  479. if (debug & DEBUG_HW_DFIFO) {
  480. snprintf(card->log, 63, "B%1d-send %s %d ",
  481. wch->bch.nr, card->name, count);
  482. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  483. }
  484. }
  485. static int
  486. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  487. {
  488. struct w6692_hw *card = wch->bch.hw;
  489. u16 *vol = (u16 *)skb->data;
  490. u8 val;
  491. if ((!(card->fmask & pots)) ||
  492. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  493. return -ENODEV;
  494. if (skb->len < 2)
  495. return -EINVAL;
  496. if (*vol > 7)
  497. return -EINVAL;
  498. val = *vol & 7;
  499. val = 7 - val;
  500. if (mic) {
  501. val <<= 3;
  502. card->xaddr &= 0xc7;
  503. } else {
  504. card->xaddr &= 0xf8;
  505. }
  506. card->xaddr |= val;
  507. WriteW6692(card, W_XADDR, card->xaddr);
  508. return 0;
  509. }
  510. static int
  511. enable_pots(struct w6692_ch *wch)
  512. {
  513. struct w6692_hw *card = wch->bch.hw;
  514. if ((!(card->fmask & pots)) ||
  515. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  516. return -ENODEV;
  517. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  518. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  519. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  520. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  521. WriteW6692(card, W_PCTL, card->pctl);
  522. return 0;
  523. }
  524. static int
  525. disable_pots(struct w6692_ch *wch)
  526. {
  527. struct w6692_hw *card = wch->bch.hw;
  528. if (!(card->fmask & pots))
  529. return -ENODEV;
  530. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  531. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  532. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  533. W_B_CMDR_XRST);
  534. return 0;
  535. }
  536. static int
  537. w6692_mode(struct w6692_ch *wch, u32 pr)
  538. {
  539. struct w6692_hw *card;
  540. card = wch->bch.hw;
  541. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  542. wch->bch.nr, wch->bch.state, pr);
  543. switch (pr) {
  544. case ISDN_P_NONE:
  545. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  546. disable_pots(wch);
  547. wch->b_mode = 0;
  548. mISDN_clear_bchannel(&wch->bch);
  549. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  550. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  551. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  552. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  553. break;
  554. case ISDN_P_B_RAW:
  555. wch->b_mode = W_B_MODE_MMS;
  556. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  557. WriteW6692B(wch, W_B_EXIM, 0);
  558. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  559. W_B_CMDR_XRST);
  560. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  561. break;
  562. case ISDN_P_B_HDLC:
  563. wch->b_mode = W_B_MODE_ITF;
  564. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  565. WriteW6692B(wch, W_B_ADM1, 0xff);
  566. WriteW6692B(wch, W_B_ADM2, 0xff);
  567. WriteW6692B(wch, W_B_EXIM, 0);
  568. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  569. W_B_CMDR_XRST);
  570. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  571. break;
  572. default:
  573. pr_info("%s: protocol %x not known\n", card->name, pr);
  574. return -ENOPROTOOPT;
  575. }
  576. wch->bch.state = pr;
  577. return 0;
  578. }
  579. static void
  580. send_next(struct w6692_ch *wch)
  581. {
  582. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
  583. W6692_fill_Bfifo(wch);
  584. else {
  585. if (wch->bch.tx_skb) {
  586. /* send confirm, on trans, free on hdlc. */
  587. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  588. confirm_Bsend(&wch->bch);
  589. dev_kfree_skb(wch->bch.tx_skb);
  590. }
  591. if (get_next_bframe(&wch->bch))
  592. W6692_fill_Bfifo(wch);
  593. }
  594. }
  595. static void
  596. W6692B_interrupt(struct w6692_hw *card, int ch)
  597. {
  598. struct w6692_ch *wch = &card->bc[ch];
  599. int count;
  600. u8 stat, star = 0;
  601. stat = ReadW6692B(wch, W_B_EXIR);
  602. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  603. if (stat & W_B_EXI_RME) {
  604. star = ReadW6692B(wch, W_B_STAR);
  605. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  606. if ((star & W_B_STAR_RDOV) &&
  607. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  608. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  609. wch->bch.nr, wch->bch.state);
  610. #ifdef ERROR_STATISTIC
  611. wch->bch.err_rdo++;
  612. #endif
  613. }
  614. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  615. if (star & W_B_STAR_CRCE) {
  616. pr_debug("%s: B%d CRC error\n",
  617. card->name, wch->bch.nr);
  618. #ifdef ERROR_STATISTIC
  619. wch->bch.err_crc++;
  620. #endif
  621. }
  622. if (star & W_B_STAR_RMB) {
  623. pr_debug("%s: B%d message abort\n",
  624. card->name, wch->bch.nr);
  625. #ifdef ERROR_STATISTIC
  626. wch->bch.err_inv++;
  627. #endif
  628. }
  629. }
  630. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  631. W_B_CMDR_RRST | W_B_CMDR_RACT);
  632. if (wch->bch.rx_skb)
  633. skb_trim(wch->bch.rx_skb, 0);
  634. } else {
  635. count = ReadW6692B(wch, W_B_RBCL) &
  636. (W_B_FIFO_THRESH - 1);
  637. if (count == 0)
  638. count = W_B_FIFO_THRESH;
  639. W6692_empty_Bfifo(wch, count);
  640. recv_Bchannel(&wch->bch, 0);
  641. }
  642. }
  643. if (stat & W_B_EXI_RMR) {
  644. if (!(stat & W_B_EXI_RME))
  645. star = ReadW6692B(wch, W_B_STAR);
  646. if (star & W_B_STAR_RDOV) {
  647. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  648. wch->bch.nr, wch->bch.state);
  649. #ifdef ERROR_STATISTIC
  650. wch->bch.err_rdo++;
  651. #endif
  652. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  653. W_B_CMDR_RRST | W_B_CMDR_RACT);
  654. } else {
  655. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  656. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
  657. wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
  658. recv_Bchannel(&wch->bch, 0);
  659. }
  660. }
  661. if (stat & W_B_EXI_RDOV) {
  662. /* only if it is not handled yet */
  663. if (!(star & W_B_STAR_RDOV)) {
  664. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  665. wch->bch.nr, wch->bch.state);
  666. #ifdef ERROR_STATISTIC
  667. wch->bch.err_rdo++;
  668. #endif
  669. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  670. W_B_CMDR_RRST | W_B_CMDR_RACT);
  671. }
  672. }
  673. if (stat & W_B_EXI_XFR) {
  674. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  675. star = ReadW6692B(wch, W_B_STAR);
  676. pr_debug("%s: B%d star %02x\n", card->name,
  677. wch->bch.nr, star);
  678. }
  679. if (star & W_B_STAR_XDOW) {
  680. pr_debug("%s: B%d XDOW proto=%x\n", card->name,
  681. wch->bch.nr, wch->bch.state);
  682. #ifdef ERROR_STATISTIC
  683. wch->bch.err_xdu++;
  684. #endif
  685. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  686. W_B_CMDR_RACT);
  687. /* resend */
  688. if (wch->bch.tx_skb) {
  689. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  690. wch->bch.tx_idx = 0;
  691. }
  692. }
  693. send_next(wch);
  694. if (stat & W_B_EXI_XDUN)
  695. return; /* handle XDOW only once */
  696. }
  697. if (stat & W_B_EXI_XDUN) {
  698. pr_debug("%s: B%d XDUN proto=%x\n", card->name,
  699. wch->bch.nr, wch->bch.state);
  700. #ifdef ERROR_STATISTIC
  701. wch->bch.err_xdu++;
  702. #endif
  703. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
  704. /* resend */
  705. if (wch->bch.tx_skb) {
  706. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  707. wch->bch.tx_idx = 0;
  708. }
  709. send_next(wch);
  710. }
  711. }
  712. static irqreturn_t
  713. w6692_irq(int intno, void *dev_id)
  714. {
  715. struct w6692_hw *card = dev_id;
  716. u8 ista;
  717. spin_lock(&card->lock);
  718. ista = ReadW6692(card, W_ISTA);
  719. if ((ista | card->imask) == card->imask) {
  720. /* possible a shared IRQ reqest */
  721. spin_unlock(&card->lock);
  722. return IRQ_NONE;
  723. }
  724. card->irqcnt++;
  725. pr_debug("%s: ista %02x\n", card->name, ista);
  726. ista &= ~card->imask;
  727. if (ista & W_INT_B1_EXI)
  728. W6692B_interrupt(card, 0);
  729. if (ista & W_INT_B2_EXI)
  730. W6692B_interrupt(card, 1);
  731. if (ista & W_INT_D_RME)
  732. handle_rxD(card);
  733. if (ista & W_INT_D_RMR)
  734. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  735. if (ista & W_INT_D_XFR)
  736. handle_txD(card);
  737. if (ista & W_INT_D_EXI)
  738. handle_statusD(card);
  739. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  740. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  741. /* End IRQ Handler */
  742. spin_unlock(&card->lock);
  743. return IRQ_HANDLED;
  744. }
  745. static void
  746. dbusy_timer_handler(struct dchannel *dch)
  747. {
  748. struct w6692_hw *card = dch->hw;
  749. int rbch, star;
  750. u_long flags;
  751. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  752. spin_lock_irqsave(&card->lock, flags);
  753. rbch = ReadW6692(card, W_D_RBCH);
  754. star = ReadW6692(card, W_D_STAR);
  755. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  756. card->name, rbch, star);
  757. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  758. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  759. else {
  760. /* discard frame; reset transceiver */
  761. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  762. if (dch->tx_idx)
  763. dch->tx_idx = 0;
  764. else
  765. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  766. card->name);
  767. /* Transmitter reset */
  768. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  769. }
  770. spin_unlock_irqrestore(&card->lock, flags);
  771. }
  772. }
  773. void initW6692(struct w6692_hw *card)
  774. {
  775. u8 val;
  776. card->dch.timer.function = (void *)dbusy_timer_handler;
  777. card->dch.timer.data = (u_long)&card->dch;
  778. init_timer(&card->dch.timer);
  779. w6692_mode(&card->bc[0], ISDN_P_NONE);
  780. w6692_mode(&card->bc[1], ISDN_P_NONE);
  781. WriteW6692(card, W_D_CTL, 0x00);
  782. disable_hwirq(card);
  783. WriteW6692(card, W_D_SAM, 0xff);
  784. WriteW6692(card, W_D_TAM, 0xff);
  785. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  786. card->state = W_L1CMD_RST;
  787. ph_command(card, W_L1CMD_RST);
  788. ph_command(card, W_L1CMD_ECK);
  789. /* enable all IRQ but extern */
  790. card->imask = 0x18;
  791. WriteW6692(card, W_D_EXIM, 0x00);
  792. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  793. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  794. /* Reset D-chan receiver and transmitter */
  795. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  796. /* Reset B-chan receiver and transmitter */
  797. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  798. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  799. /* enable peripheral */
  800. if (card->subtype == W6692_USR) {
  801. /* seems that USR implemented some power control features
  802. * Pin 79 is connected to the oscilator circuit so we
  803. * have to handle it here
  804. */
  805. card->pctl = 0x80;
  806. card->xdata = 0;
  807. WriteW6692(card, W_PCTL, card->pctl);
  808. WriteW6692(card, W_XDATA, card->xdata);
  809. } else {
  810. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  811. W_PCTL_OE1 | W_PCTL_OE0;
  812. card->xaddr = 0x00;/* all sw off */
  813. if (card->fmask & pots)
  814. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  815. if (card->fmask & led)
  816. card->xdata |= 0x04; /* LED OFF */
  817. if ((card->fmask & pots) || (card->fmask & led)) {
  818. WriteW6692(card, W_PCTL, card->pctl);
  819. WriteW6692(card, W_XADDR, card->xaddr);
  820. WriteW6692(card, W_XDATA, card->xdata);
  821. val = ReadW6692(card, W_XADDR);
  822. if (debug & DEBUG_HW)
  823. pr_notice("%s: W_XADDR=%02x\n",
  824. card->name, val);
  825. }
  826. }
  827. }
  828. static void
  829. reset_w6692(struct w6692_hw *card)
  830. {
  831. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  832. mdelay(10);
  833. WriteW6692(card, W_D_CTL, 0);
  834. }
  835. static int
  836. init_card(struct w6692_hw *card)
  837. {
  838. int cnt = 3;
  839. u_long flags;
  840. spin_lock_irqsave(&card->lock, flags);
  841. disable_hwirq(card);
  842. spin_unlock_irqrestore(&card->lock, flags);
  843. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  844. pr_info("%s: couldn't get interrupt %d\n", card->name,
  845. card->irq);
  846. return -EIO;
  847. }
  848. while (cnt--) {
  849. spin_lock_irqsave(&card->lock, flags);
  850. initW6692(card);
  851. enable_hwirq(card);
  852. spin_unlock_irqrestore(&card->lock, flags);
  853. /* Timeout 10ms */
  854. msleep_interruptible(10);
  855. if (debug & DEBUG_HW)
  856. pr_notice("%s: IRQ %d count %d\n", card->name,
  857. card->irq, card->irqcnt);
  858. if (!card->irqcnt) {
  859. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  860. card->name, card->irq, 3 - cnt);
  861. reset_w6692(card);
  862. } else
  863. return 0;
  864. }
  865. free_irq(card->irq, card);
  866. return -EIO;
  867. }
  868. static int
  869. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  870. {
  871. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  872. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  873. struct w6692_hw *card = bch->hw;
  874. int ret = -EINVAL;
  875. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  876. u32 id;
  877. u_long flags;
  878. switch (hh->prim) {
  879. case PH_DATA_REQ:
  880. spin_lock_irqsave(&card->lock, flags);
  881. ret = bchannel_senddata(bch, skb);
  882. if (ret > 0) { /* direct TX */
  883. id = hh->id; /* skb can be freed */
  884. ret = 0;
  885. W6692_fill_Bfifo(bc);
  886. spin_unlock_irqrestore(&card->lock, flags);
  887. if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
  888. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  889. } else
  890. spin_unlock_irqrestore(&card->lock, flags);
  891. return ret;
  892. case PH_ACTIVATE_REQ:
  893. spin_lock_irqsave(&card->lock, flags);
  894. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  895. ret = w6692_mode(bc, ch->protocol);
  896. else
  897. ret = 0;
  898. spin_unlock_irqrestore(&card->lock, flags);
  899. if (!ret)
  900. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  901. NULL, GFP_KERNEL);
  902. break;
  903. case PH_DEACTIVATE_REQ:
  904. spin_lock_irqsave(&card->lock, flags);
  905. mISDN_clear_bchannel(bch);
  906. w6692_mode(bc, ISDN_P_NONE);
  907. spin_unlock_irqrestore(&card->lock, flags);
  908. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  909. NULL, GFP_KERNEL);
  910. ret = 0;
  911. break;
  912. default:
  913. pr_info("%s: %s unknown prim(%x,%x)\n",
  914. card->name, __func__, hh->prim, hh->id);
  915. ret = -EINVAL;
  916. }
  917. if (!ret)
  918. dev_kfree_skb(skb);
  919. return ret;
  920. }
  921. static int
  922. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  923. {
  924. int ret = 0;
  925. switch (cq->op) {
  926. case MISDN_CTRL_GETOP:
  927. cq->op = 0;
  928. break;
  929. /* Nothing implemented yet */
  930. case MISDN_CTRL_FILL_EMPTY:
  931. default:
  932. pr_info("%s: unknown Op %x\n", __func__, cq->op);
  933. ret = -EINVAL;
  934. break;
  935. }
  936. return ret;
  937. }
  938. static int
  939. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  940. {
  941. struct bchannel *bch;
  942. if (rq->adr.channel > 2)
  943. return -EINVAL;
  944. if (rq->protocol == ISDN_P_NONE)
  945. return -EINVAL;
  946. bch = &card->bc[rq->adr.channel - 1].bch;
  947. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  948. return -EBUSY; /* b-channel can be only open once */
  949. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  950. bch->ch.protocol = rq->protocol;
  951. rq->ch = &bch->ch;
  952. return 0;
  953. }
  954. static int
  955. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  956. {
  957. int ret = 0;
  958. switch (cq->op) {
  959. case MISDN_CTRL_GETOP:
  960. cq->op = 0;
  961. break;
  962. default:
  963. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  964. ret = -EINVAL;
  965. break;
  966. }
  967. return ret;
  968. }
  969. static int
  970. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  971. {
  972. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  973. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  974. struct w6692_hw *card = bch->hw;
  975. int ret = -EINVAL;
  976. u_long flags;
  977. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  978. switch (cmd) {
  979. case CLOSE_CHANNEL:
  980. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  981. if (test_bit(FLG_ACTIVE, &bch->Flags)) {
  982. spin_lock_irqsave(&card->lock, flags);
  983. mISDN_freebchannel(bch);
  984. w6692_mode(bc, ISDN_P_NONE);
  985. spin_unlock_irqrestore(&card->lock, flags);
  986. } else {
  987. skb_queue_purge(&bch->rqueue);
  988. bch->rcount = 0;
  989. }
  990. ch->protocol = ISDN_P_NONE;
  991. ch->peer = NULL;
  992. module_put(THIS_MODULE);
  993. ret = 0;
  994. break;
  995. case CONTROL_CHANNEL:
  996. ret = channel_bctrl(bch, arg);
  997. break;
  998. default:
  999. pr_info("%s: %s unknown prim(%x)\n",
  1000. card->name, __func__, cmd);
  1001. }
  1002. return ret;
  1003. }
  1004. static int
  1005. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1006. {
  1007. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1008. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1009. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1010. int ret = -EINVAL;
  1011. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1012. u32 id;
  1013. u_long flags;
  1014. switch (hh->prim) {
  1015. case PH_DATA_REQ:
  1016. spin_lock_irqsave(&card->lock, flags);
  1017. ret = dchannel_senddata(dch, skb);
  1018. if (ret > 0) { /* direct TX */
  1019. id = hh->id; /* skb can be freed */
  1020. W6692_fill_Dfifo(card);
  1021. ret = 0;
  1022. spin_unlock_irqrestore(&card->lock, flags);
  1023. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1024. } else
  1025. spin_unlock_irqrestore(&card->lock, flags);
  1026. return ret;
  1027. case PH_ACTIVATE_REQ:
  1028. ret = l1_event(dch->l1, hh->prim);
  1029. break;
  1030. case PH_DEACTIVATE_REQ:
  1031. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1032. ret = l1_event(dch->l1, hh->prim);
  1033. break;
  1034. }
  1035. if (!ret)
  1036. dev_kfree_skb(skb);
  1037. return ret;
  1038. }
  1039. static int
  1040. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1041. {
  1042. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1043. u_long flags;
  1044. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1045. switch (cmd) {
  1046. case INFO3_P8:
  1047. spin_lock_irqsave(&card->lock, flags);
  1048. ph_command(card, W_L1CMD_AR8);
  1049. spin_unlock_irqrestore(&card->lock, flags);
  1050. break;
  1051. case INFO3_P10:
  1052. spin_lock_irqsave(&card->lock, flags);
  1053. ph_command(card, W_L1CMD_AR10);
  1054. spin_unlock_irqrestore(&card->lock, flags);
  1055. break;
  1056. case HW_RESET_REQ:
  1057. spin_lock_irqsave(&card->lock, flags);
  1058. if (card->state != W_L1IND_DRD)
  1059. ph_command(card, W_L1CMD_RST);
  1060. ph_command(card, W_L1CMD_ECK);
  1061. spin_unlock_irqrestore(&card->lock, flags);
  1062. break;
  1063. case HW_DEACT_REQ:
  1064. skb_queue_purge(&dch->squeue);
  1065. if (dch->tx_skb) {
  1066. dev_kfree_skb(dch->tx_skb);
  1067. dch->tx_skb = NULL;
  1068. }
  1069. dch->tx_idx = 0;
  1070. if (dch->rx_skb) {
  1071. dev_kfree_skb(dch->rx_skb);
  1072. dch->rx_skb = NULL;
  1073. }
  1074. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1075. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1076. del_timer(&dch->timer);
  1077. break;
  1078. case HW_POWERUP_REQ:
  1079. spin_lock_irqsave(&card->lock, flags);
  1080. ph_command(card, W_L1CMD_ECK);
  1081. spin_unlock_irqrestore(&card->lock, flags);
  1082. break;
  1083. case PH_ACTIVATE_IND:
  1084. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1085. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1086. GFP_ATOMIC);
  1087. break;
  1088. case PH_DEACTIVATE_IND:
  1089. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1090. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1091. GFP_ATOMIC);
  1092. break;
  1093. default:
  1094. pr_debug("%s: %s unknown command %x\n", card->name,
  1095. __func__, cmd);
  1096. return -1;
  1097. }
  1098. return 0;
  1099. }
  1100. static int
  1101. open_dchannel(struct w6692_hw *card, struct channel_req *rq)
  1102. {
  1103. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1104. card->dch.dev.id, __builtin_return_address(1));
  1105. if (rq->protocol != ISDN_P_TE_S0)
  1106. return -EINVAL;
  1107. if (rq->adr.channel == 1)
  1108. /* E-Channel not supported */
  1109. return -EINVAL;
  1110. rq->ch = &card->dch.dev.D;
  1111. rq->ch->protocol = rq->protocol;
  1112. if (card->dch.state == 7)
  1113. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1114. 0, NULL, GFP_KERNEL);
  1115. return 0;
  1116. }
  1117. static int
  1118. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1119. {
  1120. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1121. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1122. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1123. struct channel_req *rq;
  1124. int err = 0;
  1125. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1126. switch (cmd) {
  1127. case OPEN_CHANNEL:
  1128. rq = arg;
  1129. if (rq->protocol == ISDN_P_TE_S0)
  1130. err = open_dchannel(card, rq);
  1131. else
  1132. err = open_bchannel(card, rq);
  1133. if (err)
  1134. break;
  1135. if (!try_module_get(THIS_MODULE))
  1136. pr_info("%s: cannot get module\n", card->name);
  1137. break;
  1138. case CLOSE_CHANNEL:
  1139. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1140. dch->dev.id, __builtin_return_address(0));
  1141. module_put(THIS_MODULE);
  1142. break;
  1143. case CONTROL_CHANNEL:
  1144. err = channel_ctrl(card, arg);
  1145. break;
  1146. default:
  1147. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1148. return -EINVAL;
  1149. }
  1150. return err;
  1151. }
  1152. static int
  1153. setup_w6692(struct w6692_hw *card)
  1154. {
  1155. u32 val;
  1156. if (!request_region(card->addr, 256, card->name)) {
  1157. pr_info("%s: config port %x-%x already in use\n", card->name,
  1158. card->addr, card->addr + 255);
  1159. return -EIO;
  1160. }
  1161. W6692Version(card);
  1162. card->bc[0].addr = card->addr;
  1163. card->bc[1].addr = card->addr + 0x40;
  1164. val = ReadW6692(card, W_ISTA);
  1165. if (debug & DEBUG_HW)
  1166. pr_notice("%s ISTA=%02x\n", card->name, val);
  1167. val = ReadW6692(card, W_IMASK);
  1168. if (debug & DEBUG_HW)
  1169. pr_notice("%s IMASK=%02x\n", card->name, val);
  1170. val = ReadW6692(card, W_D_EXIR);
  1171. if (debug & DEBUG_HW)
  1172. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1173. val = ReadW6692(card, W_D_EXIM);
  1174. if (debug & DEBUG_HW)
  1175. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1176. val = ReadW6692(card, W_D_RSTA);
  1177. if (debug & DEBUG_HW)
  1178. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1179. return 0;
  1180. }
  1181. static void
  1182. release_card(struct w6692_hw *card)
  1183. {
  1184. u_long flags;
  1185. spin_lock_irqsave(&card->lock, flags);
  1186. disable_hwirq(card);
  1187. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1188. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1189. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1190. card->xdata |= 0x04; /* LED OFF */
  1191. WriteW6692(card, W_XDATA, card->xdata);
  1192. }
  1193. spin_unlock_irqrestore(&card->lock, flags);
  1194. free_irq(card->irq, card);
  1195. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1196. mISDN_unregister_device(&card->dch.dev);
  1197. release_region(card->addr, 256);
  1198. mISDN_freebchannel(&card->bc[1].bch);
  1199. mISDN_freebchannel(&card->bc[0].bch);
  1200. mISDN_freedchannel(&card->dch);
  1201. write_lock_irqsave(&card_lock, flags);
  1202. list_del(&card->list);
  1203. write_unlock_irqrestore(&card_lock, flags);
  1204. pci_disable_device(card->pdev);
  1205. pci_set_drvdata(card->pdev, NULL);
  1206. kfree(card);
  1207. }
  1208. static int
  1209. setup_instance(struct w6692_hw *card)
  1210. {
  1211. int i, err;
  1212. u_long flags;
  1213. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1214. write_lock_irqsave(&card_lock, flags);
  1215. list_add_tail(&card->list, &Cards);
  1216. write_unlock_irqrestore(&card_lock, flags);
  1217. card->fmask = (1 << w6692_cnt);
  1218. _set_debug(card);
  1219. spin_lock_init(&card->lock);
  1220. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1221. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1222. card->dch.dev.D.send = w6692_l2l1D;
  1223. card->dch.dev.D.ctrl = w6692_dctrl;
  1224. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1225. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1226. card->dch.hw = card;
  1227. card->dch.dev.nrbchan = 2;
  1228. for (i = 0; i < 2; i++) {
  1229. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
  1230. card->bc[i].bch.hw = card;
  1231. card->bc[i].bch.nr = i + 1;
  1232. card->bc[i].bch.ch.nr = i + 1;
  1233. card->bc[i].bch.ch.send = w6692_l2l1B;
  1234. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1235. set_channelmap(i + 1, card->dch.dev.channelmap);
  1236. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1237. }
  1238. err = setup_w6692(card);
  1239. if (err)
  1240. goto error_setup;
  1241. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1242. card->name);
  1243. if (err)
  1244. goto error_reg;
  1245. err = init_card(card);
  1246. if (err)
  1247. goto error_init;
  1248. err = create_l1(&card->dch, w6692_l1callback);
  1249. if (!err) {
  1250. w6692_cnt++;
  1251. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1252. return 0;
  1253. }
  1254. free_irq(card->irq, card);
  1255. error_init:
  1256. mISDN_unregister_device(&card->dch.dev);
  1257. error_reg:
  1258. release_region(card->addr, 256);
  1259. error_setup:
  1260. mISDN_freebchannel(&card->bc[1].bch);
  1261. mISDN_freebchannel(&card->bc[0].bch);
  1262. mISDN_freedchannel(&card->dch);
  1263. write_lock_irqsave(&card_lock, flags);
  1264. list_del(&card->list);
  1265. write_unlock_irqrestore(&card_lock, flags);
  1266. kfree(card);
  1267. return err;
  1268. }
  1269. static int __devinit
  1270. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1271. {
  1272. int err = -ENOMEM;
  1273. struct w6692_hw *card;
  1274. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1275. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1276. if (!card) {
  1277. pr_info("No kmem for w6692 card\n");
  1278. return err;
  1279. }
  1280. card->pdev = pdev;
  1281. card->subtype = m->subtype;
  1282. err = pci_enable_device(pdev);
  1283. if (err) {
  1284. kfree(card);
  1285. return err;
  1286. }
  1287. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1288. m->name, pci_name(pdev));
  1289. card->addr = pci_resource_start(pdev, 1);
  1290. card->irq = pdev->irq;
  1291. pci_set_drvdata(pdev, card);
  1292. err = setup_instance(card);
  1293. if (err)
  1294. pci_set_drvdata(pdev, NULL);
  1295. return err;
  1296. }
  1297. static void __devexit
  1298. w6692_remove_pci(struct pci_dev *pdev)
  1299. {
  1300. struct w6692_hw *card = pci_get_drvdata(pdev);
  1301. if (card)
  1302. release_card(card);
  1303. else
  1304. if (debug)
  1305. pr_notice("%s: drvdata allready removed\n", __func__);
  1306. }
  1307. static struct pci_device_id w6692_ids[] = {
  1308. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1309. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1310. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1311. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1312. (ulong)&w6692_map[2]},
  1313. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1314. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1315. { }
  1316. };
  1317. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1318. static struct pci_driver w6692_driver = {
  1319. .name = "w6692",
  1320. .probe = w6692_probe,
  1321. .remove = __devexit_p(w6692_remove_pci),
  1322. .id_table = w6692_ids,
  1323. };
  1324. static int __init w6692_init(void)
  1325. {
  1326. int err;
  1327. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1328. err = pci_register_driver(&w6692_driver);
  1329. return err;
  1330. }
  1331. static void __exit w6692_cleanup(void)
  1332. {
  1333. pci_unregister_driver(&w6692_driver);
  1334. }
  1335. module_init(w6692_init);
  1336. module_exit(w6692_cleanup);