ipath_user_sdma.c 21 KB

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  1. /*
  2. * Copyright (c) 2007, 2008 QLogic Corporation. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/mm.h>
  33. #include <linux/types.h>
  34. #include <linux/device.h>
  35. #include <linux/dmapool.h>
  36. #include <linux/sched.h>
  37. #include <linux/slab.h>
  38. #include <linux/list.h>
  39. #include <linux/highmem.h>
  40. #include <linux/io.h>
  41. #include <linux/uio.h>
  42. #include <linux/rbtree.h>
  43. #include <linux/spinlock.h>
  44. #include <linux/delay.h>
  45. #include "ipath_kernel.h"
  46. #include "ipath_user_sdma.h"
  47. /* minimum size of header */
  48. #define IPATH_USER_SDMA_MIN_HEADER_LENGTH 64
  49. /* expected size of headers (for dma_pool) */
  50. #define IPATH_USER_SDMA_EXP_HEADER_LENGTH 64
  51. /* length mask in PBC (lower 11 bits) */
  52. #define IPATH_PBC_LENGTH_MASK ((1 << 11) - 1)
  53. struct ipath_user_sdma_pkt {
  54. u8 naddr; /* dimension of addr (1..3) ... */
  55. u32 counter; /* sdma pkts queued counter for this entry */
  56. u64 added; /* global descq number of entries */
  57. struct {
  58. u32 offset; /* offset for kvaddr, addr */
  59. u32 length; /* length in page */
  60. u8 put_page; /* should we put_page? */
  61. u8 dma_mapped; /* is page dma_mapped? */
  62. struct page *page; /* may be NULL (coherent mem) */
  63. void *kvaddr; /* FIXME: only for pio hack */
  64. dma_addr_t addr;
  65. } addr[4]; /* max pages, any more and we coalesce */
  66. struct list_head list; /* list element */
  67. };
  68. struct ipath_user_sdma_queue {
  69. /*
  70. * pkts sent to dma engine are queued on this
  71. * list head. the type of the elements of this
  72. * list are struct ipath_user_sdma_pkt...
  73. */
  74. struct list_head sent;
  75. /* headers with expected length are allocated from here... */
  76. char header_cache_name[64];
  77. struct dma_pool *header_cache;
  78. /* packets are allocated from the slab cache... */
  79. char pkt_slab_name[64];
  80. struct kmem_cache *pkt_slab;
  81. /* as packets go on the queued queue, they are counted... */
  82. u32 counter;
  83. u32 sent_counter;
  84. /* dma page table */
  85. struct rb_root dma_pages_root;
  86. /* protect everything above... */
  87. struct mutex lock;
  88. };
  89. struct ipath_user_sdma_queue *
  90. ipath_user_sdma_queue_create(struct device *dev, int unit, int port, int sport)
  91. {
  92. struct ipath_user_sdma_queue *pq =
  93. kmalloc(sizeof(struct ipath_user_sdma_queue), GFP_KERNEL);
  94. if (!pq)
  95. goto done;
  96. pq->counter = 0;
  97. pq->sent_counter = 0;
  98. INIT_LIST_HEAD(&pq->sent);
  99. mutex_init(&pq->lock);
  100. snprintf(pq->pkt_slab_name, sizeof(pq->pkt_slab_name),
  101. "ipath-user-sdma-pkts-%u-%02u.%02u", unit, port, sport);
  102. pq->pkt_slab = kmem_cache_create(pq->pkt_slab_name,
  103. sizeof(struct ipath_user_sdma_pkt),
  104. 0, 0, NULL);
  105. if (!pq->pkt_slab)
  106. goto err_kfree;
  107. snprintf(pq->header_cache_name, sizeof(pq->header_cache_name),
  108. "ipath-user-sdma-headers-%u-%02u.%02u", unit, port, sport);
  109. pq->header_cache = dma_pool_create(pq->header_cache_name,
  110. dev,
  111. IPATH_USER_SDMA_EXP_HEADER_LENGTH,
  112. 4, 0);
  113. if (!pq->header_cache)
  114. goto err_slab;
  115. pq->dma_pages_root = RB_ROOT;
  116. goto done;
  117. err_slab:
  118. kmem_cache_destroy(pq->pkt_slab);
  119. err_kfree:
  120. kfree(pq);
  121. pq = NULL;
  122. done:
  123. return pq;
  124. }
  125. static void ipath_user_sdma_init_frag(struct ipath_user_sdma_pkt *pkt,
  126. int i, size_t offset, size_t len,
  127. int put_page, int dma_mapped,
  128. struct page *page,
  129. void *kvaddr, dma_addr_t dma_addr)
  130. {
  131. pkt->addr[i].offset = offset;
  132. pkt->addr[i].length = len;
  133. pkt->addr[i].put_page = put_page;
  134. pkt->addr[i].dma_mapped = dma_mapped;
  135. pkt->addr[i].page = page;
  136. pkt->addr[i].kvaddr = kvaddr;
  137. pkt->addr[i].addr = dma_addr;
  138. }
  139. static void ipath_user_sdma_init_header(struct ipath_user_sdma_pkt *pkt,
  140. u32 counter, size_t offset,
  141. size_t len, int dma_mapped,
  142. struct page *page,
  143. void *kvaddr, dma_addr_t dma_addr)
  144. {
  145. pkt->naddr = 1;
  146. pkt->counter = counter;
  147. ipath_user_sdma_init_frag(pkt, 0, offset, len, 0, dma_mapped, page,
  148. kvaddr, dma_addr);
  149. }
  150. /* we've too many pages in the iovec, coalesce to a single page */
  151. static int ipath_user_sdma_coalesce(const struct ipath_devdata *dd,
  152. struct ipath_user_sdma_pkt *pkt,
  153. const struct iovec *iov,
  154. unsigned long niov) {
  155. int ret = 0;
  156. struct page *page = alloc_page(GFP_KERNEL);
  157. void *mpage_save;
  158. char *mpage;
  159. int i;
  160. int len = 0;
  161. dma_addr_t dma_addr;
  162. if (!page) {
  163. ret = -ENOMEM;
  164. goto done;
  165. }
  166. mpage = kmap(page);
  167. mpage_save = mpage;
  168. for (i = 0; i < niov; i++) {
  169. int cfur;
  170. cfur = copy_from_user(mpage,
  171. iov[i].iov_base, iov[i].iov_len);
  172. if (cfur) {
  173. ret = -EFAULT;
  174. goto free_unmap;
  175. }
  176. mpage += iov[i].iov_len;
  177. len += iov[i].iov_len;
  178. }
  179. dma_addr = dma_map_page(&dd->pcidev->dev, page, 0, len,
  180. DMA_TO_DEVICE);
  181. if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
  182. ret = -ENOMEM;
  183. goto free_unmap;
  184. }
  185. ipath_user_sdma_init_frag(pkt, 1, 0, len, 0, 1, page, mpage_save,
  186. dma_addr);
  187. pkt->naddr = 2;
  188. goto done;
  189. free_unmap:
  190. kunmap(page);
  191. __free_page(page);
  192. done:
  193. return ret;
  194. }
  195. /* how many pages in this iovec element? */
  196. static int ipath_user_sdma_num_pages(const struct iovec *iov)
  197. {
  198. const unsigned long addr = (unsigned long) iov->iov_base;
  199. const unsigned long len = iov->iov_len;
  200. const unsigned long spage = addr & PAGE_MASK;
  201. const unsigned long epage = (addr + len - 1) & PAGE_MASK;
  202. return 1 + ((epage - spage) >> PAGE_SHIFT);
  203. }
  204. /* truncate length to page boundry */
  205. static int ipath_user_sdma_page_length(unsigned long addr, unsigned long len)
  206. {
  207. const unsigned long offset = addr & ~PAGE_MASK;
  208. return ((offset + len) > PAGE_SIZE) ? (PAGE_SIZE - offset) : len;
  209. }
  210. static void ipath_user_sdma_free_pkt_frag(struct device *dev,
  211. struct ipath_user_sdma_queue *pq,
  212. struct ipath_user_sdma_pkt *pkt,
  213. int frag)
  214. {
  215. const int i = frag;
  216. if (pkt->addr[i].page) {
  217. if (pkt->addr[i].dma_mapped)
  218. dma_unmap_page(dev,
  219. pkt->addr[i].addr,
  220. pkt->addr[i].length,
  221. DMA_TO_DEVICE);
  222. if (pkt->addr[i].kvaddr)
  223. kunmap(pkt->addr[i].page);
  224. if (pkt->addr[i].put_page)
  225. put_page(pkt->addr[i].page);
  226. else
  227. __free_page(pkt->addr[i].page);
  228. } else if (pkt->addr[i].kvaddr)
  229. /* free coherent mem from cache... */
  230. dma_pool_free(pq->header_cache,
  231. pkt->addr[i].kvaddr, pkt->addr[i].addr);
  232. }
  233. /* return number of pages pinned... */
  234. static int ipath_user_sdma_pin_pages(const struct ipath_devdata *dd,
  235. struct ipath_user_sdma_pkt *pkt,
  236. unsigned long addr, int tlen, int npages)
  237. {
  238. struct page *pages[2];
  239. int j;
  240. int ret;
  241. ret = get_user_pages(current, current->mm, addr,
  242. npages, 0, 1, pages, NULL);
  243. if (ret != npages) {
  244. int i;
  245. for (i = 0; i < ret; i++)
  246. put_page(pages[i]);
  247. ret = -ENOMEM;
  248. goto done;
  249. }
  250. for (j = 0; j < npages; j++) {
  251. /* map the pages... */
  252. const int flen =
  253. ipath_user_sdma_page_length(addr, tlen);
  254. dma_addr_t dma_addr =
  255. dma_map_page(&dd->pcidev->dev,
  256. pages[j], 0, flen, DMA_TO_DEVICE);
  257. unsigned long fofs = addr & ~PAGE_MASK;
  258. if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
  259. ret = -ENOMEM;
  260. goto done;
  261. }
  262. ipath_user_sdma_init_frag(pkt, pkt->naddr, fofs, flen, 1, 1,
  263. pages[j], kmap(pages[j]),
  264. dma_addr);
  265. pkt->naddr++;
  266. addr += flen;
  267. tlen -= flen;
  268. }
  269. done:
  270. return ret;
  271. }
  272. static int ipath_user_sdma_pin_pkt(const struct ipath_devdata *dd,
  273. struct ipath_user_sdma_queue *pq,
  274. struct ipath_user_sdma_pkt *pkt,
  275. const struct iovec *iov,
  276. unsigned long niov)
  277. {
  278. int ret = 0;
  279. unsigned long idx;
  280. for (idx = 0; idx < niov; idx++) {
  281. const int npages = ipath_user_sdma_num_pages(iov + idx);
  282. const unsigned long addr = (unsigned long) iov[idx].iov_base;
  283. ret = ipath_user_sdma_pin_pages(dd, pkt,
  284. addr, iov[idx].iov_len,
  285. npages);
  286. if (ret < 0)
  287. goto free_pkt;
  288. }
  289. goto done;
  290. free_pkt:
  291. for (idx = 0; idx < pkt->naddr; idx++)
  292. ipath_user_sdma_free_pkt_frag(&dd->pcidev->dev, pq, pkt, idx);
  293. done:
  294. return ret;
  295. }
  296. static int ipath_user_sdma_init_payload(const struct ipath_devdata *dd,
  297. struct ipath_user_sdma_queue *pq,
  298. struct ipath_user_sdma_pkt *pkt,
  299. const struct iovec *iov,
  300. unsigned long niov, int npages)
  301. {
  302. int ret = 0;
  303. if (npages >= ARRAY_SIZE(pkt->addr))
  304. ret = ipath_user_sdma_coalesce(dd, pkt, iov, niov);
  305. else
  306. ret = ipath_user_sdma_pin_pkt(dd, pq, pkt, iov, niov);
  307. return ret;
  308. }
  309. /* free a packet list -- return counter value of last packet */
  310. static void ipath_user_sdma_free_pkt_list(struct device *dev,
  311. struct ipath_user_sdma_queue *pq,
  312. struct list_head *list)
  313. {
  314. struct ipath_user_sdma_pkt *pkt, *pkt_next;
  315. list_for_each_entry_safe(pkt, pkt_next, list, list) {
  316. int i;
  317. for (i = 0; i < pkt->naddr; i++)
  318. ipath_user_sdma_free_pkt_frag(dev, pq, pkt, i);
  319. kmem_cache_free(pq->pkt_slab, pkt);
  320. }
  321. }
  322. /*
  323. * copy headers, coalesce etc -- pq->lock must be held
  324. *
  325. * we queue all the packets to list, returning the
  326. * number of bytes total. list must be empty initially,
  327. * as, if there is an error we clean it...
  328. */
  329. static int ipath_user_sdma_queue_pkts(const struct ipath_devdata *dd,
  330. struct ipath_user_sdma_queue *pq,
  331. struct list_head *list,
  332. const struct iovec *iov,
  333. unsigned long niov,
  334. int maxpkts)
  335. {
  336. unsigned long idx = 0;
  337. int ret = 0;
  338. int npkts = 0;
  339. struct page *page = NULL;
  340. __le32 *pbc;
  341. dma_addr_t dma_addr;
  342. struct ipath_user_sdma_pkt *pkt = NULL;
  343. size_t len;
  344. size_t nw;
  345. u32 counter = pq->counter;
  346. int dma_mapped = 0;
  347. while (idx < niov && npkts < maxpkts) {
  348. const unsigned long addr = (unsigned long) iov[idx].iov_base;
  349. const unsigned long idx_save = idx;
  350. unsigned pktnw;
  351. unsigned pktnwc;
  352. int nfrags = 0;
  353. int npages = 0;
  354. int cfur;
  355. dma_mapped = 0;
  356. len = iov[idx].iov_len;
  357. nw = len >> 2;
  358. page = NULL;
  359. pkt = kmem_cache_alloc(pq->pkt_slab, GFP_KERNEL);
  360. if (!pkt) {
  361. ret = -ENOMEM;
  362. goto free_list;
  363. }
  364. if (len < IPATH_USER_SDMA_MIN_HEADER_LENGTH ||
  365. len > PAGE_SIZE || len & 3 || addr & 3) {
  366. ret = -EINVAL;
  367. goto free_pkt;
  368. }
  369. if (len == IPATH_USER_SDMA_EXP_HEADER_LENGTH)
  370. pbc = dma_pool_alloc(pq->header_cache, GFP_KERNEL,
  371. &dma_addr);
  372. else
  373. pbc = NULL;
  374. if (!pbc) {
  375. page = alloc_page(GFP_KERNEL);
  376. if (!page) {
  377. ret = -ENOMEM;
  378. goto free_pkt;
  379. }
  380. pbc = kmap(page);
  381. }
  382. cfur = copy_from_user(pbc, iov[idx].iov_base, len);
  383. if (cfur) {
  384. ret = -EFAULT;
  385. goto free_pbc;
  386. }
  387. /*
  388. * this assignment is a bit strange. it's because the
  389. * the pbc counts the number of 32 bit words in the full
  390. * packet _except_ the first word of the pbc itself...
  391. */
  392. pktnwc = nw - 1;
  393. /*
  394. * pktnw computation yields the number of 32 bit words
  395. * that the caller has indicated in the PBC. note that
  396. * this is one less than the total number of words that
  397. * goes to the send DMA engine as the first 32 bit word
  398. * of the PBC itself is not counted. Armed with this count,
  399. * we can verify that the packet is consistent with the
  400. * iovec lengths.
  401. */
  402. pktnw = le32_to_cpu(*pbc) & IPATH_PBC_LENGTH_MASK;
  403. if (pktnw < pktnwc || pktnw > pktnwc + (PAGE_SIZE >> 2)) {
  404. ret = -EINVAL;
  405. goto free_pbc;
  406. }
  407. idx++;
  408. while (pktnwc < pktnw && idx < niov) {
  409. const size_t slen = iov[idx].iov_len;
  410. const unsigned long faddr =
  411. (unsigned long) iov[idx].iov_base;
  412. if (slen & 3 || faddr & 3 || !slen ||
  413. slen > PAGE_SIZE) {
  414. ret = -EINVAL;
  415. goto free_pbc;
  416. }
  417. npages++;
  418. if ((faddr & PAGE_MASK) !=
  419. ((faddr + slen - 1) & PAGE_MASK))
  420. npages++;
  421. pktnwc += slen >> 2;
  422. idx++;
  423. nfrags++;
  424. }
  425. if (pktnwc != pktnw) {
  426. ret = -EINVAL;
  427. goto free_pbc;
  428. }
  429. if (page) {
  430. dma_addr = dma_map_page(&dd->pcidev->dev,
  431. page, 0, len, DMA_TO_DEVICE);
  432. if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
  433. ret = -ENOMEM;
  434. goto free_pbc;
  435. }
  436. dma_mapped = 1;
  437. }
  438. ipath_user_sdma_init_header(pkt, counter, 0, len, dma_mapped,
  439. page, pbc, dma_addr);
  440. if (nfrags) {
  441. ret = ipath_user_sdma_init_payload(dd, pq, pkt,
  442. iov + idx_save + 1,
  443. nfrags, npages);
  444. if (ret < 0)
  445. goto free_pbc_dma;
  446. }
  447. counter++;
  448. npkts++;
  449. list_add_tail(&pkt->list, list);
  450. }
  451. ret = idx;
  452. goto done;
  453. free_pbc_dma:
  454. if (dma_mapped)
  455. dma_unmap_page(&dd->pcidev->dev, dma_addr, len, DMA_TO_DEVICE);
  456. free_pbc:
  457. if (page) {
  458. kunmap(page);
  459. __free_page(page);
  460. } else
  461. dma_pool_free(pq->header_cache, pbc, dma_addr);
  462. free_pkt:
  463. kmem_cache_free(pq->pkt_slab, pkt);
  464. free_list:
  465. ipath_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, list);
  466. done:
  467. return ret;
  468. }
  469. static void ipath_user_sdma_set_complete_counter(struct ipath_user_sdma_queue *pq,
  470. u32 c)
  471. {
  472. pq->sent_counter = c;
  473. }
  474. /* try to clean out queue -- needs pq->lock */
  475. static int ipath_user_sdma_queue_clean(const struct ipath_devdata *dd,
  476. struct ipath_user_sdma_queue *pq)
  477. {
  478. struct list_head free_list;
  479. struct ipath_user_sdma_pkt *pkt;
  480. struct ipath_user_sdma_pkt *pkt_prev;
  481. int ret = 0;
  482. INIT_LIST_HEAD(&free_list);
  483. list_for_each_entry_safe(pkt, pkt_prev, &pq->sent, list) {
  484. s64 descd = dd->ipath_sdma_descq_removed - pkt->added;
  485. if (descd < 0)
  486. break;
  487. list_move_tail(&pkt->list, &free_list);
  488. /* one more packet cleaned */
  489. ret++;
  490. }
  491. if (!list_empty(&free_list)) {
  492. u32 counter;
  493. pkt = list_entry(free_list.prev,
  494. struct ipath_user_sdma_pkt, list);
  495. counter = pkt->counter;
  496. ipath_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &free_list);
  497. ipath_user_sdma_set_complete_counter(pq, counter);
  498. }
  499. return ret;
  500. }
  501. void ipath_user_sdma_queue_destroy(struct ipath_user_sdma_queue *pq)
  502. {
  503. if (!pq)
  504. return;
  505. kmem_cache_destroy(pq->pkt_slab);
  506. dma_pool_destroy(pq->header_cache);
  507. kfree(pq);
  508. }
  509. /* clean descriptor queue, returns > 0 if some elements cleaned */
  510. static int ipath_user_sdma_hwqueue_clean(struct ipath_devdata *dd)
  511. {
  512. int ret;
  513. unsigned long flags;
  514. spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
  515. ret = ipath_sdma_make_progress(dd);
  516. spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
  517. return ret;
  518. }
  519. /* we're in close, drain packets so that we can cleanup successfully... */
  520. void ipath_user_sdma_queue_drain(struct ipath_devdata *dd,
  521. struct ipath_user_sdma_queue *pq)
  522. {
  523. int i;
  524. if (!pq)
  525. return;
  526. for (i = 0; i < 100; i++) {
  527. mutex_lock(&pq->lock);
  528. if (list_empty(&pq->sent)) {
  529. mutex_unlock(&pq->lock);
  530. break;
  531. }
  532. ipath_user_sdma_hwqueue_clean(dd);
  533. ipath_user_sdma_queue_clean(dd, pq);
  534. mutex_unlock(&pq->lock);
  535. msleep(10);
  536. }
  537. if (!list_empty(&pq->sent)) {
  538. struct list_head free_list;
  539. printk(KERN_INFO "drain: lists not empty: forcing!\n");
  540. INIT_LIST_HEAD(&free_list);
  541. mutex_lock(&pq->lock);
  542. list_splice_init(&pq->sent, &free_list);
  543. ipath_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &free_list);
  544. mutex_unlock(&pq->lock);
  545. }
  546. }
  547. static inline __le64 ipath_sdma_make_desc0(struct ipath_devdata *dd,
  548. u64 addr, u64 dwlen, u64 dwoffset)
  549. {
  550. return cpu_to_le64(/* SDmaPhyAddr[31:0] */
  551. ((addr & 0xfffffffcULL) << 32) |
  552. /* SDmaGeneration[1:0] */
  553. ((dd->ipath_sdma_generation & 3ULL) << 30) |
  554. /* SDmaDwordCount[10:0] */
  555. ((dwlen & 0x7ffULL) << 16) |
  556. /* SDmaBufOffset[12:2] */
  557. (dwoffset & 0x7ffULL));
  558. }
  559. static inline __le64 ipath_sdma_make_first_desc0(__le64 descq)
  560. {
  561. return descq | cpu_to_le64(1ULL << 12);
  562. }
  563. static inline __le64 ipath_sdma_make_last_desc0(__le64 descq)
  564. {
  565. /* last */ /* dma head */
  566. return descq | cpu_to_le64(1ULL << 11 | 1ULL << 13);
  567. }
  568. static inline __le64 ipath_sdma_make_desc1(u64 addr)
  569. {
  570. /* SDmaPhyAddr[47:32] */
  571. return cpu_to_le64(addr >> 32);
  572. }
  573. static void ipath_user_sdma_send_frag(struct ipath_devdata *dd,
  574. struct ipath_user_sdma_pkt *pkt, int idx,
  575. unsigned ofs, u16 tail)
  576. {
  577. const u64 addr = (u64) pkt->addr[idx].addr +
  578. (u64) pkt->addr[idx].offset;
  579. const u64 dwlen = (u64) pkt->addr[idx].length / 4;
  580. __le64 *descqp;
  581. __le64 descq0;
  582. descqp = &dd->ipath_sdma_descq[tail].qw[0];
  583. descq0 = ipath_sdma_make_desc0(dd, addr, dwlen, ofs);
  584. if (idx == 0)
  585. descq0 = ipath_sdma_make_first_desc0(descq0);
  586. if (idx == pkt->naddr - 1)
  587. descq0 = ipath_sdma_make_last_desc0(descq0);
  588. descqp[0] = descq0;
  589. descqp[1] = ipath_sdma_make_desc1(addr);
  590. }
  591. /* pq->lock must be held, get packets on the wire... */
  592. static int ipath_user_sdma_push_pkts(struct ipath_devdata *dd,
  593. struct ipath_user_sdma_queue *pq,
  594. struct list_head *pktlist)
  595. {
  596. int ret = 0;
  597. unsigned long flags;
  598. u16 tail;
  599. if (list_empty(pktlist))
  600. return 0;
  601. if (unlikely(!(dd->ipath_flags & IPATH_LINKACTIVE)))
  602. return -ECOMM;
  603. spin_lock_irqsave(&dd->ipath_sdma_lock, flags);
  604. if (unlikely(dd->ipath_sdma_status & IPATH_SDMA_ABORT_MASK)) {
  605. ret = -ECOMM;
  606. goto unlock;
  607. }
  608. tail = dd->ipath_sdma_descq_tail;
  609. while (!list_empty(pktlist)) {
  610. struct ipath_user_sdma_pkt *pkt =
  611. list_entry(pktlist->next, struct ipath_user_sdma_pkt,
  612. list);
  613. int i;
  614. unsigned ofs = 0;
  615. u16 dtail = tail;
  616. if (pkt->naddr > ipath_sdma_descq_freecnt(dd))
  617. goto unlock_check_tail;
  618. for (i = 0; i < pkt->naddr; i++) {
  619. ipath_user_sdma_send_frag(dd, pkt, i, ofs, tail);
  620. ofs += pkt->addr[i].length >> 2;
  621. if (++tail == dd->ipath_sdma_descq_cnt) {
  622. tail = 0;
  623. ++dd->ipath_sdma_generation;
  624. }
  625. }
  626. if ((ofs<<2) > dd->ipath_ibmaxlen) {
  627. ipath_dbg("packet size %X > ibmax %X, fail\n",
  628. ofs<<2, dd->ipath_ibmaxlen);
  629. ret = -EMSGSIZE;
  630. goto unlock;
  631. }
  632. /*
  633. * if the packet is >= 2KB mtu equivalent, we have to use
  634. * the large buffers, and have to mark each descriptor as
  635. * part of a large buffer packet.
  636. */
  637. if (ofs >= IPATH_SMALLBUF_DWORDS) {
  638. for (i = 0; i < pkt->naddr; i++) {
  639. dd->ipath_sdma_descq[dtail].qw[0] |=
  640. cpu_to_le64(1ULL << 14);
  641. if (++dtail == dd->ipath_sdma_descq_cnt)
  642. dtail = 0;
  643. }
  644. }
  645. dd->ipath_sdma_descq_added += pkt->naddr;
  646. pkt->added = dd->ipath_sdma_descq_added;
  647. list_move_tail(&pkt->list, &pq->sent);
  648. ret++;
  649. }
  650. unlock_check_tail:
  651. /* advance the tail on the chip if necessary */
  652. if (dd->ipath_sdma_descq_tail != tail) {
  653. wmb();
  654. ipath_write_kreg(dd, dd->ipath_kregs->kr_senddmatail, tail);
  655. dd->ipath_sdma_descq_tail = tail;
  656. }
  657. unlock:
  658. spin_unlock_irqrestore(&dd->ipath_sdma_lock, flags);
  659. return ret;
  660. }
  661. int ipath_user_sdma_writev(struct ipath_devdata *dd,
  662. struct ipath_user_sdma_queue *pq,
  663. const struct iovec *iov,
  664. unsigned long dim)
  665. {
  666. int ret = 0;
  667. struct list_head list;
  668. int npkts = 0;
  669. INIT_LIST_HEAD(&list);
  670. mutex_lock(&pq->lock);
  671. if (dd->ipath_sdma_descq_added != dd->ipath_sdma_descq_removed) {
  672. ipath_user_sdma_hwqueue_clean(dd);
  673. ipath_user_sdma_queue_clean(dd, pq);
  674. }
  675. while (dim) {
  676. const int mxp = 8;
  677. down_write(&current->mm->mmap_sem);
  678. ret = ipath_user_sdma_queue_pkts(dd, pq, &list, iov, dim, mxp);
  679. up_write(&current->mm->mmap_sem);
  680. if (ret <= 0)
  681. goto done_unlock;
  682. else {
  683. dim -= ret;
  684. iov += ret;
  685. }
  686. /* force packets onto the sdma hw queue... */
  687. if (!list_empty(&list)) {
  688. /*
  689. * lazily clean hw queue. the 4 is a guess of about
  690. * how many sdma descriptors a packet will take (it
  691. * doesn't have to be perfect).
  692. */
  693. if (ipath_sdma_descq_freecnt(dd) < ret * 4) {
  694. ipath_user_sdma_hwqueue_clean(dd);
  695. ipath_user_sdma_queue_clean(dd, pq);
  696. }
  697. ret = ipath_user_sdma_push_pkts(dd, pq, &list);
  698. if (ret < 0)
  699. goto done_unlock;
  700. else {
  701. npkts += ret;
  702. pq->counter += ret;
  703. if (!list_empty(&list))
  704. goto done_unlock;
  705. }
  706. }
  707. }
  708. done_unlock:
  709. if (!list_empty(&list))
  710. ipath_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &list);
  711. mutex_unlock(&pq->lock);
  712. return (ret < 0) ? ret : npkts;
  713. }
  714. int ipath_user_sdma_make_progress(struct ipath_devdata *dd,
  715. struct ipath_user_sdma_queue *pq)
  716. {
  717. int ret = 0;
  718. mutex_lock(&pq->lock);
  719. ipath_user_sdma_hwqueue_clean(dd);
  720. ret = ipath_user_sdma_queue_clean(dd, pq);
  721. mutex_unlock(&pq->lock);
  722. return ret;
  723. }
  724. u32 ipath_user_sdma_complete_counter(const struct ipath_user_sdma_queue *pq)
  725. {
  726. return pq->sent_counter;
  727. }
  728. u32 ipath_user_sdma_inflight_counter(struct ipath_user_sdma_queue *pq)
  729. {
  730. return pq->counter;
  731. }