iwch_mem.c 5.3 KB

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  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <asm/byteorder.h>
  33. #include <rdma/iw_cm.h>
  34. #include <rdma/ib_verbs.h>
  35. #include "cxio_hal.h"
  36. #include "cxio_resource.h"
  37. #include "iwch.h"
  38. #include "iwch_provider.h"
  39. static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
  40. {
  41. u32 mmid;
  42. mhp->attr.state = 1;
  43. mhp->attr.stag = stag;
  44. mmid = stag >> 8;
  45. mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
  46. PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
  47. return insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
  48. }
  49. int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  50. struct iwch_mr *mhp, int shift)
  51. {
  52. u32 stag;
  53. int ret;
  54. if (cxio_register_phys_mem(&rhp->rdev,
  55. &stag, mhp->attr.pdid,
  56. mhp->attr.perms,
  57. mhp->attr.zbva,
  58. mhp->attr.va_fbo,
  59. mhp->attr.len,
  60. shift - 12,
  61. mhp->attr.pbl_size, mhp->attr.pbl_addr))
  62. return -ENOMEM;
  63. ret = iwch_finish_mem_reg(mhp, stag);
  64. if (ret)
  65. cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  66. mhp->attr.pbl_addr);
  67. return ret;
  68. }
  69. int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  70. struct iwch_mr *mhp,
  71. int shift,
  72. int npages)
  73. {
  74. u32 stag;
  75. int ret;
  76. /* We could support this... */
  77. if (npages > mhp->attr.pbl_size)
  78. return -ENOMEM;
  79. stag = mhp->attr.stag;
  80. if (cxio_reregister_phys_mem(&rhp->rdev,
  81. &stag, mhp->attr.pdid,
  82. mhp->attr.perms,
  83. mhp->attr.zbva,
  84. mhp->attr.va_fbo,
  85. mhp->attr.len,
  86. shift - 12,
  87. mhp->attr.pbl_size, mhp->attr.pbl_addr))
  88. return -ENOMEM;
  89. ret = iwch_finish_mem_reg(mhp, stag);
  90. if (ret)
  91. cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  92. mhp->attr.pbl_addr);
  93. return ret;
  94. }
  95. int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
  96. {
  97. mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
  98. npages << 3);
  99. if (!mhp->attr.pbl_addr)
  100. return -ENOMEM;
  101. mhp->attr.pbl_size = npages;
  102. return 0;
  103. }
  104. void iwch_free_pbl(struct iwch_mr *mhp)
  105. {
  106. cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
  107. mhp->attr.pbl_size << 3);
  108. }
  109. int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
  110. {
  111. return cxio_write_pbl(&mhp->rhp->rdev, pages,
  112. mhp->attr.pbl_addr + (offset << 3), npages);
  113. }
  114. int build_phys_page_list(struct ib_phys_buf *buffer_list,
  115. int num_phys_buf,
  116. u64 *iova_start,
  117. u64 *total_size,
  118. int *npages,
  119. int *shift,
  120. __be64 **page_list)
  121. {
  122. u64 mask;
  123. int i, j, n;
  124. mask = 0;
  125. *total_size = 0;
  126. for (i = 0; i < num_phys_buf; ++i) {
  127. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  128. return -EINVAL;
  129. if (i != 0 && i != num_phys_buf - 1 &&
  130. (buffer_list[i].size & ~PAGE_MASK))
  131. return -EINVAL;
  132. *total_size += buffer_list[i].size;
  133. if (i > 0)
  134. mask |= buffer_list[i].addr;
  135. else
  136. mask |= buffer_list[i].addr & PAGE_MASK;
  137. if (i != num_phys_buf - 1)
  138. mask |= buffer_list[i].addr + buffer_list[i].size;
  139. else
  140. mask |= (buffer_list[i].addr + buffer_list[i].size +
  141. PAGE_SIZE - 1) & PAGE_MASK;
  142. }
  143. if (*total_size > 0xFFFFFFFFULL)
  144. return -ENOMEM;
  145. /* Find largest page shift we can use to cover buffers */
  146. for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
  147. if ((1ULL << *shift) & mask)
  148. break;
  149. buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
  150. buffer_list[0].addr &= ~0ull << *shift;
  151. *npages = 0;
  152. for (i = 0; i < num_phys_buf; ++i)
  153. *npages += (buffer_list[i].size +
  154. (1ULL << *shift) - 1) >> *shift;
  155. if (!*npages)
  156. return -EINVAL;
  157. *page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
  158. if (!*page_list)
  159. return -ENOMEM;
  160. n = 0;
  161. for (i = 0; i < num_phys_buf; ++i)
  162. for (j = 0;
  163. j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
  164. ++j)
  165. (*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
  166. ((u64) j << *shift));
  167. PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
  168. __func__, (unsigned long long) *iova_start,
  169. (unsigned long long) mask, *shift, (unsigned long long) *total_size,
  170. *npages);
  171. return 0;
  172. }