lis3lv02d.h 5.9 KB

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  1. /*
  2. * lis3lv02d.h - ST LIS3LV02DL accelerometer driver
  3. *
  4. * Copyright (C) 2007-2008 Yan Burman
  5. * Copyright (C) 2008-2009 Eric Piel
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/platform_device.h>
  22. #include <linux/input-polldev.h>
  23. /*
  24. * This driver tries to support the "digital" accelerometer chips from
  25. * STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL,
  26. * LIS35DE, or LIS202DL. They are very similar in terms of programming, with
  27. * almost the same registers. In addition to differing on physical properties,
  28. * they differ on the number of axes (2/3), precision (8/12 bits), and special
  29. * features (freefall detection, click...). Unfortunately, not all the
  30. * differences can be probed via a register.
  31. * They can be connected either via I²C or SPI.
  32. */
  33. #include <linux/lis3lv02d.h>
  34. enum lis3_reg {
  35. WHO_AM_I = 0x0F,
  36. OFFSET_X = 0x16,
  37. OFFSET_Y = 0x17,
  38. OFFSET_Z = 0x18,
  39. GAIN_X = 0x19,
  40. GAIN_Y = 0x1A,
  41. GAIN_Z = 0x1B,
  42. CTRL_REG1 = 0x20,
  43. CTRL_REG2 = 0x21,
  44. CTRL_REG3 = 0x22,
  45. HP_FILTER_RESET = 0x23,
  46. STATUS_REG = 0x27,
  47. OUTX_L = 0x28,
  48. OUTX_H = 0x29,
  49. OUTX = 0x29,
  50. OUTY_L = 0x2A,
  51. OUTY_H = 0x2B,
  52. OUTY = 0x2B,
  53. OUTZ_L = 0x2C,
  54. OUTZ_H = 0x2D,
  55. OUTZ = 0x2D,
  56. };
  57. enum lis302d_reg {
  58. FF_WU_CFG_1 = 0x30,
  59. FF_WU_SRC_1 = 0x31,
  60. FF_WU_THS_1 = 0x32,
  61. FF_WU_DURATION_1 = 0x33,
  62. FF_WU_CFG_2 = 0x34,
  63. FF_WU_SRC_2 = 0x35,
  64. FF_WU_THS_2 = 0x36,
  65. FF_WU_DURATION_2 = 0x37,
  66. CLICK_CFG = 0x38,
  67. CLICK_SRC = 0x39,
  68. CLICK_THSY_X = 0x3B,
  69. CLICK_THSZ = 0x3C,
  70. CLICK_TIMELIMIT = 0x3D,
  71. CLICK_LATENCY = 0x3E,
  72. CLICK_WINDOW = 0x3F,
  73. };
  74. enum lis3lv02d_reg {
  75. FF_WU_CFG = 0x30,
  76. FF_WU_SRC = 0x31,
  77. FF_WU_ACK = 0x32,
  78. FF_WU_THS_L = 0x34,
  79. FF_WU_THS_H = 0x35,
  80. FF_WU_DURATION = 0x36,
  81. DD_CFG = 0x38,
  82. DD_SRC = 0x39,
  83. DD_ACK = 0x3A,
  84. DD_THSI_L = 0x3C,
  85. DD_THSI_H = 0x3D,
  86. DD_THSE_L = 0x3E,
  87. DD_THSE_H = 0x3F,
  88. };
  89. enum lis3_who_am_i {
  90. WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */
  91. WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */
  92. WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */
  93. };
  94. enum lis3lv02d_ctrl1_12b {
  95. CTRL1_Xen = 0x01,
  96. CTRL1_Yen = 0x02,
  97. CTRL1_Zen = 0x04,
  98. CTRL1_ST = 0x08,
  99. CTRL1_DF0 = 0x10,
  100. CTRL1_DF1 = 0x20,
  101. CTRL1_PD0 = 0x40,
  102. CTRL1_PD1 = 0x80,
  103. };
  104. /* Delta to ctrl1_12b version */
  105. enum lis3lv02d_ctrl1_8b {
  106. CTRL1_STM = 0x08,
  107. CTRL1_STP = 0x10,
  108. CTRL1_FS = 0x20,
  109. CTRL1_PD = 0x40,
  110. CTRL1_DR = 0x80,
  111. };
  112. enum lis3lv02d_ctrl2 {
  113. CTRL2_DAS = 0x01,
  114. CTRL2_SIM = 0x02,
  115. CTRL2_DRDY = 0x04,
  116. CTRL2_IEN = 0x08,
  117. CTRL2_BOOT = 0x10,
  118. CTRL2_BLE = 0x20,
  119. CTRL2_BDU = 0x40, /* Block Data Update */
  120. CTRL2_FS = 0x80, /* Full Scale selection */
  121. };
  122. enum lis302d_ctrl2 {
  123. HP_FF_WU2 = 0x08,
  124. HP_FF_WU1 = 0x04,
  125. };
  126. enum lis3lv02d_ctrl3 {
  127. CTRL3_CFS0 = 0x01,
  128. CTRL3_CFS1 = 0x02,
  129. CTRL3_FDS = 0x10,
  130. CTRL3_HPFF = 0x20,
  131. CTRL3_HPDD = 0x40,
  132. CTRL3_ECK = 0x80,
  133. };
  134. enum lis3lv02d_status_reg {
  135. STATUS_XDA = 0x01,
  136. STATUS_YDA = 0x02,
  137. STATUS_ZDA = 0x04,
  138. STATUS_XYZDA = 0x08,
  139. STATUS_XOR = 0x10,
  140. STATUS_YOR = 0x20,
  141. STATUS_ZOR = 0x40,
  142. STATUS_XYZOR = 0x80,
  143. };
  144. enum lis3lv02d_ff_wu_cfg {
  145. FF_WU_CFG_XLIE = 0x01,
  146. FF_WU_CFG_XHIE = 0x02,
  147. FF_WU_CFG_YLIE = 0x04,
  148. FF_WU_CFG_YHIE = 0x08,
  149. FF_WU_CFG_ZLIE = 0x10,
  150. FF_WU_CFG_ZHIE = 0x20,
  151. FF_WU_CFG_LIR = 0x40,
  152. FF_WU_CFG_AOI = 0x80,
  153. };
  154. enum lis3lv02d_ff_wu_src {
  155. FF_WU_SRC_XL = 0x01,
  156. FF_WU_SRC_XH = 0x02,
  157. FF_WU_SRC_YL = 0x04,
  158. FF_WU_SRC_YH = 0x08,
  159. FF_WU_SRC_ZL = 0x10,
  160. FF_WU_SRC_ZH = 0x20,
  161. FF_WU_SRC_IA = 0x40,
  162. };
  163. enum lis3lv02d_dd_cfg {
  164. DD_CFG_XLIE = 0x01,
  165. DD_CFG_XHIE = 0x02,
  166. DD_CFG_YLIE = 0x04,
  167. DD_CFG_YHIE = 0x08,
  168. DD_CFG_ZLIE = 0x10,
  169. DD_CFG_ZHIE = 0x20,
  170. DD_CFG_LIR = 0x40,
  171. DD_CFG_IEND = 0x80,
  172. };
  173. enum lis3lv02d_dd_src {
  174. DD_SRC_XL = 0x01,
  175. DD_SRC_XH = 0x02,
  176. DD_SRC_YL = 0x04,
  177. DD_SRC_YH = 0x08,
  178. DD_SRC_ZL = 0x10,
  179. DD_SRC_ZH = 0x20,
  180. DD_SRC_IA = 0x40,
  181. };
  182. struct axis_conversion {
  183. s8 x;
  184. s8 y;
  185. s8 z;
  186. };
  187. struct lis3lv02d {
  188. void *bus_priv; /* used by the bus layer only */
  189. int (*init) (struct lis3lv02d *lis3);
  190. int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
  191. int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
  192. int *odrs; /* Supported output data rates */
  193. u8 odr_mask; /* ODR bit mask */
  194. u8 whoami; /* indicates measurement precision */
  195. s16 (*read_data) (struct lis3lv02d *lis3, int reg);
  196. int mdps_max_val;
  197. int pwron_delay;
  198. int scale; /*
  199. * relationship between 1 LBS and mG
  200. * (1/1000th of earth gravity)
  201. */
  202. struct input_polled_dev *idev; /* input device */
  203. struct platform_device *pdev; /* platform device */
  204. atomic_t count; /* interrupt count after last read */
  205. struct axis_conversion ac; /* hw -> logical axis */
  206. u32 irq; /* IRQ number */
  207. struct fasync_struct *async_queue; /* queue for the misc device */
  208. wait_queue_head_t misc_wait; /* Wait queue for the misc device */
  209. unsigned long misc_opened; /* bit0: whether the device is open */
  210. struct lis3lv02d_platform_data *pdata; /* for passing board config */
  211. struct mutex mutex; /* Serialize poll and selftest */
  212. };
  213. int lis3lv02d_init_device(struct lis3lv02d *lis3);
  214. int lis3lv02d_joystick_enable(void);
  215. void lis3lv02d_joystick_disable(void);
  216. void lis3lv02d_poweroff(struct lis3lv02d *lis3);
  217. void lis3lv02d_poweron(struct lis3lv02d *lis3);
  218. int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
  219. extern struct lis3lv02d lis3_dev;