radeon_ttm.c 20 KB

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  1. /*
  2. * Copyright 2009 Jerome Glisse.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Jerome Glisse <glisse@freedesktop.org>
  29. * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30. * Dave Airlie
  31. */
  32. #include <ttm/ttm_bo_api.h>
  33. #include <ttm/ttm_bo_driver.h>
  34. #include <ttm/ttm_placement.h>
  35. #include <ttm/ttm_module.h>
  36. #include <drm/drmP.h>
  37. #include <drm/radeon_drm.h>
  38. #include <linux/seq_file.h>
  39. #include "radeon_reg.h"
  40. #include "radeon.h"
  41. #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  42. static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  43. static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  44. {
  45. struct radeon_mman *mman;
  46. struct radeon_device *rdev;
  47. mman = container_of(bdev, struct radeon_mman, bdev);
  48. rdev = container_of(mman, struct radeon_device, mman);
  49. return rdev;
  50. }
  51. /*
  52. * Global memory.
  53. */
  54. static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
  55. {
  56. return ttm_mem_global_init(ref->object);
  57. }
  58. static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
  59. {
  60. ttm_mem_global_release(ref->object);
  61. }
  62. static int radeon_ttm_global_init(struct radeon_device *rdev)
  63. {
  64. struct ttm_global_reference *global_ref;
  65. int r;
  66. rdev->mman.mem_global_referenced = false;
  67. global_ref = &rdev->mman.mem_global_ref;
  68. global_ref->global_type = TTM_GLOBAL_TTM_MEM;
  69. global_ref->size = sizeof(struct ttm_mem_global);
  70. global_ref->init = &radeon_ttm_mem_global_init;
  71. global_ref->release = &radeon_ttm_mem_global_release;
  72. r = ttm_global_item_ref(global_ref);
  73. if (r != 0) {
  74. DRM_ERROR("Failed setting up TTM memory accounting "
  75. "subsystem.\n");
  76. return r;
  77. }
  78. rdev->mman.bo_global_ref.mem_glob =
  79. rdev->mman.mem_global_ref.object;
  80. global_ref = &rdev->mman.bo_global_ref.ref;
  81. global_ref->global_type = TTM_GLOBAL_TTM_BO;
  82. global_ref->size = sizeof(struct ttm_bo_global);
  83. global_ref->init = &ttm_bo_global_init;
  84. global_ref->release = &ttm_bo_global_release;
  85. r = ttm_global_item_ref(global_ref);
  86. if (r != 0) {
  87. DRM_ERROR("Failed setting up TTM BO subsystem.\n");
  88. ttm_global_item_unref(&rdev->mman.mem_global_ref);
  89. return r;
  90. }
  91. rdev->mman.mem_global_referenced = true;
  92. return 0;
  93. }
  94. static void radeon_ttm_global_fini(struct radeon_device *rdev)
  95. {
  96. if (rdev->mman.mem_global_referenced) {
  97. ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
  98. ttm_global_item_unref(&rdev->mman.mem_global_ref);
  99. rdev->mman.mem_global_referenced = false;
  100. }
  101. }
  102. struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
  103. static struct ttm_backend*
  104. radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
  105. {
  106. struct radeon_device *rdev;
  107. rdev = radeon_get_rdev(bdev);
  108. #if __OS_HAS_AGP
  109. if (rdev->flags & RADEON_IS_AGP) {
  110. return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
  111. } else
  112. #endif
  113. {
  114. return radeon_ttm_backend_create(rdev);
  115. }
  116. }
  117. static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
  118. {
  119. return 0;
  120. }
  121. static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
  122. struct ttm_mem_type_manager *man)
  123. {
  124. struct radeon_device *rdev;
  125. rdev = radeon_get_rdev(bdev);
  126. switch (type) {
  127. case TTM_PL_SYSTEM:
  128. /* System memory */
  129. man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
  130. man->available_caching = TTM_PL_MASK_CACHING;
  131. man->default_caching = TTM_PL_FLAG_CACHED;
  132. break;
  133. case TTM_PL_TT:
  134. man->gpu_offset = rdev->mc.gtt_location;
  135. man->available_caching = TTM_PL_MASK_CACHING;
  136. man->default_caching = TTM_PL_FLAG_CACHED;
  137. man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
  138. #if __OS_HAS_AGP
  139. if (rdev->flags & RADEON_IS_AGP) {
  140. if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
  141. DRM_ERROR("AGP is not enabled for memory type %u\n",
  142. (unsigned)type);
  143. return -EINVAL;
  144. }
  145. man->io_offset = rdev->mc.agp_base;
  146. man->io_size = rdev->mc.gtt_size;
  147. man->io_addr = NULL;
  148. if (!rdev->ddev->agp->cant_use_aperture)
  149. man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
  150. TTM_MEMTYPE_FLAG_MAPPABLE;
  151. man->available_caching = TTM_PL_FLAG_UNCACHED |
  152. TTM_PL_FLAG_WC;
  153. man->default_caching = TTM_PL_FLAG_WC;
  154. } else
  155. #endif
  156. {
  157. man->io_offset = 0;
  158. man->io_size = 0;
  159. man->io_addr = NULL;
  160. }
  161. break;
  162. case TTM_PL_VRAM:
  163. /* "On-card" video ram */
  164. man->gpu_offset = rdev->mc.vram_location;
  165. man->flags = TTM_MEMTYPE_FLAG_FIXED |
  166. TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
  167. TTM_MEMTYPE_FLAG_MAPPABLE;
  168. man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
  169. man->default_caching = TTM_PL_FLAG_WC;
  170. man->io_addr = NULL;
  171. man->io_offset = rdev->mc.aper_base;
  172. man->io_size = rdev->mc.aper_size;
  173. break;
  174. default:
  175. DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
  176. return -EINVAL;
  177. }
  178. return 0;
  179. }
  180. static void radeon_evict_flags(struct ttm_buffer_object *bo,
  181. struct ttm_placement *placement)
  182. {
  183. struct radeon_bo *rbo;
  184. static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  185. if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  186. placement->fpfn = 0;
  187. placement->lpfn = 0;
  188. placement->placement = &placements;
  189. placement->busy_placement = &placements;
  190. placement->num_placement = 1;
  191. placement->num_busy_placement = 1;
  192. return;
  193. }
  194. rbo = container_of(bo, struct radeon_bo, tbo);
  195. switch (bo->mem.mem_type) {
  196. case TTM_PL_VRAM:
  197. radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
  198. break;
  199. case TTM_PL_TT:
  200. default:
  201. radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
  202. }
  203. *placement = rbo->placement;
  204. }
  205. static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
  206. {
  207. return 0;
  208. }
  209. static void radeon_move_null(struct ttm_buffer_object *bo,
  210. struct ttm_mem_reg *new_mem)
  211. {
  212. struct ttm_mem_reg *old_mem = &bo->mem;
  213. BUG_ON(old_mem->mm_node != NULL);
  214. *old_mem = *new_mem;
  215. new_mem->mm_node = NULL;
  216. }
  217. static int radeon_move_blit(struct ttm_buffer_object *bo,
  218. bool evict, int no_wait,
  219. struct ttm_mem_reg *new_mem,
  220. struct ttm_mem_reg *old_mem)
  221. {
  222. struct radeon_device *rdev;
  223. uint64_t old_start, new_start;
  224. struct radeon_fence *fence;
  225. int r;
  226. rdev = radeon_get_rdev(bo->bdev);
  227. r = radeon_fence_create(rdev, &fence);
  228. if (unlikely(r)) {
  229. return r;
  230. }
  231. old_start = old_mem->mm_node->start << PAGE_SHIFT;
  232. new_start = new_mem->mm_node->start << PAGE_SHIFT;
  233. switch (old_mem->mem_type) {
  234. case TTM_PL_VRAM:
  235. old_start += rdev->mc.vram_location;
  236. break;
  237. case TTM_PL_TT:
  238. old_start += rdev->mc.gtt_location;
  239. break;
  240. default:
  241. DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
  242. return -EINVAL;
  243. }
  244. switch (new_mem->mem_type) {
  245. case TTM_PL_VRAM:
  246. new_start += rdev->mc.vram_location;
  247. break;
  248. case TTM_PL_TT:
  249. new_start += rdev->mc.gtt_location;
  250. break;
  251. default:
  252. DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
  253. return -EINVAL;
  254. }
  255. if (!rdev->cp.ready) {
  256. DRM_ERROR("Trying to move memory with CP turned off.\n");
  257. return -EINVAL;
  258. }
  259. r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
  260. /* FIXME: handle copy error */
  261. r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
  262. evict, no_wait, new_mem);
  263. radeon_fence_unref(&fence);
  264. return r;
  265. }
  266. static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
  267. bool evict, bool interruptible, bool no_wait,
  268. struct ttm_mem_reg *new_mem)
  269. {
  270. struct radeon_device *rdev;
  271. struct ttm_mem_reg *old_mem = &bo->mem;
  272. struct ttm_mem_reg tmp_mem;
  273. u32 placements;
  274. struct ttm_placement placement;
  275. int r;
  276. rdev = radeon_get_rdev(bo->bdev);
  277. tmp_mem = *new_mem;
  278. tmp_mem.mm_node = NULL;
  279. placement.fpfn = 0;
  280. placement.lpfn = 0;
  281. placement.num_placement = 1;
  282. placement.placement = &placements;
  283. placement.num_busy_placement = 1;
  284. placement.busy_placement = &placements;
  285. placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  286. r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
  287. interruptible, no_wait);
  288. if (unlikely(r)) {
  289. return r;
  290. }
  291. r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
  292. if (unlikely(r)) {
  293. goto out_cleanup;
  294. }
  295. r = ttm_tt_bind(bo->ttm, &tmp_mem);
  296. if (unlikely(r)) {
  297. goto out_cleanup;
  298. }
  299. r = radeon_move_blit(bo, true, no_wait, &tmp_mem, old_mem);
  300. if (unlikely(r)) {
  301. goto out_cleanup;
  302. }
  303. r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
  304. out_cleanup:
  305. if (tmp_mem.mm_node) {
  306. struct ttm_bo_global *glob = rdev->mman.bdev.glob;
  307. spin_lock(&glob->lru_lock);
  308. drm_mm_put_block(tmp_mem.mm_node);
  309. spin_unlock(&glob->lru_lock);
  310. return r;
  311. }
  312. return r;
  313. }
  314. static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
  315. bool evict, bool interruptible, bool no_wait,
  316. struct ttm_mem_reg *new_mem)
  317. {
  318. struct radeon_device *rdev;
  319. struct ttm_mem_reg *old_mem = &bo->mem;
  320. struct ttm_mem_reg tmp_mem;
  321. struct ttm_placement placement;
  322. u32 placements;
  323. int r;
  324. rdev = radeon_get_rdev(bo->bdev);
  325. tmp_mem = *new_mem;
  326. tmp_mem.mm_node = NULL;
  327. placement.fpfn = 0;
  328. placement.lpfn = 0;
  329. placement.num_placement = 1;
  330. placement.placement = &placements;
  331. placement.num_busy_placement = 1;
  332. placement.busy_placement = &placements;
  333. placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  334. r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait);
  335. if (unlikely(r)) {
  336. return r;
  337. }
  338. r = ttm_bo_move_ttm(bo, true, no_wait, &tmp_mem);
  339. if (unlikely(r)) {
  340. goto out_cleanup;
  341. }
  342. r = radeon_move_blit(bo, true, no_wait, new_mem, old_mem);
  343. if (unlikely(r)) {
  344. goto out_cleanup;
  345. }
  346. out_cleanup:
  347. if (tmp_mem.mm_node) {
  348. struct ttm_bo_global *glob = rdev->mman.bdev.glob;
  349. spin_lock(&glob->lru_lock);
  350. drm_mm_put_block(tmp_mem.mm_node);
  351. spin_unlock(&glob->lru_lock);
  352. return r;
  353. }
  354. return r;
  355. }
  356. static int radeon_bo_move(struct ttm_buffer_object *bo,
  357. bool evict, bool interruptible, bool no_wait,
  358. struct ttm_mem_reg *new_mem)
  359. {
  360. struct radeon_device *rdev;
  361. struct ttm_mem_reg *old_mem = &bo->mem;
  362. int r;
  363. rdev = radeon_get_rdev(bo->bdev);
  364. if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
  365. radeon_move_null(bo, new_mem);
  366. return 0;
  367. }
  368. if ((old_mem->mem_type == TTM_PL_TT &&
  369. new_mem->mem_type == TTM_PL_SYSTEM) ||
  370. (old_mem->mem_type == TTM_PL_SYSTEM &&
  371. new_mem->mem_type == TTM_PL_TT)) {
  372. /* bind is enough */
  373. radeon_move_null(bo, new_mem);
  374. return 0;
  375. }
  376. if (!rdev->cp.ready || rdev->asic->copy == NULL) {
  377. /* use memcpy */
  378. goto memcpy;
  379. }
  380. if (old_mem->mem_type == TTM_PL_VRAM &&
  381. new_mem->mem_type == TTM_PL_SYSTEM) {
  382. r = radeon_move_vram_ram(bo, evict, interruptible,
  383. no_wait, new_mem);
  384. } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
  385. new_mem->mem_type == TTM_PL_VRAM) {
  386. r = radeon_move_ram_vram(bo, evict, interruptible,
  387. no_wait, new_mem);
  388. } else {
  389. r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
  390. }
  391. if (r) {
  392. memcpy:
  393. r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
  394. }
  395. return r;
  396. }
  397. static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
  398. bool lazy, bool interruptible)
  399. {
  400. return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
  401. }
  402. static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
  403. {
  404. return 0;
  405. }
  406. static void radeon_sync_obj_unref(void **sync_obj)
  407. {
  408. radeon_fence_unref((struct radeon_fence **)sync_obj);
  409. }
  410. static void *radeon_sync_obj_ref(void *sync_obj)
  411. {
  412. return radeon_fence_ref((struct radeon_fence *)sync_obj);
  413. }
  414. static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
  415. {
  416. return radeon_fence_signaled((struct radeon_fence *)sync_obj);
  417. }
  418. static struct ttm_bo_driver radeon_bo_driver = {
  419. .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
  420. .invalidate_caches = &radeon_invalidate_caches,
  421. .init_mem_type = &radeon_init_mem_type,
  422. .evict_flags = &radeon_evict_flags,
  423. .move = &radeon_bo_move,
  424. .verify_access = &radeon_verify_access,
  425. .sync_obj_signaled = &radeon_sync_obj_signaled,
  426. .sync_obj_wait = &radeon_sync_obj_wait,
  427. .sync_obj_flush = &radeon_sync_obj_flush,
  428. .sync_obj_unref = &radeon_sync_obj_unref,
  429. .sync_obj_ref = &radeon_sync_obj_ref,
  430. .move_notify = &radeon_bo_move_notify,
  431. .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
  432. };
  433. int radeon_ttm_init(struct radeon_device *rdev)
  434. {
  435. int r;
  436. r = radeon_ttm_global_init(rdev);
  437. if (r) {
  438. return r;
  439. }
  440. /* No others user of address space so set it to 0 */
  441. r = ttm_bo_device_init(&rdev->mman.bdev,
  442. rdev->mman.bo_global_ref.ref.object,
  443. &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
  444. rdev->need_dma32);
  445. if (r) {
  446. DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
  447. return r;
  448. }
  449. rdev->mman.initialized = true;
  450. r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
  451. rdev->mc.real_vram_size >> PAGE_SHIFT);
  452. if (r) {
  453. DRM_ERROR("Failed initializing VRAM heap.\n");
  454. return r;
  455. }
  456. r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
  457. RADEON_GEM_DOMAIN_VRAM,
  458. &rdev->stollen_vga_memory);
  459. if (r) {
  460. return r;
  461. }
  462. r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
  463. if (r)
  464. return r;
  465. r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
  466. radeon_bo_unreserve(rdev->stollen_vga_memory);
  467. if (r) {
  468. radeon_bo_unref(&rdev->stollen_vga_memory);
  469. return r;
  470. }
  471. DRM_INFO("radeon: %uM of VRAM memory ready\n",
  472. (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
  473. r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
  474. rdev->mc.gtt_size >> PAGE_SHIFT);
  475. if (r) {
  476. DRM_ERROR("Failed initializing GTT heap.\n");
  477. return r;
  478. }
  479. DRM_INFO("radeon: %uM of GTT memory ready.\n",
  480. (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
  481. if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  482. rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  483. }
  484. r = radeon_ttm_debugfs_init(rdev);
  485. if (r) {
  486. DRM_ERROR("Failed to init debugfs\n");
  487. return r;
  488. }
  489. return 0;
  490. }
  491. void radeon_ttm_fini(struct radeon_device *rdev)
  492. {
  493. int r;
  494. if (!rdev->mman.initialized)
  495. return;
  496. if (rdev->stollen_vga_memory) {
  497. r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
  498. if (r == 0) {
  499. radeon_bo_unpin(rdev->stollen_vga_memory);
  500. radeon_bo_unreserve(rdev->stollen_vga_memory);
  501. }
  502. radeon_bo_unref(&rdev->stollen_vga_memory);
  503. }
  504. ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
  505. ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
  506. ttm_bo_device_release(&rdev->mman.bdev);
  507. radeon_gart_fini(rdev);
  508. radeon_ttm_global_fini(rdev);
  509. rdev->mman.initialized = false;
  510. DRM_INFO("radeon: ttm finalized\n");
  511. }
  512. static struct vm_operations_struct radeon_ttm_vm_ops;
  513. static const struct vm_operations_struct *ttm_vm_ops = NULL;
  514. static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  515. {
  516. struct ttm_buffer_object *bo;
  517. int r;
  518. bo = (struct ttm_buffer_object *)vma->vm_private_data;
  519. if (bo == NULL) {
  520. return VM_FAULT_NOPAGE;
  521. }
  522. r = ttm_vm_ops->fault(vma, vmf);
  523. return r;
  524. }
  525. int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
  526. {
  527. struct drm_file *file_priv;
  528. struct radeon_device *rdev;
  529. int r;
  530. if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
  531. return drm_mmap(filp, vma);
  532. }
  533. file_priv = (struct drm_file *)filp->private_data;
  534. rdev = file_priv->minor->dev->dev_private;
  535. if (rdev == NULL) {
  536. return -EINVAL;
  537. }
  538. r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
  539. if (unlikely(r != 0)) {
  540. return r;
  541. }
  542. if (unlikely(ttm_vm_ops == NULL)) {
  543. ttm_vm_ops = vma->vm_ops;
  544. radeon_ttm_vm_ops = *ttm_vm_ops;
  545. radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
  546. }
  547. vma->vm_ops = &radeon_ttm_vm_ops;
  548. return 0;
  549. }
  550. /*
  551. * TTM backend functions.
  552. */
  553. struct radeon_ttm_backend {
  554. struct ttm_backend backend;
  555. struct radeon_device *rdev;
  556. unsigned long num_pages;
  557. struct page **pages;
  558. struct page *dummy_read_page;
  559. bool populated;
  560. bool bound;
  561. unsigned offset;
  562. };
  563. static int radeon_ttm_backend_populate(struct ttm_backend *backend,
  564. unsigned long num_pages,
  565. struct page **pages,
  566. struct page *dummy_read_page)
  567. {
  568. struct radeon_ttm_backend *gtt;
  569. gtt = container_of(backend, struct radeon_ttm_backend, backend);
  570. gtt->pages = pages;
  571. gtt->num_pages = num_pages;
  572. gtt->dummy_read_page = dummy_read_page;
  573. gtt->populated = true;
  574. return 0;
  575. }
  576. static void radeon_ttm_backend_clear(struct ttm_backend *backend)
  577. {
  578. struct radeon_ttm_backend *gtt;
  579. gtt = container_of(backend, struct radeon_ttm_backend, backend);
  580. gtt->pages = NULL;
  581. gtt->num_pages = 0;
  582. gtt->dummy_read_page = NULL;
  583. gtt->populated = false;
  584. gtt->bound = false;
  585. }
  586. static int radeon_ttm_backend_bind(struct ttm_backend *backend,
  587. struct ttm_mem_reg *bo_mem)
  588. {
  589. struct radeon_ttm_backend *gtt;
  590. int r;
  591. gtt = container_of(backend, struct radeon_ttm_backend, backend);
  592. gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
  593. if (!gtt->num_pages) {
  594. WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
  595. }
  596. r = radeon_gart_bind(gtt->rdev, gtt->offset,
  597. gtt->num_pages, gtt->pages);
  598. if (r) {
  599. DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
  600. gtt->num_pages, gtt->offset);
  601. return r;
  602. }
  603. gtt->bound = true;
  604. return 0;
  605. }
  606. static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
  607. {
  608. struct radeon_ttm_backend *gtt;
  609. gtt = container_of(backend, struct radeon_ttm_backend, backend);
  610. radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
  611. gtt->bound = false;
  612. return 0;
  613. }
  614. static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
  615. {
  616. struct radeon_ttm_backend *gtt;
  617. gtt = container_of(backend, struct radeon_ttm_backend, backend);
  618. if (gtt->bound) {
  619. radeon_ttm_backend_unbind(backend);
  620. }
  621. kfree(gtt);
  622. }
  623. static struct ttm_backend_func radeon_backend_func = {
  624. .populate = &radeon_ttm_backend_populate,
  625. .clear = &radeon_ttm_backend_clear,
  626. .bind = &radeon_ttm_backend_bind,
  627. .unbind = &radeon_ttm_backend_unbind,
  628. .destroy = &radeon_ttm_backend_destroy,
  629. };
  630. struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
  631. {
  632. struct radeon_ttm_backend *gtt;
  633. gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
  634. if (gtt == NULL) {
  635. return NULL;
  636. }
  637. gtt->backend.bdev = &rdev->mman.bdev;
  638. gtt->backend.flags = 0;
  639. gtt->backend.func = &radeon_backend_func;
  640. gtt->rdev = rdev;
  641. gtt->pages = NULL;
  642. gtt->num_pages = 0;
  643. gtt->dummy_read_page = NULL;
  644. gtt->populated = false;
  645. gtt->bound = false;
  646. return &gtt->backend;
  647. }
  648. #define RADEON_DEBUGFS_MEM_TYPES 2
  649. #if defined(CONFIG_DEBUG_FS)
  650. static int radeon_mm_dump_table(struct seq_file *m, void *data)
  651. {
  652. struct drm_info_node *node = (struct drm_info_node *)m->private;
  653. struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
  654. struct drm_device *dev = node->minor->dev;
  655. struct radeon_device *rdev = dev->dev_private;
  656. int ret;
  657. struct ttm_bo_global *glob = rdev->mman.bdev.glob;
  658. spin_lock(&glob->lru_lock);
  659. ret = drm_mm_dump_table(m, mm);
  660. spin_unlock(&glob->lru_lock);
  661. return ret;
  662. }
  663. #endif
  664. static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
  665. {
  666. #if defined(CONFIG_DEBUG_FS)
  667. static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
  668. static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
  669. unsigned i;
  670. for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
  671. if (i == 0)
  672. sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
  673. else
  674. sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
  675. radeon_mem_types_list[i].name = radeon_mem_types_names[i];
  676. radeon_mem_types_list[i].show = &radeon_mm_dump_table;
  677. radeon_mem_types_list[i].driver_features = 0;
  678. if (i == 0)
  679. radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
  680. else
  681. radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
  682. }
  683. return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);
  684. #endif
  685. return 0;
  686. }