radeon_mode.h 17 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <drm_dp_helper.h>
  35. #include <linux/i2c.h>
  36. #include <linux/i2c-id.h>
  37. #include <linux/i2c-algo-bit.h>
  38. #include "radeon_fixed.h"
  39. struct radeon_device;
  40. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  41. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  42. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  43. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  44. enum radeon_rmx_type {
  45. RMX_OFF,
  46. RMX_FULL,
  47. RMX_CENTER,
  48. RMX_ASPECT
  49. };
  50. enum radeon_tv_std {
  51. TV_STD_NTSC,
  52. TV_STD_PAL,
  53. TV_STD_PAL_M,
  54. TV_STD_PAL_60,
  55. TV_STD_NTSC_J,
  56. TV_STD_SCART_PAL,
  57. TV_STD_SECAM,
  58. TV_STD_PAL_CN,
  59. TV_STD_PAL_N,
  60. };
  61. /* radeon gpio-based i2c
  62. * 1. "mask" reg and bits
  63. * grabs the gpio pins for software use
  64. * 0=not held 1=held
  65. * 2. "a" reg and bits
  66. * output pin value
  67. * 0=low 1=high
  68. * 3. "en" reg and bits
  69. * sets the pin direction
  70. * 0=input 1=output
  71. * 4. "y" reg and bits
  72. * input pin value
  73. * 0=low 1=high
  74. */
  75. struct radeon_i2c_bus_rec {
  76. bool valid;
  77. /* id used by atom */
  78. uint8_t i2c_id;
  79. /* can be used with hw i2c engine */
  80. bool hw_capable;
  81. /* uses multi-media i2c engine */
  82. bool mm_i2c;
  83. /* regs and bits */
  84. uint32_t mask_clk_reg;
  85. uint32_t mask_data_reg;
  86. uint32_t a_clk_reg;
  87. uint32_t a_data_reg;
  88. uint32_t en_clk_reg;
  89. uint32_t en_data_reg;
  90. uint32_t y_clk_reg;
  91. uint32_t y_data_reg;
  92. uint32_t mask_clk_mask;
  93. uint32_t mask_data_mask;
  94. uint32_t a_clk_mask;
  95. uint32_t a_data_mask;
  96. uint32_t en_clk_mask;
  97. uint32_t en_data_mask;
  98. uint32_t y_clk_mask;
  99. uint32_t y_data_mask;
  100. };
  101. struct radeon_tmds_pll {
  102. uint32_t freq;
  103. uint32_t value;
  104. };
  105. #define RADEON_MAX_BIOS_CONNECTOR 16
  106. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  107. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  108. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  109. #define RADEON_PLL_LEGACY (1 << 3)
  110. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  111. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  112. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  113. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  114. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  115. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  116. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  117. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  118. struct radeon_pll {
  119. uint16_t reference_freq;
  120. uint16_t reference_div;
  121. uint32_t pll_in_min;
  122. uint32_t pll_in_max;
  123. uint32_t pll_out_min;
  124. uint32_t pll_out_max;
  125. uint16_t xclk;
  126. uint32_t min_ref_div;
  127. uint32_t max_ref_div;
  128. uint32_t min_post_div;
  129. uint32_t max_post_div;
  130. uint32_t min_feedback_div;
  131. uint32_t max_feedback_div;
  132. uint32_t min_frac_feedback_div;
  133. uint32_t max_frac_feedback_div;
  134. uint32_t best_vco;
  135. };
  136. struct radeon_i2c_chan {
  137. struct i2c_adapter adapter;
  138. struct drm_device *dev;
  139. union {
  140. struct i2c_algo_dp_aux_data dp;
  141. struct i2c_algo_bit_data bit;
  142. } algo;
  143. struct radeon_i2c_bus_rec rec;
  144. };
  145. /* mostly for macs, but really any system without connector tables */
  146. enum radeon_connector_table {
  147. CT_NONE,
  148. CT_GENERIC,
  149. CT_IBOOK,
  150. CT_POWERBOOK_EXTERNAL,
  151. CT_POWERBOOK_INTERNAL,
  152. CT_POWERBOOK_VGA,
  153. CT_MINI_EXTERNAL,
  154. CT_MINI_INTERNAL,
  155. CT_IMAC_G5_ISIGHT,
  156. CT_EMAC,
  157. };
  158. enum radeon_dvo_chip {
  159. DVO_SIL164,
  160. DVO_SIL1178,
  161. };
  162. struct radeon_mode_info {
  163. struct atom_context *atom_context;
  164. struct card_info *atom_card_info;
  165. enum radeon_connector_table connector_table;
  166. bool mode_config_initialized;
  167. struct radeon_crtc *crtcs[2];
  168. /* DVI-I properties */
  169. struct drm_property *coherent_mode_property;
  170. /* DAC enable load detect */
  171. struct drm_property *load_detect_property;
  172. /* TV standard load detect */
  173. struct drm_property *tv_std_property;
  174. /* legacy TMDS PLL detect */
  175. struct drm_property *tmds_pll_property;
  176. };
  177. #define MAX_H_CODE_TIMING_LEN 32
  178. #define MAX_V_CODE_TIMING_LEN 32
  179. /* need to store these as reading
  180. back code tables is excessive */
  181. struct radeon_tv_regs {
  182. uint32_t tv_uv_adr;
  183. uint32_t timing_cntl;
  184. uint32_t hrestart;
  185. uint32_t vrestart;
  186. uint32_t frestart;
  187. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  188. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  189. };
  190. struct radeon_crtc {
  191. struct drm_crtc base;
  192. int crtc_id;
  193. u16 lut_r[256], lut_g[256], lut_b[256];
  194. bool enabled;
  195. bool can_tile;
  196. uint32_t crtc_offset;
  197. struct drm_gem_object *cursor_bo;
  198. uint64_t cursor_addr;
  199. int cursor_width;
  200. int cursor_height;
  201. uint32_t legacy_display_base_addr;
  202. uint32_t legacy_cursor_offset;
  203. enum radeon_rmx_type rmx_type;
  204. fixed20_12 vsc;
  205. fixed20_12 hsc;
  206. struct drm_display_mode native_mode;
  207. };
  208. struct radeon_encoder_primary_dac {
  209. /* legacy primary dac */
  210. uint32_t ps2_pdac_adj;
  211. };
  212. struct radeon_encoder_lvds {
  213. /* legacy lvds */
  214. uint16_t panel_vcc_delay;
  215. uint8_t panel_pwr_delay;
  216. uint8_t panel_digon_delay;
  217. uint8_t panel_blon_delay;
  218. uint16_t panel_ref_divider;
  219. uint8_t panel_post_divider;
  220. uint16_t panel_fb_divider;
  221. bool use_bios_dividers;
  222. uint32_t lvds_gen_cntl;
  223. /* panel mode */
  224. struct drm_display_mode native_mode;
  225. };
  226. struct radeon_encoder_tv_dac {
  227. /* legacy tv dac */
  228. uint32_t ps2_tvdac_adj;
  229. uint32_t ntsc_tvdac_adj;
  230. uint32_t pal_tvdac_adj;
  231. int h_pos;
  232. int v_pos;
  233. int h_size;
  234. int supported_tv_stds;
  235. bool tv_on;
  236. enum radeon_tv_std tv_std;
  237. struct radeon_tv_regs tv;
  238. };
  239. struct radeon_encoder_int_tmds {
  240. /* legacy int tmds */
  241. struct radeon_tmds_pll tmds_pll[4];
  242. };
  243. struct radeon_encoder_ext_tmds {
  244. /* tmds over dvo */
  245. struct radeon_i2c_chan *i2c_bus;
  246. uint8_t slave_addr;
  247. enum radeon_dvo_chip dvo_chip;
  248. };
  249. /* spread spectrum */
  250. struct radeon_atom_ss {
  251. uint16_t percentage;
  252. uint8_t type;
  253. uint8_t step;
  254. uint8_t delay;
  255. uint8_t range;
  256. uint8_t refdiv;
  257. };
  258. struct radeon_encoder_atom_dig {
  259. /* atom dig */
  260. bool coherent_mode;
  261. int dig_block;
  262. /* atom lvds */
  263. uint32_t lvds_misc;
  264. uint16_t panel_pwr_delay;
  265. struct radeon_atom_ss *ss;
  266. /* panel mode */
  267. struct drm_display_mode native_mode;
  268. };
  269. struct radeon_encoder_atom_dac {
  270. enum radeon_tv_std tv_std;
  271. };
  272. struct radeon_encoder {
  273. struct drm_encoder base;
  274. uint32_t encoder_id;
  275. uint32_t devices;
  276. uint32_t active_device;
  277. uint32_t flags;
  278. uint32_t pixel_clock;
  279. enum radeon_rmx_type rmx_type;
  280. struct drm_display_mode native_mode;
  281. void *enc_priv;
  282. int hdmi_offset;
  283. int hdmi_audio_workaround;
  284. int hdmi_buffer_status;
  285. };
  286. struct radeon_connector_atom_dig {
  287. uint32_t igp_lane_info;
  288. bool linkb;
  289. /* displayport */
  290. struct radeon_i2c_chan *dp_i2c_bus;
  291. u8 dpcd[8];
  292. u8 dp_sink_type;
  293. int dp_clock;
  294. int dp_lane_count;
  295. };
  296. struct radeon_gpio_rec {
  297. bool valid;
  298. u8 id;
  299. u32 reg;
  300. u32 mask;
  301. };
  302. enum radeon_hpd_id {
  303. RADEON_HPD_NONE = 0,
  304. RADEON_HPD_1,
  305. RADEON_HPD_2,
  306. RADEON_HPD_3,
  307. RADEON_HPD_4,
  308. RADEON_HPD_5,
  309. RADEON_HPD_6,
  310. };
  311. struct radeon_hpd {
  312. enum radeon_hpd_id hpd;
  313. u8 plugged_state;
  314. struct radeon_gpio_rec gpio;
  315. };
  316. struct radeon_connector {
  317. struct drm_connector base;
  318. uint32_t connector_id;
  319. uint32_t devices;
  320. struct radeon_i2c_chan *ddc_bus;
  321. /* some systems have a an hdmi and vga port with a shared ddc line */
  322. bool shared_ddc;
  323. bool use_digital;
  324. /* we need to mind the EDID between detect
  325. and get modes due to analog/digital/tvencoder */
  326. struct edid *edid;
  327. void *con_priv;
  328. bool dac_load_detect;
  329. uint16_t connector_object_id;
  330. struct radeon_hpd hpd;
  331. };
  332. struct radeon_framebuffer {
  333. struct drm_framebuffer base;
  334. struct drm_gem_object *obj;
  335. };
  336. extern enum radeon_tv_std
  337. radeon_combios_get_tv_info(struct radeon_device *rdev);
  338. extern enum radeon_tv_std
  339. radeon_atombios_get_tv_info(struct radeon_device *rdev);
  340. extern void radeon_connector_hotplug(struct drm_connector *connector);
  341. extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
  342. extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
  343. struct drm_display_mode *mode);
  344. extern void radeon_dp_set_link_config(struct drm_connector *connector,
  345. struct drm_display_mode *mode);
  346. extern void dp_link_train(struct drm_encoder *encoder,
  347. struct drm_connector *connector);
  348. extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
  349. extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
  350. extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
  351. int action, uint8_t lane_num,
  352. uint8_t lane_set);
  353. extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
  354. uint8_t write_byte, uint8_t *read_byte);
  355. extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
  356. struct radeon_i2c_bus_rec *rec,
  357. const char *name);
  358. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  359. struct radeon_i2c_bus_rec *rec,
  360. const char *name);
  361. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  362. extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
  363. u8 slave_addr,
  364. u8 addr,
  365. u8 *val);
  366. extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
  367. u8 slave_addr,
  368. u8 addr,
  369. u8 val);
  370. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  371. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  372. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  373. extern void radeon_compute_pll(struct radeon_pll *pll,
  374. uint64_t freq,
  375. uint32_t *dot_clock_p,
  376. uint32_t *fb_div_p,
  377. uint32_t *frac_fb_div_p,
  378. uint32_t *ref_div_p,
  379. uint32_t *post_div_p,
  380. int flags);
  381. extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
  382. uint64_t freq,
  383. uint32_t *dot_clock_p,
  384. uint32_t *fb_div_p,
  385. uint32_t *frac_fb_div_p,
  386. uint32_t *ref_div_p,
  387. uint32_t *post_div_p,
  388. int flags);
  389. extern void radeon_setup_encoder_clones(struct drm_device *dev);
  390. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  391. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  392. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  393. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  394. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  395. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  396. extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
  397. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  398. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  399. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  400. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  401. struct drm_framebuffer *old_fb);
  402. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  403. struct drm_display_mode *mode,
  404. struct drm_display_mode *adjusted_mode,
  405. int x, int y,
  406. struct drm_framebuffer *old_fb);
  407. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  408. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  409. struct drm_framebuffer *old_fb);
  410. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  411. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  412. struct drm_file *file_priv,
  413. uint32_t handle,
  414. uint32_t width,
  415. uint32_t height);
  416. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  417. int x, int y);
  418. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  419. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  420. extern struct radeon_encoder_atom_dig *
  421. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  422. extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  423. struct radeon_encoder_int_tmds *tmds);
  424. extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  425. struct radeon_encoder_int_tmds *tmds);
  426. extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  427. struct radeon_encoder_int_tmds *tmds);
  428. extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
  429. struct radeon_encoder_ext_tmds *tmds);
  430. extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
  431. struct radeon_encoder_ext_tmds *tmds);
  432. extern struct radeon_encoder_primary_dac *
  433. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  434. extern struct radeon_encoder_tv_dac *
  435. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  436. extern struct radeon_encoder_lvds *
  437. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  438. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  439. extern struct radeon_encoder_tv_dac *
  440. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  441. extern struct radeon_encoder_primary_dac *
  442. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  443. extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
  444. extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
  445. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  446. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  447. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  448. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  449. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  450. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  451. extern void
  452. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  453. extern void
  454. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  455. extern void
  456. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  457. extern void
  458. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  459. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  460. u16 blue, int regno);
  461. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  462. u16 *blue, int regno);
  463. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  464. struct drm_mode_fb_cmd *mode_cmd,
  465. struct drm_gem_object *obj);
  466. int radeonfb_probe(struct drm_device *dev);
  467. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  468. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  469. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  470. void radeon_atombios_init_crtc(struct drm_device *dev,
  471. struct radeon_crtc *radeon_crtc);
  472. void radeon_legacy_init_crtc(struct drm_device *dev,
  473. struct radeon_crtc *radeon_crtc);
  474. extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
  475. void radeon_get_clock_info(struct drm_device *dev);
  476. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  477. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  478. void radeon_enc_destroy(struct drm_encoder *encoder);
  479. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  480. void radeon_combios_asic_init(struct drm_device *dev);
  481. extern int radeon_static_clocks_init(struct drm_device *dev);
  482. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  483. struct drm_display_mode *mode,
  484. struct drm_display_mode *adjusted_mode);
  485. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  486. /* legacy tv */
  487. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  488. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  489. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  490. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  491. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  492. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  493. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  494. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  495. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  496. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  497. struct drm_display_mode *mode,
  498. struct drm_display_mode *adjusted_mode);
  499. #endif