radeon_fence.c 10 KB

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  1. /*
  2. * Copyright 2009 Jerome Glisse.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Jerome Glisse <glisse@freedesktop.org>
  29. * Dave Airlie
  30. */
  31. #include <linux/seq_file.h>
  32. #include <asm/atomic.h>
  33. #include <linux/wait.h>
  34. #include <linux/list.h>
  35. #include <linux/kref.h>
  36. #include "drmP.h"
  37. #include "drm.h"
  38. #include "radeon_reg.h"
  39. #include "radeon.h"
  40. int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  41. {
  42. unsigned long irq_flags;
  43. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  44. if (fence->emited) {
  45. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  46. return 0;
  47. }
  48. fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
  49. if (!rdev->cp.ready) {
  50. /* FIXME: cp is not running assume everythings is done right
  51. * away
  52. */
  53. WREG32(rdev->fence_drv.scratch_reg, fence->seq);
  54. } else
  55. radeon_fence_ring_emit(rdev, fence);
  56. fence->emited = true;
  57. fence->timeout = jiffies + ((2000 * HZ) / 1000);
  58. list_del(&fence->list);
  59. list_add_tail(&fence->list, &rdev->fence_drv.emited);
  60. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  61. return 0;
  62. }
  63. static bool radeon_fence_poll_locked(struct radeon_device *rdev)
  64. {
  65. struct radeon_fence *fence;
  66. struct list_head *i, *n;
  67. uint32_t seq;
  68. bool wake = false;
  69. if (rdev == NULL) {
  70. return true;
  71. }
  72. if (rdev->shutdown) {
  73. return true;
  74. }
  75. seq = RREG32(rdev->fence_drv.scratch_reg);
  76. rdev->fence_drv.last_seq = seq;
  77. n = NULL;
  78. list_for_each(i, &rdev->fence_drv.emited) {
  79. fence = list_entry(i, struct radeon_fence, list);
  80. if (fence->seq == seq) {
  81. n = i;
  82. break;
  83. }
  84. }
  85. /* all fence previous to this one are considered as signaled */
  86. if (n) {
  87. i = n;
  88. do {
  89. n = i->prev;
  90. list_del(i);
  91. list_add_tail(i, &rdev->fence_drv.signaled);
  92. fence = list_entry(i, struct radeon_fence, list);
  93. fence->signaled = true;
  94. i = n;
  95. } while (i != &rdev->fence_drv.emited);
  96. wake = true;
  97. }
  98. return wake;
  99. }
  100. static void radeon_fence_destroy(struct kref *kref)
  101. {
  102. unsigned long irq_flags;
  103. struct radeon_fence *fence;
  104. fence = container_of(kref, struct radeon_fence, kref);
  105. write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
  106. list_del(&fence->list);
  107. fence->emited = false;
  108. write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
  109. kfree(fence);
  110. }
  111. int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
  112. {
  113. unsigned long irq_flags;
  114. *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
  115. if ((*fence) == NULL) {
  116. return -ENOMEM;
  117. }
  118. kref_init(&((*fence)->kref));
  119. (*fence)->rdev = rdev;
  120. (*fence)->emited = false;
  121. (*fence)->signaled = false;
  122. (*fence)->seq = 0;
  123. INIT_LIST_HEAD(&(*fence)->list);
  124. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  125. list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
  126. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  127. return 0;
  128. }
  129. bool radeon_fence_signaled(struct radeon_fence *fence)
  130. {
  131. unsigned long irq_flags;
  132. bool signaled = false;
  133. if (!fence)
  134. return true;
  135. if (fence->rdev->gpu_lockup)
  136. return true;
  137. write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
  138. signaled = fence->signaled;
  139. /* if we are shuting down report all fence as signaled */
  140. if (fence->rdev->shutdown) {
  141. signaled = true;
  142. }
  143. if (!fence->emited) {
  144. WARN(1, "Querying an unemited fence : %p !\n", fence);
  145. signaled = true;
  146. }
  147. if (!signaled) {
  148. radeon_fence_poll_locked(fence->rdev);
  149. signaled = fence->signaled;
  150. }
  151. write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
  152. return signaled;
  153. }
  154. int radeon_fence_wait(struct radeon_fence *fence, bool intr)
  155. {
  156. struct radeon_device *rdev;
  157. unsigned long cur_jiffies;
  158. unsigned long timeout;
  159. bool expired = false;
  160. int r;
  161. if (fence == NULL) {
  162. WARN(1, "Querying an invalid fence : %p !\n", fence);
  163. return 0;
  164. }
  165. rdev = fence->rdev;
  166. if (radeon_fence_signaled(fence)) {
  167. return 0;
  168. }
  169. retry:
  170. cur_jiffies = jiffies;
  171. timeout = HZ / 100;
  172. if (time_after(fence->timeout, cur_jiffies)) {
  173. timeout = fence->timeout - cur_jiffies;
  174. }
  175. if (intr) {
  176. radeon_irq_kms_sw_irq_get(rdev);
  177. r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
  178. radeon_fence_signaled(fence), timeout);
  179. radeon_irq_kms_sw_irq_put(rdev);
  180. if (unlikely(r < 0))
  181. return r;
  182. } else {
  183. radeon_irq_kms_sw_irq_get(rdev);
  184. r = wait_event_timeout(rdev->fence_drv.queue,
  185. radeon_fence_signaled(fence), timeout);
  186. radeon_irq_kms_sw_irq_put(rdev);
  187. }
  188. if (unlikely(!radeon_fence_signaled(fence))) {
  189. if (unlikely(r == 0)) {
  190. expired = true;
  191. }
  192. if (unlikely(expired)) {
  193. timeout = 1;
  194. if (time_after(cur_jiffies, fence->timeout)) {
  195. timeout = cur_jiffies - fence->timeout;
  196. }
  197. timeout = jiffies_to_msecs(timeout);
  198. if (timeout > 500) {
  199. DRM_ERROR("fence(%p:0x%08X) %lums timeout "
  200. "going to reset GPU\n",
  201. fence, fence->seq, timeout);
  202. radeon_gpu_reset(rdev);
  203. WREG32(rdev->fence_drv.scratch_reg, fence->seq);
  204. }
  205. }
  206. goto retry;
  207. }
  208. if (unlikely(expired)) {
  209. rdev->fence_drv.count_timeout++;
  210. cur_jiffies = jiffies;
  211. timeout = 1;
  212. if (time_after(cur_jiffies, fence->timeout)) {
  213. timeout = cur_jiffies - fence->timeout;
  214. }
  215. timeout = jiffies_to_msecs(timeout);
  216. DRM_ERROR("fence(%p:0x%08X) %lums timeout\n",
  217. fence, fence->seq, timeout);
  218. DRM_ERROR("last signaled fence(0x%08X)\n",
  219. rdev->fence_drv.last_seq);
  220. }
  221. return 0;
  222. }
  223. int radeon_fence_wait_next(struct radeon_device *rdev)
  224. {
  225. unsigned long irq_flags;
  226. struct radeon_fence *fence;
  227. int r;
  228. if (rdev->gpu_lockup) {
  229. return 0;
  230. }
  231. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  232. if (list_empty(&rdev->fence_drv.emited)) {
  233. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  234. return 0;
  235. }
  236. fence = list_entry(rdev->fence_drv.emited.next,
  237. struct radeon_fence, list);
  238. radeon_fence_ref(fence);
  239. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  240. r = radeon_fence_wait(fence, false);
  241. radeon_fence_unref(&fence);
  242. return r;
  243. }
  244. int radeon_fence_wait_last(struct radeon_device *rdev)
  245. {
  246. unsigned long irq_flags;
  247. struct radeon_fence *fence;
  248. int r;
  249. if (rdev->gpu_lockup) {
  250. return 0;
  251. }
  252. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  253. if (list_empty(&rdev->fence_drv.emited)) {
  254. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  255. return 0;
  256. }
  257. fence = list_entry(rdev->fence_drv.emited.prev,
  258. struct radeon_fence, list);
  259. radeon_fence_ref(fence);
  260. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  261. r = radeon_fence_wait(fence, false);
  262. radeon_fence_unref(&fence);
  263. return r;
  264. }
  265. struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
  266. {
  267. kref_get(&fence->kref);
  268. return fence;
  269. }
  270. void radeon_fence_unref(struct radeon_fence **fence)
  271. {
  272. struct radeon_fence *tmp = *fence;
  273. *fence = NULL;
  274. if (tmp) {
  275. kref_put(&tmp->kref, &radeon_fence_destroy);
  276. }
  277. }
  278. void radeon_fence_process(struct radeon_device *rdev)
  279. {
  280. unsigned long irq_flags;
  281. bool wake;
  282. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  283. wake = radeon_fence_poll_locked(rdev);
  284. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  285. if (wake) {
  286. wake_up_all(&rdev->fence_drv.queue);
  287. }
  288. }
  289. int radeon_fence_driver_init(struct radeon_device *rdev)
  290. {
  291. unsigned long irq_flags;
  292. int r;
  293. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  294. r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
  295. if (r) {
  296. dev_err(rdev->dev, "fence failed to get scratch register\n");
  297. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  298. return r;
  299. }
  300. WREG32(rdev->fence_drv.scratch_reg, 0);
  301. atomic_set(&rdev->fence_drv.seq, 0);
  302. INIT_LIST_HEAD(&rdev->fence_drv.created);
  303. INIT_LIST_HEAD(&rdev->fence_drv.emited);
  304. INIT_LIST_HEAD(&rdev->fence_drv.signaled);
  305. rdev->fence_drv.count_timeout = 0;
  306. init_waitqueue_head(&rdev->fence_drv.queue);
  307. rdev->fence_drv.initialized = true;
  308. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  309. if (radeon_debugfs_fence_init(rdev)) {
  310. dev_err(rdev->dev, "fence debugfs file creation failed\n");
  311. }
  312. return 0;
  313. }
  314. void radeon_fence_driver_fini(struct radeon_device *rdev)
  315. {
  316. unsigned long irq_flags;
  317. if (!rdev->fence_drv.initialized)
  318. return;
  319. wake_up_all(&rdev->fence_drv.queue);
  320. write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
  321. radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
  322. write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
  323. rdev->fence_drv.initialized = false;
  324. }
  325. /*
  326. * Fence debugfs
  327. */
  328. #if defined(CONFIG_DEBUG_FS)
  329. static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
  330. {
  331. struct drm_info_node *node = (struct drm_info_node *)m->private;
  332. struct drm_device *dev = node->minor->dev;
  333. struct radeon_device *rdev = dev->dev_private;
  334. struct radeon_fence *fence;
  335. seq_printf(m, "Last signaled fence 0x%08X\n",
  336. RREG32(rdev->fence_drv.scratch_reg));
  337. if (!list_empty(&rdev->fence_drv.emited)) {
  338. fence = list_entry(rdev->fence_drv.emited.prev,
  339. struct radeon_fence, list);
  340. seq_printf(m, "Last emited fence %p with 0x%08X\n",
  341. fence, fence->seq);
  342. }
  343. return 0;
  344. }
  345. static struct drm_info_list radeon_debugfs_fence_list[] = {
  346. {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
  347. };
  348. #endif
  349. int radeon_debugfs_fence_init(struct radeon_device *rdev)
  350. {
  351. #if defined(CONFIG_DEBUG_FS)
  352. return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
  353. #else
  354. return 0;
  355. #endif
  356. }