nv50_cursor.c 4.5 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_mode.h"
  28. #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  29. #include "nouveau_reg.h"
  30. #include "nouveau_drv.h"
  31. #include "nouveau_crtc.h"
  32. #include "nv50_display.h"
  33. static void
  34. nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
  35. {
  36. struct drm_nouveau_private *dev_priv = nv_crtc->base.dev->dev_private;
  37. struct nouveau_channel *evo = dev_priv->evo;
  38. struct drm_device *dev = nv_crtc->base.dev;
  39. int ret;
  40. NV_DEBUG_KMS(dev, "\n");
  41. if (update && nv_crtc->cursor.visible)
  42. return;
  43. ret = RING_SPACE(evo, (dev_priv->chipset != 0x50 ? 5 : 3) + update * 2);
  44. if (ret) {
  45. NV_ERROR(dev, "no space while unhiding cursor\n");
  46. return;
  47. }
  48. if (dev_priv->chipset != 0x50) {
  49. BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
  50. OUT_RING(evo, NvEvoVRAM);
  51. }
  52. BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
  53. OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW);
  54. OUT_RING(evo, nv_crtc->cursor.offset >> 8);
  55. if (update) {
  56. BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  57. OUT_RING(evo, 0);
  58. FIRE_RING(evo);
  59. nv_crtc->cursor.visible = true;
  60. }
  61. }
  62. static void
  63. nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
  64. {
  65. struct drm_nouveau_private *dev_priv = nv_crtc->base.dev->dev_private;
  66. struct nouveau_channel *evo = dev_priv->evo;
  67. struct drm_device *dev = nv_crtc->base.dev;
  68. int ret;
  69. NV_DEBUG_KMS(dev, "\n");
  70. if (update && !nv_crtc->cursor.visible)
  71. return;
  72. ret = RING_SPACE(evo, (dev_priv->chipset != 0x50 ? 5 : 3) + update * 2);
  73. if (ret) {
  74. NV_ERROR(dev, "no space while hiding cursor\n");
  75. return;
  76. }
  77. BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
  78. OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE);
  79. OUT_RING(evo, 0);
  80. if (dev_priv->chipset != 0x50) {
  81. BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
  82. OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE);
  83. }
  84. if (update) {
  85. BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  86. OUT_RING(evo, 0);
  87. FIRE_RING(evo);
  88. nv_crtc->cursor.visible = false;
  89. }
  90. }
  91. static void
  92. nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
  93. {
  94. struct drm_device *dev = nv_crtc->base.dev;
  95. nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS(nv_crtc->index),
  96. ((y & 0xFFFF) << 16) | (x & 0xFFFF));
  97. /* Needed to make the cursor move. */
  98. nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS_CTRL(nv_crtc->index), 0);
  99. }
  100. static void
  101. nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
  102. {
  103. NV_DEBUG_KMS(nv_crtc->base.dev, "\n");
  104. if (offset == nv_crtc->cursor.offset)
  105. return;
  106. nv_crtc->cursor.offset = offset;
  107. if (nv_crtc->cursor.visible) {
  108. nv_crtc->cursor.visible = false;
  109. nv_crtc->cursor.show(nv_crtc, true);
  110. }
  111. }
  112. int
  113. nv50_cursor_init(struct nouveau_crtc *nv_crtc)
  114. {
  115. nv_crtc->cursor.set_offset = nv50_cursor_set_offset;
  116. nv_crtc->cursor.set_pos = nv50_cursor_set_pos;
  117. nv_crtc->cursor.hide = nv50_cursor_hide;
  118. nv_crtc->cursor.show = nv50_cursor_show;
  119. return 0;
  120. }
  121. void
  122. nv50_cursor_fini(struct nouveau_crtc *nv_crtc)
  123. {
  124. struct drm_device *dev = nv_crtc->base.dev;
  125. int idx = nv_crtc->index;
  126. NV_DEBUG_KMS(dev, "\n");
  127. nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
  128. if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
  129. NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS, 0)) {
  130. NV_ERROR(dev, "timeout: CURSOR_CTRL2_STATUS == 0\n");
  131. NV_ERROR(dev, "CURSOR_CTRL2 = 0x%08x\n",
  132. nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
  133. }
  134. }