nv04_cursor.c 2.0 KB

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  1. #include "drmP.h"
  2. #include "drm_mode.h"
  3. #include "nouveau_reg.h"
  4. #include "nouveau_drv.h"
  5. #include "nouveau_crtc.h"
  6. #include "nouveau_hw.h"
  7. static void
  8. nv04_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
  9. {
  10. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, true);
  11. }
  12. static void
  13. nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
  14. {
  15. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, false);
  16. }
  17. static void
  18. nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
  19. {
  20. NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index,
  21. NV_PRAMDAC_CU_START_POS,
  22. XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) |
  23. XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X));
  24. }
  25. static void
  26. crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)
  27. {
  28. NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,
  29. crtcstate->CRTC[index]);
  30. }
  31. static void
  32. nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
  33. {
  34. struct drm_device *dev = nv_crtc->base.dev;
  35. struct drm_nouveau_private *dev_priv = dev->dev_private;
  36. struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
  37. struct drm_crtc *crtc = &nv_crtc->base;
  38. regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] =
  39. MASK(NV_CIO_CRE_HCUR_ASI) |
  40. XLATE(offset, 17, NV_CIO_CRE_HCUR_ADDR0_ADR);
  41. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] =
  42. XLATE(offset, 11, NV_CIO_CRE_HCUR_ADDR1_ADR);
  43. if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
  44. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |=
  45. MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
  46. regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24;
  47. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
  48. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
  49. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
  50. if (dev_priv->card_type == NV_40)
  51. nv_fix_nv40_hw_cursor(dev, nv_crtc->index);
  52. }
  53. int
  54. nv04_cursor_init(struct nouveau_crtc *crtc)
  55. {
  56. crtc->cursor.set_offset = nv04_cursor_set_offset;
  57. crtc->cursor.set_pos = nv04_cursor_set_pos;
  58. crtc->cursor.hide = nv04_cursor_hide;
  59. crtc->cursor.show = nv04_cursor_show;
  60. return 0;
  61. }