setup-sh7705.c 5.5 KB

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  1. /*
  2. * SH7705 Setup
  3. *
  4. * Copyright (C) 2006 - 2009 Paul Mundt
  5. * Copyright (C) 2007 Nobuhiro Iwamatsu
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/serial.h>
  15. #include <linux/serial_sci.h>
  16. #include <linux/sh_timer.h>
  17. #include <asm/rtc.h>
  18. enum {
  19. UNUSED = 0,
  20. /* interrupt sources */
  21. IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  22. PINT07, PINT815,
  23. DMAC, SCIF0, SCIF2, ADC_ADI, USB,
  24. TPU0, TPU1, TPU2, TPU3,
  25. TMU0, TMU1, TMU2,
  26. RTC, WDT, REF_RCMI,
  27. };
  28. static struct intc_vect vectors[] __initdata = {
  29. /* IRQ0->5 are handled in setup-sh3.c */
  30. INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  31. INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
  32. INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
  33. INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
  34. INTC_VECT(SCIF0, 0x8e0),
  35. INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
  36. INTC_VECT(SCIF2, 0x960),
  37. INTC_VECT(ADC_ADI, 0x980),
  38. INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
  39. INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
  40. INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
  41. INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  42. INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
  43. INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
  44. INTC_VECT(RTC, 0x4c0),
  45. INTC_VECT(WDT, 0x560),
  46. INTC_VECT(REF_RCMI, 0x580),
  47. };
  48. static struct intc_prio_reg prio_registers[] __initdata = {
  49. { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  50. { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
  51. { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  52. { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
  53. { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
  54. { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
  55. { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
  56. { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
  57. };
  58. static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
  59. NULL, prio_registers, NULL);
  60. static struct plat_sci_port scif0_platform_data = {
  61. .mapbase = 0xa4410000,
  62. .flags = UPF_BOOT_AUTOCONF,
  63. .type = PORT_SCIF,
  64. .irqs = { 56, 56, 56 },
  65. };
  66. static struct platform_device scif0_device = {
  67. .name = "sh-sci",
  68. .id = 0,
  69. .dev = {
  70. .platform_data = &scif0_platform_data,
  71. },
  72. };
  73. static struct plat_sci_port scif1_platform_data = {
  74. .mapbase = 0xa4400000,
  75. .flags = UPF_BOOT_AUTOCONF,
  76. .type = PORT_SCIF,
  77. .irqs = { 52, 52, 52 },
  78. };
  79. static struct platform_device scif1_device = {
  80. .name = "sh-sci",
  81. .id = 1,
  82. .dev = {
  83. .platform_data = &scif1_platform_data,
  84. },
  85. };
  86. static struct resource rtc_resources[] = {
  87. [0] = {
  88. .start = 0xfffffec0,
  89. .end = 0xfffffec0 + 0x1e,
  90. .flags = IORESOURCE_IO,
  91. },
  92. [1] = {
  93. .start = 20,
  94. .flags = IORESOURCE_IRQ,
  95. },
  96. };
  97. static struct sh_rtc_platform_info rtc_info = {
  98. .capabilities = RTC_CAP_4_DIGIT_YEAR,
  99. };
  100. static struct platform_device rtc_device = {
  101. .name = "sh-rtc",
  102. .id = -1,
  103. .num_resources = ARRAY_SIZE(rtc_resources),
  104. .resource = rtc_resources,
  105. .dev = {
  106. .platform_data = &rtc_info,
  107. },
  108. };
  109. static struct sh_timer_config tmu0_platform_data = {
  110. .name = "TMU0",
  111. .channel_offset = 0x02,
  112. .timer_bit = 0,
  113. .clk = "peripheral_clk",
  114. .clockevent_rating = 200,
  115. };
  116. static struct resource tmu0_resources[] = {
  117. [0] = {
  118. .name = "TMU0",
  119. .start = 0xfffffe94,
  120. .end = 0xfffffe9f,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. [1] = {
  124. .start = 16,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. };
  128. static struct platform_device tmu0_device = {
  129. .name = "sh_tmu",
  130. .id = 0,
  131. .dev = {
  132. .platform_data = &tmu0_platform_data,
  133. },
  134. .resource = tmu0_resources,
  135. .num_resources = ARRAY_SIZE(tmu0_resources),
  136. };
  137. static struct sh_timer_config tmu1_platform_data = {
  138. .name = "TMU1",
  139. .channel_offset = 0xe,
  140. .timer_bit = 1,
  141. .clk = "peripheral_clk",
  142. .clocksource_rating = 200,
  143. };
  144. static struct resource tmu1_resources[] = {
  145. [0] = {
  146. .name = "TMU1",
  147. .start = 0xfffffea0,
  148. .end = 0xfffffeab,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. [1] = {
  152. .start = 17,
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device tmu1_device = {
  157. .name = "sh_tmu",
  158. .id = 1,
  159. .dev = {
  160. .platform_data = &tmu1_platform_data,
  161. },
  162. .resource = tmu1_resources,
  163. .num_resources = ARRAY_SIZE(tmu1_resources),
  164. };
  165. static struct sh_timer_config tmu2_platform_data = {
  166. .name = "TMU2",
  167. .channel_offset = 0x1a,
  168. .timer_bit = 2,
  169. .clk = "peripheral_clk",
  170. };
  171. static struct resource tmu2_resources[] = {
  172. [0] = {
  173. .name = "TMU2",
  174. .start = 0xfffffeac,
  175. .end = 0xfffffebb,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. [1] = {
  179. .start = 18,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static struct platform_device tmu2_device = {
  184. .name = "sh_tmu",
  185. .id = 2,
  186. .dev = {
  187. .platform_data = &tmu2_platform_data,
  188. },
  189. .resource = tmu2_resources,
  190. .num_resources = ARRAY_SIZE(tmu2_resources),
  191. };
  192. static struct platform_device *sh7705_devices[] __initdata = {
  193. &scif0_device,
  194. &scif1_device,
  195. &tmu0_device,
  196. &tmu1_device,
  197. &tmu2_device,
  198. &rtc_device,
  199. };
  200. static int __init sh7705_devices_setup(void)
  201. {
  202. return platform_add_devices(sh7705_devices,
  203. ARRAY_SIZE(sh7705_devices));
  204. }
  205. arch_initcall(sh7705_devices_setup);
  206. static struct platform_device *sh7705_early_devices[] __initdata = {
  207. &scif0_device,
  208. &scif1_device,
  209. &tmu0_device,
  210. &tmu1_device,
  211. &tmu2_device,
  212. };
  213. void __init plat_early_device_setup(void)
  214. {
  215. early_platform_add_devices(sh7705_early_devices,
  216. ARRAY_SIZE(sh7705_early_devices));
  217. }
  218. void __init plat_irq_setup(void)
  219. {
  220. register_intc_controller(&intc_desc);
  221. plat_irq_setup_sh3();
  222. }