time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. /*
  51. * Create a small time difference between the timer interrupts
  52. * on the different cpus to avoid lock contention.
  53. */
  54. #define CPU_DEVIATION (smp_processor_id() << 12)
  55. #define TICK_SIZE tick
  56. u64 sched_clock_base_cc = -1; /* Force to data section. */
  57. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  58. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  59. /*
  60. * Scheduler clock - returns current time in nanosec units.
  61. */
  62. unsigned long long notrace sched_clock(void)
  63. {
  64. return (get_clock_monotonic() * 125) >> 9;
  65. }
  66. /*
  67. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  68. */
  69. unsigned long long monotonic_clock(void)
  70. {
  71. return sched_clock();
  72. }
  73. EXPORT_SYMBOL(monotonic_clock);
  74. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  75. {
  76. unsigned long long sec;
  77. sec = todval >> 12;
  78. do_div(sec, 1000000);
  79. xtime->tv_sec = sec;
  80. todval -= (sec * 1000000) << 12;
  81. xtime->tv_nsec = ((todval * 1000) >> 12);
  82. }
  83. EXPORT_SYMBOL(tod_to_timeval);
  84. void clock_comparator_work(void)
  85. {
  86. struct clock_event_device *cd;
  87. S390_lowcore.clock_comparator = -1ULL;
  88. set_clock_comparator(S390_lowcore.clock_comparator);
  89. cd = &__get_cpu_var(comparators);
  90. cd->event_handler(cd);
  91. }
  92. /*
  93. * Fixup the clock comparator.
  94. */
  95. static void fixup_clock_comparator(unsigned long long delta)
  96. {
  97. /* If nobody is waiting there's nothing to fix. */
  98. if (S390_lowcore.clock_comparator == -1ULL)
  99. return;
  100. S390_lowcore.clock_comparator += delta;
  101. set_clock_comparator(S390_lowcore.clock_comparator);
  102. }
  103. static int s390_next_event(unsigned long delta,
  104. struct clock_event_device *evt)
  105. {
  106. S390_lowcore.clock_comparator = get_clock() + delta;
  107. set_clock_comparator(S390_lowcore.clock_comparator);
  108. return 0;
  109. }
  110. static void s390_set_mode(enum clock_event_mode mode,
  111. struct clock_event_device *evt)
  112. {
  113. }
  114. /*
  115. * Set up lowcore and control register of the current cpu to
  116. * enable TOD clock and clock comparator interrupts.
  117. */
  118. void init_cpu_timer(void)
  119. {
  120. struct clock_event_device *cd;
  121. int cpu;
  122. S390_lowcore.clock_comparator = -1ULL;
  123. set_clock_comparator(S390_lowcore.clock_comparator);
  124. cpu = smp_processor_id();
  125. cd = &per_cpu(comparators, cpu);
  126. cd->name = "comparator";
  127. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  128. cd->mult = 16777;
  129. cd->shift = 12;
  130. cd->min_delta_ns = 1;
  131. cd->max_delta_ns = LONG_MAX;
  132. cd->rating = 400;
  133. cd->cpumask = cpumask_of(cpu);
  134. cd->set_next_event = s390_next_event;
  135. cd->set_mode = s390_set_mode;
  136. clockevents_register_device(cd);
  137. /* Enable clock comparator timer interrupt. */
  138. __ctl_set_bit(0,11);
  139. /* Always allow the timing alert external interrupt. */
  140. __ctl_set_bit(0, 4);
  141. }
  142. static void clock_comparator_interrupt(__u16 code)
  143. {
  144. if (S390_lowcore.clock_comparator == -1ULL)
  145. set_clock_comparator(S390_lowcore.clock_comparator);
  146. }
  147. static void etr_timing_alert(struct etr_irq_parm *);
  148. static void stp_timing_alert(struct stp_irq_parm *);
  149. static void timing_alert_interrupt(__u16 code)
  150. {
  151. if (S390_lowcore.ext_params & 0x00c40000)
  152. etr_timing_alert((struct etr_irq_parm *)
  153. &S390_lowcore.ext_params);
  154. if (S390_lowcore.ext_params & 0x00038000)
  155. stp_timing_alert((struct stp_irq_parm *)
  156. &S390_lowcore.ext_params);
  157. }
  158. static void etr_reset(void);
  159. static void stp_reset(void);
  160. void read_persistent_clock(struct timespec *ts)
  161. {
  162. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  163. }
  164. void read_boot_clock(struct timespec *ts)
  165. {
  166. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  167. }
  168. static cycle_t read_tod_clock(struct clocksource *cs)
  169. {
  170. return get_clock();
  171. }
  172. static struct clocksource clocksource_tod = {
  173. .name = "tod",
  174. .rating = 400,
  175. .read = read_tod_clock,
  176. .mask = -1ULL,
  177. .mult = 1000,
  178. .shift = 12,
  179. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  180. };
  181. struct clocksource * __init clocksource_default_clock(void)
  182. {
  183. return &clocksource_tod;
  184. }
  185. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
  186. u32 mult)
  187. {
  188. if (clock != &clocksource_tod)
  189. return;
  190. /* Make userspace gettimeofday spin until we're done. */
  191. ++vdso_data->tb_update_count;
  192. smp_wmb();
  193. vdso_data->xtime_tod_stamp = clock->cycle_last;
  194. vdso_data->xtime_clock_sec = xtime.tv_sec;
  195. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  196. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  197. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  198. smp_wmb();
  199. ++vdso_data->tb_update_count;
  200. }
  201. extern struct timezone sys_tz;
  202. void update_vsyscall_tz(void)
  203. {
  204. /* Make userspace gettimeofday spin until we're done. */
  205. ++vdso_data->tb_update_count;
  206. smp_wmb();
  207. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  208. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  209. smp_wmb();
  210. ++vdso_data->tb_update_count;
  211. }
  212. /*
  213. * Initialize the TOD clock and the CPU timer of
  214. * the boot cpu.
  215. */
  216. void __init time_init(void)
  217. {
  218. /* Reset time synchronization interfaces. */
  219. etr_reset();
  220. stp_reset();
  221. /* request the clock comparator external interrupt */
  222. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  223. panic("Couldn't request external interrupt 0x1004");
  224. /* request the timing alert external interrupt */
  225. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  226. panic("Couldn't request external interrupt 0x1406");
  227. if (clocksource_register(&clocksource_tod) != 0)
  228. panic("Could not register TOD clock source");
  229. /* Enable TOD clock interrupts on the boot cpu. */
  230. init_cpu_timer();
  231. /* Enable cpu timer interrupts on the boot cpu. */
  232. vtime_init();
  233. }
  234. /*
  235. * The time is "clock". old is what we think the time is.
  236. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  237. * "delay" is an approximation how long the synchronization took. If
  238. * the time correction is positive, then "delay" is subtracted from
  239. * the time difference and only the remaining part is passed to ntp.
  240. */
  241. static unsigned long long adjust_time(unsigned long long old,
  242. unsigned long long clock,
  243. unsigned long long delay)
  244. {
  245. unsigned long long delta, ticks;
  246. struct timex adjust;
  247. if (clock > old) {
  248. /* It is later than we thought. */
  249. delta = ticks = clock - old;
  250. delta = ticks = (delta < delay) ? 0 : delta - delay;
  251. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  252. adjust.offset = ticks * (1000000 / HZ);
  253. } else {
  254. /* It is earlier than we thought. */
  255. delta = ticks = old - clock;
  256. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  257. delta = -delta;
  258. adjust.offset = -ticks * (1000000 / HZ);
  259. }
  260. sched_clock_base_cc += delta;
  261. if (adjust.offset != 0) {
  262. pr_notice("The ETR interface has adjusted the clock "
  263. "by %li microseconds\n", adjust.offset);
  264. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  265. do_adjtimex(&adjust);
  266. }
  267. return delta;
  268. }
  269. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  270. static DEFINE_MUTEX(clock_sync_mutex);
  271. static unsigned long clock_sync_flags;
  272. #define CLOCK_SYNC_HAS_ETR 0
  273. #define CLOCK_SYNC_HAS_STP 1
  274. #define CLOCK_SYNC_ETR 2
  275. #define CLOCK_SYNC_STP 3
  276. /*
  277. * The synchronous get_clock function. It will write the current clock
  278. * value to the clock pointer and return 0 if the clock is in sync with
  279. * the external time source. If the clock mode is local it will return
  280. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  281. * reference.
  282. */
  283. int get_sync_clock(unsigned long long *clock)
  284. {
  285. atomic_t *sw_ptr;
  286. unsigned int sw0, sw1;
  287. sw_ptr = &get_cpu_var(clock_sync_word);
  288. sw0 = atomic_read(sw_ptr);
  289. *clock = get_clock();
  290. sw1 = atomic_read(sw_ptr);
  291. put_cpu_var(clock_sync_word);
  292. if (sw0 == sw1 && (sw0 & 0x80000000U))
  293. /* Success: time is in sync. */
  294. return 0;
  295. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  296. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  297. return -ENOSYS;
  298. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  299. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  300. return -EACCES;
  301. return -EAGAIN;
  302. }
  303. EXPORT_SYMBOL(get_sync_clock);
  304. /*
  305. * Make get_sync_clock return -EAGAIN.
  306. */
  307. static void disable_sync_clock(void *dummy)
  308. {
  309. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  310. /*
  311. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  312. * fail until the sync bit is turned back on. In addition
  313. * increase the "sequence" counter to avoid the race of an
  314. * etr event and the complete recovery against get_sync_clock.
  315. */
  316. atomic_clear_mask(0x80000000, sw_ptr);
  317. atomic_inc(sw_ptr);
  318. }
  319. /*
  320. * Make get_sync_clock return 0 again.
  321. * Needs to be called from a context disabled for preemption.
  322. */
  323. static void enable_sync_clock(void)
  324. {
  325. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  326. atomic_set_mask(0x80000000, sw_ptr);
  327. }
  328. /*
  329. * Function to check if the clock is in sync.
  330. */
  331. static inline int check_sync_clock(void)
  332. {
  333. atomic_t *sw_ptr;
  334. int rc;
  335. sw_ptr = &get_cpu_var(clock_sync_word);
  336. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  337. put_cpu_var(clock_sync_word);
  338. return rc;
  339. }
  340. /* Single threaded workqueue used for etr and stp sync events */
  341. static struct workqueue_struct *time_sync_wq;
  342. static void __init time_init_wq(void)
  343. {
  344. if (time_sync_wq)
  345. return;
  346. time_sync_wq = create_singlethread_workqueue("timesync");
  347. stop_machine_create();
  348. }
  349. /*
  350. * External Time Reference (ETR) code.
  351. */
  352. static int etr_port0_online;
  353. static int etr_port1_online;
  354. static int etr_steai_available;
  355. static int __init early_parse_etr(char *p)
  356. {
  357. if (strncmp(p, "off", 3) == 0)
  358. etr_port0_online = etr_port1_online = 0;
  359. else if (strncmp(p, "port0", 5) == 0)
  360. etr_port0_online = 1;
  361. else if (strncmp(p, "port1", 5) == 0)
  362. etr_port1_online = 1;
  363. else if (strncmp(p, "on", 2) == 0)
  364. etr_port0_online = etr_port1_online = 1;
  365. return 0;
  366. }
  367. early_param("etr", early_parse_etr);
  368. enum etr_event {
  369. ETR_EVENT_PORT0_CHANGE,
  370. ETR_EVENT_PORT1_CHANGE,
  371. ETR_EVENT_PORT_ALERT,
  372. ETR_EVENT_SYNC_CHECK,
  373. ETR_EVENT_SWITCH_LOCAL,
  374. ETR_EVENT_UPDATE,
  375. };
  376. /*
  377. * Valid bit combinations of the eacr register are (x = don't care):
  378. * e0 e1 dp p0 p1 ea es sl
  379. * 0 0 x 0 0 0 0 0 initial, disabled state
  380. * 0 0 x 0 1 1 0 0 port 1 online
  381. * 0 0 x 1 0 1 0 0 port 0 online
  382. * 0 0 x 1 1 1 0 0 both ports online
  383. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  384. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  385. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  386. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  387. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  388. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  389. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  390. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  391. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  392. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  393. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  394. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  395. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  396. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  397. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  398. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  399. */
  400. static struct etr_eacr etr_eacr;
  401. static u64 etr_tolec; /* time of last eacr update */
  402. static struct etr_aib etr_port0;
  403. static int etr_port0_uptodate;
  404. static struct etr_aib etr_port1;
  405. static int etr_port1_uptodate;
  406. static unsigned long etr_events;
  407. static struct timer_list etr_timer;
  408. static void etr_timeout(unsigned long dummy);
  409. static void etr_work_fn(struct work_struct *work);
  410. static DEFINE_MUTEX(etr_work_mutex);
  411. static DECLARE_WORK(etr_work, etr_work_fn);
  412. /*
  413. * Reset ETR attachment.
  414. */
  415. static void etr_reset(void)
  416. {
  417. etr_eacr = (struct etr_eacr) {
  418. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  419. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  420. .es = 0, .sl = 0 };
  421. if (etr_setr(&etr_eacr) == 0) {
  422. etr_tolec = get_clock();
  423. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  424. if (etr_port0_online && etr_port1_online)
  425. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  426. } else if (etr_port0_online || etr_port1_online) {
  427. pr_warning("The real or virtual hardware system does "
  428. "not provide an ETR interface\n");
  429. etr_port0_online = etr_port1_online = 0;
  430. }
  431. }
  432. static int __init etr_init(void)
  433. {
  434. struct etr_aib aib;
  435. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  436. return 0;
  437. time_init_wq();
  438. /* Check if this machine has the steai instruction. */
  439. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  440. etr_steai_available = 1;
  441. setup_timer(&etr_timer, etr_timeout, 0UL);
  442. if (etr_port0_online) {
  443. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  444. queue_work(time_sync_wq, &etr_work);
  445. }
  446. if (etr_port1_online) {
  447. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  448. queue_work(time_sync_wq, &etr_work);
  449. }
  450. return 0;
  451. }
  452. arch_initcall(etr_init);
  453. /*
  454. * Two sorts of ETR machine checks. The architecture reads:
  455. * "When a machine-check niterruption occurs and if a switch-to-local or
  456. * ETR-sync-check interrupt request is pending but disabled, this pending
  457. * disabled interruption request is indicated and is cleared".
  458. * Which means that we can get etr_switch_to_local events from the machine
  459. * check handler although the interruption condition is disabled. Lovely..
  460. */
  461. /*
  462. * Switch to local machine check. This is called when the last usable
  463. * ETR port goes inactive. After switch to local the clock is not in sync.
  464. */
  465. void etr_switch_to_local(void)
  466. {
  467. if (!etr_eacr.sl)
  468. return;
  469. disable_sync_clock(NULL);
  470. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  471. queue_work(time_sync_wq, &etr_work);
  472. }
  473. /*
  474. * ETR sync check machine check. This is called when the ETR OTE and the
  475. * local clock OTE are farther apart than the ETR sync check tolerance.
  476. * After a ETR sync check the clock is not in sync. The machine check
  477. * is broadcasted to all cpus at the same time.
  478. */
  479. void etr_sync_check(void)
  480. {
  481. if (!etr_eacr.es)
  482. return;
  483. disable_sync_clock(NULL);
  484. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  485. queue_work(time_sync_wq, &etr_work);
  486. }
  487. /*
  488. * ETR timing alert. There are two causes:
  489. * 1) port state change, check the usability of the port
  490. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  491. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  492. * or ETR-data word 4 (edf4) has changed.
  493. */
  494. static void etr_timing_alert(struct etr_irq_parm *intparm)
  495. {
  496. if (intparm->pc0)
  497. /* ETR port 0 state change. */
  498. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  499. if (intparm->pc1)
  500. /* ETR port 1 state change. */
  501. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  502. if (intparm->eai)
  503. /*
  504. * ETR port alert on either port 0, 1 or both.
  505. * Both ports are not up-to-date now.
  506. */
  507. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  508. queue_work(time_sync_wq, &etr_work);
  509. }
  510. static void etr_timeout(unsigned long dummy)
  511. {
  512. set_bit(ETR_EVENT_UPDATE, &etr_events);
  513. queue_work(time_sync_wq, &etr_work);
  514. }
  515. /*
  516. * Check if the etr mode is pss.
  517. */
  518. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  519. {
  520. return eacr.es && !eacr.sl;
  521. }
  522. /*
  523. * Check if the etr mode is etr.
  524. */
  525. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  526. {
  527. return eacr.es && eacr.sl;
  528. }
  529. /*
  530. * Check if the port can be used for TOD synchronization.
  531. * For PPS mode the port has to receive OTEs. For ETR mode
  532. * the port has to receive OTEs, the ETR stepping bit has to
  533. * be zero and the validity bits for data frame 1, 2, and 3
  534. * have to be 1.
  535. */
  536. static int etr_port_valid(struct etr_aib *aib, int port)
  537. {
  538. unsigned int psc;
  539. /* Check that this port is receiving OTEs. */
  540. if (aib->tsp == 0)
  541. return 0;
  542. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  543. if (psc == etr_lpsc_pps_mode)
  544. return 1;
  545. if (psc == etr_lpsc_operational_step)
  546. return !aib->esw.y && aib->slsw.v1 &&
  547. aib->slsw.v2 && aib->slsw.v3;
  548. return 0;
  549. }
  550. /*
  551. * Check if two ports are on the same network.
  552. */
  553. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  554. {
  555. // FIXME: any other fields we have to compare?
  556. return aib1->edf1.net_id == aib2->edf1.net_id;
  557. }
  558. /*
  559. * Wrapper for etr_stei that converts physical port states
  560. * to logical port states to be consistent with the output
  561. * of stetr (see etr_psc vs. etr_lpsc).
  562. */
  563. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  564. {
  565. BUG_ON(etr_steai(aib, func) != 0);
  566. /* Convert port state to logical port state. */
  567. if (aib->esw.psc0 == 1)
  568. aib->esw.psc0 = 2;
  569. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  570. aib->esw.psc0 = 1;
  571. if (aib->esw.psc1 == 1)
  572. aib->esw.psc1 = 2;
  573. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  574. aib->esw.psc1 = 1;
  575. }
  576. /*
  577. * Check if the aib a2 is still connected to the same attachment as
  578. * aib a1, the etv values differ by one and a2 is valid.
  579. */
  580. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  581. {
  582. int state_a1, state_a2;
  583. /* Paranoia check: e0/e1 should better be the same. */
  584. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  585. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  586. return 0;
  587. /* Still connected to the same etr ? */
  588. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  589. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  590. if (state_a1 == etr_lpsc_operational_step) {
  591. if (state_a2 != etr_lpsc_operational_step ||
  592. a1->edf1.net_id != a2->edf1.net_id ||
  593. a1->edf1.etr_id != a2->edf1.etr_id ||
  594. a1->edf1.etr_pn != a2->edf1.etr_pn)
  595. return 0;
  596. } else if (state_a2 != etr_lpsc_pps_mode)
  597. return 0;
  598. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  599. if (a1->edf2.etv + 1 != a2->edf2.etv)
  600. return 0;
  601. if (!etr_port_valid(a2, p))
  602. return 0;
  603. return 1;
  604. }
  605. struct clock_sync_data {
  606. atomic_t cpus;
  607. int in_sync;
  608. unsigned long long fixup_cc;
  609. int etr_port;
  610. struct etr_aib *etr_aib;
  611. };
  612. static void clock_sync_cpu(struct clock_sync_data *sync)
  613. {
  614. atomic_dec(&sync->cpus);
  615. enable_sync_clock();
  616. /*
  617. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  618. * is called on all other cpus while the TOD clocks is stopped.
  619. * __udelay will stop the cpu on an enabled wait psw until the
  620. * TOD is running again.
  621. */
  622. while (sync->in_sync == 0) {
  623. __udelay(1);
  624. /*
  625. * A different cpu changes *in_sync. Therefore use
  626. * barrier() to force memory access.
  627. */
  628. barrier();
  629. }
  630. if (sync->in_sync != 1)
  631. /* Didn't work. Clear per-cpu in sync bit again. */
  632. disable_sync_clock(NULL);
  633. /*
  634. * This round of TOD syncing is done. Set the clock comparator
  635. * to the next tick and let the processor continue.
  636. */
  637. fixup_clock_comparator(sync->fixup_cc);
  638. }
  639. /*
  640. * Sync the TOD clock using the port refered to by aibp. This port
  641. * has to be enabled and the other port has to be disabled. The
  642. * last eacr update has to be more than 1.6 seconds in the past.
  643. */
  644. static int etr_sync_clock(void *data)
  645. {
  646. static int first;
  647. unsigned long long clock, old_clock, delay, delta;
  648. struct clock_sync_data *etr_sync;
  649. struct etr_aib *sync_port, *aib;
  650. int port;
  651. int rc;
  652. etr_sync = data;
  653. if (xchg(&first, 1) == 1) {
  654. /* Slave */
  655. clock_sync_cpu(etr_sync);
  656. return 0;
  657. }
  658. /* Wait until all other cpus entered the sync function. */
  659. while (atomic_read(&etr_sync->cpus) != 0)
  660. cpu_relax();
  661. port = etr_sync->etr_port;
  662. aib = etr_sync->etr_aib;
  663. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  664. enable_sync_clock();
  665. /* Set clock to next OTE. */
  666. __ctl_set_bit(14, 21);
  667. __ctl_set_bit(0, 29);
  668. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  669. old_clock = get_clock();
  670. if (set_clock(clock) == 0) {
  671. __udelay(1); /* Wait for the clock to start. */
  672. __ctl_clear_bit(0, 29);
  673. __ctl_clear_bit(14, 21);
  674. etr_stetr(aib);
  675. /* Adjust Linux timing variables. */
  676. delay = (unsigned long long)
  677. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  678. delta = adjust_time(old_clock, clock, delay);
  679. etr_sync->fixup_cc = delta;
  680. fixup_clock_comparator(delta);
  681. /* Verify that the clock is properly set. */
  682. if (!etr_aib_follows(sync_port, aib, port)) {
  683. /* Didn't work. */
  684. disable_sync_clock(NULL);
  685. etr_sync->in_sync = -EAGAIN;
  686. rc = -EAGAIN;
  687. } else {
  688. etr_sync->in_sync = 1;
  689. rc = 0;
  690. }
  691. } else {
  692. /* Could not set the clock ?!? */
  693. __ctl_clear_bit(0, 29);
  694. __ctl_clear_bit(14, 21);
  695. disable_sync_clock(NULL);
  696. etr_sync->in_sync = -EAGAIN;
  697. rc = -EAGAIN;
  698. }
  699. xchg(&first, 0);
  700. return rc;
  701. }
  702. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  703. {
  704. struct clock_sync_data etr_sync;
  705. struct etr_aib *sync_port;
  706. int follows;
  707. int rc;
  708. /* Check if the current aib is adjacent to the sync port aib. */
  709. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  710. follows = etr_aib_follows(sync_port, aib, port);
  711. memcpy(sync_port, aib, sizeof(*aib));
  712. if (!follows)
  713. return -EAGAIN;
  714. memset(&etr_sync, 0, sizeof(etr_sync));
  715. etr_sync.etr_aib = aib;
  716. etr_sync.etr_port = port;
  717. get_online_cpus();
  718. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  719. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  720. put_online_cpus();
  721. return rc;
  722. }
  723. /*
  724. * Handle the immediate effects of the different events.
  725. * The port change event is used for online/offline changes.
  726. */
  727. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  728. {
  729. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  730. eacr.es = 0;
  731. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  732. eacr.es = eacr.sl = 0;
  733. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  734. etr_port0_uptodate = etr_port1_uptodate = 0;
  735. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  736. if (eacr.e0)
  737. /*
  738. * Port change of an enabled port. We have to
  739. * assume that this can have caused an stepping
  740. * port switch.
  741. */
  742. etr_tolec = get_clock();
  743. eacr.p0 = etr_port0_online;
  744. if (!eacr.p0)
  745. eacr.e0 = 0;
  746. etr_port0_uptodate = 0;
  747. }
  748. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  749. if (eacr.e1)
  750. /*
  751. * Port change of an enabled port. We have to
  752. * assume that this can have caused an stepping
  753. * port switch.
  754. */
  755. etr_tolec = get_clock();
  756. eacr.p1 = etr_port1_online;
  757. if (!eacr.p1)
  758. eacr.e1 = 0;
  759. etr_port1_uptodate = 0;
  760. }
  761. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  762. return eacr;
  763. }
  764. /*
  765. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  766. * one of the ports needs an update.
  767. */
  768. static void etr_set_tolec_timeout(unsigned long long now)
  769. {
  770. unsigned long micros;
  771. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  772. (!etr_eacr.p1 || etr_port1_uptodate))
  773. return;
  774. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  775. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  776. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  777. }
  778. /*
  779. * Set up a time that expires after 1/2 second.
  780. */
  781. static void etr_set_sync_timeout(void)
  782. {
  783. mod_timer(&etr_timer, jiffies + HZ/2);
  784. }
  785. /*
  786. * Update the aib information for one or both ports.
  787. */
  788. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  789. struct etr_eacr eacr)
  790. {
  791. /* With both ports disabled the aib information is useless. */
  792. if (!eacr.e0 && !eacr.e1)
  793. return eacr;
  794. /* Update port0 or port1 with aib stored in etr_work_fn. */
  795. if (aib->esw.q == 0) {
  796. /* Information for port 0 stored. */
  797. if (eacr.p0 && !etr_port0_uptodate) {
  798. etr_port0 = *aib;
  799. if (etr_port0_online)
  800. etr_port0_uptodate = 1;
  801. }
  802. } else {
  803. /* Information for port 1 stored. */
  804. if (eacr.p1 && !etr_port1_uptodate) {
  805. etr_port1 = *aib;
  806. if (etr_port0_online)
  807. etr_port1_uptodate = 1;
  808. }
  809. }
  810. /*
  811. * Do not try to get the alternate port aib if the clock
  812. * is not in sync yet.
  813. */
  814. if (!check_sync_clock())
  815. return eacr;
  816. /*
  817. * If steai is available we can get the information about
  818. * the other port immediately. If only stetr is available the
  819. * data-port bit toggle has to be used.
  820. */
  821. if (etr_steai_available) {
  822. if (eacr.p0 && !etr_port0_uptodate) {
  823. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  824. etr_port0_uptodate = 1;
  825. }
  826. if (eacr.p1 && !etr_port1_uptodate) {
  827. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  828. etr_port1_uptodate = 1;
  829. }
  830. } else {
  831. /*
  832. * One port was updated above, if the other
  833. * port is not uptodate toggle dp bit.
  834. */
  835. if ((eacr.p0 && !etr_port0_uptodate) ||
  836. (eacr.p1 && !etr_port1_uptodate))
  837. eacr.dp ^= 1;
  838. else
  839. eacr.dp = 0;
  840. }
  841. return eacr;
  842. }
  843. /*
  844. * Write new etr control register if it differs from the current one.
  845. * Return 1 if etr_tolec has been updated as well.
  846. */
  847. static void etr_update_eacr(struct etr_eacr eacr)
  848. {
  849. int dp_changed;
  850. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  851. /* No change, return. */
  852. return;
  853. /*
  854. * The disable of an active port of the change of the data port
  855. * bit can/will cause a change in the data port.
  856. */
  857. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  858. (etr_eacr.dp ^ eacr.dp) != 0;
  859. etr_eacr = eacr;
  860. etr_setr(&etr_eacr);
  861. if (dp_changed)
  862. etr_tolec = get_clock();
  863. }
  864. /*
  865. * ETR work. In this function you'll find the main logic. In
  866. * particular this is the only function that calls etr_update_eacr(),
  867. * it "controls" the etr control register.
  868. */
  869. static void etr_work_fn(struct work_struct *work)
  870. {
  871. unsigned long long now;
  872. struct etr_eacr eacr;
  873. struct etr_aib aib;
  874. int sync_port;
  875. /* prevent multiple execution. */
  876. mutex_lock(&etr_work_mutex);
  877. /* Create working copy of etr_eacr. */
  878. eacr = etr_eacr;
  879. /* Check for the different events and their immediate effects. */
  880. eacr = etr_handle_events(eacr);
  881. /* Check if ETR is supposed to be active. */
  882. eacr.ea = eacr.p0 || eacr.p1;
  883. if (!eacr.ea) {
  884. /* Both ports offline. Reset everything. */
  885. eacr.dp = eacr.es = eacr.sl = 0;
  886. on_each_cpu(disable_sync_clock, NULL, 1);
  887. del_timer_sync(&etr_timer);
  888. etr_update_eacr(eacr);
  889. goto out_unlock;
  890. }
  891. /* Store aib to get the current ETR status word. */
  892. BUG_ON(etr_stetr(&aib) != 0);
  893. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  894. now = get_clock();
  895. /*
  896. * Update the port information if the last stepping port change
  897. * or data port change is older than 1.6 seconds.
  898. */
  899. if (now >= etr_tolec + (1600000 << 12))
  900. eacr = etr_handle_update(&aib, eacr);
  901. /*
  902. * Select ports to enable. The prefered synchronization mode is PPS.
  903. * If a port can be enabled depends on a number of things:
  904. * 1) The port needs to be online and uptodate. A port is not
  905. * disabled just because it is not uptodate, but it is only
  906. * enabled if it is uptodate.
  907. * 2) The port needs to have the same mode (pps / etr).
  908. * 3) The port needs to be usable -> etr_port_valid() == 1
  909. * 4) To enable the second port the clock needs to be in sync.
  910. * 5) If both ports are useable and are ETR ports, the network id
  911. * has to be the same.
  912. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  913. */
  914. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  915. eacr.sl = 0;
  916. eacr.e0 = 1;
  917. if (!etr_mode_is_pps(etr_eacr))
  918. eacr.es = 0;
  919. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  920. eacr.e1 = 0;
  921. // FIXME: uptodate checks ?
  922. else if (etr_port0_uptodate && etr_port1_uptodate)
  923. eacr.e1 = 1;
  924. sync_port = (etr_port0_uptodate &&
  925. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  926. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  927. eacr.sl = 0;
  928. eacr.e0 = 0;
  929. eacr.e1 = 1;
  930. if (!etr_mode_is_pps(etr_eacr))
  931. eacr.es = 0;
  932. sync_port = (etr_port1_uptodate &&
  933. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  934. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  935. eacr.sl = 1;
  936. eacr.e0 = 1;
  937. if (!etr_mode_is_etr(etr_eacr))
  938. eacr.es = 0;
  939. if (!eacr.es || !eacr.p1 ||
  940. aib.esw.psc1 != etr_lpsc_operational_alt)
  941. eacr.e1 = 0;
  942. else if (etr_port0_uptodate && etr_port1_uptodate &&
  943. etr_compare_network(&etr_port0, &etr_port1))
  944. eacr.e1 = 1;
  945. sync_port = (etr_port0_uptodate &&
  946. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  947. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  948. eacr.sl = 1;
  949. eacr.e0 = 0;
  950. eacr.e1 = 1;
  951. if (!etr_mode_is_etr(etr_eacr))
  952. eacr.es = 0;
  953. sync_port = (etr_port1_uptodate &&
  954. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  955. } else {
  956. /* Both ports not usable. */
  957. eacr.es = eacr.sl = 0;
  958. sync_port = -1;
  959. }
  960. /*
  961. * If the clock is in sync just update the eacr and return.
  962. * If there is no valid sync port wait for a port update.
  963. */
  964. if (check_sync_clock() || sync_port < 0) {
  965. etr_update_eacr(eacr);
  966. etr_set_tolec_timeout(now);
  967. goto out_unlock;
  968. }
  969. /*
  970. * Prepare control register for clock syncing
  971. * (reset data port bit, set sync check control.
  972. */
  973. eacr.dp = 0;
  974. eacr.es = 1;
  975. /*
  976. * Update eacr and try to synchronize the clock. If the update
  977. * of eacr caused a stepping port switch (or if we have to
  978. * assume that a stepping port switch has occured) or the
  979. * clock syncing failed, reset the sync check control bit
  980. * and set up a timer to try again after 0.5 seconds
  981. */
  982. etr_update_eacr(eacr);
  983. if (now < etr_tolec + (1600000 << 12) ||
  984. etr_sync_clock_stop(&aib, sync_port) != 0) {
  985. /* Sync failed. Try again in 1/2 second. */
  986. eacr.es = 0;
  987. etr_update_eacr(eacr);
  988. etr_set_sync_timeout();
  989. } else
  990. etr_set_tolec_timeout(now);
  991. out_unlock:
  992. mutex_unlock(&etr_work_mutex);
  993. }
  994. /*
  995. * Sysfs interface functions
  996. */
  997. static struct sysdev_class etr_sysclass = {
  998. .name = "etr",
  999. };
  1000. static struct sys_device etr_port0_dev = {
  1001. .id = 0,
  1002. .cls = &etr_sysclass,
  1003. };
  1004. static struct sys_device etr_port1_dev = {
  1005. .id = 1,
  1006. .cls = &etr_sysclass,
  1007. };
  1008. /*
  1009. * ETR class attributes
  1010. */
  1011. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1012. {
  1013. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1014. }
  1015. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1016. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1017. {
  1018. char *mode_str;
  1019. if (etr_mode_is_pps(etr_eacr))
  1020. mode_str = "pps";
  1021. else if (etr_mode_is_etr(etr_eacr))
  1022. mode_str = "etr";
  1023. else
  1024. mode_str = "local";
  1025. return sprintf(buf, "%s\n", mode_str);
  1026. }
  1027. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1028. /*
  1029. * ETR port attributes
  1030. */
  1031. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1032. {
  1033. if (dev == &etr_port0_dev)
  1034. return etr_port0_online ? &etr_port0 : NULL;
  1035. else
  1036. return etr_port1_online ? &etr_port1 : NULL;
  1037. }
  1038. static ssize_t etr_online_show(struct sys_device *dev,
  1039. struct sysdev_attribute *attr,
  1040. char *buf)
  1041. {
  1042. unsigned int online;
  1043. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1044. return sprintf(buf, "%i\n", online);
  1045. }
  1046. static ssize_t etr_online_store(struct sys_device *dev,
  1047. struct sysdev_attribute *attr,
  1048. const char *buf, size_t count)
  1049. {
  1050. unsigned int value;
  1051. value = simple_strtoul(buf, NULL, 0);
  1052. if (value != 0 && value != 1)
  1053. return -EINVAL;
  1054. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1055. return -EOPNOTSUPP;
  1056. mutex_lock(&clock_sync_mutex);
  1057. if (dev == &etr_port0_dev) {
  1058. if (etr_port0_online == value)
  1059. goto out; /* Nothing to do. */
  1060. etr_port0_online = value;
  1061. if (etr_port0_online && etr_port1_online)
  1062. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1063. else
  1064. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1065. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1066. queue_work(time_sync_wq, &etr_work);
  1067. } else {
  1068. if (etr_port1_online == value)
  1069. goto out; /* Nothing to do. */
  1070. etr_port1_online = value;
  1071. if (etr_port0_online && etr_port1_online)
  1072. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1073. else
  1074. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1075. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1076. queue_work(time_sync_wq, &etr_work);
  1077. }
  1078. out:
  1079. mutex_unlock(&clock_sync_mutex);
  1080. return count;
  1081. }
  1082. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1083. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1084. struct sysdev_attribute *attr,
  1085. char *buf)
  1086. {
  1087. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1088. etr_eacr.e0 : etr_eacr.e1);
  1089. }
  1090. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1091. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1092. struct sysdev_attribute *attr, char *buf)
  1093. {
  1094. if (!etr_port0_online && !etr_port1_online)
  1095. /* Status word is not uptodate if both ports are offline. */
  1096. return -ENODATA;
  1097. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1098. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1099. }
  1100. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1101. static ssize_t etr_untuned_show(struct sys_device *dev,
  1102. struct sysdev_attribute *attr, char *buf)
  1103. {
  1104. struct etr_aib *aib = etr_aib_from_dev(dev);
  1105. if (!aib || !aib->slsw.v1)
  1106. return -ENODATA;
  1107. return sprintf(buf, "%i\n", aib->edf1.u);
  1108. }
  1109. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1110. static ssize_t etr_network_id_show(struct sys_device *dev,
  1111. struct sysdev_attribute *attr, char *buf)
  1112. {
  1113. struct etr_aib *aib = etr_aib_from_dev(dev);
  1114. if (!aib || !aib->slsw.v1)
  1115. return -ENODATA;
  1116. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1117. }
  1118. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1119. static ssize_t etr_id_show(struct sys_device *dev,
  1120. struct sysdev_attribute *attr, char *buf)
  1121. {
  1122. struct etr_aib *aib = etr_aib_from_dev(dev);
  1123. if (!aib || !aib->slsw.v1)
  1124. return -ENODATA;
  1125. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1126. }
  1127. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1128. static ssize_t etr_port_number_show(struct sys_device *dev,
  1129. struct sysdev_attribute *attr, char *buf)
  1130. {
  1131. struct etr_aib *aib = etr_aib_from_dev(dev);
  1132. if (!aib || !aib->slsw.v1)
  1133. return -ENODATA;
  1134. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1135. }
  1136. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1137. static ssize_t etr_coupled_show(struct sys_device *dev,
  1138. struct sysdev_attribute *attr, char *buf)
  1139. {
  1140. struct etr_aib *aib = etr_aib_from_dev(dev);
  1141. if (!aib || !aib->slsw.v3)
  1142. return -ENODATA;
  1143. return sprintf(buf, "%i\n", aib->edf3.c);
  1144. }
  1145. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1146. static ssize_t etr_local_time_show(struct sys_device *dev,
  1147. struct sysdev_attribute *attr, char *buf)
  1148. {
  1149. struct etr_aib *aib = etr_aib_from_dev(dev);
  1150. if (!aib || !aib->slsw.v3)
  1151. return -ENODATA;
  1152. return sprintf(buf, "%i\n", aib->edf3.blto);
  1153. }
  1154. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1155. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1156. struct sysdev_attribute *attr, char *buf)
  1157. {
  1158. struct etr_aib *aib = etr_aib_from_dev(dev);
  1159. if (!aib || !aib->slsw.v3)
  1160. return -ENODATA;
  1161. return sprintf(buf, "%i\n", aib->edf3.buo);
  1162. }
  1163. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1164. static struct sysdev_attribute *etr_port_attributes[] = {
  1165. &attr_online,
  1166. &attr_stepping_control,
  1167. &attr_state_code,
  1168. &attr_untuned,
  1169. &attr_network,
  1170. &attr_id,
  1171. &attr_port,
  1172. &attr_coupled,
  1173. &attr_local_time,
  1174. &attr_utc_offset,
  1175. NULL
  1176. };
  1177. static int __init etr_register_port(struct sys_device *dev)
  1178. {
  1179. struct sysdev_attribute **attr;
  1180. int rc;
  1181. rc = sysdev_register(dev);
  1182. if (rc)
  1183. goto out;
  1184. for (attr = etr_port_attributes; *attr; attr++) {
  1185. rc = sysdev_create_file(dev, *attr);
  1186. if (rc)
  1187. goto out_unreg;
  1188. }
  1189. return 0;
  1190. out_unreg:
  1191. for (; attr >= etr_port_attributes; attr--)
  1192. sysdev_remove_file(dev, *attr);
  1193. sysdev_unregister(dev);
  1194. out:
  1195. return rc;
  1196. }
  1197. static void __init etr_unregister_port(struct sys_device *dev)
  1198. {
  1199. struct sysdev_attribute **attr;
  1200. for (attr = etr_port_attributes; *attr; attr++)
  1201. sysdev_remove_file(dev, *attr);
  1202. sysdev_unregister(dev);
  1203. }
  1204. static int __init etr_init_sysfs(void)
  1205. {
  1206. int rc;
  1207. rc = sysdev_class_register(&etr_sysclass);
  1208. if (rc)
  1209. goto out;
  1210. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1211. if (rc)
  1212. goto out_unreg_class;
  1213. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1214. if (rc)
  1215. goto out_remove_stepping_port;
  1216. rc = etr_register_port(&etr_port0_dev);
  1217. if (rc)
  1218. goto out_remove_stepping_mode;
  1219. rc = etr_register_port(&etr_port1_dev);
  1220. if (rc)
  1221. goto out_remove_port0;
  1222. return 0;
  1223. out_remove_port0:
  1224. etr_unregister_port(&etr_port0_dev);
  1225. out_remove_stepping_mode:
  1226. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1227. out_remove_stepping_port:
  1228. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1229. out_unreg_class:
  1230. sysdev_class_unregister(&etr_sysclass);
  1231. out:
  1232. return rc;
  1233. }
  1234. device_initcall(etr_init_sysfs);
  1235. /*
  1236. * Server Time Protocol (STP) code.
  1237. */
  1238. static int stp_online;
  1239. static struct stp_sstpi stp_info;
  1240. static void *stp_page;
  1241. static void stp_work_fn(struct work_struct *work);
  1242. static DEFINE_MUTEX(stp_work_mutex);
  1243. static DECLARE_WORK(stp_work, stp_work_fn);
  1244. static struct timer_list stp_timer;
  1245. static int __init early_parse_stp(char *p)
  1246. {
  1247. if (strncmp(p, "off", 3) == 0)
  1248. stp_online = 0;
  1249. else if (strncmp(p, "on", 2) == 0)
  1250. stp_online = 1;
  1251. return 0;
  1252. }
  1253. early_param("stp", early_parse_stp);
  1254. /*
  1255. * Reset STP attachment.
  1256. */
  1257. static void __init stp_reset(void)
  1258. {
  1259. int rc;
  1260. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1261. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1262. if (rc == 0)
  1263. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1264. else if (stp_online) {
  1265. pr_warning("The real or virtual hardware system does "
  1266. "not provide an STP interface\n");
  1267. free_page((unsigned long) stp_page);
  1268. stp_page = NULL;
  1269. stp_online = 0;
  1270. }
  1271. }
  1272. static void stp_timeout(unsigned long dummy)
  1273. {
  1274. queue_work(time_sync_wq, &stp_work);
  1275. }
  1276. static int __init stp_init(void)
  1277. {
  1278. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1279. return 0;
  1280. setup_timer(&stp_timer, stp_timeout, 0UL);
  1281. time_init_wq();
  1282. if (!stp_online)
  1283. return 0;
  1284. queue_work(time_sync_wq, &stp_work);
  1285. return 0;
  1286. }
  1287. arch_initcall(stp_init);
  1288. /*
  1289. * STP timing alert. There are three causes:
  1290. * 1) timing status change
  1291. * 2) link availability change
  1292. * 3) time control parameter change
  1293. * In all three cases we are only interested in the clock source state.
  1294. * If a STP clock source is now available use it.
  1295. */
  1296. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1297. {
  1298. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1299. queue_work(time_sync_wq, &stp_work);
  1300. }
  1301. /*
  1302. * STP sync check machine check. This is called when the timing state
  1303. * changes from the synchronized state to the unsynchronized state.
  1304. * After a STP sync check the clock is not in sync. The machine check
  1305. * is broadcasted to all cpus at the same time.
  1306. */
  1307. void stp_sync_check(void)
  1308. {
  1309. disable_sync_clock(NULL);
  1310. queue_work(time_sync_wq, &stp_work);
  1311. }
  1312. /*
  1313. * STP island condition machine check. This is called when an attached
  1314. * server attempts to communicate over an STP link and the servers
  1315. * have matching CTN ids and have a valid stratum-1 configuration
  1316. * but the configurations do not match.
  1317. */
  1318. void stp_island_check(void)
  1319. {
  1320. disable_sync_clock(NULL);
  1321. queue_work(time_sync_wq, &stp_work);
  1322. }
  1323. static int stp_sync_clock(void *data)
  1324. {
  1325. static int first;
  1326. unsigned long long old_clock, delta;
  1327. struct clock_sync_data *stp_sync;
  1328. int rc;
  1329. stp_sync = data;
  1330. if (xchg(&first, 1) == 1) {
  1331. /* Slave */
  1332. clock_sync_cpu(stp_sync);
  1333. return 0;
  1334. }
  1335. /* Wait until all other cpus entered the sync function. */
  1336. while (atomic_read(&stp_sync->cpus) != 0)
  1337. cpu_relax();
  1338. enable_sync_clock();
  1339. rc = 0;
  1340. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1341. stp_info.todoff[2] || stp_info.todoff[3] ||
  1342. stp_info.tmd != 2) {
  1343. old_clock = get_clock();
  1344. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1345. if (rc == 0) {
  1346. delta = adjust_time(old_clock, get_clock(), 0);
  1347. fixup_clock_comparator(delta);
  1348. rc = chsc_sstpi(stp_page, &stp_info,
  1349. sizeof(struct stp_sstpi));
  1350. if (rc == 0 && stp_info.tmd != 2)
  1351. rc = -EAGAIN;
  1352. }
  1353. }
  1354. if (rc) {
  1355. disable_sync_clock(NULL);
  1356. stp_sync->in_sync = -EAGAIN;
  1357. } else
  1358. stp_sync->in_sync = 1;
  1359. xchg(&first, 0);
  1360. return 0;
  1361. }
  1362. /*
  1363. * STP work. Check for the STP state and take over the clock
  1364. * synchronization if the STP clock source is usable.
  1365. */
  1366. static void stp_work_fn(struct work_struct *work)
  1367. {
  1368. struct clock_sync_data stp_sync;
  1369. int rc;
  1370. /* prevent multiple execution. */
  1371. mutex_lock(&stp_work_mutex);
  1372. if (!stp_online) {
  1373. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1374. del_timer_sync(&stp_timer);
  1375. goto out_unlock;
  1376. }
  1377. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1378. if (rc)
  1379. goto out_unlock;
  1380. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1381. if (rc || stp_info.c == 0)
  1382. goto out_unlock;
  1383. /* Skip synchronization if the clock is already in sync. */
  1384. if (check_sync_clock())
  1385. goto out_unlock;
  1386. memset(&stp_sync, 0, sizeof(stp_sync));
  1387. get_online_cpus();
  1388. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1389. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1390. put_online_cpus();
  1391. if (!check_sync_clock())
  1392. /*
  1393. * There is a usable clock but the synchonization failed.
  1394. * Retry after a second.
  1395. */
  1396. mod_timer(&stp_timer, jiffies + HZ);
  1397. out_unlock:
  1398. mutex_unlock(&stp_work_mutex);
  1399. }
  1400. /*
  1401. * STP class sysfs interface functions
  1402. */
  1403. static struct sysdev_class stp_sysclass = {
  1404. .name = "stp",
  1405. };
  1406. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1407. {
  1408. if (!stp_online)
  1409. return -ENODATA;
  1410. return sprintf(buf, "%016llx\n",
  1411. *(unsigned long long *) stp_info.ctnid);
  1412. }
  1413. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1414. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1415. {
  1416. if (!stp_online)
  1417. return -ENODATA;
  1418. return sprintf(buf, "%i\n", stp_info.ctn);
  1419. }
  1420. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1421. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1422. {
  1423. if (!stp_online || !(stp_info.vbits & 0x2000))
  1424. return -ENODATA;
  1425. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1426. }
  1427. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1428. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1429. {
  1430. if (!stp_online || !(stp_info.vbits & 0x8000))
  1431. return -ENODATA;
  1432. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1433. }
  1434. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1435. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1436. {
  1437. if (!stp_online)
  1438. return -ENODATA;
  1439. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1440. }
  1441. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1442. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1443. {
  1444. if (!stp_online || !(stp_info.vbits & 0x0800))
  1445. return -ENODATA;
  1446. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1447. }
  1448. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1449. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1450. {
  1451. if (!stp_online || !(stp_info.vbits & 0x4000))
  1452. return -ENODATA;
  1453. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1454. }
  1455. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1456. stp_time_zone_offset_show, NULL);
  1457. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1458. {
  1459. if (!stp_online)
  1460. return -ENODATA;
  1461. return sprintf(buf, "%i\n", stp_info.tmd);
  1462. }
  1463. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1464. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1465. {
  1466. if (!stp_online)
  1467. return -ENODATA;
  1468. return sprintf(buf, "%i\n", stp_info.tst);
  1469. }
  1470. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1471. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1472. {
  1473. return sprintf(buf, "%i\n", stp_online);
  1474. }
  1475. static ssize_t stp_online_store(struct sysdev_class *class,
  1476. const char *buf, size_t count)
  1477. {
  1478. unsigned int value;
  1479. value = simple_strtoul(buf, NULL, 0);
  1480. if (value != 0 && value != 1)
  1481. return -EINVAL;
  1482. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1483. return -EOPNOTSUPP;
  1484. mutex_lock(&clock_sync_mutex);
  1485. stp_online = value;
  1486. if (stp_online)
  1487. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1488. else
  1489. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1490. queue_work(time_sync_wq, &stp_work);
  1491. mutex_unlock(&clock_sync_mutex);
  1492. return count;
  1493. }
  1494. /*
  1495. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1496. * stp/online but attr_online already exists in this file ..
  1497. */
  1498. static struct sysdev_class_attribute attr_stp_online = {
  1499. .attr = { .name = "online", .mode = 0600 },
  1500. .show = stp_online_show,
  1501. .store = stp_online_store,
  1502. };
  1503. static struct sysdev_class_attribute *stp_attributes[] = {
  1504. &attr_ctn_id,
  1505. &attr_ctn_type,
  1506. &attr_dst_offset,
  1507. &attr_leap_seconds,
  1508. &attr_stp_online,
  1509. &attr_stratum,
  1510. &attr_time_offset,
  1511. &attr_time_zone_offset,
  1512. &attr_timing_mode,
  1513. &attr_timing_state,
  1514. NULL
  1515. };
  1516. static int __init stp_init_sysfs(void)
  1517. {
  1518. struct sysdev_class_attribute **attr;
  1519. int rc;
  1520. rc = sysdev_class_register(&stp_sysclass);
  1521. if (rc)
  1522. goto out;
  1523. for (attr = stp_attributes; *attr; attr++) {
  1524. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1525. if (rc)
  1526. goto out_unreg;
  1527. }
  1528. return 0;
  1529. out_unreg:
  1530. for (; attr >= stp_attributes; attr--)
  1531. sysdev_class_remove_file(&stp_sysclass, *attr);
  1532. sysdev_class_unregister(&stp_sysclass);
  1533. out:
  1534. return rc;
  1535. }
  1536. device_initcall(stp_init_sysfs);