suspend.c 8.8 KB

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  1. /*
  2. * MPC83xx suspend support
  3. *
  4. * Author: Scott Wood <scottwood@freescale.com>
  5. *
  6. * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/pm.h>
  14. #include <linux/types.h>
  15. #include <linux/ioport.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/wait.h>
  18. #include <linux/kthread.h>
  19. #include <linux/freezer.h>
  20. #include <linux/suspend.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/of_platform.h>
  23. #include <asm/reg.h>
  24. #include <asm/io.h>
  25. #include <asm/time.h>
  26. #include <asm/mpc6xx.h>
  27. #include <sysdev/fsl_soc.h>
  28. #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
  29. #define PMCCR1_NEXT_STATE_SHIFT 2
  30. #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
  31. #define IMMR_SYSCR_OFFSET 0x100
  32. #define IMMR_RCW_OFFSET 0x900
  33. #define RCW_PCI_HOST 0x80000000
  34. void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
  35. struct mpc83xx_pmc {
  36. u32 config;
  37. #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
  38. #define PMCCR_SLPEN 1 /* System low power enable */
  39. u32 event;
  40. u32 mask;
  41. /* All but PMCI are deep-sleep only */
  42. #define PMCER_GPIO 0x100
  43. #define PMCER_PCI 0x080
  44. #define PMCER_USB 0x040
  45. #define PMCER_ETSEC1 0x020
  46. #define PMCER_ETSEC2 0x010
  47. #define PMCER_TIMER 0x008
  48. #define PMCER_INT1 0x004
  49. #define PMCER_INT2 0x002
  50. #define PMCER_PMCI 0x001
  51. #define PMCER_ALL 0x1FF
  52. /* deep-sleep only */
  53. u32 config1;
  54. #define PMCCR1_USE_STATE 0x80000000
  55. #define PMCCR1_PME_EN 0x00000080
  56. #define PMCCR1_ASSERT_PME 0x00000040
  57. #define PMCCR1_POWER_OFF 0x00000020
  58. /* deep-sleep only */
  59. u32 config2;
  60. };
  61. struct mpc83xx_rcw {
  62. u32 rcwlr;
  63. u32 rcwhr;
  64. };
  65. struct mpc83xx_clock {
  66. u32 spmr;
  67. u32 occr;
  68. u32 sccr;
  69. };
  70. struct mpc83xx_syscr {
  71. __be32 sgprl;
  72. __be32 sgprh;
  73. __be32 spridr;
  74. __be32 :32;
  75. __be32 spcr;
  76. __be32 sicrl;
  77. __be32 sicrh;
  78. };
  79. struct mpc83xx_saved {
  80. u32 sicrl;
  81. u32 sicrh;
  82. u32 sccr;
  83. };
  84. struct pmc_type {
  85. int has_deep_sleep;
  86. };
  87. static struct of_device *pmc_dev;
  88. static int has_deep_sleep, deep_sleeping;
  89. static int pmc_irq;
  90. static struct mpc83xx_pmc __iomem *pmc_regs;
  91. static struct mpc83xx_clock __iomem *clock_regs;
  92. static struct mpc83xx_syscr __iomem *syscr_regs;
  93. static struct mpc83xx_saved saved_regs;
  94. static int is_pci_agent, wake_from_pci;
  95. static phys_addr_t immrbase;
  96. static int pci_pm_state;
  97. static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
  98. int fsl_deep_sleep(void)
  99. {
  100. return deep_sleeping;
  101. }
  102. EXPORT_SYMBOL(fsl_deep_sleep);
  103. static int mpc83xx_change_state(void)
  104. {
  105. u32 curr_state;
  106. u32 reg_cfg1 = in_be32(&pmc_regs->config1);
  107. if (is_pci_agent) {
  108. pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
  109. PMCCR1_NEXT_STATE_SHIFT;
  110. curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
  111. if (curr_state != pci_pm_state) {
  112. reg_cfg1 &= ~PMCCR1_CURR_STATE;
  113. reg_cfg1 |= pci_pm_state;
  114. out_be32(&pmc_regs->config1, reg_cfg1);
  115. wake_up(&agent_wq);
  116. return 1;
  117. }
  118. }
  119. return 0;
  120. }
  121. static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
  122. {
  123. u32 event = in_be32(&pmc_regs->event);
  124. int ret = IRQ_NONE;
  125. if (mpc83xx_change_state())
  126. ret = IRQ_HANDLED;
  127. if (event) {
  128. out_be32(&pmc_regs->event, event);
  129. ret = IRQ_HANDLED;
  130. }
  131. return ret;
  132. }
  133. static void mpc83xx_suspend_restore_regs(void)
  134. {
  135. out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
  136. out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
  137. out_be32(&clock_regs->sccr, saved_regs.sccr);
  138. }
  139. static void mpc83xx_suspend_save_regs(void)
  140. {
  141. saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
  142. saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
  143. saved_regs.sccr = in_be32(&clock_regs->sccr);
  144. }
  145. static int mpc83xx_suspend_enter(suspend_state_t state)
  146. {
  147. int ret = -EAGAIN;
  148. /* Don't go to sleep if there's a race where pci_pm_state changes
  149. * between the agent thread checking it and the PM code disabling
  150. * interrupts.
  151. */
  152. if (wake_from_pci) {
  153. if (pci_pm_state != (deep_sleeping ? 3 : 2))
  154. goto out;
  155. out_be32(&pmc_regs->config1,
  156. in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
  157. }
  158. /* Put the system into low-power mode and the RAM
  159. * into self-refresh mode once the core goes to
  160. * sleep.
  161. */
  162. out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
  163. /* If it has deep sleep (i.e. it's an 831x or compatible),
  164. * disable power to the core upon entering sleep mode. This will
  165. * require going through the boot firmware upon a wakeup event.
  166. */
  167. if (deep_sleeping) {
  168. mpc83xx_suspend_save_regs();
  169. out_be32(&pmc_regs->mask, PMCER_ALL);
  170. out_be32(&pmc_regs->config1,
  171. in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
  172. enable_kernel_fp();
  173. mpc83xx_enter_deep_sleep(immrbase);
  174. out_be32(&pmc_regs->config1,
  175. in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
  176. out_be32(&pmc_regs->mask, PMCER_PMCI);
  177. mpc83xx_suspend_restore_regs();
  178. } else {
  179. out_be32(&pmc_regs->mask, PMCER_PMCI);
  180. mpc6xx_enter_standby();
  181. }
  182. ret = 0;
  183. out:
  184. out_be32(&pmc_regs->config1,
  185. in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
  186. return ret;
  187. }
  188. static void mpc83xx_suspend_end(void)
  189. {
  190. deep_sleeping = 0;
  191. }
  192. static int mpc83xx_suspend_valid(suspend_state_t state)
  193. {
  194. return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
  195. }
  196. static int mpc83xx_suspend_begin(suspend_state_t state)
  197. {
  198. switch (state) {
  199. case PM_SUSPEND_STANDBY:
  200. deep_sleeping = 0;
  201. return 0;
  202. case PM_SUSPEND_MEM:
  203. if (has_deep_sleep)
  204. deep_sleeping = 1;
  205. return 0;
  206. default:
  207. return -EINVAL;
  208. }
  209. }
  210. static int agent_thread_fn(void *data)
  211. {
  212. while (1) {
  213. wait_event_interruptible(agent_wq, pci_pm_state >= 2);
  214. try_to_freeze();
  215. if (signal_pending(current) || pci_pm_state < 2)
  216. continue;
  217. /* With a preemptible kernel (or SMP), this could race with
  218. * a userspace-driven suspend request. It's probably best
  219. * to avoid mixing the two with such a configuration (or
  220. * else fix it by adding a mutex to state_store that we can
  221. * synchronize with).
  222. */
  223. wake_from_pci = 1;
  224. pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
  225. PM_SUSPEND_STANDBY);
  226. wake_from_pci = 0;
  227. }
  228. return 0;
  229. }
  230. static void mpc83xx_set_agent(void)
  231. {
  232. out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
  233. out_be32(&pmc_regs->mask, PMCER_PMCI);
  234. kthread_run(agent_thread_fn, NULL, "PCI power mgt");
  235. }
  236. static int mpc83xx_is_pci_agent(void)
  237. {
  238. struct mpc83xx_rcw __iomem *rcw_regs;
  239. int ret;
  240. rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
  241. sizeof(struct mpc83xx_rcw));
  242. if (!rcw_regs)
  243. return -ENOMEM;
  244. ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
  245. iounmap(rcw_regs);
  246. return ret;
  247. }
  248. static struct platform_suspend_ops mpc83xx_suspend_ops = {
  249. .valid = mpc83xx_suspend_valid,
  250. .begin = mpc83xx_suspend_begin,
  251. .enter = mpc83xx_suspend_enter,
  252. .end = mpc83xx_suspend_end,
  253. };
  254. static int pmc_probe(struct of_device *ofdev,
  255. const struct of_device_id *match)
  256. {
  257. struct device_node *np = ofdev->node;
  258. struct resource res;
  259. struct pmc_type *type = match->data;
  260. int ret = 0;
  261. if (!of_device_is_available(np))
  262. return -ENODEV;
  263. has_deep_sleep = type->has_deep_sleep;
  264. immrbase = get_immrbase();
  265. pmc_dev = ofdev;
  266. is_pci_agent = mpc83xx_is_pci_agent();
  267. if (is_pci_agent < 0)
  268. return is_pci_agent;
  269. ret = of_address_to_resource(np, 0, &res);
  270. if (ret)
  271. return -ENODEV;
  272. pmc_irq = irq_of_parse_and_map(np, 0);
  273. if (pmc_irq != NO_IRQ) {
  274. ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
  275. "pmc", ofdev);
  276. if (ret)
  277. return -EBUSY;
  278. }
  279. pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  280. if (!pmc_regs) {
  281. ret = -ENOMEM;
  282. goto out;
  283. }
  284. ret = of_address_to_resource(np, 1, &res);
  285. if (ret) {
  286. ret = -ENODEV;
  287. goto out_pmc;
  288. }
  289. clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  290. if (!clock_regs) {
  291. ret = -ENOMEM;
  292. goto out_pmc;
  293. }
  294. if (has_deep_sleep) {
  295. syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
  296. sizeof(*syscr_regs));
  297. if (!syscr_regs) {
  298. ret = -ENOMEM;
  299. goto out_syscr;
  300. }
  301. }
  302. if (is_pci_agent)
  303. mpc83xx_set_agent();
  304. suspend_set_ops(&mpc83xx_suspend_ops);
  305. return 0;
  306. out_syscr:
  307. iounmap(clock_regs);
  308. out_pmc:
  309. iounmap(pmc_regs);
  310. out:
  311. if (pmc_irq != NO_IRQ)
  312. free_irq(pmc_irq, ofdev);
  313. return ret;
  314. }
  315. static int pmc_remove(struct of_device *ofdev)
  316. {
  317. return -EPERM;
  318. };
  319. static struct pmc_type pmc_types[] = {
  320. {
  321. .has_deep_sleep = 1,
  322. },
  323. {
  324. .has_deep_sleep = 0,
  325. }
  326. };
  327. static struct of_device_id pmc_match[] = {
  328. {
  329. .compatible = "fsl,mpc8313-pmc",
  330. .data = &pmc_types[0],
  331. },
  332. {
  333. .compatible = "fsl,mpc8349-pmc",
  334. .data = &pmc_types[1],
  335. },
  336. {}
  337. };
  338. static struct of_platform_driver pmc_driver = {
  339. .name = "mpc83xx-pmc",
  340. .match_table = pmc_match,
  341. .probe = pmc_probe,
  342. .remove = pmc_remove
  343. };
  344. static int pmc_init(void)
  345. {
  346. return of_register_platform_driver(&pmc_driver);
  347. }
  348. module_init(pmc_init);