mn10300-serial.c 36 KB

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  1. /* MN10300 On-chip serial port UART driver
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. static const char serial_name[] = "MN10300 Serial driver";
  12. static const char serial_version[] = "mn10300_serial-1.0";
  13. static const char serial_revdate[] = "2007-11-06";
  14. #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/serial.h>
  19. #include <linux/circ_buf.h>
  20. #include <linux/errno.h>
  21. #include <linux/signal.h>
  22. #include <linux/sched.h>
  23. #include <linux/timer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <asm/system.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/bitops.h>
  39. #include <asm/serial-regs.h>
  40. #include <unit/timex.h>
  41. #include "mn10300-serial.h"
  42. static inline __attribute__((format(printf, 1, 2)))
  43. void no_printk(const char *fmt, ...)
  44. {
  45. }
  46. #define kenter(FMT, ...) \
  47. printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  48. #define _enter(FMT, ...) \
  49. no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  50. #define kdebug(FMT, ...) \
  51. printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  52. #define _debug(FMT, ...) \
  53. no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  54. #define kproto(FMT, ...) \
  55. printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  56. #define _proto(FMT, ...) \
  57. no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  58. #define NR_UARTS 3
  59. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  60. static void mn10300_serial_console_write(struct console *co,
  61. const char *s, unsigned count);
  62. static int __init mn10300_serial_console_setup(struct console *co,
  63. char *options);
  64. static struct uart_driver mn10300_serial_driver;
  65. static struct console mn10300_serial_console = {
  66. .name = "ttySM",
  67. .write = mn10300_serial_console_write,
  68. .device = uart_console_device,
  69. .setup = mn10300_serial_console_setup,
  70. .flags = CON_PRINTBUFFER,
  71. .index = -1,
  72. .data = &mn10300_serial_driver,
  73. };
  74. #endif
  75. static struct uart_driver mn10300_serial_driver = {
  76. .owner = NULL,
  77. .driver_name = "mn10300-serial",
  78. .dev_name = "ttySM",
  79. .major = TTY_MAJOR,
  80. .minor = 128,
  81. .nr = NR_UARTS,
  82. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  83. .cons = &mn10300_serial_console,
  84. #endif
  85. };
  86. static unsigned int mn10300_serial_tx_empty(struct uart_port *);
  87. static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
  88. static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
  89. static void mn10300_serial_stop_tx(struct uart_port *);
  90. static void mn10300_serial_start_tx(struct uart_port *);
  91. static void mn10300_serial_send_xchar(struct uart_port *, char ch);
  92. static void mn10300_serial_stop_rx(struct uart_port *);
  93. static void mn10300_serial_enable_ms(struct uart_port *);
  94. static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
  95. static int mn10300_serial_startup(struct uart_port *);
  96. static void mn10300_serial_shutdown(struct uart_port *);
  97. static void mn10300_serial_set_termios(struct uart_port *,
  98. struct ktermios *new,
  99. struct ktermios *old);
  100. static const char *mn10300_serial_type(struct uart_port *);
  101. static void mn10300_serial_release_port(struct uart_port *);
  102. static int mn10300_serial_request_port(struct uart_port *);
  103. static void mn10300_serial_config_port(struct uart_port *, int);
  104. static int mn10300_serial_verify_port(struct uart_port *,
  105. struct serial_struct *);
  106. static const struct uart_ops mn10300_serial_ops = {
  107. .tx_empty = mn10300_serial_tx_empty,
  108. .set_mctrl = mn10300_serial_set_mctrl,
  109. .get_mctrl = mn10300_serial_get_mctrl,
  110. .stop_tx = mn10300_serial_stop_tx,
  111. .start_tx = mn10300_serial_start_tx,
  112. .send_xchar = mn10300_serial_send_xchar,
  113. .stop_rx = mn10300_serial_stop_rx,
  114. .enable_ms = mn10300_serial_enable_ms,
  115. .break_ctl = mn10300_serial_break_ctl,
  116. .startup = mn10300_serial_startup,
  117. .shutdown = mn10300_serial_shutdown,
  118. .set_termios = mn10300_serial_set_termios,
  119. .type = mn10300_serial_type,
  120. .release_port = mn10300_serial_release_port,
  121. .request_port = mn10300_serial_request_port,
  122. .config_port = mn10300_serial_config_port,
  123. .verify_port = mn10300_serial_verify_port,
  124. };
  125. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
  126. /*
  127. * the first on-chip serial port: ttySM0 (aka SIF0)
  128. */
  129. #ifdef CONFIG_MN10300_TTYSM0
  130. struct mn10300_serial_port mn10300_serial_port_sif0 = {
  131. .uart.ops = &mn10300_serial_ops,
  132. .uart.membase = (void __iomem *) &SC0CTR,
  133. .uart.mapbase = (unsigned long) &SC0CTR,
  134. .uart.iotype = UPIO_MEM,
  135. .uart.irq = 0,
  136. .uart.uartclk = 0, /* MN10300_IOCLK, */
  137. .uart.fifosize = 1,
  138. .uart.flags = UPF_BOOT_AUTOCONF,
  139. .uart.line = 0,
  140. .uart.type = PORT_MN10300,
  141. .uart.lock =
  142. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
  143. .name = "ttySM0",
  144. ._iobase = &SC0CTR,
  145. ._control = &SC0CTR,
  146. ._status = (volatile u8 *) &SC0STR,
  147. ._intr = &SC0ICR,
  148. ._rxb = &SC0RXB,
  149. ._txb = &SC0TXB,
  150. .rx_name = "ttySM0/Rx",
  151. .tx_name = "ttySM0/Tx",
  152. #ifdef CONFIG_MN10300_TTYSM0_TIMER8
  153. .tm_name = "ttySM0/Timer8",
  154. ._tmxmd = &TM8MD,
  155. ._tmxbr = &TM8BR,
  156. ._tmicr = &TM8ICR,
  157. .tm_irq = TM8IRQ,
  158. .div_timer = MNSCx_DIV_TIMER_16BIT,
  159. #else /* CONFIG_MN10300_TTYSM0_TIMER2 */
  160. .tm_name = "ttySM0/Timer2",
  161. ._tmxmd = &TM2MD,
  162. ._tmxbr = (volatile u16 *) &TM2BR,
  163. ._tmicr = &TM2ICR,
  164. .tm_irq = TM2IRQ,
  165. .div_timer = MNSCx_DIV_TIMER_8BIT,
  166. #endif
  167. .rx_irq = SC0RXIRQ,
  168. .tx_irq = SC0TXIRQ,
  169. .rx_icr = &GxICR(SC0RXIRQ),
  170. .tx_icr = &GxICR(SC0TXIRQ),
  171. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  172. .options = 0,
  173. #ifdef CONFIG_GDBSTUB_ON_TTYSM0
  174. .gdbstub = 1,
  175. #endif
  176. };
  177. #endif /* CONFIG_MN10300_TTYSM0 */
  178. /*
  179. * the second on-chip serial port: ttySM1 (aka SIF1)
  180. */
  181. #ifdef CONFIG_MN10300_TTYSM1
  182. struct mn10300_serial_port mn10300_serial_port_sif1 = {
  183. .uart.ops = &mn10300_serial_ops,
  184. .uart.membase = (void __iomem *) &SC1CTR,
  185. .uart.mapbase = (unsigned long) &SC1CTR,
  186. .uart.iotype = UPIO_MEM,
  187. .uart.irq = 0,
  188. .uart.uartclk = 0, /* MN10300_IOCLK, */
  189. .uart.fifosize = 1,
  190. .uart.flags = UPF_BOOT_AUTOCONF,
  191. .uart.line = 1,
  192. .uart.type = PORT_MN10300,
  193. .uart.lock =
  194. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
  195. .name = "ttySM1",
  196. ._iobase = &SC1CTR,
  197. ._control = &SC1CTR,
  198. ._status = (volatile u8 *) &SC1STR,
  199. ._intr = &SC1ICR,
  200. ._rxb = &SC1RXB,
  201. ._txb = &SC1TXB,
  202. .rx_name = "ttySM1/Rx",
  203. .tx_name = "ttySM1/Tx",
  204. #ifdef CONFIG_MN10300_TTYSM1_TIMER9
  205. .tm_name = "ttySM1/Timer9",
  206. ._tmxmd = &TM9MD,
  207. ._tmxbr = &TM9BR,
  208. ._tmicr = &TM9ICR,
  209. .tm_irq = TM9IRQ,
  210. .div_timer = MNSCx_DIV_TIMER_16BIT,
  211. #else /* CONFIG_MN10300_TTYSM1_TIMER3 */
  212. .tm_name = "ttySM1/Timer3",
  213. ._tmxmd = &TM3MD,
  214. ._tmxbr = (volatile u16 *) &TM3BR,
  215. ._tmicr = &TM3ICR,
  216. .tm_irq = TM3IRQ,
  217. .div_timer = MNSCx_DIV_TIMER_8BIT,
  218. #endif
  219. .rx_irq = SC1RXIRQ,
  220. .tx_irq = SC1TXIRQ,
  221. .rx_icr = &GxICR(SC1RXIRQ),
  222. .tx_icr = &GxICR(SC1TXIRQ),
  223. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  224. .options = 0,
  225. #ifdef CONFIG_GDBSTUB_ON_TTYSM1
  226. .gdbstub = 1,
  227. #endif
  228. };
  229. #endif /* CONFIG_MN10300_TTYSM1 */
  230. /*
  231. * the third on-chip serial port: ttySM2 (aka SIF2)
  232. */
  233. #ifdef CONFIG_MN10300_TTYSM2
  234. struct mn10300_serial_port mn10300_serial_port_sif2 = {
  235. .uart.ops = &mn10300_serial_ops,
  236. .uart.membase = (void __iomem *) &SC2CTR,
  237. .uart.mapbase = (unsigned long) &SC2CTR,
  238. .uart.iotype = UPIO_MEM,
  239. .uart.irq = 0,
  240. .uart.uartclk = 0, /* MN10300_IOCLK, */
  241. .uart.fifosize = 1,
  242. .uart.flags = UPF_BOOT_AUTOCONF,
  243. .uart.line = 2,
  244. #ifdef CONFIG_MN10300_TTYSM2_CTS
  245. .uart.type = PORT_MN10300_CTS,
  246. #else
  247. .uart.type = PORT_MN10300,
  248. #endif
  249. .uart.lock =
  250. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
  251. .name = "ttySM2",
  252. .rx_name = "ttySM2/Rx",
  253. .tx_name = "ttySM2/Tx",
  254. .tm_name = "ttySM2/Timer10",
  255. ._iobase = &SC2CTR,
  256. ._control = &SC2CTR,
  257. ._status = &SC2STR,
  258. ._intr = &SC2ICR,
  259. ._rxb = &SC2RXB,
  260. ._txb = &SC2TXB,
  261. ._tmxmd = &TM10MD,
  262. ._tmxbr = &TM10BR,
  263. ._tmicr = &TM10ICR,
  264. .tm_irq = TM10IRQ,
  265. .div_timer = MNSCx_DIV_TIMER_16BIT,
  266. .rx_irq = SC2RXIRQ,
  267. .tx_irq = SC2TXIRQ,
  268. .rx_icr = &GxICR(SC2RXIRQ),
  269. .tx_icr = &GxICR(SC2TXIRQ),
  270. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  271. #ifdef CONFIG_MN10300_TTYSM2_CTS
  272. .options = MNSCx_OPT_CTS,
  273. #else
  274. .options = 0,
  275. #endif
  276. #ifdef CONFIG_GDBSTUB_ON_TTYSM2
  277. .gdbstub = 1,
  278. #endif
  279. };
  280. #endif /* CONFIG_MN10300_TTYSM2 */
  281. /*
  282. * list of available serial ports
  283. */
  284. struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
  285. #ifdef CONFIG_MN10300_TTYSM0
  286. [0] = &mn10300_serial_port_sif0,
  287. #endif
  288. #ifdef CONFIG_MN10300_TTYSM1
  289. [1] = &mn10300_serial_port_sif1,
  290. #endif
  291. #ifdef CONFIG_MN10300_TTYSM2
  292. [2] = &mn10300_serial_port_sif2,
  293. #endif
  294. [NR_UARTS] = NULL,
  295. };
  296. /*
  297. * we abuse the serial ports' baud timers' interrupt lines to get the ability
  298. * to deliver interrupts to userspace as we use the ports' interrupt lines to
  299. * do virtual DMA on account of the ports having no hardware FIFOs
  300. *
  301. * we can generate an interrupt manually in the assembly stubs by writing to
  302. * the enable and detect bits in the interrupt control register, so all we need
  303. * to do here is disable the interrupt line
  304. *
  305. * note that we can't just leave the line enabled as the baud rate timer *also*
  306. * generates interrupts
  307. */
  308. static void mn10300_serial_mask_ack(unsigned int irq)
  309. {
  310. u16 tmp;
  311. GxICR(irq) = GxICR_LEVEL_6;
  312. tmp = GxICR(irq); /* flush write buffer */
  313. }
  314. static void mn10300_serial_nop(unsigned int irq)
  315. {
  316. }
  317. static struct irq_chip mn10300_serial_pic = {
  318. .name = "mnserial",
  319. .ack = mn10300_serial_mask_ack,
  320. .mask = mn10300_serial_mask_ack,
  321. .mask_ack = mn10300_serial_mask_ack,
  322. .unmask = mn10300_serial_nop,
  323. .end = mn10300_serial_nop,
  324. };
  325. /*
  326. * serial virtual DMA interrupt jump table
  327. */
  328. struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
  329. static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
  330. {
  331. u16 x;
  332. *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  333. x = *port->tx_icr;
  334. }
  335. static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
  336. {
  337. u16 x;
  338. *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE;
  339. x = *port->tx_icr;
  340. }
  341. static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
  342. {
  343. u16 x;
  344. *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  345. x = *port->rx_icr;
  346. }
  347. /*
  348. * multi-bit equivalent of test_and_clear_bit()
  349. */
  350. static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
  351. {
  352. u32 epsw;
  353. asm volatile(" bclr %1,(%2) \n"
  354. " mov epsw,%0 \n"
  355. : "=d"(epsw) : "d"(mask), "a"(ptr)
  356. : "cc", "memory");
  357. return !(epsw & EPSW_FLAG_Z);
  358. }
  359. /*
  360. * receive chars from the ring buffer for this serial port
  361. * - must do break detection here (not done in the UART)
  362. */
  363. static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
  364. {
  365. struct uart_icount *icount = &port->uart.icount;
  366. struct tty_struct *tty = port->uart.state->port.tty;
  367. unsigned ix;
  368. int count;
  369. u8 st, ch, push, status, overrun;
  370. _enter("%s", port->name);
  371. push = 0;
  372. count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
  373. count = tty_buffer_request_room(tty, count);
  374. if (count == 0) {
  375. if (!tty->low_latency)
  376. tty_flip_buffer_push(tty);
  377. return;
  378. }
  379. try_again:
  380. /* pull chars out of the hat */
  381. ix = port->rx_outp;
  382. if (ix == port->rx_inp) {
  383. if (push && !tty->low_latency)
  384. tty_flip_buffer_push(tty);
  385. return;
  386. }
  387. ch = port->rx_buffer[ix++];
  388. st = port->rx_buffer[ix++];
  389. smp_rmb();
  390. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  391. port->uart.icount.rx++;
  392. st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
  393. status = 0;
  394. overrun = 0;
  395. /* the UART doesn't detect BREAK, so we have to do that ourselves
  396. * - it starts as a framing error on a NUL character
  397. * - then we count another two NUL characters before issuing TTY_BREAK
  398. * - then we end on a normal char or one that has all the bottom bits
  399. * zero and the top bits set
  400. */
  401. switch (port->rx_brk) {
  402. case 0:
  403. /* not breaking at the moment */
  404. break;
  405. case 1:
  406. if (st & SC01STR_FEF && ch == 0) {
  407. port->rx_brk = 2;
  408. goto try_again;
  409. }
  410. goto not_break;
  411. case 2:
  412. if (st & SC01STR_FEF && ch == 0) {
  413. port->rx_brk = 3;
  414. _proto("Rx Break Detected");
  415. icount->brk++;
  416. if (uart_handle_break(&port->uart))
  417. goto ignore_char;
  418. status |= 1 << TTY_BREAK;
  419. goto insert;
  420. }
  421. goto not_break;
  422. default:
  423. if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
  424. goto try_again; /* still breaking */
  425. port->rx_brk = 0; /* end of the break */
  426. switch (ch) {
  427. case 0xFF:
  428. case 0xFE:
  429. case 0xFC:
  430. case 0xF8:
  431. case 0xF0:
  432. case 0xE0:
  433. case 0xC0:
  434. case 0x80:
  435. case 0x00:
  436. /* discard char at probable break end */
  437. goto try_again;
  438. }
  439. break;
  440. }
  441. process_errors:
  442. /* handle framing error */
  443. if (st & SC01STR_FEF) {
  444. if (ch == 0) {
  445. /* framing error with NUL char is probably a BREAK */
  446. port->rx_brk = 1;
  447. goto try_again;
  448. }
  449. _proto("Rx Framing Error");
  450. icount->frame++;
  451. status |= 1 << TTY_FRAME;
  452. }
  453. /* handle parity error */
  454. if (st & SC01STR_PEF) {
  455. _proto("Rx Parity Error");
  456. icount->parity++;
  457. status = TTY_PARITY;
  458. }
  459. /* handle normal char */
  460. if (status == 0) {
  461. if (uart_handle_sysrq_char(&port->uart, ch))
  462. goto ignore_char;
  463. status = (1 << TTY_NORMAL);
  464. }
  465. /* handle overrun error */
  466. if (st & SC01STR_OEF) {
  467. if (port->rx_brk)
  468. goto try_again;
  469. _proto("Rx Overrun Error");
  470. icount->overrun++;
  471. overrun = 1;
  472. }
  473. insert:
  474. status &= port->uart.read_status_mask;
  475. if (!overrun && !(status & port->uart.ignore_status_mask)) {
  476. int flag;
  477. if (status & (1 << TTY_BREAK))
  478. flag = TTY_BREAK;
  479. else if (status & (1 << TTY_PARITY))
  480. flag = TTY_PARITY;
  481. else if (status & (1 << TTY_FRAME))
  482. flag = TTY_FRAME;
  483. else
  484. flag = TTY_NORMAL;
  485. tty_insert_flip_char(tty, ch, flag);
  486. }
  487. /* overrun is special, since it's reported immediately, and doesn't
  488. * affect the current character
  489. */
  490. if (overrun)
  491. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  492. count--;
  493. if (count <= 0) {
  494. if (!tty->low_latency)
  495. tty_flip_buffer_push(tty);
  496. return;
  497. }
  498. ignore_char:
  499. push = 1;
  500. goto try_again;
  501. not_break:
  502. port->rx_brk = 0;
  503. goto process_errors;
  504. }
  505. /*
  506. * handle an interrupt from the serial transmission "virtual DMA" driver
  507. * - note: the interrupt routine will disable its own interrupts when the Tx
  508. * buffer is empty
  509. */
  510. static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
  511. {
  512. _enter("%s", port->name);
  513. if (!port->uart.state || !port->uart.state->port.tty) {
  514. mn10300_serial_dis_tx_intr(port);
  515. return;
  516. }
  517. if (uart_tx_stopped(&port->uart) ||
  518. uart_circ_empty(&port->uart.state->xmit))
  519. mn10300_serial_dis_tx_intr(port);
  520. if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
  521. uart_write_wakeup(&port->uart);
  522. }
  523. /*
  524. * deal with a change in the status of the CTS line
  525. */
  526. static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
  527. {
  528. u16 ctr;
  529. port->tx_cts = st;
  530. port->uart.icount.cts++;
  531. /* flip the CTS state selector flag to interrupt when it changes
  532. * back */
  533. ctr = *port->_control;
  534. ctr ^= SC2CTR_TWS;
  535. *port->_control = ctr;
  536. uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
  537. wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
  538. }
  539. /*
  540. * handle a virtual interrupt generated by the lower level "virtual DMA"
  541. * routines (irq is the baud timer interrupt)
  542. */
  543. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
  544. {
  545. struct mn10300_serial_port *port = dev_id;
  546. u8 st;
  547. spin_lock(&port->uart.lock);
  548. if (port->intr_flags) {
  549. _debug("INT %s: %x", port->name, port->intr_flags);
  550. if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
  551. mn10300_serial_receive_interrupt(port);
  552. if (mask_test_and_clear(&port->intr_flags,
  553. MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
  554. mn10300_serial_transmit_interrupt(port);
  555. }
  556. /* the only modem control line amongst the whole lot is CTS on
  557. * serial port 2 */
  558. if (port->type == PORT_MN10300_CTS) {
  559. st = *port->_status;
  560. if ((port->tx_cts ^ st) & SC2STR_CTS)
  561. mn10300_serial_cts_changed(port, st);
  562. }
  563. spin_unlock(&port->uart.lock);
  564. return IRQ_HANDLED;
  565. }
  566. /*
  567. * return indication of whether the hardware transmit buffer is empty
  568. */
  569. static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
  570. {
  571. struct mn10300_serial_port *port =
  572. container_of(_port, struct mn10300_serial_port, uart);
  573. _enter("%s", port->name);
  574. return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
  575. 0 : TIOCSER_TEMT;
  576. }
  577. /*
  578. * set the modem control lines (we don't have any)
  579. */
  580. static void mn10300_serial_set_mctrl(struct uart_port *_port,
  581. unsigned int mctrl)
  582. {
  583. struct mn10300_serial_port *port =
  584. container_of(_port, struct mn10300_serial_port, uart);
  585. _enter("%s,%x", port->name, mctrl);
  586. }
  587. /*
  588. * get the modem control line statuses
  589. */
  590. static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
  591. {
  592. struct mn10300_serial_port *port =
  593. container_of(_port, struct mn10300_serial_port, uart);
  594. _enter("%s", port->name);
  595. if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
  596. return TIOCM_CAR | TIOCM_DSR;
  597. return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
  598. }
  599. /*
  600. * stop transmitting characters
  601. */
  602. static void mn10300_serial_stop_tx(struct uart_port *_port)
  603. {
  604. struct mn10300_serial_port *port =
  605. container_of(_port, struct mn10300_serial_port, uart);
  606. _enter("%s", port->name);
  607. /* disable the virtual DMA */
  608. mn10300_serial_dis_tx_intr(port);
  609. }
  610. /*
  611. * start transmitting characters
  612. * - jump-start transmission if it has stalled
  613. * - enable the serial Tx interrupt (used by the virtual DMA controller)
  614. * - force an interrupt to happen if necessary
  615. */
  616. static void mn10300_serial_start_tx(struct uart_port *_port)
  617. {
  618. struct mn10300_serial_port *port =
  619. container_of(_port, struct mn10300_serial_port, uart);
  620. u16 x;
  621. _enter("%s{%lu}",
  622. port->name,
  623. CIRC_CNT(&port->uart.state->xmit.head,
  624. &port->uart.state->xmit.tail,
  625. UART_XMIT_SIZE));
  626. /* kick the virtual DMA controller */
  627. x = *port->tx_icr;
  628. x |= GxICR_ENABLE;
  629. if (*port->_status & SC01STR_TBF)
  630. x &= ~(GxICR_REQUEST | GxICR_DETECT);
  631. else
  632. x |= GxICR_REQUEST | GxICR_DETECT;
  633. _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
  634. *port->_control, *port->_intr, *port->_status,
  635. *port->_tmxmd, *port->_tmxbr, *port->tx_icr);
  636. *port->tx_icr = x;
  637. x = *port->tx_icr;
  638. }
  639. /*
  640. * transmit a high-priority XON/XOFF character
  641. */
  642. static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
  643. {
  644. struct mn10300_serial_port *port =
  645. container_of(_port, struct mn10300_serial_port, uart);
  646. _enter("%s,%02x", port->name, ch);
  647. if (likely(port->gdbstub)) {
  648. port->tx_xchar = ch;
  649. if (ch)
  650. mn10300_serial_en_tx_intr(port);
  651. }
  652. }
  653. /*
  654. * stop receiving characters
  655. * - called whilst the port is being closed
  656. */
  657. static void mn10300_serial_stop_rx(struct uart_port *_port)
  658. {
  659. struct mn10300_serial_port *port =
  660. container_of(_port, struct mn10300_serial_port, uart);
  661. u16 ctr;
  662. _enter("%s", port->name);
  663. ctr = *port->_control;
  664. ctr &= ~SC01CTR_RXE;
  665. *port->_control = ctr;
  666. mn10300_serial_dis_rx_intr(port);
  667. }
  668. /*
  669. * enable modem status interrupts
  670. */
  671. static void mn10300_serial_enable_ms(struct uart_port *_port)
  672. {
  673. struct mn10300_serial_port *port =
  674. container_of(_port, struct mn10300_serial_port, uart);
  675. u16 ctr, cts;
  676. _enter("%s", port->name);
  677. if (port->type == PORT_MN10300_CTS) {
  678. /* want to interrupt when CTS goes low if CTS is now high and
  679. * vice versa
  680. */
  681. port->tx_cts = *port->_status;
  682. cts = (port->tx_cts & SC2STR_CTS) ?
  683. SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
  684. ctr = *port->_control;
  685. ctr &= ~SC2CTR_TWS;
  686. ctr |= cts;
  687. *port->_control = ctr;
  688. mn10300_serial_en_tx_intr(port);
  689. }
  690. }
  691. /*
  692. * transmit or cease transmitting a break signal
  693. */
  694. static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
  695. {
  696. struct mn10300_serial_port *port =
  697. container_of(_port, struct mn10300_serial_port, uart);
  698. _enter("%s,%d", port->name, ctl);
  699. if (ctl) {
  700. /* tell the virtual DMA handler to assert BREAK */
  701. port->tx_break = 1;
  702. mn10300_serial_en_tx_intr(port);
  703. } else {
  704. port->tx_break = 0;
  705. *port->_control &= ~SC01CTR_BKE;
  706. mn10300_serial_en_tx_intr(port);
  707. }
  708. }
  709. /*
  710. * grab the interrupts and enable the port for reception
  711. */
  712. static int mn10300_serial_startup(struct uart_port *_port)
  713. {
  714. struct mn10300_serial_port *port =
  715. container_of(_port, struct mn10300_serial_port, uart);
  716. struct mn10300_serial_int *pint;
  717. _enter("%s{%d}", port->name, port->gdbstub);
  718. if (unlikely(port->gdbstub))
  719. return -EBUSY;
  720. /* allocate an Rx buffer for the virtual DMA handler */
  721. port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
  722. if (!port->rx_buffer)
  723. return -ENOMEM;
  724. port->rx_inp = port->rx_outp = 0;
  725. /* finally, enable the device */
  726. *port->_intr = SC01ICR_TI;
  727. *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
  728. pint = &mn10300_serial_int_tbl[port->rx_irq];
  729. pint->port = port;
  730. pint->vdma = mn10300_serial_vdma_rx_handler;
  731. pint = &mn10300_serial_int_tbl[port->tx_irq];
  732. pint->port = port;
  733. pint->vdma = mn10300_serial_vdma_tx_handler;
  734. set_intr_level(port->rx_irq, GxICR_LEVEL_1);
  735. set_intr_level(port->tx_irq, GxICR_LEVEL_1);
  736. set_irq_chip(port->tm_irq, &mn10300_serial_pic);
  737. if (request_irq(port->rx_irq, mn10300_serial_interrupt,
  738. IRQF_DISABLED, port->rx_name, port) < 0)
  739. goto error;
  740. if (request_irq(port->tx_irq, mn10300_serial_interrupt,
  741. IRQF_DISABLED, port->tx_name, port) < 0)
  742. goto error2;
  743. if (request_irq(port->tm_irq, mn10300_serial_interrupt,
  744. IRQF_DISABLED, port->tm_name, port) < 0)
  745. goto error3;
  746. mn10300_serial_mask_ack(port->tm_irq);
  747. return 0;
  748. error3:
  749. free_irq(port->tx_irq, port);
  750. error2:
  751. free_irq(port->rx_irq, port);
  752. error:
  753. kfree(port->rx_buffer);
  754. port->rx_buffer = NULL;
  755. return -EBUSY;
  756. }
  757. /*
  758. * shutdown the port and release interrupts
  759. */
  760. static void mn10300_serial_shutdown(struct uart_port *_port)
  761. {
  762. struct mn10300_serial_port *port =
  763. container_of(_port, struct mn10300_serial_port, uart);
  764. _enter("%s", port->name);
  765. /* disable the serial port and its baud rate timer */
  766. port->tx_break = 0;
  767. *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  768. *port->_tmxmd = 0;
  769. if (port->rx_buffer) {
  770. void *buf = port->rx_buffer;
  771. port->rx_buffer = NULL;
  772. kfree(buf);
  773. }
  774. /* disable all intrs */
  775. free_irq(port->tm_irq, port);
  776. free_irq(port->rx_irq, port);
  777. free_irq(port->tx_irq, port);
  778. *port->rx_icr = GxICR_LEVEL_1;
  779. *port->tx_icr = GxICR_LEVEL_1;
  780. }
  781. /*
  782. * this routine is called to set the UART divisor registers to match the
  783. * specified baud rate for a serial port.
  784. */
  785. static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
  786. struct ktermios *new,
  787. struct ktermios *old)
  788. {
  789. unsigned long flags;
  790. unsigned long ioclk = port->ioclk;
  791. unsigned cflag;
  792. int baud, bits, xdiv, tmp;
  793. u16 tmxbr, scxctr;
  794. u8 tmxmd, battempt;
  795. u8 div_timer = port->div_timer;
  796. _enter("%s{%lu}", port->name, ioclk);
  797. /* byte size and parity */
  798. cflag = new->c_cflag;
  799. switch (cflag & CSIZE) {
  800. case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
  801. case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  802. default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  803. }
  804. if (cflag & CSTOPB) {
  805. scxctr |= SC01CTR_STB_2BIT;
  806. bits++;
  807. }
  808. if (cflag & PARENB) {
  809. bits++;
  810. if (cflag & PARODD)
  811. scxctr |= SC01CTR_PB_ODD;
  812. #ifdef CMSPAR
  813. else if (cflag & CMSPAR)
  814. scxctr |= SC01CTR_PB_FIXED0;
  815. #endif
  816. else
  817. scxctr |= SC01CTR_PB_EVEN;
  818. }
  819. /* Determine divisor based on baud rate */
  820. battempt = 0;
  821. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  822. scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8
  823. * == SC2CTR_CK_TM10UFLOW) */
  824. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  825. scxctr |= SC0CTR_CK_TM2UFLOW_8;
  826. try_alternative:
  827. baud = uart_get_baud_rate(&port->uart, new, old, 0,
  828. port->ioclk / 8);
  829. _debug("ALT %d [baud %d]", battempt, baud);
  830. if (!baud)
  831. baud = 9600; /* B0 transition handled in rs_set_termios */
  832. xdiv = 1;
  833. if (baud == 134) {
  834. baud = 269; /* 134 is really 134.5 */
  835. xdiv = 2;
  836. }
  837. if (baud == 38400 &&
  838. (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
  839. ) {
  840. _debug("CUSTOM %u", port->uart.custom_divisor);
  841. if (div_timer == MNSCx_DIV_TIMER_16BIT) {
  842. if (port->uart.custom_divisor <= 65535) {
  843. tmxmd = TM8MD_SRC_IOCLK;
  844. tmxbr = port->uart.custom_divisor;
  845. port->uart.uartclk = ioclk;
  846. goto timer_okay;
  847. }
  848. if (port->uart.custom_divisor / 8 <= 65535) {
  849. tmxmd = TM8MD_SRC_IOCLK_8;
  850. tmxbr = port->uart.custom_divisor / 8;
  851. port->uart.custom_divisor = tmxbr * 8;
  852. port->uart.uartclk = ioclk / 8;
  853. goto timer_okay;
  854. }
  855. if (port->uart.custom_divisor / 32 <= 65535) {
  856. tmxmd = TM8MD_SRC_IOCLK_32;
  857. tmxbr = port->uart.custom_divisor / 32;
  858. port->uart.custom_divisor = tmxbr * 32;
  859. port->uart.uartclk = ioclk / 32;
  860. goto timer_okay;
  861. }
  862. } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
  863. if (port->uart.custom_divisor <= 255) {
  864. tmxmd = TM2MD_SRC_IOCLK;
  865. tmxbr = port->uart.custom_divisor;
  866. port->uart.uartclk = ioclk;
  867. goto timer_okay;
  868. }
  869. if (port->uart.custom_divisor / 8 <= 255) {
  870. tmxmd = TM2MD_SRC_IOCLK_8;
  871. tmxbr = port->uart.custom_divisor / 8;
  872. port->uart.custom_divisor = tmxbr * 8;
  873. port->uart.uartclk = ioclk / 8;
  874. goto timer_okay;
  875. }
  876. if (port->uart.custom_divisor / 32 <= 255) {
  877. tmxmd = TM2MD_SRC_IOCLK_32;
  878. tmxbr = port->uart.custom_divisor / 32;
  879. port->uart.custom_divisor = tmxbr * 32;
  880. port->uart.uartclk = ioclk / 32;
  881. goto timer_okay;
  882. }
  883. }
  884. }
  885. switch (div_timer) {
  886. case MNSCx_DIV_TIMER_16BIT:
  887. port->uart.uartclk = ioclk;
  888. tmxmd = TM8MD_SRC_IOCLK;
  889. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  890. if (tmp > 0 && tmp <= 65535)
  891. goto timer_okay;
  892. port->uart.uartclk = ioclk / 8;
  893. tmxmd = TM8MD_SRC_IOCLK_8;
  894. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  895. if (tmp > 0 && tmp <= 65535)
  896. goto timer_okay;
  897. port->uart.uartclk = ioclk / 32;
  898. tmxmd = TM8MD_SRC_IOCLK_32;
  899. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  900. if (tmp > 0 && tmp <= 65535)
  901. goto timer_okay;
  902. break;
  903. case MNSCx_DIV_TIMER_8BIT:
  904. port->uart.uartclk = ioclk;
  905. tmxmd = TM2MD_SRC_IOCLK;
  906. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  907. if (tmp > 0 && tmp <= 255)
  908. goto timer_okay;
  909. port->uart.uartclk = ioclk / 8;
  910. tmxmd = TM2MD_SRC_IOCLK_8;
  911. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  912. if (tmp > 0 && tmp <= 255)
  913. goto timer_okay;
  914. port->uart.uartclk = ioclk / 32;
  915. tmxmd = TM2MD_SRC_IOCLK_32;
  916. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  917. if (tmp > 0 && tmp <= 255)
  918. goto timer_okay;
  919. break;
  920. default:
  921. BUG();
  922. return;
  923. }
  924. /* refuse to change to a baud rate we can't support */
  925. _debug("CAN'T SUPPORT");
  926. switch (battempt) {
  927. case 0:
  928. if (old) {
  929. new->c_cflag &= ~CBAUD;
  930. new->c_cflag |= (old->c_cflag & CBAUD);
  931. battempt = 1;
  932. goto try_alternative;
  933. }
  934. case 1:
  935. /* as a last resort, if the quotient is zero, default to 9600
  936. * bps */
  937. new->c_cflag &= ~CBAUD;
  938. new->c_cflag |= B9600;
  939. battempt = 2;
  940. goto try_alternative;
  941. default:
  942. /* hmmm... can't seem to support 9600 either
  943. * - we could try iterating through the speeds we know about to
  944. * find the lowest
  945. */
  946. new->c_cflag &= ~CBAUD;
  947. new->c_cflag |= B0;
  948. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  949. tmxmd = TM8MD_SRC_IOCLK_32;
  950. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  951. tmxmd = TM2MD_SRC_IOCLK_32;
  952. tmxbr = 1;
  953. port->uart.uartclk = ioclk / 32;
  954. break;
  955. }
  956. timer_okay:
  957. _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
  958. /* make the changes */
  959. spin_lock_irqsave(&port->uart.lock, flags);
  960. uart_update_timeout(&port->uart, new->c_cflag, baud);
  961. /* set the timer to produce the required baud rate */
  962. switch (div_timer) {
  963. case MNSCx_DIV_TIMER_16BIT:
  964. *port->_tmxmd = 0;
  965. *port->_tmxbr = tmxbr;
  966. *port->_tmxmd = TM8MD_INIT_COUNTER;
  967. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  968. break;
  969. case MNSCx_DIV_TIMER_8BIT:
  970. *port->_tmxmd = 0;
  971. *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
  972. *port->_tmxmd = TM2MD_INIT_COUNTER;
  973. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  974. break;
  975. }
  976. /* CTS flow control flag and modem status interrupts */
  977. scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
  978. if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
  979. /* want to interrupt when CTS goes low if CTS is now
  980. * high and vice versa
  981. */
  982. port->tx_cts = *port->_status;
  983. if (port->tx_cts & SC2STR_CTS)
  984. scxctr |= SC2CTR_TWE;
  985. else
  986. scxctr |= SC2CTR_TWE | SC2CTR_TWS;
  987. }
  988. /* set up parity check flag */
  989. port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
  990. if (new->c_iflag & INPCK)
  991. port->uart.read_status_mask |=
  992. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  993. if (new->c_iflag & (BRKINT | PARMRK))
  994. port->uart.read_status_mask |= (1 << TTY_BREAK);
  995. /* characters to ignore */
  996. port->uart.ignore_status_mask = 0;
  997. if (new->c_iflag & IGNPAR)
  998. port->uart.ignore_status_mask |=
  999. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  1000. if (new->c_iflag & IGNBRK) {
  1001. port->uart.ignore_status_mask |= (1 << TTY_BREAK);
  1002. /*
  1003. * If we're ignoring parity and break indicators,
  1004. * ignore overruns to (for real raw support).
  1005. */
  1006. if (new->c_iflag & IGNPAR)
  1007. port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
  1008. }
  1009. /* Ignore all characters if CREAD is not set */
  1010. if ((new->c_cflag & CREAD) == 0)
  1011. port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
  1012. scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  1013. *port->_control = scxctr;
  1014. spin_unlock_irqrestore(&port->uart.lock, flags);
  1015. }
  1016. /*
  1017. * set the terminal I/O parameters
  1018. */
  1019. static void mn10300_serial_set_termios(struct uart_port *_port,
  1020. struct ktermios *new,
  1021. struct ktermios *old)
  1022. {
  1023. struct mn10300_serial_port *port =
  1024. container_of(_port, struct mn10300_serial_port, uart);
  1025. _enter("%s,%p,%p", port->name, new, old);
  1026. mn10300_serial_change_speed(port, new, old);
  1027. /* handle turning off CRTSCTS */
  1028. if (!(new->c_cflag & CRTSCTS)) {
  1029. u16 ctr = *port->_control;
  1030. ctr &= ~SC2CTR_TWE;
  1031. *port->_control = ctr;
  1032. }
  1033. }
  1034. /*
  1035. * return description of port type
  1036. */
  1037. static const char *mn10300_serial_type(struct uart_port *_port)
  1038. {
  1039. struct mn10300_serial_port *port =
  1040. container_of(_port, struct mn10300_serial_port, uart);
  1041. if (port->uart.type == PORT_MN10300_CTS)
  1042. return "MN10300 SIF_CTS";
  1043. return "MN10300 SIF";
  1044. }
  1045. /*
  1046. * release I/O and memory regions in use by port
  1047. */
  1048. static void mn10300_serial_release_port(struct uart_port *_port)
  1049. {
  1050. struct mn10300_serial_port *port =
  1051. container_of(_port, struct mn10300_serial_port, uart);
  1052. _enter("%s", port->name);
  1053. release_mem_region((unsigned long) port->_iobase, 16);
  1054. }
  1055. /*
  1056. * request I/O and memory regions for port
  1057. */
  1058. static int mn10300_serial_request_port(struct uart_port *_port)
  1059. {
  1060. struct mn10300_serial_port *port =
  1061. container_of(_port, struct mn10300_serial_port, uart);
  1062. _enter("%s", port->name);
  1063. request_mem_region((unsigned long) port->_iobase, 16, port->name);
  1064. return 0;
  1065. }
  1066. /*
  1067. * configure the type and reserve the ports
  1068. */
  1069. static void mn10300_serial_config_port(struct uart_port *_port, int type)
  1070. {
  1071. struct mn10300_serial_port *port =
  1072. container_of(_port, struct mn10300_serial_port, uart);
  1073. _enter("%s", port->name);
  1074. port->uart.type = PORT_MN10300;
  1075. if (port->options & MNSCx_OPT_CTS)
  1076. port->uart.type = PORT_MN10300_CTS;
  1077. mn10300_serial_request_port(_port);
  1078. }
  1079. /*
  1080. * verify serial parameters are suitable for this port type
  1081. */
  1082. static int mn10300_serial_verify_port(struct uart_port *_port,
  1083. struct serial_struct *ss)
  1084. {
  1085. struct mn10300_serial_port *port =
  1086. container_of(_port, struct mn10300_serial_port, uart);
  1087. void *mapbase = (void *) (unsigned long) port->uart.mapbase;
  1088. _enter("%s", port->name);
  1089. /* these things may not be changed */
  1090. if (ss->irq != port->uart.irq ||
  1091. ss->port != port->uart.iobase ||
  1092. ss->io_type != port->uart.iotype ||
  1093. ss->iomem_base != mapbase ||
  1094. ss->iomem_reg_shift != port->uart.regshift ||
  1095. ss->hub6 != port->uart.hub6 ||
  1096. ss->xmit_fifo_size != port->uart.fifosize)
  1097. return -EINVAL;
  1098. /* type may be changed on a port that supports CTS */
  1099. if (ss->type != port->uart.type) {
  1100. if (!(port->options & MNSCx_OPT_CTS))
  1101. return -EINVAL;
  1102. if (ss->type != PORT_MN10300 &&
  1103. ss->type != PORT_MN10300_CTS)
  1104. return -EINVAL;
  1105. }
  1106. return 0;
  1107. }
  1108. /*
  1109. * initialise the MN10300 on-chip UARTs
  1110. */
  1111. static int __init mn10300_serial_init(void)
  1112. {
  1113. struct mn10300_serial_port *port;
  1114. int ret, i;
  1115. printk(KERN_INFO "%s version %s (%s)\n",
  1116. serial_name, serial_version, serial_revdate);
  1117. #ifdef CONFIG_MN10300_TTYSM2
  1118. SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
  1119. #endif
  1120. set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt);
  1121. ret = uart_register_driver(&mn10300_serial_driver);
  1122. if (!ret) {
  1123. for (i = 0 ; i < NR_PORTS ; i++) {
  1124. port = mn10300_serial_ports[i];
  1125. if (!port || port->gdbstub)
  1126. continue;
  1127. switch (port->clock_src) {
  1128. case MNSCx_CLOCK_SRC_IOCLK:
  1129. port->ioclk = MN10300_IOCLK;
  1130. break;
  1131. #ifdef MN10300_IOBCLK
  1132. case MNSCx_CLOCK_SRC_IOBCLK:
  1133. port->ioclk = MN10300_IOBCLK;
  1134. break;
  1135. #endif
  1136. default:
  1137. BUG();
  1138. }
  1139. ret = uart_add_one_port(&mn10300_serial_driver,
  1140. &port->uart);
  1141. if (ret < 0) {
  1142. _debug("ERROR %d", -ret);
  1143. break;
  1144. }
  1145. }
  1146. if (ret)
  1147. uart_unregister_driver(&mn10300_serial_driver);
  1148. }
  1149. return ret;
  1150. }
  1151. __initcall(mn10300_serial_init);
  1152. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  1153. /*
  1154. * print a string to the serial port without disturbing the real user of the
  1155. * port too much
  1156. * - the console must be locked by the caller
  1157. */
  1158. static void mn10300_serial_console_write(struct console *co,
  1159. const char *s, unsigned count)
  1160. {
  1161. struct mn10300_serial_port *port;
  1162. unsigned i;
  1163. u16 scxctr, txicr, tmp;
  1164. u8 tmxmd;
  1165. port = mn10300_serial_ports[co->index];
  1166. /* firstly hijack the serial port from the "virtual DMA" controller */
  1167. txicr = *port->tx_icr;
  1168. *port->tx_icr = GxICR_LEVEL_1;
  1169. tmp = *port->tx_icr;
  1170. /* the transmitter may be disabled */
  1171. scxctr = *port->_control;
  1172. if (!(scxctr & SC01CTR_TXE)) {
  1173. /* restart the UART clock */
  1174. tmxmd = *port->_tmxmd;
  1175. switch (port->div_timer) {
  1176. case MNSCx_DIV_TIMER_16BIT:
  1177. *port->_tmxmd = 0;
  1178. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1179. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1180. break;
  1181. case MNSCx_DIV_TIMER_8BIT:
  1182. *port->_tmxmd = 0;
  1183. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1184. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1185. break;
  1186. }
  1187. /* enable the transmitter */
  1188. *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
  1189. } else if (scxctr & SC01CTR_BKE) {
  1190. /* stop transmitting BREAK */
  1191. *port->_control = (scxctr & ~SC01CTR_BKE);
  1192. }
  1193. /* send the chars into the serial port (with LF -> LFCR conversion) */
  1194. for (i = 0; i < count; i++) {
  1195. char ch = *s++;
  1196. while (*port->_status & SC01STR_TBF)
  1197. continue;
  1198. *(u8 *) port->_txb = ch;
  1199. if (ch == 0x0a) {
  1200. while (*port->_status & SC01STR_TBF)
  1201. continue;
  1202. *(u8 *) port->_txb = 0xd;
  1203. }
  1204. }
  1205. /* can't let the transmitter be turned off if it's actually
  1206. * transmitting */
  1207. while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
  1208. continue;
  1209. /* disable the transmitter if we re-enabled it */
  1210. if (!(scxctr & SC01CTR_TXE))
  1211. *port->_control = scxctr;
  1212. *port->tx_icr = txicr;
  1213. tmp = *port->tx_icr;
  1214. }
  1215. /*
  1216. * set up a serial port as a console
  1217. * - construct a cflag setting for the first rs_open()
  1218. * - initialize the serial port
  1219. * - return non-zero if we didn't find a serial port.
  1220. */
  1221. static int __init mn10300_serial_console_setup(struct console *co,
  1222. char *options)
  1223. {
  1224. struct mn10300_serial_port *port;
  1225. int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
  1226. for (i = 0 ; i < NR_PORTS ; i++) {
  1227. port = mn10300_serial_ports[i];
  1228. if (port && !port->gdbstub && port->uart.line == co->index)
  1229. goto found_device;
  1230. }
  1231. return -ENODEV;
  1232. found_device:
  1233. switch (port->clock_src) {
  1234. case MNSCx_CLOCK_SRC_IOCLK:
  1235. port->ioclk = MN10300_IOCLK;
  1236. break;
  1237. #ifdef MN10300_IOBCLK
  1238. case MNSCx_CLOCK_SRC_IOBCLK:
  1239. port->ioclk = MN10300_IOBCLK;
  1240. break;
  1241. #endif
  1242. default:
  1243. BUG();
  1244. }
  1245. if (options)
  1246. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1247. return uart_set_options(&port->uart, co, baud, parity, bits, flow);
  1248. }
  1249. /*
  1250. * register console
  1251. */
  1252. static int __init mn10300_serial_console_init(void)
  1253. {
  1254. register_console(&mn10300_serial_console);
  1255. return 0;
  1256. }
  1257. console_initcall(mn10300_serial_console_init);
  1258. #endif