ezkit.c 16 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/physmap.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/dma.h>
  19. #include <asm/gpio.h>
  20. #include <asm/nand.h>
  21. #include <asm/portmux.h>
  22. #include <asm/dpmc.h>
  23. #include <linux/input.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "ADI BF538-EZKIT";
  28. /*
  29. * Driver needs to know address, irq and flag pin.
  30. */
  31. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  32. static struct platform_device rtc_device = {
  33. .name = "rtc-bfin",
  34. .id = -1,
  35. };
  36. #endif
  37. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  38. static struct resource bfin_uart_resources[] = {
  39. #ifdef CONFIG_SERIAL_BFIN_UART0
  40. {
  41. .start = 0xFFC00400,
  42. .end = 0xFFC004FF,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. #endif
  46. #ifdef CONFIG_SERIAL_BFIN_UART1
  47. {
  48. .start = 0xFFC02000,
  49. .end = 0xFFC020FF,
  50. .flags = IORESOURCE_MEM,
  51. },
  52. #endif
  53. #ifdef CONFIG_SERIAL_BFIN_UART2
  54. {
  55. .start = 0xFFC02100,
  56. .end = 0xFFC021FF,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. #endif
  60. };
  61. static struct platform_device bfin_uart_device = {
  62. .name = "bfin-uart",
  63. .id = 1,
  64. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  65. .resource = bfin_uart_resources,
  66. };
  67. #endif
  68. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  69. #ifdef CONFIG_BFIN_SIR0
  70. static struct resource bfin_sir0_resources[] = {
  71. {
  72. .start = 0xFFC00400,
  73. .end = 0xFFC004FF,
  74. .flags = IORESOURCE_MEM,
  75. },
  76. {
  77. .start = IRQ_UART0_RX,
  78. .end = IRQ_UART0_RX+1,
  79. .flags = IORESOURCE_IRQ,
  80. },
  81. {
  82. .start = CH_UART0_RX,
  83. .end = CH_UART0_RX+1,
  84. .flags = IORESOURCE_DMA,
  85. },
  86. };
  87. static struct platform_device bfin_sir0_device = {
  88. .name = "bfin_sir",
  89. .id = 0,
  90. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  91. .resource = bfin_sir0_resources,
  92. };
  93. #endif
  94. #ifdef CONFIG_BFIN_SIR1
  95. static struct resource bfin_sir1_resources[] = {
  96. {
  97. .start = 0xFFC02000,
  98. .end = 0xFFC020FF,
  99. .flags = IORESOURCE_MEM,
  100. },
  101. {
  102. .start = IRQ_UART1_RX,
  103. .end = IRQ_UART1_RX+1,
  104. .flags = IORESOURCE_IRQ,
  105. },
  106. {
  107. .start = CH_UART1_RX,
  108. .end = CH_UART1_RX+1,
  109. .flags = IORESOURCE_DMA,
  110. },
  111. };
  112. static struct platform_device bfin_sir1_device = {
  113. .name = "bfin_sir",
  114. .id = 1,
  115. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  116. .resource = bfin_sir1_resources,
  117. };
  118. #endif
  119. #ifdef CONFIG_BFIN_SIR2
  120. static struct resource bfin_sir2_resources[] = {
  121. {
  122. .start = 0xFFC02100,
  123. .end = 0xFFC021FF,
  124. .flags = IORESOURCE_MEM,
  125. },
  126. {
  127. .start = IRQ_UART2_RX,
  128. .end = IRQ_UART2_RX+1,
  129. .flags = IORESOURCE_IRQ,
  130. },
  131. {
  132. .start = CH_UART2_RX,
  133. .end = CH_UART2_RX+1,
  134. .flags = IORESOURCE_DMA,
  135. },
  136. };
  137. static struct platform_device bfin_sir2_device = {
  138. .name = "bfin_sir",
  139. .id = 2,
  140. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  141. .resource = bfin_sir2_resources,
  142. };
  143. #endif
  144. #endif
  145. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  146. unsigned short bfin_can_peripherals[] = {
  147. P_CAN0_RX, P_CAN0_TX, 0
  148. };
  149. static struct resource bfin_can_resources[] = {
  150. {
  151. .start = 0xFFC02A00,
  152. .end = 0xFFC02FFF,
  153. .flags = IORESOURCE_MEM,
  154. },
  155. {
  156. .start = IRQ_CAN_RX,
  157. .end = IRQ_CAN_RX,
  158. .flags = IORESOURCE_IRQ,
  159. },
  160. {
  161. .start = IRQ_CAN_TX,
  162. .end = IRQ_CAN_TX,
  163. .flags = IORESOURCE_IRQ,
  164. },
  165. {
  166. .start = IRQ_CAN_ERROR,
  167. .end = IRQ_CAN_ERROR,
  168. .flags = IORESOURCE_IRQ,
  169. },
  170. };
  171. static struct platform_device bfin_can_device = {
  172. .name = "bfin_can",
  173. .num_resources = ARRAY_SIZE(bfin_can_resources),
  174. .resource = bfin_can_resources,
  175. .dev = {
  176. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  177. },
  178. };
  179. #endif
  180. /*
  181. * USB-LAN EzExtender board
  182. * Driver needs to know address, irq and flag pin.
  183. */
  184. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  185. #include <linux/smc91x.h>
  186. static struct smc91x_platdata smc91x_info = {
  187. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  188. .leda = RPC_LED_100_10,
  189. .ledb = RPC_LED_TX_RX,
  190. };
  191. static struct resource smc91x_resources[] = {
  192. {
  193. .name = "smc91x-regs",
  194. .start = 0x20310300,
  195. .end = 0x20310300 + 16,
  196. .flags = IORESOURCE_MEM,
  197. }, {
  198. .start = IRQ_PF0,
  199. .end = IRQ_PF0,
  200. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  201. },
  202. };
  203. static struct platform_device smc91x_device = {
  204. .name = "smc91x",
  205. .id = 0,
  206. .num_resources = ARRAY_SIZE(smc91x_resources),
  207. .resource = smc91x_resources,
  208. .dev = {
  209. .platform_data = &smc91x_info,
  210. },
  211. };
  212. #endif
  213. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  214. /* all SPI peripherals info goes here */
  215. #if defined(CONFIG_MTD_M25P80) \
  216. || defined(CONFIG_MTD_M25P80_MODULE)
  217. /* SPI flash chip (m25p16) */
  218. static struct mtd_partition bfin_spi_flash_partitions[] = {
  219. {
  220. .name = "bootloader(spi)",
  221. .size = 0x00040000,
  222. .offset = 0,
  223. .mask_flags = MTD_CAP_ROM
  224. }, {
  225. .name = "linux kernel(spi)",
  226. .size = 0x1c0000,
  227. .offset = 0x40000
  228. }
  229. };
  230. static struct flash_platform_data bfin_spi_flash_data = {
  231. .name = "m25p80",
  232. .parts = bfin_spi_flash_partitions,
  233. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  234. .type = "m25p16",
  235. };
  236. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  237. .enable_dma = 0, /* use dma transfer with this chip*/
  238. .bits_per_word = 8,
  239. };
  240. #endif
  241. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  242. #include <linux/spi/ad7879.h>
  243. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  244. .model = 7879, /* Model = AD7879 */
  245. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  246. .pressure_max = 10000,
  247. .pressure_min = 0,
  248. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  249. .acquisition_time = 1, /* 4us acquisition time per sample */
  250. .median = 2, /* do 8 measurements */
  251. .averaging = 1, /* take the average of 4 middle samples */
  252. .pen_down_acc_interval = 255, /* 9.4 ms */
  253. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  254. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  255. };
  256. #endif
  257. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  258. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  259. .enable_dma = 0,
  260. .bits_per_word = 16,
  261. };
  262. #endif
  263. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  264. #include <asm/bfin-lq035q1.h>
  265. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  266. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  267. .use_bl = 0, /* let something else control the LCD Blacklight */
  268. .gpio_bl = GPIO_PF7,
  269. };
  270. static struct resource bfin_lq035q1_resources[] = {
  271. {
  272. .start = IRQ_PPI_ERROR,
  273. .end = IRQ_PPI_ERROR,
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. };
  277. static struct platform_device bfin_lq035q1_device = {
  278. .name = "bfin-lq035q1",
  279. .id = -1,
  280. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  281. .resource = bfin_lq035q1_resources,
  282. .dev = {
  283. .platform_data = &bfin_lq035q1_data,
  284. },
  285. };
  286. #endif
  287. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  288. static struct bfin5xx_spi_chip spidev_chip_info = {
  289. .enable_dma = 0,
  290. .bits_per_word = 8,
  291. };
  292. #endif
  293. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  294. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  295. .enable_dma = 0,
  296. .bits_per_word = 8,
  297. };
  298. #endif
  299. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  300. #if defined(CONFIG_MTD_M25P80) \
  301. || defined(CONFIG_MTD_M25P80_MODULE)
  302. {
  303. /* the modalias must be the same as spi device driver name */
  304. .modalias = "m25p80", /* Name of spi_driver for this device */
  305. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  306. .bus_num = 0, /* Framework bus number */
  307. .chip_select = 1, /* SPI_SSEL1*/
  308. .platform_data = &bfin_spi_flash_data,
  309. .controller_data = &spi_flash_chip_info,
  310. .mode = SPI_MODE_3,
  311. },
  312. #endif
  313. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  314. {
  315. .modalias = "ad7879",
  316. .platform_data = &bfin_ad7879_ts_info,
  317. .irq = IRQ_PF3,
  318. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  319. .bus_num = 0,
  320. .chip_select = 1,
  321. .controller_data = &spi_ad7879_chip_info,
  322. .mode = SPI_CPHA | SPI_CPOL,
  323. },
  324. #endif
  325. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  326. {
  327. .modalias = "bfin-lq035q1-spi",
  328. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  329. .bus_num = 0,
  330. .chip_select = 2,
  331. .controller_data = &lq035q1_spi_chip_info,
  332. .mode = SPI_CPHA | SPI_CPOL,
  333. },
  334. #endif
  335. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  336. {
  337. .modalias = "spidev",
  338. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  339. .bus_num = 0,
  340. .chip_select = 1,
  341. .controller_data = &spidev_chip_info,
  342. },
  343. #endif
  344. };
  345. /* SPI (0) */
  346. static struct resource bfin_spi0_resource[] = {
  347. [0] = {
  348. .start = SPI0_REGBASE,
  349. .end = SPI0_REGBASE + 0xFF,
  350. .flags = IORESOURCE_MEM,
  351. },
  352. [1] = {
  353. .start = CH_SPI0,
  354. .end = CH_SPI0,
  355. .flags = IORESOURCE_DMA,
  356. },
  357. [2] = {
  358. .start = IRQ_SPI0,
  359. .end = IRQ_SPI0,
  360. .flags = IORESOURCE_IRQ,
  361. }
  362. };
  363. /* SPI (1) */
  364. static struct resource bfin_spi1_resource[] = {
  365. [0] = {
  366. .start = SPI1_REGBASE,
  367. .end = SPI1_REGBASE + 0xFF,
  368. .flags = IORESOURCE_MEM,
  369. },
  370. [1] = {
  371. .start = CH_SPI1,
  372. .end = CH_SPI1,
  373. .flags = IORESOURCE_DMA,
  374. },
  375. [2] = {
  376. .start = IRQ_SPI1,
  377. .end = IRQ_SPI1,
  378. .flags = IORESOURCE_IRQ,
  379. }
  380. };
  381. /* SPI (2) */
  382. static struct resource bfin_spi2_resource[] = {
  383. [0] = {
  384. .start = SPI2_REGBASE,
  385. .end = SPI2_REGBASE + 0xFF,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. [1] = {
  389. .start = CH_SPI2,
  390. .end = CH_SPI2,
  391. .flags = IORESOURCE_DMA,
  392. },
  393. [2] = {
  394. .start = IRQ_SPI2,
  395. .end = IRQ_SPI2,
  396. .flags = IORESOURCE_IRQ,
  397. }
  398. };
  399. /* SPI controller data */
  400. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  401. .num_chipselect = 8,
  402. .enable_dma = 1, /* master has the ability to do dma transfer */
  403. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  404. };
  405. static struct platform_device bf538_spi_master0 = {
  406. .name = "bfin-spi",
  407. .id = 0, /* Bus number */
  408. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  409. .resource = bfin_spi0_resource,
  410. .dev = {
  411. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  412. },
  413. };
  414. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  415. .num_chipselect = 8,
  416. .enable_dma = 1, /* master has the ability to do dma transfer */
  417. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  418. };
  419. static struct platform_device bf538_spi_master1 = {
  420. .name = "bfin-spi",
  421. .id = 1, /* Bus number */
  422. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  423. .resource = bfin_spi1_resource,
  424. .dev = {
  425. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  426. },
  427. };
  428. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  429. .num_chipselect = 8,
  430. .enable_dma = 1, /* master has the ability to do dma transfer */
  431. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  432. };
  433. static struct platform_device bf538_spi_master2 = {
  434. .name = "bfin-spi",
  435. .id = 2, /* Bus number */
  436. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  437. .resource = bfin_spi2_resource,
  438. .dev = {
  439. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  440. },
  441. };
  442. #endif /* spi master and devices */
  443. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  444. static struct resource bfin_twi0_resource[] = {
  445. [0] = {
  446. .start = TWI0_REGBASE,
  447. .end = TWI0_REGBASE + 0xFF,
  448. .flags = IORESOURCE_MEM,
  449. },
  450. [1] = {
  451. .start = IRQ_TWI0,
  452. .end = IRQ_TWI0,
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. };
  456. static struct platform_device i2c_bfin_twi0_device = {
  457. .name = "i2c-bfin-twi",
  458. .id = 0,
  459. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  460. .resource = bfin_twi0_resource,
  461. };
  462. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  463. static struct resource bfin_twi1_resource[] = {
  464. [0] = {
  465. .start = TWI1_REGBASE,
  466. .end = TWI1_REGBASE + 0xFF,
  467. .flags = IORESOURCE_MEM,
  468. },
  469. [1] = {
  470. .start = IRQ_TWI1,
  471. .end = IRQ_TWI1,
  472. .flags = IORESOURCE_IRQ,
  473. },
  474. };
  475. static struct platform_device i2c_bfin_twi1_device = {
  476. .name = "i2c-bfin-twi",
  477. .id = 1,
  478. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  479. .resource = bfin_twi1_resource,
  480. };
  481. #endif
  482. #endif
  483. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  484. #include <linux/gpio_keys.h>
  485. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  486. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  487. };
  488. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  489. .buttons = bfin_gpio_keys_table,
  490. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  491. };
  492. static struct platform_device bfin_device_gpiokeys = {
  493. .name = "gpio-keys",
  494. .dev = {
  495. .platform_data = &bfin_gpio_keys_data,
  496. },
  497. };
  498. #endif
  499. static const unsigned int cclk_vlev_datasheet[] =
  500. {
  501. /*
  502. * Internal VLEV BF538SBBC1533
  503. ****temporarily using these values until data sheet is updated
  504. */
  505. VRPAIR(VLEV_100, 150000000),
  506. VRPAIR(VLEV_100, 250000000),
  507. VRPAIR(VLEV_110, 276000000),
  508. VRPAIR(VLEV_115, 301000000),
  509. VRPAIR(VLEV_120, 525000000),
  510. VRPAIR(VLEV_125, 550000000),
  511. VRPAIR(VLEV_130, 600000000),
  512. };
  513. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  514. .tuple_tab = cclk_vlev_datasheet,
  515. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  516. .vr_settling_time = 25 /* us */,
  517. };
  518. static struct platform_device bfin_dpmc = {
  519. .name = "bfin dpmc",
  520. .dev = {
  521. .platform_data = &bfin_dmpc_vreg_data,
  522. },
  523. };
  524. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  525. static struct mtd_partition ezkit_partitions[] = {
  526. {
  527. .name = "bootloader(nor)",
  528. .size = 0x40000,
  529. .offset = 0,
  530. }, {
  531. .name = "linux kernel(nor)",
  532. .size = 0x180000,
  533. .offset = MTDPART_OFS_APPEND,
  534. }, {
  535. .name = "file system(nor)",
  536. .size = MTDPART_SIZ_FULL,
  537. .offset = MTDPART_OFS_APPEND,
  538. }
  539. };
  540. static struct physmap_flash_data ezkit_flash_data = {
  541. .width = 2,
  542. .parts = ezkit_partitions,
  543. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  544. };
  545. static struct resource ezkit_flash_resource = {
  546. .start = 0x20000000,
  547. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  548. .end = 0x202fffff,
  549. #else
  550. .end = 0x203fffff,
  551. #endif
  552. .flags = IORESOURCE_MEM,
  553. };
  554. static struct platform_device ezkit_flash_device = {
  555. .name = "physmap-flash",
  556. .id = 0,
  557. .dev = {
  558. .platform_data = &ezkit_flash_data,
  559. },
  560. .num_resources = 1,
  561. .resource = &ezkit_flash_resource,
  562. };
  563. #endif
  564. static struct platform_device *cm_bf538_devices[] __initdata = {
  565. &bfin_dpmc,
  566. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  567. &rtc_device,
  568. #endif
  569. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  570. &bfin_uart_device,
  571. #endif
  572. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  573. &bf538_spi_master0,
  574. &bf538_spi_master1,
  575. &bf538_spi_master2,
  576. #endif
  577. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  578. &i2c_bfin_twi0_device,
  579. &i2c_bfin_twi1_device,
  580. #endif
  581. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  582. #ifdef CONFIG_BFIN_SIR0
  583. &bfin_sir0_device,
  584. #endif
  585. #ifdef CONFIG_BFIN_SIR1
  586. &bfin_sir1_device,
  587. #endif
  588. #ifdef CONFIG_BFIN_SIR2
  589. &bfin_sir2_device,
  590. #endif
  591. #endif
  592. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  593. &bfin_can_device,
  594. #endif
  595. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  596. &smc91x_device,
  597. #endif
  598. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  599. &bfin_lq035q1_device,
  600. #endif
  601. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  602. &bfin_device_gpiokeys,
  603. #endif
  604. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  605. &ezkit_flash_device,
  606. #endif
  607. };
  608. static int __init ezkit_init(void)
  609. {
  610. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  611. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  612. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  613. spi_register_board_info(bf538_spi_board_info,
  614. ARRAY_SIZE(bf538_spi_board_info));
  615. #endif
  616. return 0;
  617. }
  618. arch_initcall(ezkit_init);