cm_bf527.c 21 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/sl811.h>
  21. #include <linux/usb/musb.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  37. #include <linux/usb/isp1760.h>
  38. static struct resource bfin_isp1760_resources[] = {
  39. [0] = {
  40. .start = 0x203C0000,
  41. .end = 0x203C0000 + 0x000fffff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_PF7,
  46. .end = IRQ_PF7,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct isp1760_platform_data isp1760_priv = {
  51. .is_isp1761 = 0,
  52. .bus_width_16 = 1,
  53. .port1_otg = 0,
  54. .analog_oc = 0,
  55. .dack_polarity_high = 0,
  56. .dreq_polarity_high = 0,
  57. };
  58. static struct platform_device bfin_isp1760_device = {
  59. .name = "isp1760",
  60. .id = 0,
  61. .dev = {
  62. .platform_data = &isp1760_priv,
  63. },
  64. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  65. .resource = bfin_isp1760_resources,
  66. };
  67. #endif
  68. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  69. static struct resource musb_resources[] = {
  70. [0] = {
  71. .start = 0xffc03800,
  72. .end = 0xffc03cff,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = { /* general IRQ */
  76. .start = IRQ_USB_INT0,
  77. .end = IRQ_USB_INT0,
  78. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79. },
  80. [2] = { /* DMA IRQ */
  81. .start = IRQ_USB_DMA,
  82. .end = IRQ_USB_DMA,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. },
  85. };
  86. static struct musb_hdrc_config musb_config = {
  87. .multipoint = 0,
  88. .dyn_fifo = 0,
  89. .soft_con = 1,
  90. .dma = 1,
  91. .num_eps = 8,
  92. .dma_channels = 8,
  93. .gpio_vrsel = GPIO_PF11,
  94. };
  95. static struct musb_hdrc_platform_data musb_plat = {
  96. #if defined(CONFIG_USB_MUSB_OTG)
  97. .mode = MUSB_OTG,
  98. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  99. .mode = MUSB_HOST,
  100. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  101. .mode = MUSB_PERIPHERAL,
  102. #endif
  103. .config = &musb_config,
  104. };
  105. static u64 musb_dmamask = ~(u32)0;
  106. static struct platform_device musb_device = {
  107. .name = "musb_hdrc",
  108. .id = 0,
  109. .dev = {
  110. .dma_mask = &musb_dmamask,
  111. .coherent_dma_mask = 0xffffffff,
  112. .platform_data = &musb_plat,
  113. },
  114. .num_resources = ARRAY_SIZE(musb_resources),
  115. .resource = musb_resources,
  116. };
  117. #endif
  118. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  119. static struct mtd_partition partition_info[] = {
  120. {
  121. .name = "linux kernel(nand)",
  122. .offset = 0,
  123. .size = 4 * 1024 * 1024,
  124. },
  125. {
  126. .name = "file system(nand)",
  127. .offset = MTDPART_OFS_APPEND,
  128. .size = MTDPART_SIZ_FULL,
  129. },
  130. };
  131. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  132. .page_size = NFC_PG_SIZE_256,
  133. .data_width = NFC_NWIDTH_8,
  134. .partitions = partition_info,
  135. .nr_partitions = ARRAY_SIZE(partition_info),
  136. .rd_dly = 3,
  137. .wr_dly = 3,
  138. };
  139. static struct resource bf5xx_nand_resources[] = {
  140. {
  141. .start = NFC_CTL,
  142. .end = NFC_DATA_RD + 2,
  143. .flags = IORESOURCE_MEM,
  144. },
  145. {
  146. .start = CH_NFC,
  147. .end = CH_NFC,
  148. .flags = IORESOURCE_IRQ,
  149. },
  150. };
  151. static struct platform_device bf5xx_nand_device = {
  152. .name = "bf5xx-nand",
  153. .id = 0,
  154. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  155. .resource = bf5xx_nand_resources,
  156. .dev = {
  157. .platform_data = &bf5xx_nand_platform,
  158. },
  159. };
  160. #endif
  161. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  162. static struct resource bfin_pcmcia_cf_resources[] = {
  163. {
  164. .start = 0x20310000, /* IO PORT */
  165. .end = 0x20312000,
  166. .flags = IORESOURCE_MEM,
  167. }, {
  168. .start = 0x20311000, /* Attribute Memory */
  169. .end = 0x20311FFF,
  170. .flags = IORESOURCE_MEM,
  171. }, {
  172. .start = IRQ_PF4,
  173. .end = IRQ_PF4,
  174. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  175. }, {
  176. .start = 6, /* Card Detect PF6 */
  177. .end = 6,
  178. .flags = IORESOURCE_IRQ,
  179. },
  180. };
  181. static struct platform_device bfin_pcmcia_cf_device = {
  182. .name = "bfin_cf_pcmcia",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  185. .resource = bfin_pcmcia_cf_resources,
  186. };
  187. #endif
  188. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  189. static struct platform_device rtc_device = {
  190. .name = "rtc-bfin",
  191. .id = -1,
  192. };
  193. #endif
  194. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  195. #include <linux/smc91x.h>
  196. static struct smc91x_platdata smc91x_info = {
  197. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  198. .leda = RPC_LED_100_10,
  199. .ledb = RPC_LED_TX_RX,
  200. };
  201. static struct resource smc91x_resources[] = {
  202. {
  203. .name = "smc91x-regs",
  204. .start = 0x20300300,
  205. .end = 0x20300300 + 16,
  206. .flags = IORESOURCE_MEM,
  207. }, {
  208. .start = IRQ_PF7,
  209. .end = IRQ_PF7,
  210. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  211. },
  212. };
  213. static struct platform_device smc91x_device = {
  214. .name = "smc91x",
  215. .id = 0,
  216. .num_resources = ARRAY_SIZE(smc91x_resources),
  217. .resource = smc91x_resources,
  218. .dev = {
  219. .platform_data = &smc91x_info,
  220. },
  221. };
  222. #endif
  223. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  224. static struct resource dm9000_resources[] = {
  225. [0] = {
  226. .start = 0x203FB800,
  227. .end = 0x203FB800 + 1,
  228. .flags = IORESOURCE_MEM,
  229. },
  230. [1] = {
  231. .start = 0x203FB804,
  232. .end = 0x203FB804 + 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [2] = {
  236. .start = IRQ_PF9,
  237. .end = IRQ_PF9,
  238. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  239. },
  240. };
  241. static struct platform_device dm9000_device = {
  242. .name = "dm9000",
  243. .id = -1,
  244. .num_resources = ARRAY_SIZE(dm9000_resources),
  245. .resource = dm9000_resources,
  246. };
  247. #endif
  248. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  249. static struct resource sl811_hcd_resources[] = {
  250. {
  251. .start = 0x20340000,
  252. .end = 0x20340000,
  253. .flags = IORESOURCE_MEM,
  254. }, {
  255. .start = 0x20340004,
  256. .end = 0x20340004,
  257. .flags = IORESOURCE_MEM,
  258. }, {
  259. .start = CONFIG_USB_SL811_BFIN_IRQ,
  260. .end = CONFIG_USB_SL811_BFIN_IRQ,
  261. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  262. },
  263. };
  264. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  265. void sl811_port_power(struct device *dev, int is_on)
  266. {
  267. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  268. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  269. }
  270. #endif
  271. static struct sl811_platform_data sl811_priv = {
  272. .potpg = 10,
  273. .power = 250, /* == 500mA */
  274. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  275. .port_power = &sl811_port_power,
  276. #endif
  277. };
  278. static struct platform_device sl811_hcd_device = {
  279. .name = "sl811-hcd",
  280. .id = 0,
  281. .dev = {
  282. .platform_data = &sl811_priv,
  283. },
  284. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  285. .resource = sl811_hcd_resources,
  286. };
  287. #endif
  288. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  289. static struct platform_device bfin_mii_bus = {
  290. .name = "bfin_mii_bus",
  291. };
  292. static struct platform_device bfin_mac_device = {
  293. .name = "bfin_mac",
  294. .dev.platform_data = &bfin_mii_bus,
  295. };
  296. #endif
  297. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  298. static struct resource net2272_bfin_resources[] = {
  299. {
  300. .start = 0x20300000,
  301. .end = 0x20300000 + 0x100,
  302. .flags = IORESOURCE_MEM,
  303. }, {
  304. .start = IRQ_PF7,
  305. .end = IRQ_PF7,
  306. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  307. },
  308. };
  309. static struct platform_device net2272_bfin_device = {
  310. .name = "net2272",
  311. .id = -1,
  312. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  313. .resource = net2272_bfin_resources,
  314. };
  315. #endif
  316. #if defined(CONFIG_MTD_M25P80) \
  317. || defined(CONFIG_MTD_M25P80_MODULE)
  318. static struct mtd_partition bfin_spi_flash_partitions[] = {
  319. {
  320. .name = "bootloader(spi)",
  321. .size = 0x00040000,
  322. .offset = 0,
  323. .mask_flags = MTD_CAP_ROM
  324. }, {
  325. .name = "linux kernel(spi)",
  326. .size = MTDPART_SIZ_FULL,
  327. .offset = MTDPART_OFS_APPEND,
  328. }
  329. };
  330. static struct flash_platform_data bfin_spi_flash_data = {
  331. .name = "m25p80",
  332. .parts = bfin_spi_flash_partitions,
  333. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  334. .type = "m25p16",
  335. };
  336. /* SPI flash chip (m25p64) */
  337. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  338. .enable_dma = 0, /* use dma transfer with this chip*/
  339. .bits_per_word = 8,
  340. };
  341. #endif
  342. #if defined(CONFIG_BFIN_SPI_ADC) \
  343. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  344. /* SPI ADC chip */
  345. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  346. .enable_dma = 1, /* use dma transfer with this chip*/
  347. .bits_per_word = 16,
  348. };
  349. #endif
  350. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  351. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  352. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  353. .enable_dma = 0,
  354. .bits_per_word = 16,
  355. };
  356. #endif
  357. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  358. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  359. .enable_dma = 0,
  360. .bits_per_word = 8,
  361. };
  362. #endif
  363. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  364. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  365. .enable_dma = 0,
  366. .bits_per_word = 16,
  367. };
  368. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  369. .model = 7877,
  370. .vref_delay_usecs = 50, /* internal, no capacitor */
  371. .x_plate_ohms = 419,
  372. .y_plate_ohms = 486,
  373. .pressure_max = 1000,
  374. .pressure_min = 0,
  375. .stopacq_polarity = 1,
  376. .first_conversion_delay = 3,
  377. .acquisition_time = 1,
  378. .averaging = 1,
  379. .pen_down_acc_interval = 1,
  380. };
  381. #endif
  382. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  383. && defined(CONFIG_SND_SOC_WM8731_SPI)
  384. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  385. .enable_dma = 0,
  386. .bits_per_word = 16,
  387. };
  388. #endif
  389. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  390. static struct bfin5xx_spi_chip spidev_chip_info = {
  391. .enable_dma = 0,
  392. .bits_per_word = 8,
  393. };
  394. #endif
  395. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  396. #if defined(CONFIG_MTD_M25P80) \
  397. || defined(CONFIG_MTD_M25P80_MODULE)
  398. {
  399. /* the modalias must be the same as spi device driver name */
  400. .modalias = "m25p80", /* Name of spi_driver for this device */
  401. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  402. .bus_num = 0, /* Framework bus number */
  403. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  404. .platform_data = &bfin_spi_flash_data,
  405. .controller_data = &spi_flash_chip_info,
  406. .mode = SPI_MODE_3,
  407. },
  408. #endif
  409. #if defined(CONFIG_BFIN_SPI_ADC) \
  410. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  411. {
  412. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  413. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  414. .bus_num = 0, /* Framework bus number */
  415. .chip_select = 1, /* Framework chip select. */
  416. .platform_data = NULL, /* No spi_driver specific config */
  417. .controller_data = &spi_adc_chip_info,
  418. },
  419. #endif
  420. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  421. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  422. {
  423. .modalias = "ad1836",
  424. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  425. .bus_num = 0,
  426. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  427. .controller_data = &ad1836_spi_chip_info,
  428. },
  429. #endif
  430. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  431. {
  432. .modalias = "mmc_spi",
  433. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  434. .bus_num = 0,
  435. .chip_select = 5,
  436. .controller_data = &mmc_spi_chip_info,
  437. .mode = SPI_MODE_3,
  438. },
  439. #endif
  440. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  441. {
  442. .modalias = "ad7877",
  443. .platform_data = &bfin_ad7877_ts_info,
  444. .irq = IRQ_PF8,
  445. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  446. .bus_num = 0,
  447. .chip_select = 2,
  448. .controller_data = &spi_ad7877_chip_info,
  449. },
  450. #endif
  451. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  452. && defined(CONFIG_SND_SOC_WM8731_SPI)
  453. {
  454. .modalias = "wm8731",
  455. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  456. .bus_num = 0,
  457. .chip_select = 5,
  458. .controller_data = &spi_wm8731_chip_info,
  459. .mode = SPI_MODE_0,
  460. },
  461. #endif
  462. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  463. {
  464. .modalias = "spidev",
  465. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  466. .bus_num = 0,
  467. .chip_select = 1,
  468. .controller_data = &spidev_chip_info,
  469. },
  470. #endif
  471. };
  472. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  473. /* SPI controller data */
  474. static struct bfin5xx_spi_master bfin_spi0_info = {
  475. .num_chipselect = 8,
  476. .enable_dma = 1, /* master has the ability to do dma transfer */
  477. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  478. };
  479. /* SPI (0) */
  480. static struct resource bfin_spi0_resource[] = {
  481. [0] = {
  482. .start = SPI0_REGBASE,
  483. .end = SPI0_REGBASE + 0xFF,
  484. .flags = IORESOURCE_MEM,
  485. },
  486. [1] = {
  487. .start = CH_SPI,
  488. .end = CH_SPI,
  489. .flags = IORESOURCE_DMA,
  490. },
  491. [2] = {
  492. .start = IRQ_SPI,
  493. .end = IRQ_SPI,
  494. .flags = IORESOURCE_IRQ,
  495. },
  496. };
  497. static struct platform_device bfin_spi0_device = {
  498. .name = "bfin-spi",
  499. .id = 0, /* Bus number */
  500. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  501. .resource = bfin_spi0_resource,
  502. .dev = {
  503. .platform_data = &bfin_spi0_info, /* Passed to driver */
  504. },
  505. };
  506. #endif /* spi master and devices */
  507. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  508. static struct mtd_partition cm_partitions[] = {
  509. {
  510. .name = "bootloader(nor)",
  511. .size = 0x40000,
  512. .offset = 0,
  513. }, {
  514. .name = "linux kernel(nor)",
  515. .size = 0x100000,
  516. .offset = MTDPART_OFS_APPEND,
  517. }, {
  518. .name = "file system(nor)",
  519. .size = MTDPART_SIZ_FULL,
  520. .offset = MTDPART_OFS_APPEND,
  521. }
  522. };
  523. static struct physmap_flash_data cm_flash_data = {
  524. .width = 2,
  525. .parts = cm_partitions,
  526. .nr_parts = ARRAY_SIZE(cm_partitions),
  527. };
  528. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  529. static struct resource cm_flash_resource[] = {
  530. {
  531. .name = "cfi_probe",
  532. .start = 0x20000000,
  533. .end = 0x201fffff,
  534. .flags = IORESOURCE_MEM,
  535. }, {
  536. .start = (unsigned long)cm_flash_gpios,
  537. .end = ARRAY_SIZE(cm_flash_gpios),
  538. .flags = IORESOURCE_IRQ,
  539. }
  540. };
  541. static struct platform_device cm_flash_device = {
  542. .name = "gpio-addr-flash",
  543. .id = 0,
  544. .dev = {
  545. .platform_data = &cm_flash_data,
  546. },
  547. .num_resources = ARRAY_SIZE(cm_flash_resource),
  548. .resource = cm_flash_resource,
  549. };
  550. #endif
  551. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  552. static struct resource bfin_uart_resources[] = {
  553. #ifdef CONFIG_SERIAL_BFIN_UART0
  554. {
  555. .start = 0xFFC00400,
  556. .end = 0xFFC004FF,
  557. .flags = IORESOURCE_MEM,
  558. },
  559. #endif
  560. #ifdef CONFIG_SERIAL_BFIN_UART1
  561. {
  562. .start = 0xFFC02000,
  563. .end = 0xFFC020FF,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. #endif
  567. };
  568. static struct platform_device bfin_uart_device = {
  569. .name = "bfin-uart",
  570. .id = 1,
  571. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  572. .resource = bfin_uart_resources,
  573. };
  574. #endif
  575. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  576. #ifdef CONFIG_BFIN_SIR0
  577. static struct resource bfin_sir0_resources[] = {
  578. {
  579. .start = 0xFFC00400,
  580. .end = 0xFFC004FF,
  581. .flags = IORESOURCE_MEM,
  582. },
  583. {
  584. .start = IRQ_UART0_RX,
  585. .end = IRQ_UART0_RX+1,
  586. .flags = IORESOURCE_IRQ,
  587. },
  588. {
  589. .start = CH_UART0_RX,
  590. .end = CH_UART0_RX+1,
  591. .flags = IORESOURCE_DMA,
  592. },
  593. };
  594. static struct platform_device bfin_sir0_device = {
  595. .name = "bfin_sir",
  596. .id = 0,
  597. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  598. .resource = bfin_sir0_resources,
  599. };
  600. #endif
  601. #ifdef CONFIG_BFIN_SIR1
  602. static struct resource bfin_sir1_resources[] = {
  603. {
  604. .start = 0xFFC02000,
  605. .end = 0xFFC020FF,
  606. .flags = IORESOURCE_MEM,
  607. },
  608. {
  609. .start = IRQ_UART1_RX,
  610. .end = IRQ_UART1_RX+1,
  611. .flags = IORESOURCE_IRQ,
  612. },
  613. {
  614. .start = CH_UART1_RX,
  615. .end = CH_UART1_RX+1,
  616. .flags = IORESOURCE_DMA,
  617. },
  618. };
  619. static struct platform_device bfin_sir1_device = {
  620. .name = "bfin_sir",
  621. .id = 1,
  622. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  623. .resource = bfin_sir1_resources,
  624. };
  625. #endif
  626. #endif
  627. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  628. static struct resource bfin_twi0_resource[] = {
  629. [0] = {
  630. .start = TWI0_REGBASE,
  631. .end = TWI0_REGBASE,
  632. .flags = IORESOURCE_MEM,
  633. },
  634. [1] = {
  635. .start = IRQ_TWI,
  636. .end = IRQ_TWI,
  637. .flags = IORESOURCE_IRQ,
  638. },
  639. };
  640. static struct platform_device i2c_bfin_twi_device = {
  641. .name = "i2c-bfin-twi",
  642. .id = 0,
  643. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  644. .resource = bfin_twi0_resource,
  645. };
  646. #endif
  647. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  648. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  649. {
  650. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  651. },
  652. #endif
  653. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  654. {
  655. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  656. .irq = IRQ_PF8,
  657. },
  658. #endif
  659. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  660. {
  661. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  662. },
  663. #endif
  664. };
  665. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  666. static struct platform_device bfin_sport0_uart_device = {
  667. .name = "bfin-sport-uart",
  668. .id = 0,
  669. };
  670. static struct platform_device bfin_sport1_uart_device = {
  671. .name = "bfin-sport-uart",
  672. .id = 1,
  673. };
  674. #endif
  675. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  676. #include <linux/input.h>
  677. #include <linux/gpio_keys.h>
  678. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  679. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  680. };
  681. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  682. .buttons = bfin_gpio_keys_table,
  683. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  684. };
  685. static struct platform_device bfin_device_gpiokeys = {
  686. .name = "gpio-keys",
  687. .dev = {
  688. .platform_data = &bfin_gpio_keys_data,
  689. },
  690. };
  691. #endif
  692. static const unsigned int cclk_vlev_datasheet[] =
  693. {
  694. VRPAIR(VLEV_100, 400000000),
  695. VRPAIR(VLEV_105, 426000000),
  696. VRPAIR(VLEV_110, 500000000),
  697. VRPAIR(VLEV_115, 533000000),
  698. VRPAIR(VLEV_120, 600000000),
  699. };
  700. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  701. .tuple_tab = cclk_vlev_datasheet,
  702. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  703. .vr_settling_time = 25 /* us */,
  704. };
  705. static struct platform_device bfin_dpmc = {
  706. .name = "bfin dpmc",
  707. .dev = {
  708. .platform_data = &bfin_dmpc_vreg_data,
  709. },
  710. };
  711. static struct platform_device *cmbf527_devices[] __initdata = {
  712. &bfin_dpmc,
  713. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  714. &bf5xx_nand_device,
  715. #endif
  716. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  717. &bfin_pcmcia_cf_device,
  718. #endif
  719. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  720. &rtc_device,
  721. #endif
  722. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  723. &sl811_hcd_device,
  724. #endif
  725. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  726. &bfin_isp1760_device,
  727. #endif
  728. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  729. &musb_device,
  730. #endif
  731. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  732. &smc91x_device,
  733. #endif
  734. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  735. &dm9000_device,
  736. #endif
  737. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  738. &bfin_mii_bus,
  739. &bfin_mac_device,
  740. #endif
  741. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  742. &net2272_bfin_device,
  743. #endif
  744. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  745. &bfin_spi0_device,
  746. #endif
  747. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  748. &bfin_uart_device,
  749. #endif
  750. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  751. #ifdef CONFIG_BFIN_SIR0
  752. &bfin_sir0_device,
  753. #endif
  754. #ifdef CONFIG_BFIN_SIR1
  755. &bfin_sir1_device,
  756. #endif
  757. #endif
  758. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  759. &i2c_bfin_twi_device,
  760. #endif
  761. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  762. &bfin_sport0_uart_device,
  763. &bfin_sport1_uart_device,
  764. #endif
  765. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  766. &bfin_device_gpiokeys,
  767. #endif
  768. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  769. &cm_flash_device,
  770. #endif
  771. };
  772. static int __init cm_init(void)
  773. {
  774. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  775. i2c_register_board_info(0, bfin_i2c_board_info,
  776. ARRAY_SIZE(bfin_i2c_board_info));
  777. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  778. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  779. return 0;
  780. }
  781. arch_initcall(cm_init);
  782. void native_machine_restart(char *cmd)
  783. {
  784. /* workaround reboot hang when booting from SPI */
  785. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  786. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  787. }
  788. void bfin_get_ether_addr(char *addr)
  789. {
  790. random_ether_addr(addr);
  791. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  792. }
  793. EXPORT_SYMBOL(bfin_get_ether_addr);