s3c244x.c 4.6 KB

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  1. /* linux/arch/arm/plat-s3c24xx/s3c244x.c
  2. *
  3. * Copyright (c) 2004-2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/sysdev.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/irq.h>
  26. #include <mach/hardware.h>
  27. #include <asm/irq.h>
  28. #include <plat/cpu-freq.h>
  29. #include <mach/regs-clock.h>
  30. #include <plat/regs-serial.h>
  31. #include <mach/regs-gpio.h>
  32. #include <mach/regs-gpioj.h>
  33. #include <mach/regs-dsc.h>
  34. #include <plat/s3c2410.h>
  35. #include <plat/s3c2440.h>
  36. #include "s3c244x.h"
  37. #include <plat/clock.h>
  38. #include <plat/devs.h>
  39. #include <plat/cpu.h>
  40. #include <plat/pm.h>
  41. #include <plat/pll.h>
  42. static struct map_desc s3c244x_iodesc[] __initdata = {
  43. IODESC_ENT(CLKPWR),
  44. IODESC_ENT(TIMER),
  45. IODESC_ENT(WATCHDOG),
  46. };
  47. /* uart initialisation */
  48. void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  49. {
  50. s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
  51. }
  52. void __init s3c244x_map_io(void)
  53. {
  54. /* register our io-tables */
  55. iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
  56. /* rename any peripherals used differing from the s3c2410 */
  57. s3c_device_sdi.name = "s3c2440-sdi";
  58. s3c_device_i2c0.name = "s3c2440-i2c";
  59. s3c_device_nand.name = "s3c2440-nand";
  60. s3c_device_ts.name = "s3c2440-ts";
  61. s3c_device_usbgadget.name = "s3c2440-usbgadget";
  62. }
  63. void __init_or_cpufreq s3c244x_setup_clocks(void)
  64. {
  65. struct clk *xtal_clk;
  66. unsigned long clkdiv;
  67. unsigned long camdiv;
  68. unsigned long xtal;
  69. unsigned long hclk, fclk, pclk;
  70. int hdiv = 1;
  71. xtal_clk = clk_get(NULL, "xtal");
  72. xtal = clk_get_rate(xtal_clk);
  73. clk_put(xtal_clk);
  74. fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
  75. clkdiv = __raw_readl(S3C2410_CLKDIVN);
  76. camdiv = __raw_readl(S3C2440_CAMDIVN);
  77. /* work out clock scalings */
  78. switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
  79. case S3C2440_CLKDIVN_HDIVN_1:
  80. hdiv = 1;
  81. break;
  82. case S3C2440_CLKDIVN_HDIVN_2:
  83. hdiv = 2;
  84. break;
  85. case S3C2440_CLKDIVN_HDIVN_4_8:
  86. hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
  87. break;
  88. case S3C2440_CLKDIVN_HDIVN_3_6:
  89. hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
  90. break;
  91. }
  92. hclk = fclk / hdiv;
  93. pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
  94. /* print brief summary of clocks, etc */
  95. printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  96. print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
  97. s3c24xx_setup_clocks(fclk, hclk, pclk);
  98. }
  99. void __init s3c244x_init_clocks(int xtal)
  100. {
  101. /* initialise the clocks here, to allow other things like the
  102. * console to use them, and to add new ones after the initialisation
  103. */
  104. s3c24xx_register_baseclocks(xtal);
  105. s3c244x_setup_clocks();
  106. s3c2410_baseclk_add();
  107. }
  108. #ifdef CONFIG_PM
  109. static struct sleep_save s3c244x_sleep[] = {
  110. SAVE_ITEM(S3C2440_DSC0),
  111. SAVE_ITEM(S3C2440_DSC1),
  112. SAVE_ITEM(S3C2440_GPJDAT),
  113. SAVE_ITEM(S3C2440_GPJCON),
  114. SAVE_ITEM(S3C2440_GPJUP)
  115. };
  116. static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
  117. {
  118. s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
  119. return 0;
  120. }
  121. static int s3c244x_resume(struct sys_device *dev)
  122. {
  123. s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
  124. return 0;
  125. }
  126. #else
  127. #define s3c244x_suspend NULL
  128. #define s3c244x_resume NULL
  129. #endif
  130. /* Since the S3C2442 and S3C2440 share items, put both sysclasses here */
  131. struct sysdev_class s3c2440_sysclass = {
  132. .name = "s3c2440-core",
  133. .suspend = s3c244x_suspend,
  134. .resume = s3c244x_resume
  135. };
  136. struct sysdev_class s3c2442_sysclass = {
  137. .name = "s3c2442-core",
  138. .suspend = s3c244x_suspend,
  139. .resume = s3c244x_resume
  140. };
  141. /* need to register class before we actually register the device, and
  142. * we also need to ensure that it has been initialised before any of the
  143. * drivers even try to use it (even if not on an s3c2440 based system)
  144. * as a driver which may support both 2410 and 2440 may try and use it.
  145. */
  146. static int __init s3c2440_core_init(void)
  147. {
  148. return sysdev_class_register(&s3c2440_sysclass);
  149. }
  150. core_initcall(s3c2440_core_init);
  151. static int __init s3c2442_core_init(void)
  152. {
  153. return sysdev_class_register(&s3c2442_sysclass);
  154. }
  155. core_initcall(s3c2442_core_init);