devs.c 11 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/irq.h>
  25. #include <mach/fb.h>
  26. #include <mach/hardware.h>
  27. #include <mach/dma.h>
  28. #include <mach/irqs.h>
  29. #include <asm/irq.h>
  30. #include <plat/regs-serial.h>
  31. #include <plat/udc.h>
  32. #include <plat/devs.h>
  33. #include <plat/cpu.h>
  34. #include <plat/regs-spi.h>
  35. #include <mach/ts.h>
  36. /* Serial port registrations */
  37. static struct resource s3c2410_uart0_resource[] = {
  38. [0] = {
  39. .start = S3C2410_PA_UART0,
  40. .end = S3C2410_PA_UART0 + 0x3fff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_S3CUART_RX0,
  45. .end = IRQ_S3CUART_ERR0,
  46. .flags = IORESOURCE_IRQ,
  47. }
  48. };
  49. static struct resource s3c2410_uart1_resource[] = {
  50. [0] = {
  51. .start = S3C2410_PA_UART1,
  52. .end = S3C2410_PA_UART1 + 0x3fff,
  53. .flags = IORESOURCE_MEM,
  54. },
  55. [1] = {
  56. .start = IRQ_S3CUART_RX1,
  57. .end = IRQ_S3CUART_ERR1,
  58. .flags = IORESOURCE_IRQ,
  59. }
  60. };
  61. static struct resource s3c2410_uart2_resource[] = {
  62. [0] = {
  63. .start = S3C2410_PA_UART2,
  64. .end = S3C2410_PA_UART2 + 0x3fff,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. [1] = {
  68. .start = IRQ_S3CUART_RX2,
  69. .end = IRQ_S3CUART_ERR2,
  70. .flags = IORESOURCE_IRQ,
  71. }
  72. };
  73. static struct resource s3c2410_uart3_resource[] = {
  74. [0] = {
  75. .start = S3C2443_PA_UART3,
  76. .end = S3C2443_PA_UART3 + 0x3fff,
  77. .flags = IORESOURCE_MEM,
  78. },
  79. [1] = {
  80. .start = IRQ_S3CUART_RX3,
  81. .end = IRQ_S3CUART_ERR3,
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  86. [0] = {
  87. .resources = s3c2410_uart0_resource,
  88. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  89. },
  90. [1] = {
  91. .resources = s3c2410_uart1_resource,
  92. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  93. },
  94. [2] = {
  95. .resources = s3c2410_uart2_resource,
  96. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  97. },
  98. [3] = {
  99. .resources = s3c2410_uart3_resource,
  100. .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
  101. },
  102. };
  103. /* yart devices */
  104. static struct platform_device s3c24xx_uart_device0 = {
  105. .id = 0,
  106. };
  107. static struct platform_device s3c24xx_uart_device1 = {
  108. .id = 1,
  109. };
  110. static struct platform_device s3c24xx_uart_device2 = {
  111. .id = 2,
  112. };
  113. static struct platform_device s3c24xx_uart_device3 = {
  114. .id = 3,
  115. };
  116. struct platform_device *s3c24xx_uart_src[4] = {
  117. &s3c24xx_uart_device0,
  118. &s3c24xx_uart_device1,
  119. &s3c24xx_uart_device2,
  120. &s3c24xx_uart_device3,
  121. };
  122. struct platform_device *s3c24xx_uart_devs[4] = {
  123. };
  124. /* LCD Controller */
  125. static struct resource s3c_lcd_resource[] = {
  126. [0] = {
  127. .start = S3C24XX_PA_LCD,
  128. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  129. .flags = IORESOURCE_MEM,
  130. },
  131. [1] = {
  132. .start = IRQ_LCD,
  133. .end = IRQ_LCD,
  134. .flags = IORESOURCE_IRQ,
  135. }
  136. };
  137. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  138. struct platform_device s3c_device_lcd = {
  139. .name = "s3c2410-lcd",
  140. .id = -1,
  141. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  142. .resource = s3c_lcd_resource,
  143. .dev = {
  144. .dma_mask = &s3c_device_lcd_dmamask,
  145. .coherent_dma_mask = 0xffffffffUL
  146. }
  147. };
  148. EXPORT_SYMBOL(s3c_device_lcd);
  149. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  150. {
  151. struct s3c2410fb_mach_info *npd;
  152. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  153. if (npd) {
  154. memcpy(npd, pd, sizeof(*npd));
  155. s3c_device_lcd.dev.platform_data = npd;
  156. } else {
  157. printk(KERN_ERR "no memory for LCD platform data\n");
  158. }
  159. }
  160. /* Touchscreen */
  161. struct platform_device s3c_device_ts = {
  162. .name = "s3c2410-ts",
  163. .id = -1,
  164. };
  165. EXPORT_SYMBOL(s3c_device_ts);
  166. static struct s3c2410_ts_mach_info s3c2410ts_info;
  167. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  168. {
  169. memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
  170. s3c_device_ts.dev.platform_data = &s3c2410ts_info;
  171. }
  172. EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
  173. /* USB Device (Gadget)*/
  174. static struct resource s3c_usbgadget_resource[] = {
  175. [0] = {
  176. .start = S3C24XX_PA_USBDEV,
  177. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. [1] = {
  181. .start = IRQ_USBD,
  182. .end = IRQ_USBD,
  183. .flags = IORESOURCE_IRQ,
  184. }
  185. };
  186. struct platform_device s3c_device_usbgadget = {
  187. .name = "s3c2410-usbgadget",
  188. .id = -1,
  189. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  190. .resource = s3c_usbgadget_resource,
  191. };
  192. EXPORT_SYMBOL(s3c_device_usbgadget);
  193. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  194. {
  195. struct s3c2410_udc_mach_info *npd;
  196. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  197. if (npd) {
  198. memcpy(npd, pd, sizeof(*npd));
  199. s3c_device_usbgadget.dev.platform_data = npd;
  200. } else {
  201. printk(KERN_ERR "no memory for udc platform data\n");
  202. }
  203. }
  204. /* Watchdog */
  205. static struct resource s3c_wdt_resource[] = {
  206. [0] = {
  207. .start = S3C24XX_PA_WATCHDOG,
  208. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [1] = {
  212. .start = IRQ_WDT,
  213. .end = IRQ_WDT,
  214. .flags = IORESOURCE_IRQ,
  215. }
  216. };
  217. struct platform_device s3c_device_wdt = {
  218. .name = "s3c2410-wdt",
  219. .id = -1,
  220. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  221. .resource = s3c_wdt_resource,
  222. };
  223. EXPORT_SYMBOL(s3c_device_wdt);
  224. /* IIS */
  225. static struct resource s3c_iis_resource[] = {
  226. [0] = {
  227. .start = S3C24XX_PA_IIS,
  228. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  229. .flags = IORESOURCE_MEM,
  230. }
  231. };
  232. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  233. struct platform_device s3c_device_iis = {
  234. .name = "s3c2410-iis",
  235. .id = -1,
  236. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  237. .resource = s3c_iis_resource,
  238. .dev = {
  239. .dma_mask = &s3c_device_iis_dmamask,
  240. .coherent_dma_mask = 0xffffffffUL
  241. }
  242. };
  243. EXPORT_SYMBOL(s3c_device_iis);
  244. /* RTC */
  245. static struct resource s3c_rtc_resource[] = {
  246. [0] = {
  247. .start = S3C24XX_PA_RTC,
  248. .end = S3C24XX_PA_RTC + 0xff,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. [1] = {
  252. .start = IRQ_RTC,
  253. .end = IRQ_RTC,
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. [2] = {
  257. .start = IRQ_TICK,
  258. .end = IRQ_TICK,
  259. .flags = IORESOURCE_IRQ
  260. }
  261. };
  262. struct platform_device s3c_device_rtc = {
  263. .name = "s3c2410-rtc",
  264. .id = -1,
  265. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  266. .resource = s3c_rtc_resource,
  267. };
  268. EXPORT_SYMBOL(s3c_device_rtc);
  269. /* ADC */
  270. static struct resource s3c_adc_resource[] = {
  271. [0] = {
  272. .start = S3C24XX_PA_ADC,
  273. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. [1] = {
  277. .start = IRQ_TC,
  278. .end = IRQ_TC,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. [2] = {
  282. .start = IRQ_ADC,
  283. .end = IRQ_ADC,
  284. .flags = IORESOURCE_IRQ,
  285. }
  286. };
  287. struct platform_device s3c_device_adc = {
  288. .name = "s3c24xx-adc",
  289. .id = -1,
  290. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  291. .resource = s3c_adc_resource,
  292. };
  293. /* HWMON */
  294. struct platform_device s3c_device_hwmon = {
  295. .name = "s3c-hwmon",
  296. .id = -1,
  297. .dev.parent = &s3c_device_adc.dev,
  298. };
  299. /* SDI */
  300. static struct resource s3c_sdi_resource[] = {
  301. [0] = {
  302. .start = S3C24XX_PA_SDI,
  303. .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. [1] = {
  307. .start = IRQ_SDI,
  308. .end = IRQ_SDI,
  309. .flags = IORESOURCE_IRQ,
  310. }
  311. };
  312. struct platform_device s3c_device_sdi = {
  313. .name = "s3c2410-sdi",
  314. .id = -1,
  315. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  316. .resource = s3c_sdi_resource,
  317. };
  318. EXPORT_SYMBOL(s3c_device_sdi);
  319. /* SPI (0) */
  320. static struct resource s3c_spi0_resource[] = {
  321. [0] = {
  322. .start = S3C24XX_PA_SPI,
  323. .end = S3C24XX_PA_SPI + 0x1f,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. [1] = {
  327. .start = IRQ_SPI0,
  328. .end = IRQ_SPI0,
  329. .flags = IORESOURCE_IRQ,
  330. }
  331. };
  332. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  333. struct platform_device s3c_device_spi0 = {
  334. .name = "s3c2410-spi",
  335. .id = 0,
  336. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  337. .resource = s3c_spi0_resource,
  338. .dev = {
  339. .dma_mask = &s3c_device_spi0_dmamask,
  340. .coherent_dma_mask = 0xffffffffUL
  341. }
  342. };
  343. EXPORT_SYMBOL(s3c_device_spi0);
  344. /* SPI (1) */
  345. static struct resource s3c_spi1_resource[] = {
  346. [0] = {
  347. .start = S3C24XX_PA_SPI + S3C2410_SPI1,
  348. .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
  349. .flags = IORESOURCE_MEM,
  350. },
  351. [1] = {
  352. .start = IRQ_SPI1,
  353. .end = IRQ_SPI1,
  354. .flags = IORESOURCE_IRQ,
  355. }
  356. };
  357. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  358. struct platform_device s3c_device_spi1 = {
  359. .name = "s3c2410-spi",
  360. .id = 1,
  361. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  362. .resource = s3c_spi1_resource,
  363. .dev = {
  364. .dma_mask = &s3c_device_spi1_dmamask,
  365. .coherent_dma_mask = 0xffffffffUL
  366. }
  367. };
  368. EXPORT_SYMBOL(s3c_device_spi1);
  369. #ifdef CONFIG_CPU_S3C2440
  370. /* Camif Controller */
  371. static struct resource s3c_camif_resource[] = {
  372. [0] = {
  373. .start = S3C2440_PA_CAMIF,
  374. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. [1] = {
  378. .start = IRQ_CAM,
  379. .end = IRQ_CAM,
  380. .flags = IORESOURCE_IRQ,
  381. }
  382. };
  383. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  384. struct platform_device s3c_device_camif = {
  385. .name = "s3c2440-camif",
  386. .id = -1,
  387. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  388. .resource = s3c_camif_resource,
  389. .dev = {
  390. .dma_mask = &s3c_device_camif_dmamask,
  391. .coherent_dma_mask = 0xffffffffUL
  392. }
  393. };
  394. EXPORT_SYMBOL(s3c_device_camif);
  395. /* AC97 */
  396. static struct resource s3c_ac97_resource[] = {
  397. [0] = {
  398. .start = S3C2440_PA_AC97,
  399. .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. [1] = {
  403. .start = IRQ_S3C244x_AC97,
  404. .end = IRQ_S3C244x_AC97,
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. [2] = {
  408. .name = "PCM out",
  409. .start = DMACH_PCM_OUT,
  410. .end = DMACH_PCM_OUT,
  411. .flags = IORESOURCE_DMA,
  412. },
  413. [3] = {
  414. .name = "PCM in",
  415. .start = DMACH_PCM_IN,
  416. .end = DMACH_PCM_IN,
  417. .flags = IORESOURCE_DMA,
  418. },
  419. [4] = {
  420. .name = "Mic in",
  421. .start = DMACH_MIC_IN,
  422. .end = DMACH_MIC_IN,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. static u64 s3c_device_ac97_dmamask = 0xffffffffUL;
  427. struct platform_device s3c_device_ac97 = {
  428. .name = "s3c-ac97",
  429. .id = -1,
  430. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  431. .resource = s3c_ac97_resource,
  432. .dev = {
  433. .dma_mask = &s3c_device_ac97_dmamask,
  434. .coherent_dma_mask = 0xffffffffUL
  435. }
  436. };
  437. EXPORT_SYMBOL(s3c_device_ac97);
  438. #endif // CONFIG_CPU_S32440