board-cm-t35.c 16 KB

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  1. /*
  2. * board-cm-t35.c (CompuLab CM-T35 module)
  3. *
  4. * Copyright (C) 2009 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/input.h>
  26. #include <linux/input/matrix_keypad.h>
  27. #include <linux/delay.h>
  28. #include <linux/gpio.h>
  29. #include <linux/i2c/at24.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/regulator/machine.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <plat/board.h>
  36. #include <plat/common.h>
  37. #include <plat/nand.h>
  38. #include <plat/gpmc.h>
  39. #include <plat/usb.h>
  40. #include <mach/hardware.h>
  41. #include "mux.h"
  42. #include "sdram-micron-mt46h32m32lf-6.h"
  43. #include "mmc-twl4030.h"
  44. #define CM_T35_GPIO_PENDOWN 57
  45. #define CM_T35_SMSC911X_CS 5
  46. #define CM_T35_SMSC911X_GPIO 163
  47. #define SB_T35_SMSC911X_CS 4
  48. #define SB_T35_SMSC911X_GPIO 65
  49. #define NAND_BLOCK_SIZE SZ_128K
  50. #define GPMC_CS0_BASE 0x60
  51. #define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
  52. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  53. #include <linux/smsc911x.h>
  54. static struct smsc911x_platform_config cm_t35_smsc911x_config = {
  55. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  56. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  57. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  58. .phy_interface = PHY_INTERFACE_MODE_MII,
  59. };
  60. static struct resource cm_t35_smsc911x_resources[] = {
  61. {
  62. .flags = IORESOURCE_MEM,
  63. },
  64. {
  65. .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  66. .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  67. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  68. },
  69. };
  70. static struct platform_device cm_t35_smsc911x_device = {
  71. .name = "smsc911x",
  72. .id = 0,
  73. .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
  74. .resource = cm_t35_smsc911x_resources,
  75. .dev = {
  76. .platform_data = &cm_t35_smsc911x_config,
  77. },
  78. };
  79. static struct resource sb_t35_smsc911x_resources[] = {
  80. {
  81. .flags = IORESOURCE_MEM,
  82. },
  83. {
  84. .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  85. .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  86. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  87. },
  88. };
  89. static struct platform_device sb_t35_smsc911x_device = {
  90. .name = "smsc911x",
  91. .id = 1,
  92. .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
  93. .resource = sb_t35_smsc911x_resources,
  94. .dev = {
  95. .platform_data = &cm_t35_smsc911x_config,
  96. },
  97. };
  98. static void __init cm_t35_init_smsc911x(struct platform_device *dev,
  99. int cs, int irq_gpio)
  100. {
  101. unsigned long cs_mem_base;
  102. if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
  103. pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
  104. return;
  105. }
  106. dev->resource[0].start = cs_mem_base + 0x0;
  107. dev->resource[0].end = cs_mem_base + 0xff;
  108. if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
  109. (gpio_direction_input(irq_gpio) == 0)) {
  110. gpio_export(irq_gpio, 0);
  111. } else {
  112. pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
  113. return;
  114. }
  115. platform_device_register(dev);
  116. }
  117. static void __init cm_t35_init_ethernet(void)
  118. {
  119. cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
  120. CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
  121. cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
  122. SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
  123. }
  124. #else
  125. static inline void __init cm_t35_init_ethernet(void) { return; }
  126. #endif
  127. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  128. #include <linux/leds.h>
  129. static struct gpio_led cm_t35_leds[] = {
  130. [0] = {
  131. .gpio = 186,
  132. .name = "cm-t35:green",
  133. .default_trigger = "heartbeat",
  134. .active_low = 0,
  135. },
  136. };
  137. static struct gpio_led_platform_data cm_t35_led_pdata = {
  138. .num_leds = ARRAY_SIZE(cm_t35_leds),
  139. .leds = cm_t35_leds,
  140. };
  141. static struct platform_device cm_t35_led_device = {
  142. .name = "leds-gpio",
  143. .id = -1,
  144. .dev = {
  145. .platform_data = &cm_t35_led_pdata,
  146. },
  147. };
  148. static void __init cm_t35_init_led(void)
  149. {
  150. platform_device_register(&cm_t35_led_device);
  151. }
  152. #else
  153. static inline void cm_t35_init_led(void) {}
  154. #endif
  155. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  156. #include <linux/mtd/mtd.h>
  157. #include <linux/mtd/nand.h>
  158. #include <linux/mtd/partitions.h>
  159. static struct mtd_partition cm_t35_nand_partitions[] = {
  160. {
  161. .name = "xloader",
  162. .offset = 0, /* Offset = 0x00000 */
  163. .size = 4 * NAND_BLOCK_SIZE,
  164. .mask_flags = MTD_WRITEABLE
  165. },
  166. {
  167. .name = "uboot",
  168. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  169. .size = 15 * NAND_BLOCK_SIZE,
  170. },
  171. {
  172. .name = "uboot environment",
  173. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  174. .size = 2 * NAND_BLOCK_SIZE,
  175. },
  176. {
  177. .name = "linux",
  178. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  179. .size = 32 * NAND_BLOCK_SIZE,
  180. },
  181. {
  182. .name = "rootfs",
  183. .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
  184. .size = MTDPART_SIZ_FULL,
  185. },
  186. };
  187. static struct omap_nand_platform_data cm_t35_nand_data = {
  188. .parts = cm_t35_nand_partitions,
  189. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  190. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  191. .cs = 0,
  192. .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR,
  193. .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT,
  194. };
  195. static struct resource cm_t35_nand_resource = {
  196. .flags = IORESOURCE_MEM,
  197. };
  198. static struct platform_device cm_t35_nand_device = {
  199. .name = "omap2-nand",
  200. .id = -1,
  201. .num_resources = 1,
  202. .resource = &cm_t35_nand_resource,
  203. .dev = {
  204. .platform_data = &cm_t35_nand_data,
  205. },
  206. };
  207. static void __init cm_t35_init_nand(void)
  208. {
  209. if (platform_device_register(&cm_t35_nand_device) < 0)
  210. pr_err("CM-T35: Unable to register NAND device\n");
  211. }
  212. #else
  213. static inline void cm_t35_init_nand(void) {}
  214. #endif
  215. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
  216. defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  217. #include <linux/spi/spi.h>
  218. #include <linux/spi/ads7846.h>
  219. #include <plat/mcspi.h>
  220. static struct omap2_mcspi_device_config ads7846_mcspi_config = {
  221. .turbo_mode = 0,
  222. .single_channel = 1, /* 0: slave, 1: master */
  223. };
  224. static int ads7846_get_pendown_state(void)
  225. {
  226. return !gpio_get_value(CM_T35_GPIO_PENDOWN);
  227. }
  228. static struct ads7846_platform_data ads7846_config = {
  229. .x_max = 0x0fff,
  230. .y_max = 0x0fff,
  231. .x_plate_ohms = 180,
  232. .pressure_max = 255,
  233. .debounce_max = 10,
  234. .debounce_tol = 3,
  235. .debounce_rep = 1,
  236. .get_pendown_state = ads7846_get_pendown_state,
  237. .keep_vref_on = 1,
  238. };
  239. static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
  240. {
  241. .modalias = "ads7846",
  242. .bus_num = 1,
  243. .chip_select = 0,
  244. .max_speed_hz = 1500000,
  245. .controller_data = &ads7846_mcspi_config,
  246. .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
  247. .platform_data = &ads7846_config,
  248. },
  249. };
  250. static void __init cm_t35_init_ads7846(void)
  251. {
  252. if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
  253. (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
  254. gpio_export(CM_T35_GPIO_PENDOWN, 0);
  255. } else {
  256. pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
  257. return;
  258. }
  259. spi_register_board_info(cm_t35_spi_board_info,
  260. ARRAY_SIZE(cm_t35_spi_board_info));
  261. }
  262. #else
  263. static inline void cm_t35_init_ads7846(void) {}
  264. #endif
  265. static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
  266. .supply = "vmmc",
  267. };
  268. static struct regulator_consumer_supply cm_t35_vsim_supply = {
  269. .supply = "vmmc_aux",
  270. };
  271. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  272. static struct regulator_init_data cm_t35_vmmc1 = {
  273. .constraints = {
  274. .min_uV = 1850000,
  275. .max_uV = 3150000,
  276. .valid_modes_mask = REGULATOR_MODE_NORMAL
  277. | REGULATOR_MODE_STANDBY,
  278. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  279. | REGULATOR_CHANGE_MODE
  280. | REGULATOR_CHANGE_STATUS,
  281. },
  282. .num_consumer_supplies = 1,
  283. .consumer_supplies = &cm_t35_vmmc1_supply,
  284. };
  285. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  286. static struct regulator_init_data cm_t35_vsim = {
  287. .constraints = {
  288. .min_uV = 1800000,
  289. .max_uV = 3000000,
  290. .valid_modes_mask = REGULATOR_MODE_NORMAL
  291. | REGULATOR_MODE_STANDBY,
  292. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  293. | REGULATOR_CHANGE_MODE
  294. | REGULATOR_CHANGE_STATUS,
  295. },
  296. .num_consumer_supplies = 1,
  297. .consumer_supplies = &cm_t35_vsim_supply,
  298. };
  299. static struct twl4030_usb_data cm_t35_usb_data = {
  300. .usb_mode = T2_USB_MODE_ULPI,
  301. };
  302. static int cm_t35_keymap[] = {
  303. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  304. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  305. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  306. };
  307. static struct matrix_keymap_data cm_t35_keymap_data = {
  308. .keymap = cm_t35_keymap,
  309. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  310. };
  311. static struct twl4030_keypad_data cm_t35_kp_data = {
  312. .keymap_data = &cm_t35_keymap_data,
  313. .rows = 3,
  314. .cols = 3,
  315. .rep = 1,
  316. };
  317. static struct twl4030_hsmmc_info mmc[] = {
  318. {
  319. .mmc = 1,
  320. .wires = 4,
  321. .gpio_cd = -EINVAL,
  322. .gpio_wp = -EINVAL,
  323. },
  324. {
  325. .mmc = 2,
  326. .wires = 4,
  327. .transceiver = 1,
  328. .gpio_cd = -EINVAL,
  329. .gpio_wp = -EINVAL,
  330. .ocr_mask = 0x00100000, /* 3.3V */
  331. },
  332. {} /* Terminator */
  333. };
  334. static struct ehci_hcd_omap_platform_data ehci_pdata = {
  335. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  336. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  337. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  338. .phy_reset = true,
  339. .reset_gpio_port[0] = -EINVAL,
  340. .reset_gpio_port[1] = -EINVAL,
  341. .reset_gpio_port[2] = -EINVAL
  342. };
  343. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  344. unsigned ngpio)
  345. {
  346. int wlan_rst = gpio + 2;
  347. if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
  348. (gpio_direction_output(wlan_rst, 1) == 0)) {
  349. gpio_export(wlan_rst, 0);
  350. udelay(10);
  351. gpio_set_value(wlan_rst, 0);
  352. udelay(10);
  353. gpio_set_value(wlan_rst, 1);
  354. } else {
  355. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  356. }
  357. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  358. mmc[0].gpio_cd = gpio + 0;
  359. twl4030_mmc_init(mmc);
  360. /* link regulators to MMC adapters */
  361. cm_t35_vmmc1_supply.dev = mmc[0].dev;
  362. cm_t35_vsim_supply.dev = mmc[0].dev;
  363. /* setup USB with proper PHY reset GPIOs */
  364. ehci_pdata.reset_gpio_port[0] = gpio + 6;
  365. ehci_pdata.reset_gpio_port[1] = gpio + 7;
  366. usb_ehci_init(&ehci_pdata);
  367. return 0;
  368. }
  369. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  370. .gpio_base = OMAP_MAX_GPIO_LINES,
  371. .irq_base = TWL4030_GPIO_IRQ_BASE,
  372. .irq_end = TWL4030_GPIO_IRQ_END,
  373. .setup = cm_t35_twl_gpio_setup,
  374. };
  375. static struct twl4030_platform_data cm_t35_twldata = {
  376. .irq_base = TWL4030_IRQ_BASE,
  377. .irq_end = TWL4030_IRQ_END,
  378. /* platform_data for children goes here */
  379. .keypad = &cm_t35_kp_data,
  380. .usb = &cm_t35_usb_data,
  381. .gpio = &cm_t35_gpio_data,
  382. .vmmc1 = &cm_t35_vmmc1,
  383. .vsim = &cm_t35_vsim,
  384. };
  385. static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
  386. {
  387. I2C_BOARD_INFO("tps65930", 0x48),
  388. .flags = I2C_CLIENT_WAKE,
  389. .irq = INT_34XX_SYS_NIRQ,
  390. .platform_data = &cm_t35_twldata,
  391. },
  392. };
  393. static void __init cm_t35_init_i2c(void)
  394. {
  395. omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
  396. ARRAY_SIZE(cm_t35_i2c_boardinfo));
  397. }
  398. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  399. };
  400. static void __init cm_t35_init_irq(void)
  401. {
  402. omap_board_config = cm_t35_config;
  403. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  404. omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
  405. mt46h32m32lf6_sdrc_params);
  406. omap_init_irq();
  407. omap_gpio_init();
  408. }
  409. static void __init cm_t35_map_io(void)
  410. {
  411. omap2_set_globals_343x();
  412. omap2_map_common_io();
  413. }
  414. static struct omap_board_mux board_mux[] __initdata = {
  415. /* nCS and IRQ for CM-T35 ethernet */
  416. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  417. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  418. /* nCS and IRQ for SB-T35 ethernet */
  419. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  420. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  421. /* PENDOWN GPIO */
  422. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  423. /* mUSB */
  424. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  425. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  426. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  427. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  428. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  429. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  430. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  431. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  432. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  433. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  434. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  435. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  436. /* MMC 2 */
  437. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  438. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  439. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  440. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  441. /* McSPI 1 */
  442. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  443. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  444. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  445. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  446. /* McSPI 4 */
  447. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  448. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  449. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  450. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  451. /* McBSP 2 */
  452. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  453. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  454. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  455. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  456. /* serial ports */
  457. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  458. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  459. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  460. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  461. /* DSS */
  462. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  463. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  464. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  465. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  466. OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  467. OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  468. OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  469. OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  470. OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  471. OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  472. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  473. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  474. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  475. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  476. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  477. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  478. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  479. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  480. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  481. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  482. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  483. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  484. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  485. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  486. OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  487. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  488. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  489. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  490. /* TPS IRQ */
  491. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  492. OMAP_PIN_INPUT_PULLUP),
  493. { .reg_offset = OMAP_MUX_TERMINATOR },
  494. };
  495. static void __init cm_t35_init(void)
  496. {
  497. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  498. omap_serial_init();
  499. cm_t35_init_i2c();
  500. cm_t35_init_nand();
  501. cm_t35_init_ads7846();
  502. cm_t35_init_ethernet();
  503. cm_t35_init_led();
  504. usb_musb_init();
  505. }
  506. MACHINE_START(CM_T35, "Compulab CM-T35")
  507. .phys_io = 0x48000000,
  508. .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
  509. .boot_params = 0x80000100,
  510. .map_io = cm_t35_map_io,
  511. .init_irq = cm_t35_init_irq,
  512. .init_machine = cm_t35_init,
  513. .timer = &omap_timer,
  514. MACHINE_END