iq80321.c 4.5 KB

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  1. /*
  2. * arch/arm/mach-iop32x/iq80321.c
  3. *
  4. * Board support code for the Intel IQ80321 platform.
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright (C) 2004 Intel Corp.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/mm.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/string.h>
  20. #include <linux/slab.h>
  21. #include <linux/serial_core.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/mtd/physmap.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/io.h>
  26. #include <mach/hardware.h>
  27. #include <asm/irq.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/pci.h>
  31. #include <asm/mach/time.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/page.h>
  34. #include <asm/pgtable.h>
  35. #include <mach/time.h>
  36. /*
  37. * IQ80321 timer tick configuration.
  38. */
  39. static void __init iq80321_timer_init(void)
  40. {
  41. /* 33.333 MHz crystal. */
  42. iop_init_time(200000000);
  43. }
  44. static struct sys_timer iq80321_timer = {
  45. .init = iq80321_timer_init,
  46. };
  47. /*
  48. * IQ80321 I/O.
  49. */
  50. static struct map_desc iq80321_io_desc[] __initdata = {
  51. { /* on-board devices */
  52. .virtual = IQ80321_UART,
  53. .pfn = __phys_to_pfn(IQ80321_UART),
  54. .length = 0x00100000,
  55. .type = MT_DEVICE,
  56. },
  57. };
  58. void __init iq80321_map_io(void)
  59. {
  60. iop3xx_map_io();
  61. iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
  62. }
  63. /*
  64. * IQ80321 PCI.
  65. */
  66. static int __init
  67. iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  68. {
  69. int irq;
  70. if ((slot == 2 || slot == 6) && pin == 1) {
  71. /* PCI-X Slot INTA */
  72. irq = IRQ_IOP32X_XINT2;
  73. } else if ((slot == 2 || slot == 6) && pin == 2) {
  74. /* PCI-X Slot INTA */
  75. irq = IRQ_IOP32X_XINT3;
  76. } else if ((slot == 2 || slot == 6) && pin == 3) {
  77. /* PCI-X Slot INTA */
  78. irq = IRQ_IOP32X_XINT0;
  79. } else if ((slot == 2 || slot == 6) && pin == 4) {
  80. /* PCI-X Slot INTA */
  81. irq = IRQ_IOP32X_XINT1;
  82. } else if (slot == 4 || slot == 8) {
  83. /* Gig-E */
  84. irq = IRQ_IOP32X_XINT0;
  85. } else {
  86. printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
  87. "device PCI:%d:%d:%d\n", dev->bus->number,
  88. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  89. irq = -1;
  90. }
  91. return irq;
  92. }
  93. static struct hw_pci iq80321_pci __initdata = {
  94. .swizzle = pci_std_swizzle,
  95. .nr_controllers = 1,
  96. .setup = iop3xx_pci_setup,
  97. .preinit = iop3xx_pci_preinit_cond,
  98. .scan = iop3xx_pci_scan_bus,
  99. .map_irq = iq80321_pci_map_irq,
  100. };
  101. static int __init iq80321_pci_init(void)
  102. {
  103. if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
  104. machine_is_iq80321())
  105. pci_common_init(&iq80321_pci);
  106. return 0;
  107. }
  108. subsys_initcall(iq80321_pci_init);
  109. /*
  110. * IQ80321 machine initialisation.
  111. */
  112. static struct physmap_flash_data iq80321_flash_data = {
  113. .width = 1,
  114. };
  115. static struct resource iq80321_flash_resource = {
  116. .start = 0xf0000000,
  117. .end = 0xf07fffff,
  118. .flags = IORESOURCE_MEM,
  119. };
  120. static struct platform_device iq80321_flash_device = {
  121. .name = "physmap-flash",
  122. .id = 0,
  123. .dev = {
  124. .platform_data = &iq80321_flash_data,
  125. },
  126. .num_resources = 1,
  127. .resource = &iq80321_flash_resource,
  128. };
  129. static struct plat_serial8250_port iq80321_serial_port[] = {
  130. {
  131. .mapbase = IQ80321_UART,
  132. .membase = (char *)IQ80321_UART,
  133. .irq = IRQ_IOP32X_XINT1,
  134. .flags = UPF_SKIP_TEST,
  135. .iotype = UPIO_MEM,
  136. .regshift = 0,
  137. .uartclk = 1843200,
  138. },
  139. { },
  140. };
  141. static struct resource iq80321_uart_resource = {
  142. .start = IQ80321_UART,
  143. .end = IQ80321_UART + 7,
  144. .flags = IORESOURCE_MEM,
  145. };
  146. static struct platform_device iq80321_serial_device = {
  147. .name = "serial8250",
  148. .id = PLAT8250_DEV_PLATFORM,
  149. .dev = {
  150. .platform_data = iq80321_serial_port,
  151. },
  152. .num_resources = 1,
  153. .resource = &iq80321_uart_resource,
  154. };
  155. static void __init iq80321_init_machine(void)
  156. {
  157. platform_device_register(&iop3xx_i2c0_device);
  158. platform_device_register(&iop3xx_i2c1_device);
  159. platform_device_register(&iq80321_flash_device);
  160. platform_device_register(&iq80321_serial_device);
  161. platform_device_register(&iop3xx_dma_0_channel);
  162. platform_device_register(&iop3xx_dma_1_channel);
  163. platform_device_register(&iop3xx_aau_channel);
  164. }
  165. MACHINE_START(IQ80321, "Intel IQ80321")
  166. /* Maintainer: Intel Corp. */
  167. .phys_io = IQ80321_UART,
  168. .io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
  169. .boot_params = 0xa0000100,
  170. .map_io = iq80321_map_io,
  171. .init_irq = iop32x_init_irq,
  172. .timer = &iq80321_timer,
  173. .init_machine = iq80321_init_machine,
  174. MACHINE_END