mux.c 2.4 KB

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  1. /*
  2. * Utility to set the DAVINCI MUX register from a table in mux.h
  3. *
  4. * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  5. *
  6. * Based on linux/arch/arm/plat-omap/mux.c:
  7. * Copyright (C) 2003 - 2005 Nokia Corporation
  8. *
  9. * Written by Tony Lindgren
  10. *
  11. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. *
  16. * Copyright (C) 2008 Texas Instruments.
  17. */
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/spinlock.h>
  21. #include <mach/mux.h>
  22. #include <mach/common.h>
  23. /*
  24. * Sets the DAVINCI MUX register based on the table
  25. */
  26. int __init_or_module davinci_cfg_reg(const unsigned long index)
  27. {
  28. static DEFINE_SPINLOCK(mux_spin_lock);
  29. struct davinci_soc_info *soc_info = &davinci_soc_info;
  30. void __iomem *base = soc_info->pinmux_base;
  31. unsigned long flags;
  32. const struct mux_config *cfg;
  33. unsigned int reg_orig = 0, reg = 0;
  34. unsigned int mask, warn = 0;
  35. if (!soc_info->pinmux_pins)
  36. BUG();
  37. if (index >= soc_info->pinmux_pins_num) {
  38. printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
  39. index, soc_info->pinmux_pins_num);
  40. dump_stack();
  41. return -ENODEV;
  42. }
  43. cfg = &soc_info->pinmux_pins[index];
  44. if (cfg->name == NULL) {
  45. printk(KERN_ERR "No entry for the specified index\n");
  46. return -ENODEV;
  47. }
  48. /* Update the mux register in question */
  49. if (cfg->mask) {
  50. unsigned tmp1, tmp2;
  51. spin_lock_irqsave(&mux_spin_lock, flags);
  52. reg_orig = __raw_readl(base + cfg->mux_reg);
  53. mask = (cfg->mask << cfg->mask_offset);
  54. tmp1 = reg_orig & mask;
  55. reg = reg_orig & ~mask;
  56. tmp2 = (cfg->mode << cfg->mask_offset);
  57. reg |= tmp2;
  58. if (tmp1 != tmp2)
  59. warn = 1;
  60. __raw_writel(reg, base + cfg->mux_reg);
  61. spin_unlock_irqrestore(&mux_spin_lock, flags);
  62. }
  63. if (warn) {
  64. #ifdef CONFIG_DAVINCI_MUX_WARNINGS
  65. printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
  66. #endif
  67. }
  68. #ifdef CONFIG_DAVINCI_MUX_DEBUG
  69. if (cfg->debug || warn) {
  70. printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
  71. printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
  72. cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
  73. }
  74. #endif
  75. return 0;
  76. }
  77. EXPORT_SYMBOL(davinci_cfg_reg);
  78. int da8xx_pinmux_setup(const short pins[])
  79. {
  80. int i, error = -EINVAL;
  81. if (pins)
  82. for (i = 0; pins[i] >= 0; i++) {
  83. error = davinci_cfg_reg(pins[i]);
  84. if (error)
  85. break;
  86. }
  87. return error;
  88. }