xhci-pci.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167
  1. /*
  2. * xHCI host controller driver PCI Bus Glue.
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/pci.h>
  23. #include "xhci.h"
  24. static const char hcd_name[] = "xhci_hcd";
  25. /* called after powerup, by probe or system-pm "wakeup" */
  26. static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  27. {
  28. /*
  29. * TODO: Implement finding debug ports later.
  30. * TODO: see if there are any quirks that need to be added to handle
  31. * new extended capabilities.
  32. */
  33. /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  34. if (!pci_set_mwi(pdev))
  35. xhci_dbg(xhci, "MWI active\n");
  36. xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  37. return 0;
  38. }
  39. /* called during probe() after chip reset completes */
  40. static int xhci_pci_setup(struct usb_hcd *hcd)
  41. {
  42. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  43. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  44. int retval;
  45. xhci->cap_regs = hcd->regs;
  46. xhci->op_regs = hcd->regs +
  47. HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
  48. xhci->run_regs = hcd->regs +
  49. (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
  50. /* Cache read-only capability registers */
  51. xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
  52. xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
  53. xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
  54. xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
  55. xhci_print_registers(xhci);
  56. /* Make sure the HC is halted. */
  57. retval = xhci_halt(xhci);
  58. if (retval)
  59. return retval;
  60. xhci_dbg(xhci, "Resetting HCD\n");
  61. /* Reset the internal HC memory state and registers. */
  62. retval = xhci_reset(xhci);
  63. if (retval)
  64. return retval;
  65. xhci_dbg(xhci, "Reset complete\n");
  66. xhci_dbg(xhci, "Calling HCD init\n");
  67. /* Initialize HCD and host controller data structures. */
  68. retval = xhci_init(hcd);
  69. if (retval)
  70. return retval;
  71. xhci_dbg(xhci, "Called HCD init\n");
  72. pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
  73. xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
  74. /* Find any debug ports */
  75. return xhci_pci_reinit(xhci, pdev);
  76. }
  77. static const struct hc_driver xhci_pci_hc_driver = {
  78. .description = hcd_name,
  79. .product_desc = "xHCI Host Controller",
  80. .hcd_priv_size = sizeof(struct xhci_hcd),
  81. /*
  82. * generic hardware linkage
  83. */
  84. .irq = xhci_irq,
  85. .flags = HCD_MEMORY | HCD_USB3,
  86. /*
  87. * basic lifecycle operations
  88. */
  89. .reset = xhci_pci_setup,
  90. .start = xhci_run,
  91. /* suspend and resume implemented later */
  92. .stop = xhci_stop,
  93. .shutdown = xhci_shutdown,
  94. /*
  95. * managing i/o requests and associated device resources
  96. */
  97. .urb_enqueue = xhci_urb_enqueue,
  98. .urb_dequeue = xhci_urb_dequeue,
  99. .alloc_dev = xhci_alloc_dev,
  100. .free_dev = xhci_free_dev,
  101. .add_endpoint = xhci_add_endpoint,
  102. .drop_endpoint = xhci_drop_endpoint,
  103. .endpoint_reset = xhci_endpoint_reset,
  104. .check_bandwidth = xhci_check_bandwidth,
  105. .reset_bandwidth = xhci_reset_bandwidth,
  106. .address_device = xhci_address_device,
  107. /*
  108. * scheduling support
  109. */
  110. .get_frame_number = xhci_get_frame,
  111. /* Root hub support */
  112. .hub_control = xhci_hub_control,
  113. .hub_status_data = xhci_hub_status_data,
  114. };
  115. /*-------------------------------------------------------------------------*/
  116. /* PCI driver selection metadata; PCI hotplugging uses this */
  117. static const struct pci_device_id pci_ids[] = { {
  118. /* handle any USB 3.0 xHCI controller */
  119. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
  120. .driver_data = (unsigned long) &xhci_pci_hc_driver,
  121. },
  122. { /* end: all zeroes */ }
  123. };
  124. MODULE_DEVICE_TABLE(pci, pci_ids);
  125. /* pci driver glue; this is a "new style" PCI driver module */
  126. static struct pci_driver xhci_pci_driver = {
  127. .name = (char *) hcd_name,
  128. .id_table = pci_ids,
  129. .probe = usb_hcd_pci_probe,
  130. .remove = usb_hcd_pci_remove,
  131. /* suspend and resume implemented later */
  132. .shutdown = usb_hcd_pci_shutdown,
  133. };
  134. int xhci_register_pci()
  135. {
  136. return pci_register_driver(&xhci_pci_driver);
  137. }
  138. void xhci_unregister_pci()
  139. {
  140. pci_unregister_driver(&xhci_pci_driver);
  141. }