xhci-hcd.c 43 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include "xhci.h"
  25. #define DRIVER_AUTHOR "Sarah Sharp"
  26. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  27. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  28. /*
  29. * handshake - spin reading hc until handshake completes or fails
  30. * @ptr: address of hc register to be read
  31. * @mask: bits to look at in result of read
  32. * @done: value of those bits when handshake succeeds
  33. * @usec: timeout in microseconds
  34. *
  35. * Returns negative errno, or zero on success
  36. *
  37. * Success happens when the "mask" bits have the specified value (hardware
  38. * handshake done). There are two failure modes: "usec" have passed (major
  39. * hardware flakeout), or the register reads as all-ones (hardware removed).
  40. */
  41. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  42. u32 mask, u32 done, int usec)
  43. {
  44. u32 result;
  45. do {
  46. result = xhci_readl(xhci, ptr);
  47. if (result == ~(u32)0) /* card removed */
  48. return -ENODEV;
  49. result &= mask;
  50. if (result == done)
  51. return 0;
  52. udelay(1);
  53. usec--;
  54. } while (usec > 0);
  55. return -ETIMEDOUT;
  56. }
  57. /*
  58. * Force HC into halt state.
  59. *
  60. * Disable any IRQs and clear the run/stop bit.
  61. * HC will complete any current and actively pipelined transactions, and
  62. * should halt within 16 microframes of the run/stop bit being cleared.
  63. * Read HC Halted bit in the status register to see when the HC is finished.
  64. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  65. */
  66. int xhci_halt(struct xhci_hcd *xhci)
  67. {
  68. u32 halted;
  69. u32 cmd;
  70. u32 mask;
  71. xhci_dbg(xhci, "// Halt the HC\n");
  72. /* Disable all interrupts from the host controller */
  73. mask = ~(XHCI_IRQS);
  74. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  75. if (!halted)
  76. mask &= ~CMD_RUN;
  77. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  78. cmd &= mask;
  79. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  80. return handshake(xhci, &xhci->op_regs->status,
  81. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  82. }
  83. /*
  84. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  85. *
  86. * This resets pipelines, timers, counters, state machines, etc.
  87. * Transactions will be terminated immediately, and operational registers
  88. * will be set to their defaults.
  89. */
  90. int xhci_reset(struct xhci_hcd *xhci)
  91. {
  92. u32 command;
  93. u32 state;
  94. state = xhci_readl(xhci, &xhci->op_regs->status);
  95. if ((state & STS_HALT) == 0) {
  96. xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
  97. return 0;
  98. }
  99. xhci_dbg(xhci, "// Reset the HC\n");
  100. command = xhci_readl(xhci, &xhci->op_regs->command);
  101. command |= CMD_RESET;
  102. xhci_writel(xhci, command, &xhci->op_regs->command);
  103. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  104. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  105. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  106. }
  107. /*
  108. * Stop the HC from processing the endpoint queues.
  109. */
  110. static void xhci_quiesce(struct xhci_hcd *xhci)
  111. {
  112. /*
  113. * Queues are per endpoint, so we need to disable an endpoint or slot.
  114. *
  115. * To disable a slot, we need to insert a disable slot command on the
  116. * command ring and ring the doorbell. This will also free any internal
  117. * resources associated with the slot (which might not be what we want).
  118. *
  119. * A Release Endpoint command sounds better - doesn't free internal HC
  120. * memory, but removes the endpoints from the schedule and releases the
  121. * bandwidth, disables the doorbells, and clears the endpoint enable
  122. * flag. Usually used prior to a set interface command.
  123. *
  124. * TODO: Implement after command ring code is done.
  125. */
  126. BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
  127. xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
  128. }
  129. #if 0
  130. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  131. static int xhci_setup_msix(struct xhci_hcd *xhci)
  132. {
  133. int ret;
  134. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  135. xhci->msix_count = 0;
  136. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  137. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  138. if (!xhci->msix_entries) {
  139. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  140. return -ENOMEM;
  141. }
  142. xhci->msix_entries[0].entry = 0;
  143. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  144. if (ret) {
  145. xhci_err(xhci, "Failed to enable MSI-X\n");
  146. goto free_entries;
  147. }
  148. /*
  149. * Pass the xhci pointer value as the request_irq "cookie".
  150. * If more irqs are added, this will need to be unique for each one.
  151. */
  152. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  153. "xHCI", xhci_to_hcd(xhci));
  154. if (ret) {
  155. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  156. goto disable_msix;
  157. }
  158. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  159. return 0;
  160. disable_msix:
  161. pci_disable_msix(pdev);
  162. free_entries:
  163. kfree(xhci->msix_entries);
  164. xhci->msix_entries = NULL;
  165. return ret;
  166. }
  167. /* XXX: code duplication; can xhci_setup_msix call this? */
  168. /* Free any IRQs and disable MSI-X */
  169. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  170. {
  171. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  172. if (!xhci->msix_entries)
  173. return;
  174. free_irq(xhci->msix_entries[0].vector, xhci);
  175. pci_disable_msix(pdev);
  176. kfree(xhci->msix_entries);
  177. xhci->msix_entries = NULL;
  178. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  179. }
  180. #endif
  181. /*
  182. * Initialize memory for HCD and xHC (one-time init).
  183. *
  184. * Program the PAGESIZE register, initialize the device context array, create
  185. * device contexts (?), set up a command ring segment (or two?), create event
  186. * ring (one for now).
  187. */
  188. int xhci_init(struct usb_hcd *hcd)
  189. {
  190. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  191. int retval = 0;
  192. xhci_dbg(xhci, "xhci_init\n");
  193. spin_lock_init(&xhci->lock);
  194. retval = xhci_mem_init(xhci, GFP_KERNEL);
  195. xhci_dbg(xhci, "Finished xhci_init\n");
  196. return retval;
  197. }
  198. /*
  199. * Called in interrupt context when there might be work
  200. * queued on the event ring
  201. *
  202. * xhci->lock must be held by caller.
  203. */
  204. static void xhci_work(struct xhci_hcd *xhci)
  205. {
  206. u32 temp;
  207. u64 temp_64;
  208. /*
  209. * Clear the op reg interrupt status first,
  210. * so we can receive interrupts from other MSI-X interrupters.
  211. * Write 1 to clear the interrupt status.
  212. */
  213. temp = xhci_readl(xhci, &xhci->op_regs->status);
  214. temp |= STS_EINT;
  215. xhci_writel(xhci, temp, &xhci->op_regs->status);
  216. /* FIXME when MSI-X is supported and there are multiple vectors */
  217. /* Clear the MSI-X event interrupt status */
  218. /* Acknowledge the interrupt */
  219. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  220. temp |= 0x3;
  221. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  222. /* Flush posted writes */
  223. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  224. /* FIXME this should be a delayed service routine that clears the EHB */
  225. xhci_handle_event(xhci);
  226. /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
  227. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  228. xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue);
  229. /* Flush posted writes -- FIXME is this necessary? */
  230. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  231. }
  232. /*-------------------------------------------------------------------------*/
  233. /*
  234. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  235. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  236. * indicators of an event TRB error, but we check the status *first* to be safe.
  237. */
  238. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  239. {
  240. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  241. u32 temp, temp2;
  242. union xhci_trb *trb;
  243. spin_lock(&xhci->lock);
  244. trb = xhci->event_ring->dequeue;
  245. /* Check if the xHC generated the interrupt, or the irq is shared */
  246. temp = xhci_readl(xhci, &xhci->op_regs->status);
  247. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  248. if (temp == 0xffffffff && temp2 == 0xffffffff)
  249. goto hw_died;
  250. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  251. spin_unlock(&xhci->lock);
  252. return IRQ_NONE;
  253. }
  254. xhci_dbg(xhci, "op reg status = %08x\n", temp);
  255. xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2);
  256. xhci_dbg(xhci, "Event ring dequeue ptr:\n");
  257. xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
  258. (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
  259. lower_32_bits(trb->link.segment_ptr),
  260. upper_32_bits(trb->link.segment_ptr),
  261. (unsigned int) trb->link.intr_target,
  262. (unsigned int) trb->link.control);
  263. if (temp & STS_FATAL) {
  264. xhci_warn(xhci, "WARNING: Host System Error\n");
  265. xhci_halt(xhci);
  266. hw_died:
  267. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  268. spin_unlock(&xhci->lock);
  269. return -ESHUTDOWN;
  270. }
  271. xhci_work(xhci);
  272. spin_unlock(&xhci->lock);
  273. return IRQ_HANDLED;
  274. }
  275. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  276. void xhci_event_ring_work(unsigned long arg)
  277. {
  278. unsigned long flags;
  279. int temp;
  280. u64 temp_64;
  281. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  282. int i, j;
  283. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  284. spin_lock_irqsave(&xhci->lock, flags);
  285. temp = xhci_readl(xhci, &xhci->op_regs->status);
  286. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  287. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  288. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  289. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  290. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  291. xhci->error_bitmask = 0;
  292. xhci_dbg(xhci, "Event ring:\n");
  293. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  294. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  295. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  296. temp_64 &= ~ERST_PTR_MASK;
  297. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  298. xhci_dbg(xhci, "Command ring:\n");
  299. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  300. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  301. xhci_dbg_cmd_ptrs(xhci);
  302. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  303. if (xhci->devs[i]) {
  304. for (j = 0; j < 31; ++j) {
  305. if (xhci->devs[i]->ep_rings[j]) {
  306. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  307. xhci_debug_segment(xhci, xhci->devs[i]->ep_rings[j]->deq_seg);
  308. }
  309. }
  310. }
  311. }
  312. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  313. if (xhci_setup_one_noop(xhci))
  314. xhci_ring_cmd_db(xhci);
  315. spin_unlock_irqrestore(&xhci->lock, flags);
  316. if (!xhci->zombie)
  317. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  318. else
  319. xhci_dbg(xhci, "Quit polling the event ring.\n");
  320. }
  321. #endif
  322. /*
  323. * Start the HC after it was halted.
  324. *
  325. * This function is called by the USB core when the HC driver is added.
  326. * Its opposite is xhci_stop().
  327. *
  328. * xhci_init() must be called once before this function can be called.
  329. * Reset the HC, enable device slot contexts, program DCBAAP, and
  330. * set command ring pointer and event ring pointer.
  331. *
  332. * Setup MSI-X vectors and enable interrupts.
  333. */
  334. int xhci_run(struct usb_hcd *hcd)
  335. {
  336. u32 temp;
  337. u64 temp_64;
  338. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  339. void (*doorbell)(struct xhci_hcd *) = NULL;
  340. hcd->uses_new_polling = 1;
  341. hcd->poll_rh = 0;
  342. xhci_dbg(xhci, "xhci_run\n");
  343. #if 0 /* FIXME: MSI not setup yet */
  344. /* Do this at the very last minute */
  345. ret = xhci_setup_msix(xhci);
  346. if (!ret)
  347. return ret;
  348. return -ENOSYS;
  349. #endif
  350. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  351. init_timer(&xhci->event_ring_timer);
  352. xhci->event_ring_timer.data = (unsigned long) xhci;
  353. xhci->event_ring_timer.function = xhci_event_ring_work;
  354. /* Poll the event ring */
  355. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  356. xhci->zombie = 0;
  357. xhci_dbg(xhci, "Setting event ring polling timer\n");
  358. add_timer(&xhci->event_ring_timer);
  359. #endif
  360. xhci_dbg(xhci, "Command ring memory map follows:\n");
  361. xhci_debug_ring(xhci, xhci->cmd_ring);
  362. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  363. xhci_dbg_cmd_ptrs(xhci);
  364. xhci_dbg(xhci, "ERST memory map follows:\n");
  365. xhci_dbg_erst(xhci, &xhci->erst);
  366. xhci_dbg(xhci, "Event ring:\n");
  367. xhci_debug_ring(xhci, xhci->event_ring);
  368. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  369. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  370. temp_64 &= ~ERST_PTR_MASK;
  371. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  372. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  373. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  374. temp &= ~ER_IRQ_INTERVAL_MASK;
  375. temp |= (u32) 160;
  376. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  377. /* Set the HCD state before we enable the irqs */
  378. hcd->state = HC_STATE_RUNNING;
  379. temp = xhci_readl(xhci, &xhci->op_regs->command);
  380. temp |= (CMD_EIE);
  381. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  382. temp);
  383. xhci_writel(xhci, temp, &xhci->op_regs->command);
  384. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  385. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  386. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  387. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  388. &xhci->ir_set->irq_pending);
  389. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  390. if (NUM_TEST_NOOPS > 0)
  391. doorbell = xhci_setup_one_noop(xhci);
  392. temp = xhci_readl(xhci, &xhci->op_regs->command);
  393. temp |= (CMD_RUN);
  394. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  395. temp);
  396. xhci_writel(xhci, temp, &xhci->op_regs->command);
  397. /* Flush PCI posted writes */
  398. temp = xhci_readl(xhci, &xhci->op_regs->command);
  399. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  400. if (doorbell)
  401. (*doorbell)(xhci);
  402. xhci_dbg(xhci, "Finished xhci_run\n");
  403. return 0;
  404. }
  405. /*
  406. * Stop xHCI driver.
  407. *
  408. * This function is called by the USB core when the HC driver is removed.
  409. * Its opposite is xhci_run().
  410. *
  411. * Disable device contexts, disable IRQs, and quiesce the HC.
  412. * Reset the HC, finish any completed transactions, and cleanup memory.
  413. */
  414. void xhci_stop(struct usb_hcd *hcd)
  415. {
  416. u32 temp;
  417. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  418. spin_lock_irq(&xhci->lock);
  419. if (HC_IS_RUNNING(hcd->state))
  420. xhci_quiesce(xhci);
  421. xhci_halt(xhci);
  422. xhci_reset(xhci);
  423. spin_unlock_irq(&xhci->lock);
  424. #if 0 /* No MSI yet */
  425. xhci_cleanup_msix(xhci);
  426. #endif
  427. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  428. /* Tell the event ring poll function not to reschedule */
  429. xhci->zombie = 1;
  430. del_timer_sync(&xhci->event_ring_timer);
  431. #endif
  432. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  433. temp = xhci_readl(xhci, &xhci->op_regs->status);
  434. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  435. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  436. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  437. &xhci->ir_set->irq_pending);
  438. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  439. xhci_dbg(xhci, "cleaning up memory\n");
  440. xhci_mem_cleanup(xhci);
  441. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  442. xhci_readl(xhci, &xhci->op_regs->status));
  443. }
  444. /*
  445. * Shutdown HC (not bus-specific)
  446. *
  447. * This is called when the machine is rebooting or halting. We assume that the
  448. * machine will be powered off, and the HC's internal state will be reset.
  449. * Don't bother to free memory.
  450. */
  451. void xhci_shutdown(struct usb_hcd *hcd)
  452. {
  453. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  454. spin_lock_irq(&xhci->lock);
  455. xhci_halt(xhci);
  456. spin_unlock_irq(&xhci->lock);
  457. #if 0
  458. xhci_cleanup_msix(xhci);
  459. #endif
  460. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  461. xhci_readl(xhci, &xhci->op_regs->status));
  462. }
  463. /*-------------------------------------------------------------------------*/
  464. /**
  465. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  466. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  467. * value to right shift 1 for the bitmask.
  468. *
  469. * Index = (epnum * 2) + direction - 1,
  470. * where direction = 0 for OUT, 1 for IN.
  471. * For control endpoints, the IN index is used (OUT index is unused), so
  472. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  473. */
  474. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  475. {
  476. unsigned int index;
  477. if (usb_endpoint_xfer_control(desc))
  478. index = (unsigned int) (usb_endpoint_num(desc)*2);
  479. else
  480. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  481. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  482. return index;
  483. }
  484. /* Find the flag for this endpoint (for use in the control context). Use the
  485. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  486. * bit 1, etc.
  487. */
  488. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  489. {
  490. return 1 << (xhci_get_endpoint_index(desc) + 1);
  491. }
  492. /* Compute the last valid endpoint context index. Basically, this is the
  493. * endpoint index plus one. For slot contexts with more than valid endpoint,
  494. * we find the most significant bit set in the added contexts flags.
  495. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  496. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  497. */
  498. static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  499. {
  500. return fls(added_ctxs) - 1;
  501. }
  502. /* Returns 1 if the arguments are OK;
  503. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  504. */
  505. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  506. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  507. if (!hcd || (check_ep && !ep) || !udev) {
  508. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  509. func);
  510. return -EINVAL;
  511. }
  512. if (!udev->parent) {
  513. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  514. func);
  515. return 0;
  516. }
  517. if (!udev->slot_id) {
  518. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  519. func);
  520. return -EINVAL;
  521. }
  522. return 1;
  523. }
  524. /*
  525. * non-error returns are a promise to giveback() the urb later
  526. * we drop ownership so next owner (or urb unlink) can get it
  527. */
  528. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  529. {
  530. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  531. unsigned long flags;
  532. int ret = 0;
  533. unsigned int slot_id, ep_index;
  534. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  535. return -EINVAL;
  536. slot_id = urb->dev->slot_id;
  537. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  538. spin_lock_irqsave(&xhci->lock, flags);
  539. if (!xhci->devs || !xhci->devs[slot_id]) {
  540. if (!in_interrupt())
  541. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  542. ret = -EINVAL;
  543. goto exit;
  544. }
  545. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  546. if (!in_interrupt())
  547. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  548. ret = -ESHUTDOWN;
  549. goto exit;
  550. }
  551. if (usb_endpoint_xfer_control(&urb->ep->desc))
  552. /* We have a spinlock and interrupts disabled, so we must pass
  553. * atomic context to this function, which may allocate memory.
  554. */
  555. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  556. slot_id, ep_index);
  557. else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
  558. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  559. slot_id, ep_index);
  560. else
  561. ret = -EINVAL;
  562. exit:
  563. spin_unlock_irqrestore(&xhci->lock, flags);
  564. return ret;
  565. }
  566. /*
  567. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  568. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  569. * should pick up where it left off in the TD, unless a Set Transfer Ring
  570. * Dequeue Pointer is issued.
  571. *
  572. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  573. * the ring. Since the ring is a contiguous structure, they can't be physically
  574. * removed. Instead, there are two options:
  575. *
  576. * 1) If the HC is in the middle of processing the URB to be canceled, we
  577. * simply move the ring's dequeue pointer past those TRBs using the Set
  578. * Transfer Ring Dequeue Pointer command. This will be the common case,
  579. * when drivers timeout on the last submitted URB and attempt to cancel.
  580. *
  581. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  582. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  583. * HC will need to invalidate the any TRBs it has cached after the stop
  584. * endpoint command, as noted in the xHCI 0.95 errata.
  585. *
  586. * 3) The TD may have completed by the time the Stop Endpoint Command
  587. * completes, so software needs to handle that case too.
  588. *
  589. * This function should protect against the TD enqueueing code ringing the
  590. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  591. * It also needs to account for multiple cancellations on happening at the same
  592. * time for the same endpoint.
  593. *
  594. * Note that this function can be called in any context, or so says
  595. * usb_hcd_unlink_urb()
  596. */
  597. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  598. {
  599. unsigned long flags;
  600. int ret;
  601. struct xhci_hcd *xhci;
  602. struct xhci_td *td;
  603. unsigned int ep_index;
  604. struct xhci_ring *ep_ring;
  605. xhci = hcd_to_xhci(hcd);
  606. spin_lock_irqsave(&xhci->lock, flags);
  607. /* Make sure the URB hasn't completed or been unlinked already */
  608. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  609. if (ret || !urb->hcpriv)
  610. goto done;
  611. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  612. xhci_dbg(xhci, "Event ring:\n");
  613. xhci_debug_ring(xhci, xhci->event_ring);
  614. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  615. ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index];
  616. xhci_dbg(xhci, "Endpoint ring:\n");
  617. xhci_debug_ring(xhci, ep_ring);
  618. td = (struct xhci_td *) urb->hcpriv;
  619. ep_ring->cancels_pending++;
  620. list_add_tail(&td->cancelled_td_list, &ep_ring->cancelled_td_list);
  621. /* Queue a stop endpoint command, but only if this is
  622. * the first cancellation to be handled.
  623. */
  624. if (ep_ring->cancels_pending == 1) {
  625. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  626. xhci_ring_cmd_db(xhci);
  627. }
  628. done:
  629. spin_unlock_irqrestore(&xhci->lock, flags);
  630. return ret;
  631. }
  632. /* Drop an endpoint from a new bandwidth configuration for this device.
  633. * Only one call to this function is allowed per endpoint before
  634. * check_bandwidth() or reset_bandwidth() must be called.
  635. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  636. * add the endpoint to the schedule with possibly new parameters denoted by a
  637. * different endpoint descriptor in usb_host_endpoint.
  638. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  639. * not allowed.
  640. *
  641. * The USB core will not allow URBs to be queued to an endpoint that is being
  642. * disabled, so there's no need for mutual exclusion to protect
  643. * the xhci->devs[slot_id] structure.
  644. */
  645. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  646. struct usb_host_endpoint *ep)
  647. {
  648. struct xhci_hcd *xhci;
  649. struct xhci_container_ctx *in_ctx, *out_ctx;
  650. struct xhci_input_control_ctx *ctrl_ctx;
  651. struct xhci_slot_ctx *slot_ctx;
  652. unsigned int last_ctx;
  653. unsigned int ep_index;
  654. struct xhci_ep_ctx *ep_ctx;
  655. u32 drop_flag;
  656. u32 new_add_flags, new_drop_flags, new_slot_info;
  657. int ret;
  658. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  659. if (ret <= 0)
  660. return ret;
  661. xhci = hcd_to_xhci(hcd);
  662. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  663. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  664. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  665. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  666. __func__, drop_flag);
  667. return 0;
  668. }
  669. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  670. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  671. __func__);
  672. return -EINVAL;
  673. }
  674. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  675. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  676. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  677. ep_index = xhci_get_endpoint_index(&ep->desc);
  678. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  679. /* If the HC already knows the endpoint is disabled,
  680. * or the HCD has noted it is disabled, ignore this request
  681. */
  682. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  683. ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  684. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  685. __func__, ep);
  686. return 0;
  687. }
  688. ctrl_ctx->drop_flags |= drop_flag;
  689. new_drop_flags = ctrl_ctx->drop_flags;
  690. ctrl_ctx->add_flags = ~drop_flag;
  691. new_add_flags = ctrl_ctx->add_flags;
  692. last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
  693. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  694. /* Update the last valid endpoint context, if we deleted the last one */
  695. if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  696. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  697. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  698. }
  699. new_slot_info = slot_ctx->dev_info;
  700. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  701. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  702. (unsigned int) ep->desc.bEndpointAddress,
  703. udev->slot_id,
  704. (unsigned int) new_drop_flags,
  705. (unsigned int) new_add_flags,
  706. (unsigned int) new_slot_info);
  707. return 0;
  708. }
  709. /* Add an endpoint to a new possible bandwidth configuration for this device.
  710. * Only one call to this function is allowed per endpoint before
  711. * check_bandwidth() or reset_bandwidth() must be called.
  712. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  713. * add the endpoint to the schedule with possibly new parameters denoted by a
  714. * different endpoint descriptor in usb_host_endpoint.
  715. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  716. * not allowed.
  717. *
  718. * The USB core will not allow URBs to be queued to an endpoint until the
  719. * configuration or alt setting is installed in the device, so there's no need
  720. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  721. */
  722. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  723. struct usb_host_endpoint *ep)
  724. {
  725. struct xhci_hcd *xhci;
  726. struct xhci_container_ctx *in_ctx, *out_ctx;
  727. unsigned int ep_index;
  728. struct xhci_ep_ctx *ep_ctx;
  729. struct xhci_slot_ctx *slot_ctx;
  730. struct xhci_input_control_ctx *ctrl_ctx;
  731. u32 added_ctxs;
  732. unsigned int last_ctx;
  733. u32 new_add_flags, new_drop_flags, new_slot_info;
  734. int ret = 0;
  735. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  736. if (ret <= 0) {
  737. /* So we won't queue a reset ep command for a root hub */
  738. ep->hcpriv = NULL;
  739. return ret;
  740. }
  741. xhci = hcd_to_xhci(hcd);
  742. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  743. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  744. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  745. /* FIXME when we have to issue an evaluate endpoint command to
  746. * deal with ep0 max packet size changing once we get the
  747. * descriptors
  748. */
  749. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  750. __func__, added_ctxs);
  751. return 0;
  752. }
  753. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  754. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  755. __func__);
  756. return -EINVAL;
  757. }
  758. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  759. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  760. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  761. ep_index = xhci_get_endpoint_index(&ep->desc);
  762. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  763. /* If the HCD has already noted the endpoint is enabled,
  764. * ignore this request.
  765. */
  766. if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  767. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  768. __func__, ep);
  769. return 0;
  770. }
  771. /*
  772. * Configuration and alternate setting changes must be done in
  773. * process context, not interrupt context (or so documenation
  774. * for usb_set_interface() and usb_set_configuration() claim).
  775. */
  776. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  777. udev, ep, GFP_KERNEL) < 0) {
  778. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  779. __func__, ep->desc.bEndpointAddress);
  780. return -ENOMEM;
  781. }
  782. ctrl_ctx->add_flags |= added_ctxs;
  783. new_add_flags = ctrl_ctx->add_flags;
  784. /* If xhci_endpoint_disable() was called for this endpoint, but the
  785. * xHC hasn't been notified yet through the check_bandwidth() call,
  786. * this re-adds a new state for the endpoint from the new endpoint
  787. * descriptors. We must drop and re-add this endpoint, so we leave the
  788. * drop flags alone.
  789. */
  790. new_drop_flags = ctrl_ctx->drop_flags;
  791. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  792. /* Update the last valid endpoint context, if we just added one past */
  793. if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  794. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  795. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  796. }
  797. new_slot_info = slot_ctx->dev_info;
  798. /* Store the usb_device pointer for later use */
  799. ep->hcpriv = udev;
  800. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  801. (unsigned int) ep->desc.bEndpointAddress,
  802. udev->slot_id,
  803. (unsigned int) new_drop_flags,
  804. (unsigned int) new_add_flags,
  805. (unsigned int) new_slot_info);
  806. return 0;
  807. }
  808. static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
  809. {
  810. struct xhci_input_control_ctx *ctrl_ctx;
  811. struct xhci_ep_ctx *ep_ctx;
  812. struct xhci_slot_ctx *slot_ctx;
  813. int i;
  814. /* When a device's add flag and drop flag are zero, any subsequent
  815. * configure endpoint command will leave that endpoint's state
  816. * untouched. Make sure we don't leave any old state in the input
  817. * endpoint contexts.
  818. */
  819. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  820. ctrl_ctx->drop_flags = 0;
  821. ctrl_ctx->add_flags = 0;
  822. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  823. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  824. /* Endpoint 0 is always valid */
  825. slot_ctx->dev_info |= LAST_CTX(1);
  826. for (i = 1; i < 31; ++i) {
  827. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
  828. ep_ctx->ep_info = 0;
  829. ep_ctx->ep_info2 = 0;
  830. ep_ctx->deq = 0;
  831. ep_ctx->tx_info = 0;
  832. }
  833. }
  834. /* Called after one or more calls to xhci_add_endpoint() or
  835. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  836. * to call xhci_reset_bandwidth().
  837. *
  838. * Since we are in the middle of changing either configuration or
  839. * installing a new alt setting, the USB core won't allow URBs to be
  840. * enqueued for any endpoint on the old config or interface. Nothing
  841. * else should be touching the xhci->devs[slot_id] structure, so we
  842. * don't need to take the xhci->lock for manipulating that.
  843. */
  844. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  845. {
  846. int i;
  847. int ret = 0;
  848. int timeleft;
  849. unsigned long flags;
  850. struct xhci_hcd *xhci;
  851. struct xhci_virt_device *virt_dev;
  852. struct xhci_input_control_ctx *ctrl_ctx;
  853. struct xhci_slot_ctx *slot_ctx;
  854. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  855. if (ret <= 0)
  856. return ret;
  857. xhci = hcd_to_xhci(hcd);
  858. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  859. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  860. __func__);
  861. return -EINVAL;
  862. }
  863. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  864. virt_dev = xhci->devs[udev->slot_id];
  865. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  866. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  867. ctrl_ctx->add_flags |= SLOT_FLAG;
  868. ctrl_ctx->add_flags &= ~EP0_FLAG;
  869. ctrl_ctx->drop_flags &= ~SLOT_FLAG;
  870. ctrl_ctx->drop_flags &= ~EP0_FLAG;
  871. xhci_dbg(xhci, "New Input Control Context:\n");
  872. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  873. xhci_dbg_ctx(xhci, virt_dev->in_ctx,
  874. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  875. spin_lock_irqsave(&xhci->lock, flags);
  876. ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx->dma,
  877. udev->slot_id);
  878. if (ret < 0) {
  879. spin_unlock_irqrestore(&xhci->lock, flags);
  880. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  881. return -ENOMEM;
  882. }
  883. xhci_ring_cmd_db(xhci);
  884. spin_unlock_irqrestore(&xhci->lock, flags);
  885. /* Wait for the configure endpoint command to complete */
  886. timeleft = wait_for_completion_interruptible_timeout(
  887. &virt_dev->cmd_completion,
  888. USB_CTRL_SET_TIMEOUT);
  889. if (timeleft <= 0) {
  890. xhci_warn(xhci, "%s while waiting for configure endpoint command\n",
  891. timeleft == 0 ? "Timeout" : "Signal");
  892. /* FIXME cancel the configure endpoint command */
  893. return -ETIME;
  894. }
  895. switch (virt_dev->cmd_status) {
  896. case COMP_ENOMEM:
  897. dev_warn(&udev->dev, "Not enough host controller resources "
  898. "for new device state.\n");
  899. ret = -ENOMEM;
  900. /* FIXME: can we allocate more resources for the HC? */
  901. break;
  902. case COMP_BW_ERR:
  903. dev_warn(&udev->dev, "Not enough bandwidth "
  904. "for new device state.\n");
  905. ret = -ENOSPC;
  906. /* FIXME: can we go back to the old state? */
  907. break;
  908. case COMP_TRB_ERR:
  909. /* the HCD set up something wrong */
  910. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, "
  911. "and endpoint is not disabled.\n");
  912. ret = -EINVAL;
  913. break;
  914. case COMP_SUCCESS:
  915. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  916. break;
  917. default:
  918. xhci_err(xhci, "ERROR: unexpected command completion "
  919. "code 0x%x.\n", virt_dev->cmd_status);
  920. ret = -EINVAL;
  921. break;
  922. }
  923. if (ret) {
  924. /* Callee should call reset_bandwidth() */
  925. return ret;
  926. }
  927. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  928. xhci_dbg_ctx(xhci, virt_dev->out_ctx,
  929. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  930. xhci_zero_in_ctx(xhci, virt_dev);
  931. /* Free any old rings */
  932. for (i = 1; i < 31; ++i) {
  933. if (virt_dev->new_ep_rings[i]) {
  934. xhci_ring_free(xhci, virt_dev->ep_rings[i]);
  935. virt_dev->ep_rings[i] = virt_dev->new_ep_rings[i];
  936. virt_dev->new_ep_rings[i] = NULL;
  937. }
  938. }
  939. return ret;
  940. }
  941. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  942. {
  943. struct xhci_hcd *xhci;
  944. struct xhci_virt_device *virt_dev;
  945. int i, ret;
  946. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  947. if (ret <= 0)
  948. return;
  949. xhci = hcd_to_xhci(hcd);
  950. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  951. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  952. __func__);
  953. return;
  954. }
  955. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  956. virt_dev = xhci->devs[udev->slot_id];
  957. /* Free any rings allocated for added endpoints */
  958. for (i = 0; i < 31; ++i) {
  959. if (virt_dev->new_ep_rings[i]) {
  960. xhci_ring_free(xhci, virt_dev->new_ep_rings[i]);
  961. virt_dev->new_ep_rings[i] = NULL;
  962. }
  963. }
  964. xhci_zero_in_ctx(xhci, virt_dev);
  965. }
  966. /* Deal with stalled endpoints. The core should have sent the control message
  967. * to clear the halt condition. However, we need to make the xHCI hardware
  968. * reset its sequence number, since a device will expect a sequence number of
  969. * zero after the halt condition is cleared.
  970. * Context: in_interrupt
  971. */
  972. void xhci_endpoint_reset(struct usb_hcd *hcd,
  973. struct usb_host_endpoint *ep)
  974. {
  975. struct xhci_hcd *xhci;
  976. struct usb_device *udev;
  977. unsigned int ep_index;
  978. unsigned long flags;
  979. int ret;
  980. struct xhci_dequeue_state deq_state;
  981. struct xhci_ring *ep_ring;
  982. xhci = hcd_to_xhci(hcd);
  983. udev = (struct usb_device *) ep->hcpriv;
  984. /* Called with a root hub endpoint (or an endpoint that wasn't added
  985. * with xhci_add_endpoint()
  986. */
  987. if (!ep->hcpriv)
  988. return;
  989. ep_index = xhci_get_endpoint_index(&ep->desc);
  990. ep_ring = xhci->devs[udev->slot_id]->ep_rings[ep_index];
  991. if (!ep_ring->stopped_td) {
  992. xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
  993. ep->desc.bEndpointAddress);
  994. return;
  995. }
  996. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  997. spin_lock_irqsave(&xhci->lock, flags);
  998. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  999. /*
  1000. * Can't change the ring dequeue pointer until it's transitioned to the
  1001. * stopped state, which is only upon a successful reset endpoint
  1002. * command. Better hope that last command worked!
  1003. */
  1004. if (!ret) {
  1005. xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
  1006. /* We need to move the HW's dequeue pointer past this TD,
  1007. * or it will attempt to resend it on the next doorbell ring.
  1008. */
  1009. xhci_find_new_dequeue_state(xhci, udev->slot_id,
  1010. ep_index, ep_ring->stopped_td, &deq_state);
  1011. xhci_dbg(xhci, "Queueing new dequeue state\n");
  1012. xhci_queue_new_dequeue_state(xhci, ep_ring,
  1013. udev->slot_id,
  1014. ep_index, &deq_state);
  1015. kfree(ep_ring->stopped_td);
  1016. xhci_ring_cmd_db(xhci);
  1017. }
  1018. spin_unlock_irqrestore(&xhci->lock, flags);
  1019. if (ret)
  1020. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  1021. }
  1022. /*
  1023. * At this point, the struct usb_device is about to go away, the device has
  1024. * disconnected, and all traffic has been stopped and the endpoints have been
  1025. * disabled. Free any HC data structures associated with that device.
  1026. */
  1027. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1028. {
  1029. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1030. unsigned long flags;
  1031. if (udev->slot_id == 0)
  1032. return;
  1033. spin_lock_irqsave(&xhci->lock, flags);
  1034. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  1035. spin_unlock_irqrestore(&xhci->lock, flags);
  1036. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1037. return;
  1038. }
  1039. xhci_ring_cmd_db(xhci);
  1040. spin_unlock_irqrestore(&xhci->lock, flags);
  1041. /*
  1042. * Event command completion handler will free any data structures
  1043. * associated with the slot. XXX Can free sleep?
  1044. */
  1045. }
  1046. /*
  1047. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  1048. * timed out, or allocating memory failed. Returns 1 on success.
  1049. */
  1050. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1051. {
  1052. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1053. unsigned long flags;
  1054. int timeleft;
  1055. int ret;
  1056. spin_lock_irqsave(&xhci->lock, flags);
  1057. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  1058. if (ret) {
  1059. spin_unlock_irqrestore(&xhci->lock, flags);
  1060. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1061. return 0;
  1062. }
  1063. xhci_ring_cmd_db(xhci);
  1064. spin_unlock_irqrestore(&xhci->lock, flags);
  1065. /* XXX: how much time for xHC slot assignment? */
  1066. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1067. USB_CTRL_SET_TIMEOUT);
  1068. if (timeleft <= 0) {
  1069. xhci_warn(xhci, "%s while waiting for a slot\n",
  1070. timeleft == 0 ? "Timeout" : "Signal");
  1071. /* FIXME cancel the enable slot request */
  1072. return 0;
  1073. }
  1074. if (!xhci->slot_id) {
  1075. xhci_err(xhci, "Error while assigning device slot ID\n");
  1076. return 0;
  1077. }
  1078. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1079. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1080. /* Disable slot, if we can do it without mem alloc */
  1081. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1082. spin_lock_irqsave(&xhci->lock, flags);
  1083. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1084. xhci_ring_cmd_db(xhci);
  1085. spin_unlock_irqrestore(&xhci->lock, flags);
  1086. return 0;
  1087. }
  1088. udev->slot_id = xhci->slot_id;
  1089. /* Is this a LS or FS device under a HS hub? */
  1090. /* Hub or peripherial? */
  1091. return 1;
  1092. }
  1093. /*
  1094. * Issue an Address Device command (which will issue a SetAddress request to
  1095. * the device).
  1096. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1097. * we should only issue and wait on one address command at the same time.
  1098. *
  1099. * We add one to the device address issued by the hardware because the USB core
  1100. * uses address 1 for the root hubs (even though they're not really devices).
  1101. */
  1102. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1103. {
  1104. unsigned long flags;
  1105. int timeleft;
  1106. struct xhci_virt_device *virt_dev;
  1107. int ret = 0;
  1108. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1109. struct xhci_slot_ctx *slot_ctx;
  1110. struct xhci_input_control_ctx *ctrl_ctx;
  1111. u64 temp_64;
  1112. if (!udev->slot_id) {
  1113. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1114. return -EINVAL;
  1115. }
  1116. virt_dev = xhci->devs[udev->slot_id];
  1117. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1118. if (!udev->config)
  1119. xhci_setup_addressable_virt_dev(xhci, udev);
  1120. /* Otherwise, assume the core has the device configured how it wants */
  1121. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1122. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1123. spin_lock_irqsave(&xhci->lock, flags);
  1124. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
  1125. udev->slot_id);
  1126. if (ret) {
  1127. spin_unlock_irqrestore(&xhci->lock, flags);
  1128. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1129. return ret;
  1130. }
  1131. xhci_ring_cmd_db(xhci);
  1132. spin_unlock_irqrestore(&xhci->lock, flags);
  1133. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1134. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1135. USB_CTRL_SET_TIMEOUT);
  1136. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1137. * the SetAddress() "recovery interval" required by USB and aborting the
  1138. * command on a timeout.
  1139. */
  1140. if (timeleft <= 0) {
  1141. xhci_warn(xhci, "%s while waiting for a slot\n",
  1142. timeleft == 0 ? "Timeout" : "Signal");
  1143. /* FIXME cancel the address device command */
  1144. return -ETIME;
  1145. }
  1146. switch (virt_dev->cmd_status) {
  1147. case COMP_CTX_STATE:
  1148. case COMP_EBADSLT:
  1149. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1150. udev->slot_id);
  1151. ret = -EINVAL;
  1152. break;
  1153. case COMP_TX_ERR:
  1154. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1155. ret = -EPROTO;
  1156. break;
  1157. case COMP_SUCCESS:
  1158. xhci_dbg(xhci, "Successful Address Device command\n");
  1159. break;
  1160. default:
  1161. xhci_err(xhci, "ERROR: unexpected command completion "
  1162. "code 0x%x.\n", virt_dev->cmd_status);
  1163. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1164. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1165. ret = -EINVAL;
  1166. break;
  1167. }
  1168. if (ret) {
  1169. return ret;
  1170. }
  1171. temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
  1172. xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
  1173. xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
  1174. udev->slot_id,
  1175. &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
  1176. (unsigned long long)
  1177. xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
  1178. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1179. (unsigned long long)virt_dev->out_ctx->dma);
  1180. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1181. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1182. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1183. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1184. /*
  1185. * USB core uses address 1 for the roothubs, so we add one to the
  1186. * address given back to us by the HC.
  1187. */
  1188. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
  1189. udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
  1190. /* Zero the input context control for later use */
  1191. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1192. ctrl_ctx->add_flags = 0;
  1193. ctrl_ctx->drop_flags = 0;
  1194. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1195. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1196. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1197. return 0;
  1198. }
  1199. int xhci_get_frame(struct usb_hcd *hcd)
  1200. {
  1201. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1202. /* EHCI mods by the periodic size. Why? */
  1203. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1204. }
  1205. MODULE_DESCRIPTION(DRIVER_DESC);
  1206. MODULE_AUTHOR(DRIVER_AUTHOR);
  1207. MODULE_LICENSE("GPL");
  1208. static int __init xhci_hcd_init(void)
  1209. {
  1210. #ifdef CONFIG_PCI
  1211. int retval = 0;
  1212. retval = xhci_register_pci();
  1213. if (retval < 0) {
  1214. printk(KERN_DEBUG "Problem registering PCI driver.");
  1215. return retval;
  1216. }
  1217. #endif
  1218. /*
  1219. * Check the compiler generated sizes of structures that must be laid
  1220. * out in specific ways for hardware access.
  1221. */
  1222. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1223. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  1224. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  1225. /* xhci_device_control has eight fields, and also
  1226. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  1227. */
  1228. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  1229. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  1230. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  1231. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  1232. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  1233. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  1234. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  1235. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1236. return 0;
  1237. }
  1238. module_init(xhci_hcd_init);
  1239. static void __exit xhci_hcd_cleanup(void)
  1240. {
  1241. #ifdef CONFIG_PCI
  1242. xhci_unregister_pci();
  1243. #endif
  1244. }
  1245. module_exit(xhci_hcd_cleanup);