qla_init.c 126 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. fc_port_t *fcport = sp->fcport;
  42. struct qla_hw_data *ha = fcport->vha->hw;
  43. struct req_que *req;
  44. unsigned long flags;
  45. spin_lock_irqsave(&ha->hardware_lock, flags);
  46. req = ha->req_q_map[0];
  47. req->outstanding_cmds[sp->handle] = NULL;
  48. ctx = sp->ctx;
  49. ctx->timeout(sp);
  50. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  51. ctx->free(sp);
  52. }
  53. static void
  54. qla2x00_ctx_sp_free(srb_t *sp)
  55. {
  56. struct srb_ctx *ctx = sp->ctx;
  57. kfree(ctx);
  58. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  59. }
  60. inline srb_t *
  61. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  62. unsigned long tmo)
  63. {
  64. srb_t *sp;
  65. struct qla_hw_data *ha = vha->hw;
  66. struct srb_ctx *ctx;
  67. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  68. if (!sp)
  69. goto done;
  70. ctx = kzalloc(size, GFP_KERNEL);
  71. if (!ctx) {
  72. mempool_free(sp, ha->srb_mempool);
  73. goto done;
  74. }
  75. memset(sp, 0, sizeof(*sp));
  76. sp->fcport = fcport;
  77. sp->ctx = ctx;
  78. ctx->free = qla2x00_ctx_sp_free;
  79. init_timer(&ctx->timer);
  80. if (!tmo)
  81. goto done;
  82. ctx->timer.expires = jiffies + tmo * HZ;
  83. ctx->timer.data = (unsigned long)sp;
  84. ctx->timer.function = qla2x00_ctx_sp_timeout;
  85. add_timer(&ctx->timer);
  86. done:
  87. return sp;
  88. }
  89. /* Asynchronous Login/Logout Routines -------------------------------------- */
  90. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  91. static void
  92. qla2x00_async_logio_timeout(srb_t *sp)
  93. {
  94. fc_port_t *fcport = sp->fcport;
  95. struct srb_logio *lio = sp->ctx;
  96. DEBUG2(printk(KERN_WARNING
  97. "scsi(%ld:%x): Async-%s timeout.\n",
  98. fcport->vha->host_no, sp->handle,
  99. lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout"));
  100. if (lio->ctx.type == SRB_LOGIN_CMD)
  101. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  102. }
  103. int
  104. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  105. uint16_t *data)
  106. {
  107. struct qla_hw_data *ha = vha->hw;
  108. srb_t *sp;
  109. struct srb_logio *lio;
  110. int rval;
  111. rval = QLA_FUNCTION_FAILED;
  112. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  113. ELS_TMO_2_RATOV(ha) + 2);
  114. if (!sp)
  115. goto done;
  116. lio = sp->ctx;
  117. lio->ctx.type = SRB_LOGIN_CMD;
  118. lio->ctx.timeout = qla2x00_async_logio_timeout;
  119. lio->flags |= SRB_LOGIN_COND_PLOGI;
  120. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  121. lio->flags |= SRB_LOGIN_RETRIED;
  122. rval = qla2x00_start_sp(sp);
  123. if (rval != QLA_SUCCESS)
  124. goto done_free_sp;
  125. DEBUG2(printk(KERN_DEBUG
  126. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  127. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  128. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  129. fcport->login_retry));
  130. return rval;
  131. done_free_sp:
  132. del_timer_sync(&lio->ctx.timer);
  133. lio->ctx.free(sp);
  134. done:
  135. return rval;
  136. }
  137. int
  138. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  139. {
  140. struct qla_hw_data *ha = vha->hw;
  141. srb_t *sp;
  142. struct srb_logio *lio;
  143. int rval;
  144. rval = QLA_FUNCTION_FAILED;
  145. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  146. ELS_TMO_2_RATOV(ha) + 2);
  147. if (!sp)
  148. goto done;
  149. lio = sp->ctx;
  150. lio->ctx.type = SRB_LOGOUT_CMD;
  151. lio->ctx.timeout = qla2x00_async_logio_timeout;
  152. rval = qla2x00_start_sp(sp);
  153. if (rval != QLA_SUCCESS)
  154. goto done_free_sp;
  155. DEBUG2(printk(KERN_DEBUG
  156. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  157. fcport->vha->host_no, sp->handle, fcport->loop_id,
  158. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  159. return rval;
  160. done_free_sp:
  161. del_timer_sync(&lio->ctx.timer);
  162. lio->ctx.free(sp);
  163. done:
  164. return rval;
  165. }
  166. int
  167. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  168. uint16_t *data)
  169. {
  170. int rval;
  171. uint8_t opts = 0;
  172. switch (data[0]) {
  173. case MBS_COMMAND_COMPLETE:
  174. if (fcport->flags & FCF_TAPE_PRESENT)
  175. opts |= BIT_1;
  176. rval = qla2x00_get_port_database(vha, fcport, opts);
  177. if (rval != QLA_SUCCESS)
  178. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  179. else
  180. qla2x00_update_fcport(vha, fcport);
  181. break;
  182. case MBS_COMMAND_ERROR:
  183. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  184. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  185. else
  186. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  187. break;
  188. case MBS_PORT_ID_USED:
  189. fcport->loop_id = data[1];
  190. qla2x00_post_async_login_work(vha, fcport, NULL);
  191. break;
  192. case MBS_LOOP_ID_USED:
  193. fcport->loop_id++;
  194. rval = qla2x00_find_new_loop_id(vha, fcport);
  195. if (rval != QLA_SUCCESS) {
  196. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  197. break;
  198. }
  199. qla2x00_post_async_login_work(vha, fcport, NULL);
  200. break;
  201. }
  202. return QLA_SUCCESS;
  203. }
  204. int
  205. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  206. uint16_t *data)
  207. {
  208. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  209. return QLA_SUCCESS;
  210. }
  211. /****************************************************************************/
  212. /* QLogic ISP2x00 Hardware Support Functions. */
  213. /****************************************************************************/
  214. /*
  215. * qla2x00_initialize_adapter
  216. * Initialize board.
  217. *
  218. * Input:
  219. * ha = adapter block pointer.
  220. *
  221. * Returns:
  222. * 0 = success
  223. */
  224. int
  225. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  226. {
  227. int rval;
  228. struct qla_hw_data *ha = vha->hw;
  229. struct req_que *req = ha->req_q_map[0];
  230. /* Clear adapter flags. */
  231. vha->flags.online = 0;
  232. ha->flags.chip_reset_done = 0;
  233. vha->flags.reset_active = 0;
  234. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  235. atomic_set(&vha->loop_state, LOOP_DOWN);
  236. vha->device_flags = DFLG_NO_CABLE;
  237. vha->dpc_flags = 0;
  238. vha->flags.management_server_logged_in = 0;
  239. vha->marker_needed = 0;
  240. ha->isp_abort_cnt = 0;
  241. ha->beacon_blink_led = 0;
  242. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  243. set_bit(0, ha->req_qid_map);
  244. set_bit(0, ha->rsp_qid_map);
  245. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  246. rval = ha->isp_ops->pci_config(vha);
  247. if (rval) {
  248. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  249. vha->host_no));
  250. return (rval);
  251. }
  252. ha->isp_ops->reset_chip(vha);
  253. rval = qla2xxx_get_flash_info(vha);
  254. if (rval) {
  255. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  256. vha->host_no));
  257. return (rval);
  258. }
  259. ha->isp_ops->get_flash_version(vha, req->ring);
  260. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  261. ha->isp_ops->nvram_config(vha);
  262. if (ha->flags.disable_serdes) {
  263. /* Mask HBA via NVRAM settings? */
  264. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  265. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  266. vha->port_name[0], vha->port_name[1],
  267. vha->port_name[2], vha->port_name[3],
  268. vha->port_name[4], vha->port_name[5],
  269. vha->port_name[6], vha->port_name[7]);
  270. return QLA_FUNCTION_FAILED;
  271. }
  272. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  273. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  274. rval = ha->isp_ops->chip_diag(vha);
  275. if (rval)
  276. return (rval);
  277. rval = qla2x00_setup_chip(vha);
  278. if (rval)
  279. return (rval);
  280. }
  281. if (IS_QLA84XX(ha)) {
  282. ha->cs84xx = qla84xx_get_chip(vha);
  283. if (!ha->cs84xx) {
  284. qla_printk(KERN_ERR, ha,
  285. "Unable to configure ISP84XX.\n");
  286. return QLA_FUNCTION_FAILED;
  287. }
  288. }
  289. rval = qla2x00_init_rings(vha);
  290. ha->flags.chip_reset_done = 1;
  291. return (rval);
  292. }
  293. /**
  294. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  295. * @ha: HA context
  296. *
  297. * Returns 0 on success.
  298. */
  299. int
  300. qla2100_pci_config(scsi_qla_host_t *vha)
  301. {
  302. uint16_t w;
  303. unsigned long flags;
  304. struct qla_hw_data *ha = vha->hw;
  305. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  306. pci_set_master(ha->pdev);
  307. pci_try_set_mwi(ha->pdev);
  308. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  309. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  310. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  311. pci_disable_rom(ha->pdev);
  312. /* Get PCI bus information. */
  313. spin_lock_irqsave(&ha->hardware_lock, flags);
  314. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  315. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  316. return QLA_SUCCESS;
  317. }
  318. /**
  319. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  320. * @ha: HA context
  321. *
  322. * Returns 0 on success.
  323. */
  324. int
  325. qla2300_pci_config(scsi_qla_host_t *vha)
  326. {
  327. uint16_t w;
  328. unsigned long flags = 0;
  329. uint32_t cnt;
  330. struct qla_hw_data *ha = vha->hw;
  331. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  332. pci_set_master(ha->pdev);
  333. pci_try_set_mwi(ha->pdev);
  334. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  335. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  336. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  337. w &= ~PCI_COMMAND_INTX_DISABLE;
  338. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  339. /*
  340. * If this is a 2300 card and not 2312, reset the
  341. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  342. * the 2310 also reports itself as a 2300 so we need to get the
  343. * fb revision level -- a 6 indicates it really is a 2300 and
  344. * not a 2310.
  345. */
  346. if (IS_QLA2300(ha)) {
  347. spin_lock_irqsave(&ha->hardware_lock, flags);
  348. /* Pause RISC. */
  349. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  350. for (cnt = 0; cnt < 30000; cnt++) {
  351. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  352. break;
  353. udelay(10);
  354. }
  355. /* Select FPM registers. */
  356. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  357. RD_REG_WORD(&reg->ctrl_status);
  358. /* Get the fb rev level */
  359. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  360. if (ha->fb_rev == FPM_2300)
  361. pci_clear_mwi(ha->pdev);
  362. /* Deselect FPM registers. */
  363. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  364. RD_REG_WORD(&reg->ctrl_status);
  365. /* Release RISC module. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. for (cnt = 0; cnt < 30000; cnt++) {
  368. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  369. break;
  370. udelay(10);
  371. }
  372. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  373. }
  374. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  375. pci_disable_rom(ha->pdev);
  376. /* Get PCI bus information. */
  377. spin_lock_irqsave(&ha->hardware_lock, flags);
  378. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  379. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  380. return QLA_SUCCESS;
  381. }
  382. /**
  383. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  384. * @ha: HA context
  385. *
  386. * Returns 0 on success.
  387. */
  388. int
  389. qla24xx_pci_config(scsi_qla_host_t *vha)
  390. {
  391. uint16_t w;
  392. unsigned long flags = 0;
  393. struct qla_hw_data *ha = vha->hw;
  394. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  395. pci_set_master(ha->pdev);
  396. pci_try_set_mwi(ha->pdev);
  397. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  398. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  399. w &= ~PCI_COMMAND_INTX_DISABLE;
  400. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  401. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  402. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  403. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  404. pcix_set_mmrbc(ha->pdev, 2048);
  405. /* PCIe -- adjust Maximum Read Request Size (2048). */
  406. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  407. pcie_set_readrq(ha->pdev, 2048);
  408. pci_disable_rom(ha->pdev);
  409. ha->chip_revision = ha->pdev->revision;
  410. /* Get PCI bus information. */
  411. spin_lock_irqsave(&ha->hardware_lock, flags);
  412. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  413. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  414. return QLA_SUCCESS;
  415. }
  416. /**
  417. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  418. * @ha: HA context
  419. *
  420. * Returns 0 on success.
  421. */
  422. int
  423. qla25xx_pci_config(scsi_qla_host_t *vha)
  424. {
  425. uint16_t w;
  426. struct qla_hw_data *ha = vha->hw;
  427. pci_set_master(ha->pdev);
  428. pci_try_set_mwi(ha->pdev);
  429. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  430. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  431. w &= ~PCI_COMMAND_INTX_DISABLE;
  432. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  433. /* PCIe -- adjust Maximum Read Request Size (2048). */
  434. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  435. pcie_set_readrq(ha->pdev, 2048);
  436. pci_disable_rom(ha->pdev);
  437. ha->chip_revision = ha->pdev->revision;
  438. return QLA_SUCCESS;
  439. }
  440. /**
  441. * qla2x00_isp_firmware() - Choose firmware image.
  442. * @ha: HA context
  443. *
  444. * Returns 0 on success.
  445. */
  446. static int
  447. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  448. {
  449. int rval;
  450. uint16_t loop_id, topo, sw_cap;
  451. uint8_t domain, area, al_pa;
  452. struct qla_hw_data *ha = vha->hw;
  453. /* Assume loading risc code */
  454. rval = QLA_FUNCTION_FAILED;
  455. if (ha->flags.disable_risc_code_load) {
  456. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  457. vha->host_no));
  458. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  459. /* Verify checksum of loaded RISC code. */
  460. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  461. if (rval == QLA_SUCCESS) {
  462. /* And, verify we are not in ROM code. */
  463. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  464. &area, &domain, &topo, &sw_cap);
  465. }
  466. }
  467. if (rval) {
  468. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  469. vha->host_no));
  470. }
  471. return (rval);
  472. }
  473. /**
  474. * qla2x00_reset_chip() - Reset ISP chip.
  475. * @ha: HA context
  476. *
  477. * Returns 0 on success.
  478. */
  479. void
  480. qla2x00_reset_chip(scsi_qla_host_t *vha)
  481. {
  482. unsigned long flags = 0;
  483. struct qla_hw_data *ha = vha->hw;
  484. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  485. uint32_t cnt;
  486. uint16_t cmd;
  487. ha->isp_ops->disable_intrs(ha);
  488. spin_lock_irqsave(&ha->hardware_lock, flags);
  489. /* Turn off master enable */
  490. cmd = 0;
  491. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  492. cmd &= ~PCI_COMMAND_MASTER;
  493. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  494. if (!IS_QLA2100(ha)) {
  495. /* Pause RISC. */
  496. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  497. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  498. for (cnt = 0; cnt < 30000; cnt++) {
  499. if ((RD_REG_WORD(&reg->hccr) &
  500. HCCR_RISC_PAUSE) != 0)
  501. break;
  502. udelay(100);
  503. }
  504. } else {
  505. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  506. udelay(10);
  507. }
  508. /* Select FPM registers. */
  509. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  510. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  511. /* FPM Soft Reset. */
  512. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  513. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  514. /* Toggle Fpm Reset. */
  515. if (!IS_QLA2200(ha)) {
  516. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  517. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  518. }
  519. /* Select frame buffer registers. */
  520. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  521. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  522. /* Reset frame buffer FIFOs. */
  523. if (IS_QLA2200(ha)) {
  524. WRT_FB_CMD_REG(ha, reg, 0xa000);
  525. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  526. } else {
  527. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  528. /* Read back fb_cmd until zero or 3 seconds max */
  529. for (cnt = 0; cnt < 3000; cnt++) {
  530. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  531. break;
  532. udelay(100);
  533. }
  534. }
  535. /* Select RISC module registers. */
  536. WRT_REG_WORD(&reg->ctrl_status, 0);
  537. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  538. /* Reset RISC processor. */
  539. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  540. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  541. /* Release RISC processor. */
  542. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  543. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  544. }
  545. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  546. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  547. /* Reset ISP chip. */
  548. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  549. /* Wait for RISC to recover from reset. */
  550. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  551. /*
  552. * It is necessary to for a delay here since the card doesn't
  553. * respond to PCI reads during a reset. On some architectures
  554. * this will result in an MCA.
  555. */
  556. udelay(20);
  557. for (cnt = 30000; cnt; cnt--) {
  558. if ((RD_REG_WORD(&reg->ctrl_status) &
  559. CSR_ISP_SOFT_RESET) == 0)
  560. break;
  561. udelay(100);
  562. }
  563. } else
  564. udelay(10);
  565. /* Reset RISC processor. */
  566. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  567. WRT_REG_WORD(&reg->semaphore, 0);
  568. /* Release RISC processor. */
  569. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  570. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  571. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  572. for (cnt = 0; cnt < 30000; cnt++) {
  573. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  574. break;
  575. udelay(100);
  576. }
  577. } else
  578. udelay(100);
  579. /* Turn on master enable */
  580. cmd |= PCI_COMMAND_MASTER;
  581. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  582. /* Disable RISC pause on FPM parity error. */
  583. if (!IS_QLA2100(ha)) {
  584. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  585. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  586. }
  587. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  588. }
  589. /**
  590. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. static inline void
  596. qla24xx_reset_risc(scsi_qla_host_t *vha)
  597. {
  598. unsigned long flags = 0;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  601. uint32_t cnt, d2;
  602. uint16_t wd;
  603. spin_lock_irqsave(&ha->hardware_lock, flags);
  604. /* Reset RISC. */
  605. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  606. for (cnt = 0; cnt < 30000; cnt++) {
  607. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  608. break;
  609. udelay(10);
  610. }
  611. WRT_REG_DWORD(&reg->ctrl_status,
  612. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  613. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  614. udelay(100);
  615. /* Wait for firmware to complete NVRAM accesses. */
  616. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  617. for (cnt = 10000 ; cnt && d2; cnt--) {
  618. udelay(5);
  619. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  620. barrier();
  621. }
  622. /* Wait for soft-reset to complete. */
  623. d2 = RD_REG_DWORD(&reg->ctrl_status);
  624. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  625. udelay(5);
  626. d2 = RD_REG_DWORD(&reg->ctrl_status);
  627. barrier();
  628. }
  629. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  630. RD_REG_DWORD(&reg->hccr);
  631. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  632. RD_REG_DWORD(&reg->hccr);
  633. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  634. RD_REG_DWORD(&reg->hccr);
  635. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  636. for (cnt = 6000000 ; cnt && d2; cnt--) {
  637. udelay(5);
  638. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  639. barrier();
  640. }
  641. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  642. if (IS_NOPOLLING_TYPE(ha))
  643. ha->isp_ops->enable_intrs(ha);
  644. }
  645. /**
  646. * qla24xx_reset_chip() - Reset ISP24xx chip.
  647. * @ha: HA context
  648. *
  649. * Returns 0 on success.
  650. */
  651. void
  652. qla24xx_reset_chip(scsi_qla_host_t *vha)
  653. {
  654. struct qla_hw_data *ha = vha->hw;
  655. ha->isp_ops->disable_intrs(ha);
  656. /* Perform RISC reset. */
  657. qla24xx_reset_risc(vha);
  658. }
  659. /**
  660. * qla2x00_chip_diag() - Test chip for proper operation.
  661. * @ha: HA context
  662. *
  663. * Returns 0 on success.
  664. */
  665. int
  666. qla2x00_chip_diag(scsi_qla_host_t *vha)
  667. {
  668. int rval;
  669. struct qla_hw_data *ha = vha->hw;
  670. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  671. unsigned long flags = 0;
  672. uint16_t data;
  673. uint32_t cnt;
  674. uint16_t mb[5];
  675. struct req_que *req = ha->req_q_map[0];
  676. /* Assume a failed state */
  677. rval = QLA_FUNCTION_FAILED;
  678. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  679. vha->host_no, (u_long)&reg->flash_address));
  680. spin_lock_irqsave(&ha->hardware_lock, flags);
  681. /* Reset ISP chip. */
  682. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  683. /*
  684. * We need to have a delay here since the card will not respond while
  685. * in reset causing an MCA on some architectures.
  686. */
  687. udelay(20);
  688. data = qla2x00_debounce_register(&reg->ctrl_status);
  689. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  690. udelay(5);
  691. data = RD_REG_WORD(&reg->ctrl_status);
  692. barrier();
  693. }
  694. if (!cnt)
  695. goto chip_diag_failed;
  696. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  697. vha->host_no));
  698. /* Reset RISC processor. */
  699. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  700. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  701. /* Workaround for QLA2312 PCI parity error */
  702. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  703. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  704. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  705. udelay(5);
  706. data = RD_MAILBOX_REG(ha, reg, 0);
  707. barrier();
  708. }
  709. } else
  710. udelay(10);
  711. if (!cnt)
  712. goto chip_diag_failed;
  713. /* Check product ID of chip */
  714. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  715. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  716. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  717. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  718. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  719. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  720. mb[3] != PROD_ID_3) {
  721. qla_printk(KERN_WARNING, ha,
  722. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  723. goto chip_diag_failed;
  724. }
  725. ha->product_id[0] = mb[1];
  726. ha->product_id[1] = mb[2];
  727. ha->product_id[2] = mb[3];
  728. ha->product_id[3] = mb[4];
  729. /* Adjust fw RISC transfer size */
  730. if (req->length > 1024)
  731. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  732. else
  733. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  734. req->length;
  735. if (IS_QLA2200(ha) &&
  736. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  737. /* Limit firmware transfer size with a 2200A */
  738. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  739. vha->host_no));
  740. ha->device_type |= DT_ISP2200A;
  741. ha->fw_transfer_size = 128;
  742. }
  743. /* Wrap Incoming Mailboxes Test. */
  744. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  745. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  746. rval = qla2x00_mbx_reg_test(vha);
  747. if (rval) {
  748. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  749. vha->host_no));
  750. qla_printk(KERN_WARNING, ha,
  751. "Failed mailbox send register test\n");
  752. }
  753. else {
  754. /* Flag a successful rval */
  755. rval = QLA_SUCCESS;
  756. }
  757. spin_lock_irqsave(&ha->hardware_lock, flags);
  758. chip_diag_failed:
  759. if (rval)
  760. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  761. "****\n", vha->host_no));
  762. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  763. return (rval);
  764. }
  765. /**
  766. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  767. * @ha: HA context
  768. *
  769. * Returns 0 on success.
  770. */
  771. int
  772. qla24xx_chip_diag(scsi_qla_host_t *vha)
  773. {
  774. int rval;
  775. struct qla_hw_data *ha = vha->hw;
  776. struct req_que *req = ha->req_q_map[0];
  777. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  778. rval = qla2x00_mbx_reg_test(vha);
  779. if (rval) {
  780. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  781. vha->host_no));
  782. qla_printk(KERN_WARNING, ha,
  783. "Failed mailbox send register test\n");
  784. } else {
  785. /* Flag a successful rval */
  786. rval = QLA_SUCCESS;
  787. }
  788. return rval;
  789. }
  790. void
  791. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  792. {
  793. int rval;
  794. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  795. eft_size, fce_size, mq_size;
  796. dma_addr_t tc_dma;
  797. void *tc;
  798. struct qla_hw_data *ha = vha->hw;
  799. struct req_que *req = ha->req_q_map[0];
  800. struct rsp_que *rsp = ha->rsp_q_map[0];
  801. if (ha->fw_dump) {
  802. qla_printk(KERN_WARNING, ha,
  803. "Firmware dump previously allocated.\n");
  804. return;
  805. }
  806. ha->fw_dumped = 0;
  807. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  808. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  809. fixed_size = sizeof(struct qla2100_fw_dump);
  810. } else if (IS_QLA23XX(ha)) {
  811. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  812. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  813. sizeof(uint16_t);
  814. } else if (IS_FWI2_CAPABLE(ha)) {
  815. if (IS_QLA81XX(ha))
  816. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  817. else if (IS_QLA25XX(ha))
  818. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  819. else
  820. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  821. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  822. sizeof(uint32_t);
  823. if (ha->mqenable)
  824. mq_size = sizeof(struct qla2xxx_mq_chain);
  825. /* Allocate memory for Fibre Channel Event Buffer. */
  826. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  827. goto try_eft;
  828. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  829. GFP_KERNEL);
  830. if (!tc) {
  831. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  832. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  833. goto try_eft;
  834. }
  835. memset(tc, 0, FCE_SIZE);
  836. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  837. ha->fce_mb, &ha->fce_bufs);
  838. if (rval) {
  839. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  840. "FCE (%d).\n", rval);
  841. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  842. tc_dma);
  843. ha->flags.fce_enabled = 0;
  844. goto try_eft;
  845. }
  846. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  847. FCE_SIZE / 1024);
  848. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  849. ha->flags.fce_enabled = 1;
  850. ha->fce_dma = tc_dma;
  851. ha->fce = tc;
  852. try_eft:
  853. /* Allocate memory for Extended Trace Buffer. */
  854. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  855. GFP_KERNEL);
  856. if (!tc) {
  857. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  858. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  859. goto cont_alloc;
  860. }
  861. memset(tc, 0, EFT_SIZE);
  862. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  863. if (rval) {
  864. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  865. "EFT (%d).\n", rval);
  866. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  867. tc_dma);
  868. goto cont_alloc;
  869. }
  870. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  871. EFT_SIZE / 1024);
  872. eft_size = EFT_SIZE;
  873. ha->eft_dma = tc_dma;
  874. ha->eft = tc;
  875. }
  876. cont_alloc:
  877. req_q_size = req->length * sizeof(request_t);
  878. rsp_q_size = rsp->length * sizeof(response_t);
  879. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  880. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  881. ha->chain_offset = dump_size;
  882. dump_size += mq_size + fce_size;
  883. ha->fw_dump = vmalloc(dump_size);
  884. if (!ha->fw_dump) {
  885. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  886. "firmware dump!!!\n", dump_size / 1024);
  887. if (ha->eft) {
  888. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  889. ha->eft_dma);
  890. ha->eft = NULL;
  891. ha->eft_dma = 0;
  892. }
  893. return;
  894. }
  895. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  896. dump_size / 1024);
  897. ha->fw_dump_len = dump_size;
  898. ha->fw_dump->signature[0] = 'Q';
  899. ha->fw_dump->signature[1] = 'L';
  900. ha->fw_dump->signature[2] = 'G';
  901. ha->fw_dump->signature[3] = 'C';
  902. ha->fw_dump->version = __constant_htonl(1);
  903. ha->fw_dump->fixed_size = htonl(fixed_size);
  904. ha->fw_dump->mem_size = htonl(mem_size);
  905. ha->fw_dump->req_q_size = htonl(req_q_size);
  906. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  907. ha->fw_dump->eft_size = htonl(eft_size);
  908. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  909. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  910. ha->fw_dump->header_size =
  911. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  912. }
  913. static int
  914. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  915. {
  916. #define MPS_MASK 0xe0
  917. int rval;
  918. uint16_t dc;
  919. uint32_t dw;
  920. struct qla_hw_data *ha = vha->hw;
  921. if (!IS_QLA81XX(vha->hw))
  922. return QLA_SUCCESS;
  923. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  924. if (rval != QLA_SUCCESS) {
  925. DEBUG2(qla_printk(KERN_WARNING, ha,
  926. "Sync-MPI: Unable to acquire semaphore.\n"));
  927. goto done;
  928. }
  929. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  930. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  931. if (rval != QLA_SUCCESS) {
  932. DEBUG2(qla_printk(KERN_WARNING, ha,
  933. "Sync-MPI: Unable to read sync.\n"));
  934. goto done_release;
  935. }
  936. dc &= MPS_MASK;
  937. if (dc == (dw & MPS_MASK))
  938. goto done_release;
  939. dw &= ~MPS_MASK;
  940. dw |= dc;
  941. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  942. if (rval != QLA_SUCCESS) {
  943. DEBUG2(qla_printk(KERN_WARNING, ha,
  944. "Sync-MPI: Unable to gain sync.\n"));
  945. }
  946. done_release:
  947. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  948. if (rval != QLA_SUCCESS) {
  949. DEBUG2(qla_printk(KERN_WARNING, ha,
  950. "Sync-MPI: Unable to release semaphore.\n"));
  951. }
  952. done:
  953. return rval;
  954. }
  955. /**
  956. * qla2x00_setup_chip() - Load and start RISC firmware.
  957. * @ha: HA context
  958. *
  959. * Returns 0 on success.
  960. */
  961. static int
  962. qla2x00_setup_chip(scsi_qla_host_t *vha)
  963. {
  964. int rval;
  965. uint32_t srisc_address = 0;
  966. struct qla_hw_data *ha = vha->hw;
  967. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  968. unsigned long flags;
  969. uint16_t fw_major_version;
  970. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  971. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  972. spin_lock_irqsave(&ha->hardware_lock, flags);
  973. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  974. RD_REG_WORD(&reg->hccr);
  975. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  976. }
  977. qla81xx_mpi_sync(vha);
  978. /* Load firmware sequences */
  979. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  980. if (rval == QLA_SUCCESS) {
  981. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  982. "code.\n", vha->host_no));
  983. rval = qla2x00_verify_checksum(vha, srisc_address);
  984. if (rval == QLA_SUCCESS) {
  985. /* Start firmware execution. */
  986. DEBUG(printk("scsi(%ld): Checksum OK, start "
  987. "firmware.\n", vha->host_no));
  988. rval = qla2x00_execute_fw(vha, srisc_address);
  989. /* Retrieve firmware information. */
  990. if (rval == QLA_SUCCESS) {
  991. fw_major_version = ha->fw_major_version;
  992. rval = qla2x00_get_fw_version(vha,
  993. &ha->fw_major_version,
  994. &ha->fw_minor_version,
  995. &ha->fw_subminor_version,
  996. &ha->fw_attributes, &ha->fw_memory_size,
  997. ha->mpi_version, &ha->mpi_capabilities,
  998. ha->phy_version);
  999. if (rval != QLA_SUCCESS)
  1000. goto failed;
  1001. ha->flags.npiv_supported = 0;
  1002. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1003. (ha->fw_attributes & BIT_2)) {
  1004. ha->flags.npiv_supported = 1;
  1005. if ((!ha->max_npiv_vports) ||
  1006. ((ha->max_npiv_vports + 1) %
  1007. MIN_MULTI_ID_FABRIC))
  1008. ha->max_npiv_vports =
  1009. MIN_MULTI_ID_FABRIC - 1;
  1010. }
  1011. qla2x00_get_resource_cnts(vha, NULL,
  1012. &ha->fw_xcb_count, NULL, NULL,
  1013. &ha->max_npiv_vports);
  1014. if (!fw_major_version && ql2xallocfwdump)
  1015. qla2x00_alloc_fw_dump(vha);
  1016. }
  1017. } else {
  1018. DEBUG2(printk(KERN_INFO
  1019. "scsi(%ld): ISP Firmware failed checksum.\n",
  1020. vha->host_no));
  1021. }
  1022. }
  1023. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1024. /* Enable proper parity. */
  1025. spin_lock_irqsave(&ha->hardware_lock, flags);
  1026. if (IS_QLA2300(ha))
  1027. /* SRAM parity */
  1028. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1029. else
  1030. /* SRAM, Instruction RAM and GP RAM parity */
  1031. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1032. RD_REG_WORD(&reg->hccr);
  1033. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1034. }
  1035. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1036. uint32_t size;
  1037. rval = qla81xx_fac_get_sector_size(vha, &size);
  1038. if (rval == QLA_SUCCESS) {
  1039. ha->flags.fac_supported = 1;
  1040. ha->fdt_block_size = size << 2;
  1041. } else {
  1042. qla_printk(KERN_ERR, ha,
  1043. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1044. ha->fw_major_version, ha->fw_minor_version,
  1045. ha->fw_subminor_version);
  1046. }
  1047. }
  1048. failed:
  1049. if (rval) {
  1050. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1051. vha->host_no));
  1052. }
  1053. return (rval);
  1054. }
  1055. /**
  1056. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1057. * @ha: HA context
  1058. *
  1059. * Beginning of request ring has initialization control block already built
  1060. * by nvram config routine.
  1061. *
  1062. * Returns 0 on success.
  1063. */
  1064. void
  1065. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1066. {
  1067. uint16_t cnt;
  1068. response_t *pkt;
  1069. rsp->ring_ptr = rsp->ring;
  1070. rsp->ring_index = 0;
  1071. rsp->status_srb = NULL;
  1072. pkt = rsp->ring_ptr;
  1073. for (cnt = 0; cnt < rsp->length; cnt++) {
  1074. pkt->signature = RESPONSE_PROCESSED;
  1075. pkt++;
  1076. }
  1077. }
  1078. /**
  1079. * qla2x00_update_fw_options() - Read and process firmware options.
  1080. * @ha: HA context
  1081. *
  1082. * Returns 0 on success.
  1083. */
  1084. void
  1085. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1086. {
  1087. uint16_t swing, emphasis, tx_sens, rx_sens;
  1088. struct qla_hw_data *ha = vha->hw;
  1089. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1090. qla2x00_get_fw_options(vha, ha->fw_options);
  1091. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1092. return;
  1093. /* Serial Link options. */
  1094. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1095. vha->host_no));
  1096. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1097. sizeof(ha->fw_seriallink_options)));
  1098. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1099. if (ha->fw_seriallink_options[3] & BIT_2) {
  1100. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1101. /* 1G settings */
  1102. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1103. emphasis = (ha->fw_seriallink_options[2] &
  1104. (BIT_4 | BIT_3)) >> 3;
  1105. tx_sens = ha->fw_seriallink_options[0] &
  1106. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1107. rx_sens = (ha->fw_seriallink_options[0] &
  1108. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1109. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1110. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1111. if (rx_sens == 0x0)
  1112. rx_sens = 0x3;
  1113. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1114. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1115. ha->fw_options[10] |= BIT_5 |
  1116. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1117. (tx_sens & (BIT_1 | BIT_0));
  1118. /* 2G settings */
  1119. swing = (ha->fw_seriallink_options[2] &
  1120. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1121. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1122. tx_sens = ha->fw_seriallink_options[1] &
  1123. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1124. rx_sens = (ha->fw_seriallink_options[1] &
  1125. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1126. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1127. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1128. if (rx_sens == 0x0)
  1129. rx_sens = 0x3;
  1130. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1131. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1132. ha->fw_options[11] |= BIT_5 |
  1133. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1134. (tx_sens & (BIT_1 | BIT_0));
  1135. }
  1136. /* FCP2 options. */
  1137. /* Return command IOCBs without waiting for an ABTS to complete. */
  1138. ha->fw_options[3] |= BIT_13;
  1139. /* LED scheme. */
  1140. if (ha->flags.enable_led_scheme)
  1141. ha->fw_options[2] |= BIT_12;
  1142. /* Detect ISP6312. */
  1143. if (IS_QLA6312(ha))
  1144. ha->fw_options[2] |= BIT_13;
  1145. /* Update firmware options. */
  1146. qla2x00_set_fw_options(vha, ha->fw_options);
  1147. }
  1148. void
  1149. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1150. {
  1151. int rval;
  1152. struct qla_hw_data *ha = vha->hw;
  1153. /* Update Serial Link options. */
  1154. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1155. return;
  1156. rval = qla2x00_set_serdes_params(vha,
  1157. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1158. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1159. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1160. if (rval != QLA_SUCCESS) {
  1161. qla_printk(KERN_WARNING, ha,
  1162. "Unable to update Serial Link options (%x).\n", rval);
  1163. }
  1164. }
  1165. void
  1166. qla2x00_config_rings(struct scsi_qla_host *vha)
  1167. {
  1168. struct qla_hw_data *ha = vha->hw;
  1169. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1170. struct req_que *req = ha->req_q_map[0];
  1171. struct rsp_que *rsp = ha->rsp_q_map[0];
  1172. /* Setup ring parameters in initialization control block. */
  1173. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1174. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1175. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1176. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1177. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1178. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1179. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1180. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1181. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1182. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1183. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1184. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1185. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1186. }
  1187. void
  1188. qla24xx_config_rings(struct scsi_qla_host *vha)
  1189. {
  1190. struct qla_hw_data *ha = vha->hw;
  1191. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1192. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1193. struct qla_msix_entry *msix;
  1194. struct init_cb_24xx *icb;
  1195. uint16_t rid = 0;
  1196. struct req_que *req = ha->req_q_map[0];
  1197. struct rsp_que *rsp = ha->rsp_q_map[0];
  1198. /* Setup ring parameters in initialization control block. */
  1199. icb = (struct init_cb_24xx *)ha->init_cb;
  1200. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1201. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1202. icb->request_q_length = cpu_to_le16(req->length);
  1203. icb->response_q_length = cpu_to_le16(rsp->length);
  1204. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1205. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1206. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1207. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1208. if (ha->mqenable) {
  1209. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1210. icb->rid = __constant_cpu_to_le16(rid);
  1211. if (ha->flags.msix_enabled) {
  1212. msix = &ha->msix_entries[1];
  1213. DEBUG2_17(printk(KERN_INFO
  1214. "Registering vector 0x%x for base que\n", msix->entry));
  1215. icb->msix = cpu_to_le16(msix->entry);
  1216. }
  1217. /* Use alternate PCI bus number */
  1218. if (MSB(rid))
  1219. icb->firmware_options_2 |=
  1220. __constant_cpu_to_le32(BIT_19);
  1221. /* Use alternate PCI devfn */
  1222. if (LSB(rid))
  1223. icb->firmware_options_2 |=
  1224. __constant_cpu_to_le32(BIT_18);
  1225. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1226. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1227. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1228. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1229. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1230. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1231. } else {
  1232. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1233. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1234. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1235. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1236. }
  1237. /* PCI posting */
  1238. RD_REG_DWORD(&ioreg->hccr);
  1239. }
  1240. /**
  1241. * qla2x00_init_rings() - Initializes firmware.
  1242. * @ha: HA context
  1243. *
  1244. * Beginning of request ring has initialization control block already built
  1245. * by nvram config routine.
  1246. *
  1247. * Returns 0 on success.
  1248. */
  1249. static int
  1250. qla2x00_init_rings(scsi_qla_host_t *vha)
  1251. {
  1252. int rval;
  1253. unsigned long flags = 0;
  1254. int cnt, que;
  1255. struct qla_hw_data *ha = vha->hw;
  1256. struct req_que *req;
  1257. struct rsp_que *rsp;
  1258. struct scsi_qla_host *vp;
  1259. struct mid_init_cb_24xx *mid_init_cb =
  1260. (struct mid_init_cb_24xx *) ha->init_cb;
  1261. spin_lock_irqsave(&ha->hardware_lock, flags);
  1262. /* Clear outstanding commands array. */
  1263. for (que = 0; que < ha->max_req_queues; que++) {
  1264. req = ha->req_q_map[que];
  1265. if (!req)
  1266. continue;
  1267. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1268. req->outstanding_cmds[cnt] = NULL;
  1269. req->current_outstanding_cmd = 1;
  1270. /* Initialize firmware. */
  1271. req->ring_ptr = req->ring;
  1272. req->ring_index = 0;
  1273. req->cnt = req->length;
  1274. }
  1275. for (que = 0; que < ha->max_rsp_queues; que++) {
  1276. rsp = ha->rsp_q_map[que];
  1277. if (!rsp)
  1278. continue;
  1279. /* Initialize response queue entries */
  1280. qla2x00_init_response_q_entries(rsp);
  1281. }
  1282. /* Clear RSCN queue. */
  1283. list_for_each_entry(vp, &ha->vp_list, list) {
  1284. vp->rscn_in_ptr = 0;
  1285. vp->rscn_out_ptr = 0;
  1286. }
  1287. ha->isp_ops->config_rings(vha);
  1288. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1289. /* Update any ISP specific firmware options before initialization. */
  1290. ha->isp_ops->update_fw_options(vha);
  1291. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1292. if (ha->flags.npiv_supported) {
  1293. if (ha->operating_mode == LOOP)
  1294. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1295. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1296. }
  1297. if (IS_FWI2_CAPABLE(ha)) {
  1298. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1299. mid_init_cb->init_cb.execution_throttle =
  1300. cpu_to_le16(ha->fw_xcb_count);
  1301. }
  1302. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1303. if (rval) {
  1304. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1305. vha->host_no));
  1306. } else {
  1307. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1308. vha->host_no));
  1309. }
  1310. return (rval);
  1311. }
  1312. /**
  1313. * qla2x00_fw_ready() - Waits for firmware ready.
  1314. * @ha: HA context
  1315. *
  1316. * Returns 0 on success.
  1317. */
  1318. static int
  1319. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1320. {
  1321. int rval;
  1322. unsigned long wtime, mtime, cs84xx_time;
  1323. uint16_t min_wait; /* Minimum wait time if loop is down */
  1324. uint16_t wait_time; /* Wait time if loop is coming ready */
  1325. uint16_t state[5];
  1326. struct qla_hw_data *ha = vha->hw;
  1327. rval = QLA_SUCCESS;
  1328. /* 20 seconds for loop down. */
  1329. min_wait = 20;
  1330. /*
  1331. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1332. * our own processing.
  1333. */
  1334. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1335. wait_time = min_wait;
  1336. }
  1337. /* Min wait time if loop down */
  1338. mtime = jiffies + (min_wait * HZ);
  1339. /* wait time before firmware ready */
  1340. wtime = jiffies + (wait_time * HZ);
  1341. /* Wait for ISP to finish LIP */
  1342. if (!vha->flags.init_done)
  1343. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1344. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1345. vha->host_no));
  1346. do {
  1347. rval = qla2x00_get_firmware_state(vha, state);
  1348. if (rval == QLA_SUCCESS) {
  1349. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1350. vha->device_flags &= ~DFLG_NO_CABLE;
  1351. }
  1352. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1353. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1354. "84xx=%x.\n", vha->host_no, state[0],
  1355. state[2]));
  1356. if ((state[2] & FSTATE_LOGGED_IN) &&
  1357. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1358. DEBUG16(printk("scsi(%ld): Sending "
  1359. "verify iocb.\n", vha->host_no));
  1360. cs84xx_time = jiffies;
  1361. rval = qla84xx_init_chip(vha);
  1362. if (rval != QLA_SUCCESS)
  1363. break;
  1364. /* Add time taken to initialize. */
  1365. cs84xx_time = jiffies - cs84xx_time;
  1366. wtime += cs84xx_time;
  1367. mtime += cs84xx_time;
  1368. DEBUG16(printk("scsi(%ld): Increasing "
  1369. "wait time by %ld. New time %ld\n",
  1370. vha->host_no, cs84xx_time, wtime));
  1371. }
  1372. } else if (state[0] == FSTATE_READY) {
  1373. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1374. vha->host_no));
  1375. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1376. &ha->login_timeout, &ha->r_a_tov);
  1377. rval = QLA_SUCCESS;
  1378. break;
  1379. }
  1380. rval = QLA_FUNCTION_FAILED;
  1381. if (atomic_read(&vha->loop_down_timer) &&
  1382. state[0] != FSTATE_READY) {
  1383. /* Loop down. Timeout on min_wait for states
  1384. * other than Wait for Login.
  1385. */
  1386. if (time_after_eq(jiffies, mtime)) {
  1387. qla_printk(KERN_INFO, ha,
  1388. "Cable is unplugged...\n");
  1389. vha->device_flags |= DFLG_NO_CABLE;
  1390. break;
  1391. }
  1392. }
  1393. } else {
  1394. /* Mailbox cmd failed. Timeout on min_wait. */
  1395. if (time_after_eq(jiffies, mtime))
  1396. break;
  1397. }
  1398. if (time_after_eq(jiffies, wtime))
  1399. break;
  1400. /* Delay for a while */
  1401. msleep(500);
  1402. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1403. vha->host_no, state[0], jiffies));
  1404. } while (1);
  1405. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1406. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1407. jiffies));
  1408. if (rval) {
  1409. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1410. vha->host_no));
  1411. }
  1412. return (rval);
  1413. }
  1414. /*
  1415. * qla2x00_configure_hba
  1416. * Setup adapter context.
  1417. *
  1418. * Input:
  1419. * ha = adapter state pointer.
  1420. *
  1421. * Returns:
  1422. * 0 = success
  1423. *
  1424. * Context:
  1425. * Kernel context.
  1426. */
  1427. static int
  1428. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1429. {
  1430. int rval;
  1431. uint16_t loop_id;
  1432. uint16_t topo;
  1433. uint16_t sw_cap;
  1434. uint8_t al_pa;
  1435. uint8_t area;
  1436. uint8_t domain;
  1437. char connect_type[22];
  1438. struct qla_hw_data *ha = vha->hw;
  1439. /* Get host addresses. */
  1440. rval = qla2x00_get_adapter_id(vha,
  1441. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1442. if (rval != QLA_SUCCESS) {
  1443. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1444. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1445. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1446. __func__, vha->host_no));
  1447. } else {
  1448. qla_printk(KERN_WARNING, ha,
  1449. "ERROR -- Unable to get host loop ID.\n");
  1450. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1451. }
  1452. return (rval);
  1453. }
  1454. if (topo == 4) {
  1455. qla_printk(KERN_INFO, ha,
  1456. "Cannot get topology - retrying.\n");
  1457. return (QLA_FUNCTION_FAILED);
  1458. }
  1459. vha->loop_id = loop_id;
  1460. /* initialize */
  1461. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1462. ha->operating_mode = LOOP;
  1463. ha->switch_cap = 0;
  1464. switch (topo) {
  1465. case 0:
  1466. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1467. vha->host_no));
  1468. ha->current_topology = ISP_CFG_NL;
  1469. strcpy(connect_type, "(Loop)");
  1470. break;
  1471. case 1:
  1472. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1473. vha->host_no));
  1474. ha->switch_cap = sw_cap;
  1475. ha->current_topology = ISP_CFG_FL;
  1476. strcpy(connect_type, "(FL_Port)");
  1477. break;
  1478. case 2:
  1479. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1480. vha->host_no));
  1481. ha->operating_mode = P2P;
  1482. ha->current_topology = ISP_CFG_N;
  1483. strcpy(connect_type, "(N_Port-to-N_Port)");
  1484. break;
  1485. case 3:
  1486. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1487. vha->host_no));
  1488. ha->switch_cap = sw_cap;
  1489. ha->operating_mode = P2P;
  1490. ha->current_topology = ISP_CFG_F;
  1491. strcpy(connect_type, "(F_Port)");
  1492. break;
  1493. default:
  1494. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1495. "Using NL.\n",
  1496. vha->host_no, topo));
  1497. ha->current_topology = ISP_CFG_NL;
  1498. strcpy(connect_type, "(Loop)");
  1499. break;
  1500. }
  1501. /* Save Host port and loop ID. */
  1502. /* byte order - Big Endian */
  1503. vha->d_id.b.domain = domain;
  1504. vha->d_id.b.area = area;
  1505. vha->d_id.b.al_pa = al_pa;
  1506. if (!vha->flags.init_done)
  1507. qla_printk(KERN_INFO, ha,
  1508. "Topology - %s, Host Loop address 0x%x\n",
  1509. connect_type, vha->loop_id);
  1510. if (rval) {
  1511. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1512. } else {
  1513. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1514. }
  1515. return(rval);
  1516. }
  1517. static inline void
  1518. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1519. char *def)
  1520. {
  1521. char *st, *en;
  1522. uint16_t index;
  1523. struct qla_hw_data *ha = vha->hw;
  1524. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1525. !IS_QLA81XX(ha);
  1526. if (memcmp(model, BINZERO, len) != 0) {
  1527. strncpy(ha->model_number, model, len);
  1528. st = en = ha->model_number;
  1529. en += len - 1;
  1530. while (en > st) {
  1531. if (*en != 0x20 && *en != 0x00)
  1532. break;
  1533. *en-- = '\0';
  1534. }
  1535. index = (ha->pdev->subsystem_device & 0xff);
  1536. if (use_tbl &&
  1537. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1538. index < QLA_MODEL_NAMES)
  1539. strncpy(ha->model_desc,
  1540. qla2x00_model_name[index * 2 + 1],
  1541. sizeof(ha->model_desc) - 1);
  1542. } else {
  1543. index = (ha->pdev->subsystem_device & 0xff);
  1544. if (use_tbl &&
  1545. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1546. index < QLA_MODEL_NAMES) {
  1547. strcpy(ha->model_number,
  1548. qla2x00_model_name[index * 2]);
  1549. strncpy(ha->model_desc,
  1550. qla2x00_model_name[index * 2 + 1],
  1551. sizeof(ha->model_desc) - 1);
  1552. } else {
  1553. strcpy(ha->model_number, def);
  1554. }
  1555. }
  1556. if (IS_FWI2_CAPABLE(ha))
  1557. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1558. sizeof(ha->model_desc));
  1559. }
  1560. /* On sparc systems, obtain port and node WWN from firmware
  1561. * properties.
  1562. */
  1563. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1564. {
  1565. #ifdef CONFIG_SPARC
  1566. struct qla_hw_data *ha = vha->hw;
  1567. struct pci_dev *pdev = ha->pdev;
  1568. struct device_node *dp = pci_device_to_OF_node(pdev);
  1569. const u8 *val;
  1570. int len;
  1571. val = of_get_property(dp, "port-wwn", &len);
  1572. if (val && len >= WWN_SIZE)
  1573. memcpy(nv->port_name, val, WWN_SIZE);
  1574. val = of_get_property(dp, "node-wwn", &len);
  1575. if (val && len >= WWN_SIZE)
  1576. memcpy(nv->node_name, val, WWN_SIZE);
  1577. #endif
  1578. }
  1579. /*
  1580. * NVRAM configuration for ISP 2xxx
  1581. *
  1582. * Input:
  1583. * ha = adapter block pointer.
  1584. *
  1585. * Output:
  1586. * initialization control block in response_ring
  1587. * host adapters parameters in host adapter block
  1588. *
  1589. * Returns:
  1590. * 0 = success.
  1591. */
  1592. int
  1593. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1594. {
  1595. int rval;
  1596. uint8_t chksum = 0;
  1597. uint16_t cnt;
  1598. uint8_t *dptr1, *dptr2;
  1599. struct qla_hw_data *ha = vha->hw;
  1600. init_cb_t *icb = ha->init_cb;
  1601. nvram_t *nv = ha->nvram;
  1602. uint8_t *ptr = ha->nvram;
  1603. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1604. rval = QLA_SUCCESS;
  1605. /* Determine NVRAM starting address. */
  1606. ha->nvram_size = sizeof(nvram_t);
  1607. ha->nvram_base = 0;
  1608. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1609. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1610. ha->nvram_base = 0x80;
  1611. /* Get NVRAM data and calculate checksum. */
  1612. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1613. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1614. chksum += *ptr++;
  1615. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1616. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1617. /* Bad NVRAM data, set defaults parameters. */
  1618. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1619. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1620. /* Reset NVRAM data. */
  1621. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1622. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1623. nv->nvram_version);
  1624. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1625. "invalid -- WWPN) defaults.\n");
  1626. /*
  1627. * Set default initialization control block.
  1628. */
  1629. memset(nv, 0, ha->nvram_size);
  1630. nv->parameter_block_version = ICB_VERSION;
  1631. if (IS_QLA23XX(ha)) {
  1632. nv->firmware_options[0] = BIT_2 | BIT_1;
  1633. nv->firmware_options[1] = BIT_7 | BIT_5;
  1634. nv->add_firmware_options[0] = BIT_5;
  1635. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1636. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1637. nv->special_options[1] = BIT_7;
  1638. } else if (IS_QLA2200(ha)) {
  1639. nv->firmware_options[0] = BIT_2 | BIT_1;
  1640. nv->firmware_options[1] = BIT_7 | BIT_5;
  1641. nv->add_firmware_options[0] = BIT_5;
  1642. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1643. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1644. } else if (IS_QLA2100(ha)) {
  1645. nv->firmware_options[0] = BIT_3 | BIT_1;
  1646. nv->firmware_options[1] = BIT_5;
  1647. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1648. }
  1649. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1650. nv->execution_throttle = __constant_cpu_to_le16(16);
  1651. nv->retry_count = 8;
  1652. nv->retry_delay = 1;
  1653. nv->port_name[0] = 33;
  1654. nv->port_name[3] = 224;
  1655. nv->port_name[4] = 139;
  1656. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1657. nv->login_timeout = 4;
  1658. /*
  1659. * Set default host adapter parameters
  1660. */
  1661. nv->host_p[1] = BIT_2;
  1662. nv->reset_delay = 5;
  1663. nv->port_down_retry_count = 8;
  1664. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1665. nv->link_down_timeout = 60;
  1666. rval = 1;
  1667. }
  1668. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1669. /*
  1670. * The SN2 does not provide BIOS emulation which means you can't change
  1671. * potentially bogus BIOS settings. Force the use of default settings
  1672. * for link rate and frame size. Hope that the rest of the settings
  1673. * are valid.
  1674. */
  1675. if (ia64_platform_is("sn2")) {
  1676. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1677. if (IS_QLA23XX(ha))
  1678. nv->special_options[1] = BIT_7;
  1679. }
  1680. #endif
  1681. /* Reset Initialization control block */
  1682. memset(icb, 0, ha->init_cb_size);
  1683. /*
  1684. * Setup driver NVRAM options.
  1685. */
  1686. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1687. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1688. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1689. nv->firmware_options[1] &= ~BIT_4;
  1690. if (IS_QLA23XX(ha)) {
  1691. nv->firmware_options[0] |= BIT_2;
  1692. nv->firmware_options[0] &= ~BIT_3;
  1693. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1694. if (IS_QLA2300(ha)) {
  1695. if (ha->fb_rev == FPM_2310) {
  1696. strcpy(ha->model_number, "QLA2310");
  1697. } else {
  1698. strcpy(ha->model_number, "QLA2300");
  1699. }
  1700. } else {
  1701. qla2x00_set_model_info(vha, nv->model_number,
  1702. sizeof(nv->model_number), "QLA23xx");
  1703. }
  1704. } else if (IS_QLA2200(ha)) {
  1705. nv->firmware_options[0] |= BIT_2;
  1706. /*
  1707. * 'Point-to-point preferred, else loop' is not a safe
  1708. * connection mode setting.
  1709. */
  1710. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1711. (BIT_5 | BIT_4)) {
  1712. /* Force 'loop preferred, else point-to-point'. */
  1713. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1714. nv->add_firmware_options[0] |= BIT_5;
  1715. }
  1716. strcpy(ha->model_number, "QLA22xx");
  1717. } else /*if (IS_QLA2100(ha))*/ {
  1718. strcpy(ha->model_number, "QLA2100");
  1719. }
  1720. /*
  1721. * Copy over NVRAM RISC parameter block to initialization control block.
  1722. */
  1723. dptr1 = (uint8_t *)icb;
  1724. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1725. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1726. while (cnt--)
  1727. *dptr1++ = *dptr2++;
  1728. /* Copy 2nd half. */
  1729. dptr1 = (uint8_t *)icb->add_firmware_options;
  1730. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1731. while (cnt--)
  1732. *dptr1++ = *dptr2++;
  1733. /* Use alternate WWN? */
  1734. if (nv->host_p[1] & BIT_7) {
  1735. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1736. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1737. }
  1738. /* Prepare nodename */
  1739. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1740. /*
  1741. * Firmware will apply the following mask if the nodename was
  1742. * not provided.
  1743. */
  1744. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1745. icb->node_name[0] &= 0xF0;
  1746. }
  1747. /*
  1748. * Set host adapter parameters.
  1749. */
  1750. if (nv->host_p[0] & BIT_7)
  1751. ql2xextended_error_logging = 1;
  1752. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1753. /* Always load RISC code on non ISP2[12]00 chips. */
  1754. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1755. ha->flags.disable_risc_code_load = 0;
  1756. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1757. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1758. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1759. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1760. ha->flags.disable_serdes = 0;
  1761. ha->operating_mode =
  1762. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1763. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1764. sizeof(ha->fw_seriallink_options));
  1765. /* save HBA serial number */
  1766. ha->serial0 = icb->port_name[5];
  1767. ha->serial1 = icb->port_name[6];
  1768. ha->serial2 = icb->port_name[7];
  1769. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1770. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1771. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1772. ha->retry_count = nv->retry_count;
  1773. /* Set minimum login_timeout to 4 seconds. */
  1774. if (nv->login_timeout < ql2xlogintimeout)
  1775. nv->login_timeout = ql2xlogintimeout;
  1776. if (nv->login_timeout < 4)
  1777. nv->login_timeout = 4;
  1778. ha->login_timeout = nv->login_timeout;
  1779. icb->login_timeout = nv->login_timeout;
  1780. /* Set minimum RATOV to 100 tenths of a second. */
  1781. ha->r_a_tov = 100;
  1782. ha->loop_reset_delay = nv->reset_delay;
  1783. /* Link Down Timeout = 0:
  1784. *
  1785. * When Port Down timer expires we will start returning
  1786. * I/O's to OS with "DID_NO_CONNECT".
  1787. *
  1788. * Link Down Timeout != 0:
  1789. *
  1790. * The driver waits for the link to come up after link down
  1791. * before returning I/Os to OS with "DID_NO_CONNECT".
  1792. */
  1793. if (nv->link_down_timeout == 0) {
  1794. ha->loop_down_abort_time =
  1795. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1796. } else {
  1797. ha->link_down_timeout = nv->link_down_timeout;
  1798. ha->loop_down_abort_time =
  1799. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1800. }
  1801. /*
  1802. * Need enough time to try and get the port back.
  1803. */
  1804. ha->port_down_retry_count = nv->port_down_retry_count;
  1805. if (qlport_down_retry)
  1806. ha->port_down_retry_count = qlport_down_retry;
  1807. /* Set login_retry_count */
  1808. ha->login_retry_count = nv->retry_count;
  1809. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1810. ha->port_down_retry_count > 3)
  1811. ha->login_retry_count = ha->port_down_retry_count;
  1812. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1813. ha->login_retry_count = ha->port_down_retry_count;
  1814. if (ql2xloginretrycount)
  1815. ha->login_retry_count = ql2xloginretrycount;
  1816. icb->lun_enables = __constant_cpu_to_le16(0);
  1817. icb->command_resource_count = 0;
  1818. icb->immediate_notify_resource_count = 0;
  1819. icb->timeout = __constant_cpu_to_le16(0);
  1820. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1821. /* Enable RIO */
  1822. icb->firmware_options[0] &= ~BIT_3;
  1823. icb->add_firmware_options[0] &=
  1824. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1825. icb->add_firmware_options[0] |= BIT_2;
  1826. icb->response_accumulation_timer = 3;
  1827. icb->interrupt_delay_timer = 5;
  1828. vha->flags.process_response_queue = 1;
  1829. } else {
  1830. /* Enable ZIO. */
  1831. if (!vha->flags.init_done) {
  1832. ha->zio_mode = icb->add_firmware_options[0] &
  1833. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1834. ha->zio_timer = icb->interrupt_delay_timer ?
  1835. icb->interrupt_delay_timer: 2;
  1836. }
  1837. icb->add_firmware_options[0] &=
  1838. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1839. vha->flags.process_response_queue = 0;
  1840. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1841. ha->zio_mode = QLA_ZIO_MODE_6;
  1842. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1843. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1844. ha->zio_timer * 100));
  1845. qla_printk(KERN_INFO, ha,
  1846. "ZIO mode %d enabled; timer delay (%d us).\n",
  1847. ha->zio_mode, ha->zio_timer * 100);
  1848. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1849. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1850. vha->flags.process_response_queue = 1;
  1851. }
  1852. }
  1853. if (rval) {
  1854. DEBUG2_3(printk(KERN_WARNING
  1855. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1856. }
  1857. return (rval);
  1858. }
  1859. static void
  1860. qla2x00_rport_del(void *data)
  1861. {
  1862. fc_port_t *fcport = data;
  1863. struct fc_rport *rport;
  1864. spin_lock_irq(fcport->vha->host->host_lock);
  1865. rport = fcport->drport ? fcport->drport: fcport->rport;
  1866. fcport->drport = NULL;
  1867. spin_unlock_irq(fcport->vha->host->host_lock);
  1868. if (rport)
  1869. fc_remote_port_delete(rport);
  1870. }
  1871. /**
  1872. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1873. * @ha: HA context
  1874. * @flags: allocation flags
  1875. *
  1876. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1877. */
  1878. static fc_port_t *
  1879. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1880. {
  1881. fc_port_t *fcport;
  1882. fcport = kzalloc(sizeof(fc_port_t), flags);
  1883. if (!fcport)
  1884. return NULL;
  1885. /* Setup fcport template structure. */
  1886. fcport->vha = vha;
  1887. fcport->vp_idx = vha->vp_idx;
  1888. fcport->port_type = FCT_UNKNOWN;
  1889. fcport->loop_id = FC_NO_LOOP_ID;
  1890. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1891. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1892. return fcport;
  1893. }
  1894. /*
  1895. * qla2x00_configure_loop
  1896. * Updates Fibre Channel Device Database with what is actually on loop.
  1897. *
  1898. * Input:
  1899. * ha = adapter block pointer.
  1900. *
  1901. * Returns:
  1902. * 0 = success.
  1903. * 1 = error.
  1904. * 2 = database was full and device was not configured.
  1905. */
  1906. static int
  1907. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1908. {
  1909. int rval;
  1910. unsigned long flags, save_flags;
  1911. struct qla_hw_data *ha = vha->hw;
  1912. rval = QLA_SUCCESS;
  1913. /* Get Initiator ID */
  1914. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1915. rval = qla2x00_configure_hba(vha);
  1916. if (rval != QLA_SUCCESS) {
  1917. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1918. vha->host_no));
  1919. return (rval);
  1920. }
  1921. }
  1922. save_flags = flags = vha->dpc_flags;
  1923. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1924. vha->host_no, flags));
  1925. /*
  1926. * If we have both an RSCN and PORT UPDATE pending then handle them
  1927. * both at the same time.
  1928. */
  1929. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1930. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1931. /* Determine what we need to do */
  1932. if (ha->current_topology == ISP_CFG_FL &&
  1933. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1934. vha->flags.rscn_queue_overflow = 1;
  1935. set_bit(RSCN_UPDATE, &flags);
  1936. } else if (ha->current_topology == ISP_CFG_F &&
  1937. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1938. vha->flags.rscn_queue_overflow = 1;
  1939. set_bit(RSCN_UPDATE, &flags);
  1940. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1941. } else if (ha->current_topology == ISP_CFG_N) {
  1942. clear_bit(RSCN_UPDATE, &flags);
  1943. } else if (!vha->flags.online ||
  1944. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1945. vha->flags.rscn_queue_overflow = 1;
  1946. set_bit(RSCN_UPDATE, &flags);
  1947. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1948. }
  1949. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1950. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1951. rval = QLA_FUNCTION_FAILED;
  1952. else
  1953. rval = qla2x00_configure_local_loop(vha);
  1954. }
  1955. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1956. if (LOOP_TRANSITION(vha))
  1957. rval = QLA_FUNCTION_FAILED;
  1958. else
  1959. rval = qla2x00_configure_fabric(vha);
  1960. }
  1961. if (rval == QLA_SUCCESS) {
  1962. if (atomic_read(&vha->loop_down_timer) ||
  1963. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1964. rval = QLA_FUNCTION_FAILED;
  1965. } else {
  1966. atomic_set(&vha->loop_state, LOOP_READY);
  1967. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1968. }
  1969. }
  1970. if (rval) {
  1971. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1972. __func__, vha->host_no));
  1973. } else {
  1974. DEBUG3(printk("%s: exiting normally\n", __func__));
  1975. }
  1976. /* Restore state if a resync event occurred during processing */
  1977. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1978. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1979. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1980. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1981. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1982. vha->flags.rscn_queue_overflow = 1;
  1983. }
  1984. }
  1985. return (rval);
  1986. }
  1987. /*
  1988. * qla2x00_configure_local_loop
  1989. * Updates Fibre Channel Device Database with local loop devices.
  1990. *
  1991. * Input:
  1992. * ha = adapter block pointer.
  1993. *
  1994. * Returns:
  1995. * 0 = success.
  1996. */
  1997. static int
  1998. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1999. {
  2000. int rval, rval2;
  2001. int found_devs;
  2002. int found;
  2003. fc_port_t *fcport, *new_fcport;
  2004. uint16_t index;
  2005. uint16_t entries;
  2006. char *id_iter;
  2007. uint16_t loop_id;
  2008. uint8_t domain, area, al_pa;
  2009. struct qla_hw_data *ha = vha->hw;
  2010. found_devs = 0;
  2011. new_fcport = NULL;
  2012. entries = MAX_FIBRE_DEVICES;
  2013. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2014. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2015. /* Get list of logged in devices. */
  2016. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2017. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2018. &entries);
  2019. if (rval != QLA_SUCCESS)
  2020. goto cleanup_allocation;
  2021. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2022. vha->host_no, entries));
  2023. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2024. entries * sizeof(struct gid_list_info)));
  2025. /* Allocate temporary fcport for any new fcports discovered. */
  2026. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2027. if (new_fcport == NULL) {
  2028. rval = QLA_MEMORY_ALLOC_FAILED;
  2029. goto cleanup_allocation;
  2030. }
  2031. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2032. /*
  2033. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2034. */
  2035. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2036. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2037. fcport->port_type != FCT_BROADCAST &&
  2038. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2039. DEBUG(printk("scsi(%ld): Marking port lost, "
  2040. "loop_id=0x%04x\n",
  2041. vha->host_no, fcport->loop_id));
  2042. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2043. }
  2044. }
  2045. /* Add devices to port list. */
  2046. id_iter = (char *)ha->gid_list;
  2047. for (index = 0; index < entries; index++) {
  2048. domain = ((struct gid_list_info *)id_iter)->domain;
  2049. area = ((struct gid_list_info *)id_iter)->area;
  2050. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2051. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2052. loop_id = (uint16_t)
  2053. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2054. else
  2055. loop_id = le16_to_cpu(
  2056. ((struct gid_list_info *)id_iter)->loop_id);
  2057. id_iter += ha->gid_list_info_size;
  2058. /* Bypass reserved domain fields. */
  2059. if ((domain & 0xf0) == 0xf0)
  2060. continue;
  2061. /* Bypass if not same domain and area of adapter. */
  2062. if (area && domain &&
  2063. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2064. continue;
  2065. /* Bypass invalid local loop ID. */
  2066. if (loop_id > LAST_LOCAL_LOOP_ID)
  2067. continue;
  2068. /* Fill in member data. */
  2069. new_fcport->d_id.b.domain = domain;
  2070. new_fcport->d_id.b.area = area;
  2071. new_fcport->d_id.b.al_pa = al_pa;
  2072. new_fcport->loop_id = loop_id;
  2073. new_fcport->vp_idx = vha->vp_idx;
  2074. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2075. if (rval2 != QLA_SUCCESS) {
  2076. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2077. "information -- get_port_database=%x, "
  2078. "loop_id=0x%04x\n",
  2079. vha->host_no, rval2, new_fcport->loop_id));
  2080. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2081. vha->host_no));
  2082. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2083. continue;
  2084. }
  2085. /* Check for matching device in port list. */
  2086. found = 0;
  2087. fcport = NULL;
  2088. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2089. if (memcmp(new_fcport->port_name, fcport->port_name,
  2090. WWN_SIZE))
  2091. continue;
  2092. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2093. fcport->loop_id = new_fcport->loop_id;
  2094. fcport->port_type = new_fcport->port_type;
  2095. fcport->d_id.b24 = new_fcport->d_id.b24;
  2096. memcpy(fcport->node_name, new_fcport->node_name,
  2097. WWN_SIZE);
  2098. found++;
  2099. break;
  2100. }
  2101. if (!found) {
  2102. /* New device, add to fcports list. */
  2103. if (vha->vp_idx) {
  2104. new_fcport->vha = vha;
  2105. new_fcport->vp_idx = vha->vp_idx;
  2106. }
  2107. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2108. /* Allocate a new replacement fcport. */
  2109. fcport = new_fcport;
  2110. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2111. if (new_fcport == NULL) {
  2112. rval = QLA_MEMORY_ALLOC_FAILED;
  2113. goto cleanup_allocation;
  2114. }
  2115. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2116. }
  2117. /* Base iIDMA settings on HBA port speed. */
  2118. fcport->fp_speed = ha->link_data_rate;
  2119. qla2x00_update_fcport(vha, fcport);
  2120. found_devs++;
  2121. }
  2122. cleanup_allocation:
  2123. kfree(new_fcport);
  2124. if (rval != QLA_SUCCESS) {
  2125. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2126. "rval=%x\n", vha->host_no, rval));
  2127. }
  2128. return (rval);
  2129. }
  2130. static void
  2131. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2132. {
  2133. #define LS_UNKNOWN 2
  2134. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2135. char *link_speed;
  2136. int rval;
  2137. uint16_t mb[4];
  2138. struct qla_hw_data *ha = vha->hw;
  2139. if (!IS_IIDMA_CAPABLE(ha))
  2140. return;
  2141. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2142. fcport->fp_speed > ha->link_data_rate)
  2143. return;
  2144. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2145. mb);
  2146. if (rval != QLA_SUCCESS) {
  2147. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2148. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2149. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2150. fcport->port_name[2], fcport->port_name[3],
  2151. fcport->port_name[4], fcport->port_name[5],
  2152. fcport->port_name[6], fcport->port_name[7], rval,
  2153. fcport->fp_speed, mb[0], mb[1]));
  2154. } else {
  2155. link_speed = link_speeds[LS_UNKNOWN];
  2156. if (fcport->fp_speed < 5)
  2157. link_speed = link_speeds[fcport->fp_speed];
  2158. else if (fcport->fp_speed == 0x13)
  2159. link_speed = link_speeds[5];
  2160. DEBUG2(qla_printk(KERN_INFO, ha,
  2161. "iIDMA adjusted to %s GB/s on "
  2162. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2163. link_speed, fcport->port_name[0],
  2164. fcport->port_name[1], fcport->port_name[2],
  2165. fcport->port_name[3], fcport->port_name[4],
  2166. fcport->port_name[5], fcport->port_name[6],
  2167. fcport->port_name[7]));
  2168. }
  2169. }
  2170. static void
  2171. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2172. {
  2173. struct fc_rport_identifiers rport_ids;
  2174. struct fc_rport *rport;
  2175. struct qla_hw_data *ha = vha->hw;
  2176. qla2x00_rport_del(fcport);
  2177. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2178. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2179. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2180. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2181. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2182. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2183. if (!rport) {
  2184. qla_printk(KERN_WARNING, ha,
  2185. "Unable to allocate fc remote port!\n");
  2186. return;
  2187. }
  2188. spin_lock_irq(fcport->vha->host->host_lock);
  2189. *((fc_port_t **)rport->dd_data) = fcport;
  2190. spin_unlock_irq(fcport->vha->host->host_lock);
  2191. rport->supported_classes = fcport->supported_classes;
  2192. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2193. if (fcport->port_type == FCT_INITIATOR)
  2194. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2195. if (fcport->port_type == FCT_TARGET)
  2196. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2197. fc_remote_port_rolechg(rport, rport_ids.roles);
  2198. }
  2199. /*
  2200. * qla2x00_update_fcport
  2201. * Updates device on list.
  2202. *
  2203. * Input:
  2204. * ha = adapter block pointer.
  2205. * fcport = port structure pointer.
  2206. *
  2207. * Return:
  2208. * 0 - Success
  2209. * BIT_0 - error
  2210. *
  2211. * Context:
  2212. * Kernel context.
  2213. */
  2214. void
  2215. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2216. {
  2217. struct qla_hw_data *ha = vha->hw;
  2218. fcport->vha = vha;
  2219. fcport->login_retry = 0;
  2220. fcport->port_login_retry_count = ha->port_down_retry_count *
  2221. PORT_RETRY_TIME;
  2222. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2223. PORT_RETRY_TIME);
  2224. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2225. qla2x00_iidma_fcport(vha, fcport);
  2226. atomic_set(&fcport->state, FCS_ONLINE);
  2227. qla2x00_reg_remote_port(vha, fcport);
  2228. }
  2229. /*
  2230. * qla2x00_configure_fabric
  2231. * Setup SNS devices with loop ID's.
  2232. *
  2233. * Input:
  2234. * ha = adapter block pointer.
  2235. *
  2236. * Returns:
  2237. * 0 = success.
  2238. * BIT_0 = error
  2239. */
  2240. static int
  2241. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2242. {
  2243. int rval, rval2;
  2244. fc_port_t *fcport, *fcptemp;
  2245. uint16_t next_loopid;
  2246. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2247. uint16_t loop_id;
  2248. LIST_HEAD(new_fcports);
  2249. struct qla_hw_data *ha = vha->hw;
  2250. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2251. /* If FL port exists, then SNS is present */
  2252. if (IS_FWI2_CAPABLE(ha))
  2253. loop_id = NPH_F_PORT;
  2254. else
  2255. loop_id = SNS_FL_PORT;
  2256. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2257. if (rval != QLA_SUCCESS) {
  2258. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2259. "Port\n", vha->host_no));
  2260. vha->device_flags &= ~SWITCH_FOUND;
  2261. return (QLA_SUCCESS);
  2262. }
  2263. vha->device_flags |= SWITCH_FOUND;
  2264. /* Mark devices that need re-synchronization. */
  2265. rval2 = qla2x00_device_resync(vha);
  2266. if (rval2 == QLA_RSCNS_HANDLED) {
  2267. /* No point doing the scan, just continue. */
  2268. return (QLA_SUCCESS);
  2269. }
  2270. do {
  2271. /* FDMI support. */
  2272. if (ql2xfdmienable &&
  2273. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2274. qla2x00_fdmi_register(vha);
  2275. /* Ensure we are logged into the SNS. */
  2276. if (IS_FWI2_CAPABLE(ha))
  2277. loop_id = NPH_SNS;
  2278. else
  2279. loop_id = SIMPLE_NAME_SERVER;
  2280. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2281. 0xfc, mb, BIT_1 | BIT_0);
  2282. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2283. DEBUG2(qla_printk(KERN_INFO, ha,
  2284. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2285. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2286. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2287. return (QLA_SUCCESS);
  2288. }
  2289. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2290. if (qla2x00_rft_id(vha)) {
  2291. /* EMPTY */
  2292. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2293. "TYPE failed.\n", vha->host_no));
  2294. }
  2295. if (qla2x00_rff_id(vha)) {
  2296. /* EMPTY */
  2297. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2298. "Features failed.\n", vha->host_no));
  2299. }
  2300. if (qla2x00_rnn_id(vha)) {
  2301. /* EMPTY */
  2302. DEBUG2(printk("scsi(%ld): Register Node Name "
  2303. "failed.\n", vha->host_no));
  2304. } else if (qla2x00_rsnn_nn(vha)) {
  2305. /* EMPTY */
  2306. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2307. "Node Name failed.\n", vha->host_no));
  2308. }
  2309. }
  2310. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2311. if (rval != QLA_SUCCESS)
  2312. break;
  2313. /*
  2314. * Logout all previous fabric devices marked lost, except
  2315. * tape devices.
  2316. */
  2317. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2318. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2319. break;
  2320. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2321. continue;
  2322. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2323. qla2x00_mark_device_lost(vha, fcport,
  2324. ql2xplogiabsentdevice, 0);
  2325. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2326. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2327. fcport->port_type != FCT_INITIATOR &&
  2328. fcport->port_type != FCT_BROADCAST) {
  2329. ha->isp_ops->fabric_logout(vha,
  2330. fcport->loop_id,
  2331. fcport->d_id.b.domain,
  2332. fcport->d_id.b.area,
  2333. fcport->d_id.b.al_pa);
  2334. fcport->loop_id = FC_NO_LOOP_ID;
  2335. }
  2336. }
  2337. }
  2338. /* Starting free loop ID. */
  2339. next_loopid = ha->min_external_loopid;
  2340. /*
  2341. * Scan through our port list and login entries that need to be
  2342. * logged in.
  2343. */
  2344. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2345. if (atomic_read(&vha->loop_down_timer) ||
  2346. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2347. break;
  2348. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2349. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2350. continue;
  2351. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2352. fcport->loop_id = next_loopid;
  2353. rval = qla2x00_find_new_loop_id(
  2354. base_vha, fcport);
  2355. if (rval != QLA_SUCCESS) {
  2356. /* Ran out of IDs to use */
  2357. break;
  2358. }
  2359. }
  2360. /* Login and update database */
  2361. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2362. }
  2363. /* Exit if out of loop IDs. */
  2364. if (rval != QLA_SUCCESS) {
  2365. break;
  2366. }
  2367. /*
  2368. * Login and add the new devices to our port list.
  2369. */
  2370. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2371. if (atomic_read(&vha->loop_down_timer) ||
  2372. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2373. break;
  2374. /* Find a new loop ID to use. */
  2375. fcport->loop_id = next_loopid;
  2376. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2377. if (rval != QLA_SUCCESS) {
  2378. /* Ran out of IDs to use */
  2379. break;
  2380. }
  2381. /* Login and update database */
  2382. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2383. if (vha->vp_idx) {
  2384. fcport->vha = vha;
  2385. fcport->vp_idx = vha->vp_idx;
  2386. }
  2387. list_move_tail(&fcport->list, &vha->vp_fcports);
  2388. }
  2389. } while (0);
  2390. /* Free all new device structures not processed. */
  2391. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2392. list_del(&fcport->list);
  2393. kfree(fcport);
  2394. }
  2395. if (rval) {
  2396. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2397. "rval=%d\n", vha->host_no, rval));
  2398. }
  2399. return (rval);
  2400. }
  2401. /*
  2402. * qla2x00_find_all_fabric_devs
  2403. *
  2404. * Input:
  2405. * ha = adapter block pointer.
  2406. * dev = database device entry pointer.
  2407. *
  2408. * Returns:
  2409. * 0 = success.
  2410. *
  2411. * Context:
  2412. * Kernel context.
  2413. */
  2414. static int
  2415. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2416. struct list_head *new_fcports)
  2417. {
  2418. int rval;
  2419. uint16_t loop_id;
  2420. fc_port_t *fcport, *new_fcport, *fcptemp;
  2421. int found;
  2422. sw_info_t *swl;
  2423. int swl_idx;
  2424. int first_dev, last_dev;
  2425. port_id_t wrap, nxt_d_id;
  2426. struct qla_hw_data *ha = vha->hw;
  2427. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2428. struct scsi_qla_host *tvp;
  2429. rval = QLA_SUCCESS;
  2430. /* Try GID_PT to get device list, else GAN. */
  2431. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2432. if (!swl) {
  2433. /*EMPTY*/
  2434. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2435. "on GA_NXT\n", vha->host_no));
  2436. } else {
  2437. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2438. kfree(swl);
  2439. swl = NULL;
  2440. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2441. kfree(swl);
  2442. swl = NULL;
  2443. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2444. kfree(swl);
  2445. swl = NULL;
  2446. } else if (ql2xiidmaenable &&
  2447. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2448. qla2x00_gpsc(vha, swl);
  2449. }
  2450. }
  2451. swl_idx = 0;
  2452. /* Allocate temporary fcport for any new fcports discovered. */
  2453. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2454. if (new_fcport == NULL) {
  2455. kfree(swl);
  2456. return (QLA_MEMORY_ALLOC_FAILED);
  2457. }
  2458. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2459. /* Set start port ID scan at adapter ID. */
  2460. first_dev = 1;
  2461. last_dev = 0;
  2462. /* Starting free loop ID. */
  2463. loop_id = ha->min_external_loopid;
  2464. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2465. if (qla2x00_is_reserved_id(vha, loop_id))
  2466. continue;
  2467. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2468. break;
  2469. if (swl != NULL) {
  2470. if (last_dev) {
  2471. wrap.b24 = new_fcport->d_id.b24;
  2472. } else {
  2473. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2474. memcpy(new_fcport->node_name,
  2475. swl[swl_idx].node_name, WWN_SIZE);
  2476. memcpy(new_fcport->port_name,
  2477. swl[swl_idx].port_name, WWN_SIZE);
  2478. memcpy(new_fcport->fabric_port_name,
  2479. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2480. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2481. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2482. last_dev = 1;
  2483. }
  2484. swl_idx++;
  2485. }
  2486. } else {
  2487. /* Send GA_NXT to the switch */
  2488. rval = qla2x00_ga_nxt(vha, new_fcport);
  2489. if (rval != QLA_SUCCESS) {
  2490. qla_printk(KERN_WARNING, ha,
  2491. "SNS scan failed -- assuming zero-entry "
  2492. "result...\n");
  2493. list_for_each_entry_safe(fcport, fcptemp,
  2494. new_fcports, list) {
  2495. list_del(&fcport->list);
  2496. kfree(fcport);
  2497. }
  2498. rval = QLA_SUCCESS;
  2499. break;
  2500. }
  2501. }
  2502. /* If wrap on switch device list, exit. */
  2503. if (first_dev) {
  2504. wrap.b24 = new_fcport->d_id.b24;
  2505. first_dev = 0;
  2506. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2507. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2508. vha->host_no, new_fcport->d_id.b.domain,
  2509. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2510. break;
  2511. }
  2512. /* Bypass if same physical adapter. */
  2513. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2514. continue;
  2515. /* Bypass virtual ports of the same host. */
  2516. found = 0;
  2517. if (ha->num_vhosts) {
  2518. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2519. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2520. found = 1;
  2521. break;
  2522. }
  2523. }
  2524. if (found)
  2525. continue;
  2526. }
  2527. /* Bypass if same domain and area of adapter. */
  2528. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2529. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2530. ISP_CFG_FL)
  2531. continue;
  2532. /* Bypass reserved domain fields. */
  2533. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2534. continue;
  2535. /* Locate matching device in database. */
  2536. found = 0;
  2537. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2538. if (memcmp(new_fcport->port_name, fcport->port_name,
  2539. WWN_SIZE))
  2540. continue;
  2541. found++;
  2542. /* Update port state. */
  2543. memcpy(fcport->fabric_port_name,
  2544. new_fcport->fabric_port_name, WWN_SIZE);
  2545. fcport->fp_speed = new_fcport->fp_speed;
  2546. /*
  2547. * If address the same and state FCS_ONLINE, nothing
  2548. * changed.
  2549. */
  2550. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2551. atomic_read(&fcport->state) == FCS_ONLINE) {
  2552. break;
  2553. }
  2554. /*
  2555. * If device was not a fabric device before.
  2556. */
  2557. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2558. fcport->d_id.b24 = new_fcport->d_id.b24;
  2559. fcport->loop_id = FC_NO_LOOP_ID;
  2560. fcport->flags |= (FCF_FABRIC_DEVICE |
  2561. FCF_LOGIN_NEEDED);
  2562. break;
  2563. }
  2564. /*
  2565. * Port ID changed or device was marked to be updated;
  2566. * Log it out if still logged in and mark it for
  2567. * relogin later.
  2568. */
  2569. fcport->d_id.b24 = new_fcport->d_id.b24;
  2570. fcport->flags |= FCF_LOGIN_NEEDED;
  2571. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2572. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2573. fcport->port_type != FCT_INITIATOR &&
  2574. fcport->port_type != FCT_BROADCAST) {
  2575. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2576. fcport->d_id.b.domain, fcport->d_id.b.area,
  2577. fcport->d_id.b.al_pa);
  2578. fcport->loop_id = FC_NO_LOOP_ID;
  2579. }
  2580. break;
  2581. }
  2582. if (found)
  2583. continue;
  2584. /* If device was not in our fcports list, then add it. */
  2585. list_add_tail(&new_fcport->list, new_fcports);
  2586. /* Allocate a new replacement fcport. */
  2587. nxt_d_id.b24 = new_fcport->d_id.b24;
  2588. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2589. if (new_fcport == NULL) {
  2590. kfree(swl);
  2591. return (QLA_MEMORY_ALLOC_FAILED);
  2592. }
  2593. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2594. new_fcport->d_id.b24 = nxt_d_id.b24;
  2595. }
  2596. kfree(swl);
  2597. kfree(new_fcport);
  2598. return (rval);
  2599. }
  2600. /*
  2601. * qla2x00_find_new_loop_id
  2602. * Scan through our port list and find a new usable loop ID.
  2603. *
  2604. * Input:
  2605. * ha: adapter state pointer.
  2606. * dev: port structure pointer.
  2607. *
  2608. * Returns:
  2609. * qla2x00 local function return status code.
  2610. *
  2611. * Context:
  2612. * Kernel context.
  2613. */
  2614. static int
  2615. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2616. {
  2617. int rval;
  2618. int found;
  2619. fc_port_t *fcport;
  2620. uint16_t first_loop_id;
  2621. struct qla_hw_data *ha = vha->hw;
  2622. struct scsi_qla_host *vp;
  2623. struct scsi_qla_host *tvp;
  2624. rval = QLA_SUCCESS;
  2625. /* Save starting loop ID. */
  2626. first_loop_id = dev->loop_id;
  2627. for (;;) {
  2628. /* Skip loop ID if already used by adapter. */
  2629. if (dev->loop_id == vha->loop_id)
  2630. dev->loop_id++;
  2631. /* Skip reserved loop IDs. */
  2632. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2633. dev->loop_id++;
  2634. /* Reset loop ID if passed the end. */
  2635. if (dev->loop_id > ha->max_loop_id) {
  2636. /* first loop ID. */
  2637. dev->loop_id = ha->min_external_loopid;
  2638. }
  2639. /* Check for loop ID being already in use. */
  2640. found = 0;
  2641. fcport = NULL;
  2642. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2643. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2644. if (fcport->loop_id == dev->loop_id &&
  2645. fcport != dev) {
  2646. /* ID possibly in use */
  2647. found++;
  2648. break;
  2649. }
  2650. }
  2651. if (found)
  2652. break;
  2653. }
  2654. /* If not in use then it is free to use. */
  2655. if (!found) {
  2656. break;
  2657. }
  2658. /* ID in use. Try next value. */
  2659. dev->loop_id++;
  2660. /* If wrap around. No free ID to use. */
  2661. if (dev->loop_id == first_loop_id) {
  2662. dev->loop_id = FC_NO_LOOP_ID;
  2663. rval = QLA_FUNCTION_FAILED;
  2664. break;
  2665. }
  2666. }
  2667. return (rval);
  2668. }
  2669. /*
  2670. * qla2x00_device_resync
  2671. * Marks devices in the database that needs resynchronization.
  2672. *
  2673. * Input:
  2674. * ha = adapter block pointer.
  2675. *
  2676. * Context:
  2677. * Kernel context.
  2678. */
  2679. static int
  2680. qla2x00_device_resync(scsi_qla_host_t *vha)
  2681. {
  2682. int rval;
  2683. uint32_t mask;
  2684. fc_port_t *fcport;
  2685. uint32_t rscn_entry;
  2686. uint8_t rscn_out_iter;
  2687. uint8_t format;
  2688. port_id_t d_id;
  2689. rval = QLA_RSCNS_HANDLED;
  2690. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2691. vha->flags.rscn_queue_overflow) {
  2692. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2693. format = MSB(MSW(rscn_entry));
  2694. d_id.b.domain = LSB(MSW(rscn_entry));
  2695. d_id.b.area = MSB(LSW(rscn_entry));
  2696. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2697. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2698. "[%02x/%02x%02x%02x].\n",
  2699. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2700. d_id.b.area, d_id.b.al_pa));
  2701. vha->rscn_out_ptr++;
  2702. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2703. vha->rscn_out_ptr = 0;
  2704. /* Skip duplicate entries. */
  2705. for (rscn_out_iter = vha->rscn_out_ptr;
  2706. !vha->flags.rscn_queue_overflow &&
  2707. rscn_out_iter != vha->rscn_in_ptr;
  2708. rscn_out_iter = (rscn_out_iter ==
  2709. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2710. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2711. break;
  2712. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2713. "entry found at [%d].\n", vha->host_no,
  2714. rscn_out_iter));
  2715. vha->rscn_out_ptr = rscn_out_iter;
  2716. }
  2717. /* Queue overflow, set switch default case. */
  2718. if (vha->flags.rscn_queue_overflow) {
  2719. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2720. "overflow.\n", vha->host_no));
  2721. format = 3;
  2722. vha->flags.rscn_queue_overflow = 0;
  2723. }
  2724. switch (format) {
  2725. case 0:
  2726. mask = 0xffffff;
  2727. break;
  2728. case 1:
  2729. mask = 0xffff00;
  2730. break;
  2731. case 2:
  2732. mask = 0xff0000;
  2733. break;
  2734. default:
  2735. mask = 0x0;
  2736. d_id.b24 = 0;
  2737. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2738. break;
  2739. }
  2740. rval = QLA_SUCCESS;
  2741. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2742. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2743. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2744. fcport->port_type == FCT_BROADCAST)
  2745. continue;
  2746. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2747. if (format != 3 ||
  2748. fcport->port_type != FCT_INITIATOR) {
  2749. qla2x00_mark_device_lost(vha, fcport,
  2750. 0, 0);
  2751. }
  2752. }
  2753. }
  2754. }
  2755. return (rval);
  2756. }
  2757. /*
  2758. * qla2x00_fabric_dev_login
  2759. * Login fabric target device and update FC port database.
  2760. *
  2761. * Input:
  2762. * ha: adapter state pointer.
  2763. * fcport: port structure list pointer.
  2764. * next_loopid: contains value of a new loop ID that can be used
  2765. * by the next login attempt.
  2766. *
  2767. * Returns:
  2768. * qla2x00 local function return status code.
  2769. *
  2770. * Context:
  2771. * Kernel context.
  2772. */
  2773. static int
  2774. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2775. uint16_t *next_loopid)
  2776. {
  2777. int rval;
  2778. int retry;
  2779. uint8_t opts;
  2780. struct qla_hw_data *ha = vha->hw;
  2781. rval = QLA_SUCCESS;
  2782. retry = 0;
  2783. if (IS_ALOGIO_CAPABLE(ha)) {
  2784. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2785. if (!rval)
  2786. return rval;
  2787. }
  2788. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2789. if (rval == QLA_SUCCESS) {
  2790. /* Send an ADISC to tape devices.*/
  2791. opts = 0;
  2792. if (fcport->flags & FCF_TAPE_PRESENT)
  2793. opts |= BIT_1;
  2794. rval = qla2x00_get_port_database(vha, fcport, opts);
  2795. if (rval != QLA_SUCCESS) {
  2796. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2797. fcport->d_id.b.domain, fcport->d_id.b.area,
  2798. fcport->d_id.b.al_pa);
  2799. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2800. } else {
  2801. qla2x00_update_fcport(vha, fcport);
  2802. }
  2803. }
  2804. return (rval);
  2805. }
  2806. /*
  2807. * qla2x00_fabric_login
  2808. * Issue fabric login command.
  2809. *
  2810. * Input:
  2811. * ha = adapter block pointer.
  2812. * device = pointer to FC device type structure.
  2813. *
  2814. * Returns:
  2815. * 0 - Login successfully
  2816. * 1 - Login failed
  2817. * 2 - Initiator device
  2818. * 3 - Fatal error
  2819. */
  2820. int
  2821. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2822. uint16_t *next_loopid)
  2823. {
  2824. int rval;
  2825. int retry;
  2826. uint16_t tmp_loopid;
  2827. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2828. struct qla_hw_data *ha = vha->hw;
  2829. retry = 0;
  2830. tmp_loopid = 0;
  2831. for (;;) {
  2832. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2833. "for port %02x%02x%02x.\n",
  2834. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2835. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2836. /* Login fcport on switch. */
  2837. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2838. fcport->d_id.b.domain, fcport->d_id.b.area,
  2839. fcport->d_id.b.al_pa, mb, BIT_0);
  2840. if (mb[0] == MBS_PORT_ID_USED) {
  2841. /*
  2842. * Device has another loop ID. The firmware team
  2843. * recommends the driver perform an implicit login with
  2844. * the specified ID again. The ID we just used is save
  2845. * here so we return with an ID that can be tried by
  2846. * the next login.
  2847. */
  2848. retry++;
  2849. tmp_loopid = fcport->loop_id;
  2850. fcport->loop_id = mb[1];
  2851. DEBUG(printk("Fabric Login: port in use - next "
  2852. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2853. fcport->loop_id, fcport->d_id.b.domain,
  2854. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2855. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2856. /*
  2857. * Login succeeded.
  2858. */
  2859. if (retry) {
  2860. /* A retry occurred before. */
  2861. *next_loopid = tmp_loopid;
  2862. } else {
  2863. /*
  2864. * No retry occurred before. Just increment the
  2865. * ID value for next login.
  2866. */
  2867. *next_loopid = (fcport->loop_id + 1);
  2868. }
  2869. if (mb[1] & BIT_0) {
  2870. fcport->port_type = FCT_INITIATOR;
  2871. } else {
  2872. fcport->port_type = FCT_TARGET;
  2873. if (mb[1] & BIT_1) {
  2874. fcport->flags |= FCF_FCP2_DEVICE;
  2875. }
  2876. }
  2877. if (mb[10] & BIT_0)
  2878. fcport->supported_classes |= FC_COS_CLASS2;
  2879. if (mb[10] & BIT_1)
  2880. fcport->supported_classes |= FC_COS_CLASS3;
  2881. rval = QLA_SUCCESS;
  2882. break;
  2883. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2884. /*
  2885. * Loop ID already used, try next loop ID.
  2886. */
  2887. fcport->loop_id++;
  2888. rval = qla2x00_find_new_loop_id(vha, fcport);
  2889. if (rval != QLA_SUCCESS) {
  2890. /* Ran out of loop IDs to use */
  2891. break;
  2892. }
  2893. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2894. /*
  2895. * Firmware possibly timed out during login. If NO
  2896. * retries are left to do then the device is declared
  2897. * dead.
  2898. */
  2899. *next_loopid = fcport->loop_id;
  2900. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2901. fcport->d_id.b.domain, fcport->d_id.b.area,
  2902. fcport->d_id.b.al_pa);
  2903. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2904. rval = 1;
  2905. break;
  2906. } else {
  2907. /*
  2908. * unrecoverable / not handled error
  2909. */
  2910. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2911. "loop_id=%x jiffies=%lx.\n",
  2912. __func__, vha->host_no, mb[0],
  2913. fcport->d_id.b.domain, fcport->d_id.b.area,
  2914. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2915. *next_loopid = fcport->loop_id;
  2916. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2917. fcport->d_id.b.domain, fcport->d_id.b.area,
  2918. fcport->d_id.b.al_pa);
  2919. fcport->loop_id = FC_NO_LOOP_ID;
  2920. fcport->login_retry = 0;
  2921. rval = 3;
  2922. break;
  2923. }
  2924. }
  2925. return (rval);
  2926. }
  2927. /*
  2928. * qla2x00_local_device_login
  2929. * Issue local device login command.
  2930. *
  2931. * Input:
  2932. * ha = adapter block pointer.
  2933. * loop_id = loop id of device to login to.
  2934. *
  2935. * Returns (Where's the #define!!!!):
  2936. * 0 - Login successfully
  2937. * 1 - Login failed
  2938. * 3 - Fatal error
  2939. */
  2940. int
  2941. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2942. {
  2943. int rval;
  2944. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2945. memset(mb, 0, sizeof(mb));
  2946. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2947. if (rval == QLA_SUCCESS) {
  2948. /* Interrogate mailbox registers for any errors */
  2949. if (mb[0] == MBS_COMMAND_ERROR)
  2950. rval = 1;
  2951. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2952. /* device not in PCB table */
  2953. rval = 3;
  2954. }
  2955. return (rval);
  2956. }
  2957. /*
  2958. * qla2x00_loop_resync
  2959. * Resync with fibre channel devices.
  2960. *
  2961. * Input:
  2962. * ha = adapter block pointer.
  2963. *
  2964. * Returns:
  2965. * 0 = success
  2966. */
  2967. int
  2968. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2969. {
  2970. int rval = QLA_SUCCESS;
  2971. uint32_t wait_time;
  2972. struct req_que *req;
  2973. struct rsp_que *rsp;
  2974. if (vha->hw->flags.cpu_affinity_enabled)
  2975. req = vha->hw->req_q_map[0];
  2976. else
  2977. req = vha->req;
  2978. rsp = req->rsp;
  2979. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2980. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2981. if (vha->flags.online) {
  2982. if (!(rval = qla2x00_fw_ready(vha))) {
  2983. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2984. wait_time = 256;
  2985. do {
  2986. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2987. /* Issue a marker after FW becomes ready. */
  2988. qla2x00_marker(vha, req, rsp, 0, 0,
  2989. MK_SYNC_ALL);
  2990. vha->marker_needed = 0;
  2991. /* Remap devices on Loop. */
  2992. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2993. qla2x00_configure_loop(vha);
  2994. wait_time--;
  2995. } while (!atomic_read(&vha->loop_down_timer) &&
  2996. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2997. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2998. &vha->dpc_flags)));
  2999. }
  3000. }
  3001. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3002. return (QLA_FUNCTION_FAILED);
  3003. if (rval)
  3004. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3005. return (rval);
  3006. }
  3007. void
  3008. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3009. {
  3010. fc_port_t *fcport;
  3011. struct scsi_qla_host *tvp, *vha;
  3012. /* Go with deferred removal of rport references. */
  3013. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3014. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3015. if (fcport && fcport->drport &&
  3016. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3017. qla2x00_rport_del(fcport);
  3018. }
  3019. /*
  3020. * qla2x00_abort_isp
  3021. * Resets ISP and aborts all outstanding commands.
  3022. *
  3023. * Input:
  3024. * ha = adapter block pointer.
  3025. *
  3026. * Returns:
  3027. * 0 = success
  3028. */
  3029. int
  3030. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3031. {
  3032. int rval;
  3033. uint8_t status = 0;
  3034. struct qla_hw_data *ha = vha->hw;
  3035. struct scsi_qla_host *vp;
  3036. struct scsi_qla_host *tvp;
  3037. struct req_que *req = ha->req_q_map[0];
  3038. if (vha->flags.online) {
  3039. vha->flags.online = 0;
  3040. ha->flags.chip_reset_done = 0;
  3041. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3042. ha->qla_stats.total_isp_aborts++;
  3043. qla_printk(KERN_INFO, ha,
  3044. "Performing ISP error recovery - ha= %p.\n", ha);
  3045. ha->isp_ops->reset_chip(vha);
  3046. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3047. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3048. atomic_set(&vha->loop_state, LOOP_DOWN);
  3049. qla2x00_mark_all_devices_lost(vha, 0);
  3050. } else {
  3051. if (!atomic_read(&vha->loop_down_timer))
  3052. atomic_set(&vha->loop_down_timer,
  3053. LOOP_DOWN_TIME);
  3054. }
  3055. /* Requeue all commands in outstanding command list. */
  3056. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3057. ha->isp_ops->get_flash_version(vha, req->ring);
  3058. ha->isp_ops->nvram_config(vha);
  3059. if (!qla2x00_restart_isp(vha)) {
  3060. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3061. if (!atomic_read(&vha->loop_down_timer)) {
  3062. /*
  3063. * Issue marker command only when we are going
  3064. * to start the I/O .
  3065. */
  3066. vha->marker_needed = 1;
  3067. }
  3068. vha->flags.online = 1;
  3069. ha->isp_ops->enable_intrs(ha);
  3070. ha->isp_abort_cnt = 0;
  3071. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3072. if (ha->fce) {
  3073. ha->flags.fce_enabled = 1;
  3074. memset(ha->fce, 0,
  3075. fce_calc_size(ha->fce_bufs));
  3076. rval = qla2x00_enable_fce_trace(vha,
  3077. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3078. &ha->fce_bufs);
  3079. if (rval) {
  3080. qla_printk(KERN_WARNING, ha,
  3081. "Unable to reinitialize FCE "
  3082. "(%d).\n", rval);
  3083. ha->flags.fce_enabled = 0;
  3084. }
  3085. }
  3086. if (ha->eft) {
  3087. memset(ha->eft, 0, EFT_SIZE);
  3088. rval = qla2x00_enable_eft_trace(vha,
  3089. ha->eft_dma, EFT_NUM_BUFFERS);
  3090. if (rval) {
  3091. qla_printk(KERN_WARNING, ha,
  3092. "Unable to reinitialize EFT "
  3093. "(%d).\n", rval);
  3094. }
  3095. }
  3096. } else { /* failed the ISP abort */
  3097. vha->flags.online = 1;
  3098. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3099. if (ha->isp_abort_cnt == 0) {
  3100. qla_printk(KERN_WARNING, ha,
  3101. "ISP error recovery failed - "
  3102. "board disabled\n");
  3103. /*
  3104. * The next call disables the board
  3105. * completely.
  3106. */
  3107. ha->isp_ops->reset_adapter(vha);
  3108. vha->flags.online = 0;
  3109. clear_bit(ISP_ABORT_RETRY,
  3110. &vha->dpc_flags);
  3111. status = 0;
  3112. } else { /* schedule another ISP abort */
  3113. ha->isp_abort_cnt--;
  3114. DEBUG(printk("qla%ld: ISP abort - "
  3115. "retry remaining %d\n",
  3116. vha->host_no, ha->isp_abort_cnt));
  3117. status = 1;
  3118. }
  3119. } else {
  3120. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3121. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3122. "- retrying (%d) more times\n",
  3123. vha->host_no, ha->isp_abort_cnt));
  3124. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3125. status = 1;
  3126. }
  3127. }
  3128. }
  3129. if (!status) {
  3130. DEBUG(printk(KERN_INFO
  3131. "qla2x00_abort_isp(%ld): succeeded.\n",
  3132. vha->host_no));
  3133. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3134. if (vp->vp_idx)
  3135. qla2x00_vp_abort_isp(vp);
  3136. }
  3137. } else {
  3138. qla_printk(KERN_INFO, ha,
  3139. "qla2x00_abort_isp: **** FAILED ****\n");
  3140. }
  3141. return(status);
  3142. }
  3143. /*
  3144. * qla2x00_restart_isp
  3145. * restarts the ISP after a reset
  3146. *
  3147. * Input:
  3148. * ha = adapter block pointer.
  3149. *
  3150. * Returns:
  3151. * 0 = success
  3152. */
  3153. static int
  3154. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3155. {
  3156. int status = 0;
  3157. uint32_t wait_time;
  3158. struct qla_hw_data *ha = vha->hw;
  3159. struct req_que *req = ha->req_q_map[0];
  3160. struct rsp_que *rsp = ha->rsp_q_map[0];
  3161. /* If firmware needs to be loaded */
  3162. if (qla2x00_isp_firmware(vha)) {
  3163. vha->flags.online = 0;
  3164. status = ha->isp_ops->chip_diag(vha);
  3165. if (!status)
  3166. status = qla2x00_setup_chip(vha);
  3167. }
  3168. if (!status && !(status = qla2x00_init_rings(vha))) {
  3169. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3170. ha->flags.chip_reset_done = 1;
  3171. /* Initialize the queues in use */
  3172. qla25xx_init_queues(ha);
  3173. status = qla2x00_fw_ready(vha);
  3174. if (!status) {
  3175. DEBUG(printk("%s(): Start configure loop, "
  3176. "status = %d\n", __func__, status));
  3177. /* Issue a marker after FW becomes ready. */
  3178. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3179. vha->flags.online = 1;
  3180. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3181. wait_time = 256;
  3182. do {
  3183. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3184. qla2x00_configure_loop(vha);
  3185. wait_time--;
  3186. } while (!atomic_read(&vha->loop_down_timer) &&
  3187. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3188. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3189. &vha->dpc_flags)));
  3190. }
  3191. /* if no cable then assume it's good */
  3192. if ((vha->device_flags & DFLG_NO_CABLE))
  3193. status = 0;
  3194. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3195. __func__,
  3196. status));
  3197. }
  3198. return (status);
  3199. }
  3200. static int
  3201. qla25xx_init_queues(struct qla_hw_data *ha)
  3202. {
  3203. struct rsp_que *rsp = NULL;
  3204. struct req_que *req = NULL;
  3205. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3206. int ret = -1;
  3207. int i;
  3208. for (i = 1; i < ha->max_rsp_queues; i++) {
  3209. rsp = ha->rsp_q_map[i];
  3210. if (rsp) {
  3211. rsp->options &= ~BIT_0;
  3212. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3213. if (ret != QLA_SUCCESS)
  3214. DEBUG2_17(printk(KERN_WARNING
  3215. "%s Rsp que:%d init failed\n", __func__,
  3216. rsp->id));
  3217. else
  3218. DEBUG2_17(printk(KERN_INFO
  3219. "%s Rsp que:%d inited\n", __func__,
  3220. rsp->id));
  3221. }
  3222. }
  3223. for (i = 1; i < ha->max_req_queues; i++) {
  3224. req = ha->req_q_map[i];
  3225. if (req) {
  3226. /* Clear outstanding commands array. */
  3227. req->options &= ~BIT_0;
  3228. ret = qla25xx_init_req_que(base_vha, req);
  3229. if (ret != QLA_SUCCESS)
  3230. DEBUG2_17(printk(KERN_WARNING
  3231. "%s Req que:%d init failed\n", __func__,
  3232. req->id));
  3233. else
  3234. DEBUG2_17(printk(KERN_WARNING
  3235. "%s Req que:%d inited\n", __func__,
  3236. req->id));
  3237. }
  3238. }
  3239. return ret;
  3240. }
  3241. /*
  3242. * qla2x00_reset_adapter
  3243. * Reset adapter.
  3244. *
  3245. * Input:
  3246. * ha = adapter block pointer.
  3247. */
  3248. void
  3249. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3250. {
  3251. unsigned long flags = 0;
  3252. struct qla_hw_data *ha = vha->hw;
  3253. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3254. vha->flags.online = 0;
  3255. ha->isp_ops->disable_intrs(ha);
  3256. spin_lock_irqsave(&ha->hardware_lock, flags);
  3257. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3258. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3259. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3260. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3261. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3262. }
  3263. void
  3264. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3265. {
  3266. unsigned long flags = 0;
  3267. struct qla_hw_data *ha = vha->hw;
  3268. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3269. vha->flags.online = 0;
  3270. ha->isp_ops->disable_intrs(ha);
  3271. spin_lock_irqsave(&ha->hardware_lock, flags);
  3272. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3273. RD_REG_DWORD(&reg->hccr);
  3274. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3275. RD_REG_DWORD(&reg->hccr);
  3276. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3277. if (IS_NOPOLLING_TYPE(ha))
  3278. ha->isp_ops->enable_intrs(ha);
  3279. }
  3280. /* On sparc systems, obtain port and node WWN from firmware
  3281. * properties.
  3282. */
  3283. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3284. struct nvram_24xx *nv)
  3285. {
  3286. #ifdef CONFIG_SPARC
  3287. struct qla_hw_data *ha = vha->hw;
  3288. struct pci_dev *pdev = ha->pdev;
  3289. struct device_node *dp = pci_device_to_OF_node(pdev);
  3290. const u8 *val;
  3291. int len;
  3292. val = of_get_property(dp, "port-wwn", &len);
  3293. if (val && len >= WWN_SIZE)
  3294. memcpy(nv->port_name, val, WWN_SIZE);
  3295. val = of_get_property(dp, "node-wwn", &len);
  3296. if (val && len >= WWN_SIZE)
  3297. memcpy(nv->node_name, val, WWN_SIZE);
  3298. #endif
  3299. }
  3300. int
  3301. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3302. {
  3303. int rval;
  3304. struct init_cb_24xx *icb;
  3305. struct nvram_24xx *nv;
  3306. uint32_t *dptr;
  3307. uint8_t *dptr1, *dptr2;
  3308. uint32_t chksum;
  3309. uint16_t cnt;
  3310. struct qla_hw_data *ha = vha->hw;
  3311. rval = QLA_SUCCESS;
  3312. icb = (struct init_cb_24xx *)ha->init_cb;
  3313. nv = ha->nvram;
  3314. /* Determine NVRAM starting address. */
  3315. if (ha->flags.port0) {
  3316. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3317. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3318. } else {
  3319. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3320. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3321. }
  3322. ha->nvram_size = sizeof(struct nvram_24xx);
  3323. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3324. /* Get VPD data into cache */
  3325. ha->vpd = ha->nvram + VPD_OFFSET;
  3326. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3327. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3328. /* Get NVRAM data into cache and calculate checksum. */
  3329. dptr = (uint32_t *)nv;
  3330. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3331. ha->nvram_size);
  3332. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3333. chksum += le32_to_cpu(*dptr++);
  3334. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3335. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3336. /* Bad NVRAM data, set defaults parameters. */
  3337. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3338. || nv->id[3] != ' ' ||
  3339. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3340. /* Reset NVRAM data. */
  3341. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3342. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3343. le16_to_cpu(nv->nvram_version));
  3344. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3345. "invalid -- WWPN) defaults.\n");
  3346. /*
  3347. * Set default initialization control block.
  3348. */
  3349. memset(nv, 0, ha->nvram_size);
  3350. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3351. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3352. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3353. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3354. nv->exchange_count = __constant_cpu_to_le16(0);
  3355. nv->hard_address = __constant_cpu_to_le16(124);
  3356. nv->port_name[0] = 0x21;
  3357. nv->port_name[1] = 0x00 + ha->port_no;
  3358. nv->port_name[2] = 0x00;
  3359. nv->port_name[3] = 0xe0;
  3360. nv->port_name[4] = 0x8b;
  3361. nv->port_name[5] = 0x1c;
  3362. nv->port_name[6] = 0x55;
  3363. nv->port_name[7] = 0x86;
  3364. nv->node_name[0] = 0x20;
  3365. nv->node_name[1] = 0x00;
  3366. nv->node_name[2] = 0x00;
  3367. nv->node_name[3] = 0xe0;
  3368. nv->node_name[4] = 0x8b;
  3369. nv->node_name[5] = 0x1c;
  3370. nv->node_name[6] = 0x55;
  3371. nv->node_name[7] = 0x86;
  3372. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3373. nv->login_retry_count = __constant_cpu_to_le16(8);
  3374. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3375. nv->login_timeout = __constant_cpu_to_le16(0);
  3376. nv->firmware_options_1 =
  3377. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3378. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3379. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3380. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3381. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3382. nv->efi_parameters = __constant_cpu_to_le32(0);
  3383. nv->reset_delay = 5;
  3384. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3385. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3386. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3387. rval = 1;
  3388. }
  3389. /* Reset Initialization control block */
  3390. memset(icb, 0, ha->init_cb_size);
  3391. /* Copy 1st segment. */
  3392. dptr1 = (uint8_t *)icb;
  3393. dptr2 = (uint8_t *)&nv->version;
  3394. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3395. while (cnt--)
  3396. *dptr1++ = *dptr2++;
  3397. icb->login_retry_count = nv->login_retry_count;
  3398. icb->link_down_on_nos = nv->link_down_on_nos;
  3399. /* Copy 2nd segment. */
  3400. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3401. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3402. cnt = (uint8_t *)&icb->reserved_3 -
  3403. (uint8_t *)&icb->interrupt_delay_timer;
  3404. while (cnt--)
  3405. *dptr1++ = *dptr2++;
  3406. /*
  3407. * Setup driver NVRAM options.
  3408. */
  3409. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3410. "QLA2462");
  3411. /* Use alternate WWN? */
  3412. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3413. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3414. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3415. }
  3416. /* Prepare nodename */
  3417. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3418. /*
  3419. * Firmware will apply the following mask if the nodename was
  3420. * not provided.
  3421. */
  3422. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3423. icb->node_name[0] &= 0xF0;
  3424. }
  3425. /* Set host adapter parameters. */
  3426. ha->flags.disable_risc_code_load = 0;
  3427. ha->flags.enable_lip_reset = 0;
  3428. ha->flags.enable_lip_full_login =
  3429. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3430. ha->flags.enable_target_reset =
  3431. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3432. ha->flags.enable_led_scheme = 0;
  3433. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3434. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3435. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3436. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3437. sizeof(ha->fw_seriallink_options24));
  3438. /* save HBA serial number */
  3439. ha->serial0 = icb->port_name[5];
  3440. ha->serial1 = icb->port_name[6];
  3441. ha->serial2 = icb->port_name[7];
  3442. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3443. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3444. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3445. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3446. /* Set minimum login_timeout to 4 seconds. */
  3447. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3448. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3449. if (le16_to_cpu(nv->login_timeout) < 4)
  3450. nv->login_timeout = __constant_cpu_to_le16(4);
  3451. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3452. icb->login_timeout = nv->login_timeout;
  3453. /* Set minimum RATOV to 100 tenths of a second. */
  3454. ha->r_a_tov = 100;
  3455. ha->loop_reset_delay = nv->reset_delay;
  3456. /* Link Down Timeout = 0:
  3457. *
  3458. * When Port Down timer expires we will start returning
  3459. * I/O's to OS with "DID_NO_CONNECT".
  3460. *
  3461. * Link Down Timeout != 0:
  3462. *
  3463. * The driver waits for the link to come up after link down
  3464. * before returning I/Os to OS with "DID_NO_CONNECT".
  3465. */
  3466. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3467. ha->loop_down_abort_time =
  3468. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3469. } else {
  3470. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3471. ha->loop_down_abort_time =
  3472. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3473. }
  3474. /* Need enough time to try and get the port back. */
  3475. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3476. if (qlport_down_retry)
  3477. ha->port_down_retry_count = qlport_down_retry;
  3478. /* Set login_retry_count */
  3479. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3480. if (ha->port_down_retry_count ==
  3481. le16_to_cpu(nv->port_down_retry_count) &&
  3482. ha->port_down_retry_count > 3)
  3483. ha->login_retry_count = ha->port_down_retry_count;
  3484. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3485. ha->login_retry_count = ha->port_down_retry_count;
  3486. if (ql2xloginretrycount)
  3487. ha->login_retry_count = ql2xloginretrycount;
  3488. /* Enable ZIO. */
  3489. if (!vha->flags.init_done) {
  3490. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3491. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3492. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3493. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3494. }
  3495. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3496. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3497. vha->flags.process_response_queue = 0;
  3498. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3499. ha->zio_mode = QLA_ZIO_MODE_6;
  3500. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3501. "(%d us).\n", vha->host_no, ha->zio_mode,
  3502. ha->zio_timer * 100));
  3503. qla_printk(KERN_INFO, ha,
  3504. "ZIO mode %d enabled; timer delay (%d us).\n",
  3505. ha->zio_mode, ha->zio_timer * 100);
  3506. icb->firmware_options_2 |= cpu_to_le32(
  3507. (uint32_t)ha->zio_mode);
  3508. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3509. vha->flags.process_response_queue = 1;
  3510. }
  3511. if (rval) {
  3512. DEBUG2_3(printk(KERN_WARNING
  3513. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3514. }
  3515. return (rval);
  3516. }
  3517. static int
  3518. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3519. uint32_t faddr)
  3520. {
  3521. int rval = QLA_SUCCESS;
  3522. int segments, fragment;
  3523. uint32_t *dcode, dlen;
  3524. uint32_t risc_addr;
  3525. uint32_t risc_size;
  3526. uint32_t i;
  3527. struct qla_hw_data *ha = vha->hw;
  3528. struct req_que *req = ha->req_q_map[0];
  3529. qla_printk(KERN_INFO, ha,
  3530. "FW: Loading from flash (%x)...\n", faddr);
  3531. rval = QLA_SUCCESS;
  3532. segments = FA_RISC_CODE_SEGMENTS;
  3533. dcode = (uint32_t *)req->ring;
  3534. *srisc_addr = 0;
  3535. /* Validate firmware image by checking version. */
  3536. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3537. for (i = 0; i < 4; i++)
  3538. dcode[i] = be32_to_cpu(dcode[i]);
  3539. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3540. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3541. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3542. dcode[3] == 0)) {
  3543. qla_printk(KERN_WARNING, ha,
  3544. "Unable to verify integrity of flash firmware image!\n");
  3545. qla_printk(KERN_WARNING, ha,
  3546. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3547. dcode[1], dcode[2], dcode[3]);
  3548. return QLA_FUNCTION_FAILED;
  3549. }
  3550. while (segments && rval == QLA_SUCCESS) {
  3551. /* Read segment's load information. */
  3552. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3553. risc_addr = be32_to_cpu(dcode[2]);
  3554. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3555. risc_size = be32_to_cpu(dcode[3]);
  3556. fragment = 0;
  3557. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3558. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3559. if (dlen > risc_size)
  3560. dlen = risc_size;
  3561. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3562. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3563. vha->host_no, risc_addr, dlen, faddr));
  3564. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3565. for (i = 0; i < dlen; i++)
  3566. dcode[i] = swab32(dcode[i]);
  3567. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3568. dlen);
  3569. if (rval) {
  3570. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3571. "segment %d of firmware\n", vha->host_no,
  3572. fragment));
  3573. qla_printk(KERN_WARNING, ha,
  3574. "[ERROR] Failed to load segment %d of "
  3575. "firmware\n", fragment);
  3576. break;
  3577. }
  3578. faddr += dlen;
  3579. risc_addr += dlen;
  3580. risc_size -= dlen;
  3581. fragment++;
  3582. }
  3583. /* Next segment. */
  3584. segments--;
  3585. }
  3586. return rval;
  3587. }
  3588. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3589. int
  3590. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3591. {
  3592. int rval;
  3593. int i, fragment;
  3594. uint16_t *wcode, *fwcode;
  3595. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3596. struct fw_blob *blob;
  3597. struct qla_hw_data *ha = vha->hw;
  3598. struct req_que *req = ha->req_q_map[0];
  3599. /* Load firmware blob. */
  3600. blob = qla2x00_request_firmware(vha);
  3601. if (!blob) {
  3602. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3603. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3604. "from: " QLA_FW_URL ".\n");
  3605. return QLA_FUNCTION_FAILED;
  3606. }
  3607. rval = QLA_SUCCESS;
  3608. wcode = (uint16_t *)req->ring;
  3609. *srisc_addr = 0;
  3610. fwcode = (uint16_t *)blob->fw->data;
  3611. fwclen = 0;
  3612. /* Validate firmware image by checking version. */
  3613. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3614. qla_printk(KERN_WARNING, ha,
  3615. "Unable to verify integrity of firmware image (%Zd)!\n",
  3616. blob->fw->size);
  3617. goto fail_fw_integrity;
  3618. }
  3619. for (i = 0; i < 4; i++)
  3620. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3621. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3622. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3623. wcode[2] == 0 && wcode[3] == 0)) {
  3624. qla_printk(KERN_WARNING, ha,
  3625. "Unable to verify integrity of firmware image!\n");
  3626. qla_printk(KERN_WARNING, ha,
  3627. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3628. wcode[1], wcode[2], wcode[3]);
  3629. goto fail_fw_integrity;
  3630. }
  3631. seg = blob->segs;
  3632. while (*seg && rval == QLA_SUCCESS) {
  3633. risc_addr = *seg;
  3634. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3635. risc_size = be16_to_cpu(fwcode[3]);
  3636. /* Validate firmware image size. */
  3637. fwclen += risc_size * sizeof(uint16_t);
  3638. if (blob->fw->size < fwclen) {
  3639. qla_printk(KERN_WARNING, ha,
  3640. "Unable to verify integrity of firmware image "
  3641. "(%Zd)!\n", blob->fw->size);
  3642. goto fail_fw_integrity;
  3643. }
  3644. fragment = 0;
  3645. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3646. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3647. if (wlen > risc_size)
  3648. wlen = risc_size;
  3649. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3650. "addr %x, number of words 0x%x.\n", vha->host_no,
  3651. risc_addr, wlen));
  3652. for (i = 0; i < wlen; i++)
  3653. wcode[i] = swab16(fwcode[i]);
  3654. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3655. wlen);
  3656. if (rval) {
  3657. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3658. "segment %d of firmware\n", vha->host_no,
  3659. fragment));
  3660. qla_printk(KERN_WARNING, ha,
  3661. "[ERROR] Failed to load segment %d of "
  3662. "firmware\n", fragment);
  3663. break;
  3664. }
  3665. fwcode += wlen;
  3666. risc_addr += wlen;
  3667. risc_size -= wlen;
  3668. fragment++;
  3669. }
  3670. /* Next segment. */
  3671. seg++;
  3672. }
  3673. return rval;
  3674. fail_fw_integrity:
  3675. return QLA_FUNCTION_FAILED;
  3676. }
  3677. static int
  3678. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3679. {
  3680. int rval;
  3681. int segments, fragment;
  3682. uint32_t *dcode, dlen;
  3683. uint32_t risc_addr;
  3684. uint32_t risc_size;
  3685. uint32_t i;
  3686. struct fw_blob *blob;
  3687. uint32_t *fwcode, fwclen;
  3688. struct qla_hw_data *ha = vha->hw;
  3689. struct req_que *req = ha->req_q_map[0];
  3690. /* Load firmware blob. */
  3691. blob = qla2x00_request_firmware(vha);
  3692. if (!blob) {
  3693. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3694. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3695. "from: " QLA_FW_URL ".\n");
  3696. return QLA_FUNCTION_FAILED;
  3697. }
  3698. qla_printk(KERN_INFO, ha,
  3699. "FW: Loading via request-firmware...\n");
  3700. rval = QLA_SUCCESS;
  3701. segments = FA_RISC_CODE_SEGMENTS;
  3702. dcode = (uint32_t *)req->ring;
  3703. *srisc_addr = 0;
  3704. fwcode = (uint32_t *)blob->fw->data;
  3705. fwclen = 0;
  3706. /* Validate firmware image by checking version. */
  3707. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3708. qla_printk(KERN_WARNING, ha,
  3709. "Unable to verify integrity of firmware image (%Zd)!\n",
  3710. blob->fw->size);
  3711. goto fail_fw_integrity;
  3712. }
  3713. for (i = 0; i < 4; i++)
  3714. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3715. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3716. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3717. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3718. dcode[3] == 0)) {
  3719. qla_printk(KERN_WARNING, ha,
  3720. "Unable to verify integrity of firmware image!\n");
  3721. qla_printk(KERN_WARNING, ha,
  3722. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3723. dcode[1], dcode[2], dcode[3]);
  3724. goto fail_fw_integrity;
  3725. }
  3726. while (segments && rval == QLA_SUCCESS) {
  3727. risc_addr = be32_to_cpu(fwcode[2]);
  3728. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3729. risc_size = be32_to_cpu(fwcode[3]);
  3730. /* Validate firmware image size. */
  3731. fwclen += risc_size * sizeof(uint32_t);
  3732. if (blob->fw->size < fwclen) {
  3733. qla_printk(KERN_WARNING, ha,
  3734. "Unable to verify integrity of firmware image "
  3735. "(%Zd)!\n", blob->fw->size);
  3736. goto fail_fw_integrity;
  3737. }
  3738. fragment = 0;
  3739. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3740. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3741. if (dlen > risc_size)
  3742. dlen = risc_size;
  3743. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3744. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3745. risc_addr, dlen));
  3746. for (i = 0; i < dlen; i++)
  3747. dcode[i] = swab32(fwcode[i]);
  3748. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3749. dlen);
  3750. if (rval) {
  3751. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3752. "segment %d of firmware\n", vha->host_no,
  3753. fragment));
  3754. qla_printk(KERN_WARNING, ha,
  3755. "[ERROR] Failed to load segment %d of "
  3756. "firmware\n", fragment);
  3757. break;
  3758. }
  3759. fwcode += dlen;
  3760. risc_addr += dlen;
  3761. risc_size -= dlen;
  3762. fragment++;
  3763. }
  3764. /* Next segment. */
  3765. segments--;
  3766. }
  3767. return rval;
  3768. fail_fw_integrity:
  3769. return QLA_FUNCTION_FAILED;
  3770. }
  3771. int
  3772. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3773. {
  3774. int rval;
  3775. if (ql2xfwloadbin == 1)
  3776. return qla81xx_load_risc(vha, srisc_addr);
  3777. /*
  3778. * FW Load priority:
  3779. * 1) Firmware via request-firmware interface (.bin file).
  3780. * 2) Firmware residing in flash.
  3781. */
  3782. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3783. if (rval == QLA_SUCCESS)
  3784. return rval;
  3785. return qla24xx_load_risc_flash(vha, srisc_addr,
  3786. vha->hw->flt_region_fw);
  3787. }
  3788. int
  3789. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3790. {
  3791. int rval;
  3792. struct qla_hw_data *ha = vha->hw;
  3793. if (ql2xfwloadbin == 2)
  3794. goto try_blob_fw;
  3795. /*
  3796. * FW Load priority:
  3797. * 1) Firmware residing in flash.
  3798. * 2) Firmware via request-firmware interface (.bin file).
  3799. * 3) Golden-Firmware residing in flash -- limited operation.
  3800. */
  3801. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3802. if (rval == QLA_SUCCESS)
  3803. return rval;
  3804. try_blob_fw:
  3805. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3806. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3807. return rval;
  3808. qla_printk(KERN_ERR, ha,
  3809. "FW: Attempting to fallback to golden firmware...\n");
  3810. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3811. if (rval != QLA_SUCCESS)
  3812. return rval;
  3813. qla_printk(KERN_ERR, ha,
  3814. "FW: Please update operational firmware...\n");
  3815. ha->flags.running_gold_fw = 1;
  3816. return rval;
  3817. }
  3818. void
  3819. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3820. {
  3821. int ret, retries;
  3822. struct qla_hw_data *ha = vha->hw;
  3823. if (!IS_FWI2_CAPABLE(ha))
  3824. return;
  3825. if (!ha->fw_major_version)
  3826. return;
  3827. ret = qla2x00_stop_firmware(vha);
  3828. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3829. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3830. ha->isp_ops->reset_chip(vha);
  3831. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3832. continue;
  3833. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3834. continue;
  3835. qla_printk(KERN_INFO, ha,
  3836. "Attempting retry of stop-firmware command...\n");
  3837. ret = qla2x00_stop_firmware(vha);
  3838. }
  3839. }
  3840. int
  3841. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3842. {
  3843. int rval = QLA_SUCCESS;
  3844. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3845. struct qla_hw_data *ha = vha->hw;
  3846. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3847. struct req_que *req;
  3848. struct rsp_que *rsp;
  3849. if (!vha->vp_idx)
  3850. return -EINVAL;
  3851. rval = qla2x00_fw_ready(base_vha);
  3852. if (ha->flags.cpu_affinity_enabled)
  3853. req = ha->req_q_map[0];
  3854. else
  3855. req = vha->req;
  3856. rsp = req->rsp;
  3857. if (rval == QLA_SUCCESS) {
  3858. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3859. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3860. }
  3861. vha->flags.management_server_logged_in = 0;
  3862. /* Login to SNS first */
  3863. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3864. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3865. DEBUG15(qla_printk(KERN_INFO, ha,
  3866. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3867. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3868. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3869. return (QLA_FUNCTION_FAILED);
  3870. }
  3871. atomic_set(&vha->loop_down_timer, 0);
  3872. atomic_set(&vha->loop_state, LOOP_UP);
  3873. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3874. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3875. rval = qla2x00_loop_resync(base_vha);
  3876. return rval;
  3877. }
  3878. /* 84XX Support **************************************************************/
  3879. static LIST_HEAD(qla_cs84xx_list);
  3880. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3881. static struct qla_chip_state_84xx *
  3882. qla84xx_get_chip(struct scsi_qla_host *vha)
  3883. {
  3884. struct qla_chip_state_84xx *cs84xx;
  3885. struct qla_hw_data *ha = vha->hw;
  3886. mutex_lock(&qla_cs84xx_mutex);
  3887. /* Find any shared 84xx chip. */
  3888. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3889. if (cs84xx->bus == ha->pdev->bus) {
  3890. kref_get(&cs84xx->kref);
  3891. goto done;
  3892. }
  3893. }
  3894. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3895. if (!cs84xx)
  3896. goto done;
  3897. kref_init(&cs84xx->kref);
  3898. spin_lock_init(&cs84xx->access_lock);
  3899. mutex_init(&cs84xx->fw_update_mutex);
  3900. cs84xx->bus = ha->pdev->bus;
  3901. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3902. done:
  3903. mutex_unlock(&qla_cs84xx_mutex);
  3904. return cs84xx;
  3905. }
  3906. static void
  3907. __qla84xx_chip_release(struct kref *kref)
  3908. {
  3909. struct qla_chip_state_84xx *cs84xx =
  3910. container_of(kref, struct qla_chip_state_84xx, kref);
  3911. mutex_lock(&qla_cs84xx_mutex);
  3912. list_del(&cs84xx->list);
  3913. mutex_unlock(&qla_cs84xx_mutex);
  3914. kfree(cs84xx);
  3915. }
  3916. void
  3917. qla84xx_put_chip(struct scsi_qla_host *vha)
  3918. {
  3919. struct qla_hw_data *ha = vha->hw;
  3920. if (ha->cs84xx)
  3921. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3922. }
  3923. static int
  3924. qla84xx_init_chip(scsi_qla_host_t *vha)
  3925. {
  3926. int rval;
  3927. uint16_t status[2];
  3928. struct qla_hw_data *ha = vha->hw;
  3929. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3930. rval = qla84xx_verify_chip(vha, status);
  3931. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3932. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3933. QLA_SUCCESS;
  3934. }
  3935. /* 81XX Support **************************************************************/
  3936. int
  3937. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3938. {
  3939. int rval;
  3940. struct init_cb_81xx *icb;
  3941. struct nvram_81xx *nv;
  3942. uint32_t *dptr;
  3943. uint8_t *dptr1, *dptr2;
  3944. uint32_t chksum;
  3945. uint16_t cnt;
  3946. struct qla_hw_data *ha = vha->hw;
  3947. rval = QLA_SUCCESS;
  3948. icb = (struct init_cb_81xx *)ha->init_cb;
  3949. nv = ha->nvram;
  3950. /* Determine NVRAM starting address. */
  3951. ha->nvram_size = sizeof(struct nvram_81xx);
  3952. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3953. /* Get VPD data into cache */
  3954. ha->vpd = ha->nvram + VPD_OFFSET;
  3955. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3956. ha->vpd_size);
  3957. /* Get NVRAM data into cache and calculate checksum. */
  3958. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3959. ha->nvram_size);
  3960. dptr = (uint32_t *)nv;
  3961. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3962. chksum += le32_to_cpu(*dptr++);
  3963. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3964. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3965. /* Bad NVRAM data, set defaults parameters. */
  3966. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3967. || nv->id[3] != ' ' ||
  3968. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3969. /* Reset NVRAM data. */
  3970. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3971. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3972. le16_to_cpu(nv->nvram_version));
  3973. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3974. "invalid -- WWPN) defaults.\n");
  3975. /*
  3976. * Set default initialization control block.
  3977. */
  3978. memset(nv, 0, ha->nvram_size);
  3979. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3980. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3981. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3982. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3983. nv->exchange_count = __constant_cpu_to_le16(0);
  3984. nv->port_name[0] = 0x21;
  3985. nv->port_name[1] = 0x00 + ha->port_no;
  3986. nv->port_name[2] = 0x00;
  3987. nv->port_name[3] = 0xe0;
  3988. nv->port_name[4] = 0x8b;
  3989. nv->port_name[5] = 0x1c;
  3990. nv->port_name[6] = 0x55;
  3991. nv->port_name[7] = 0x86;
  3992. nv->node_name[0] = 0x20;
  3993. nv->node_name[1] = 0x00;
  3994. nv->node_name[2] = 0x00;
  3995. nv->node_name[3] = 0xe0;
  3996. nv->node_name[4] = 0x8b;
  3997. nv->node_name[5] = 0x1c;
  3998. nv->node_name[6] = 0x55;
  3999. nv->node_name[7] = 0x86;
  4000. nv->login_retry_count = __constant_cpu_to_le16(8);
  4001. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4002. nv->login_timeout = __constant_cpu_to_le16(0);
  4003. nv->firmware_options_1 =
  4004. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4005. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4006. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4007. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4008. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4009. nv->efi_parameters = __constant_cpu_to_le32(0);
  4010. nv->reset_delay = 5;
  4011. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4012. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4013. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4014. nv->enode_mac[0] = 0x00;
  4015. nv->enode_mac[1] = 0x02;
  4016. nv->enode_mac[2] = 0x03;
  4017. nv->enode_mac[3] = 0x04;
  4018. nv->enode_mac[4] = 0x05;
  4019. nv->enode_mac[5] = 0x06 + ha->port_no;
  4020. rval = 1;
  4021. }
  4022. /* Reset Initialization control block */
  4023. memset(icb, 0, sizeof(struct init_cb_81xx));
  4024. /* Copy 1st segment. */
  4025. dptr1 = (uint8_t *)icb;
  4026. dptr2 = (uint8_t *)&nv->version;
  4027. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4028. while (cnt--)
  4029. *dptr1++ = *dptr2++;
  4030. icb->login_retry_count = nv->login_retry_count;
  4031. /* Copy 2nd segment. */
  4032. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4033. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4034. cnt = (uint8_t *)&icb->reserved_5 -
  4035. (uint8_t *)&icb->interrupt_delay_timer;
  4036. while (cnt--)
  4037. *dptr1++ = *dptr2++;
  4038. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4039. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4040. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4041. icb->enode_mac[0] = 0x01;
  4042. icb->enode_mac[1] = 0x02;
  4043. icb->enode_mac[2] = 0x03;
  4044. icb->enode_mac[3] = 0x04;
  4045. icb->enode_mac[4] = 0x05;
  4046. icb->enode_mac[5] = 0x06 + ha->port_no;
  4047. }
  4048. /* Use extended-initialization control block. */
  4049. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4050. /*
  4051. * Setup driver NVRAM options.
  4052. */
  4053. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4054. "QLE81XX");
  4055. /* Use alternate WWN? */
  4056. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4057. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4058. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4059. }
  4060. /* Prepare nodename */
  4061. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4062. /*
  4063. * Firmware will apply the following mask if the nodename was
  4064. * not provided.
  4065. */
  4066. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4067. icb->node_name[0] &= 0xF0;
  4068. }
  4069. /* Set host adapter parameters. */
  4070. ha->flags.disable_risc_code_load = 0;
  4071. ha->flags.enable_lip_reset = 0;
  4072. ha->flags.enable_lip_full_login =
  4073. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4074. ha->flags.enable_target_reset =
  4075. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4076. ha->flags.enable_led_scheme = 0;
  4077. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4078. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4079. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4080. /* save HBA serial number */
  4081. ha->serial0 = icb->port_name[5];
  4082. ha->serial1 = icb->port_name[6];
  4083. ha->serial2 = icb->port_name[7];
  4084. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4085. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4086. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4087. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4088. /* Set minimum login_timeout to 4 seconds. */
  4089. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4090. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4091. if (le16_to_cpu(nv->login_timeout) < 4)
  4092. nv->login_timeout = __constant_cpu_to_le16(4);
  4093. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4094. icb->login_timeout = nv->login_timeout;
  4095. /* Set minimum RATOV to 100 tenths of a second. */
  4096. ha->r_a_tov = 100;
  4097. ha->loop_reset_delay = nv->reset_delay;
  4098. /* Link Down Timeout = 0:
  4099. *
  4100. * When Port Down timer expires we will start returning
  4101. * I/O's to OS with "DID_NO_CONNECT".
  4102. *
  4103. * Link Down Timeout != 0:
  4104. *
  4105. * The driver waits for the link to come up after link down
  4106. * before returning I/Os to OS with "DID_NO_CONNECT".
  4107. */
  4108. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4109. ha->loop_down_abort_time =
  4110. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4111. } else {
  4112. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4113. ha->loop_down_abort_time =
  4114. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4115. }
  4116. /* Need enough time to try and get the port back. */
  4117. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4118. if (qlport_down_retry)
  4119. ha->port_down_retry_count = qlport_down_retry;
  4120. /* Set login_retry_count */
  4121. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4122. if (ha->port_down_retry_count ==
  4123. le16_to_cpu(nv->port_down_retry_count) &&
  4124. ha->port_down_retry_count > 3)
  4125. ha->login_retry_count = ha->port_down_retry_count;
  4126. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4127. ha->login_retry_count = ha->port_down_retry_count;
  4128. if (ql2xloginretrycount)
  4129. ha->login_retry_count = ql2xloginretrycount;
  4130. /* Enable ZIO. */
  4131. if (!vha->flags.init_done) {
  4132. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4133. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4134. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4135. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4136. }
  4137. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4138. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4139. vha->flags.process_response_queue = 0;
  4140. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4141. ha->zio_mode = QLA_ZIO_MODE_6;
  4142. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4143. "(%d us).\n", vha->host_no, ha->zio_mode,
  4144. ha->zio_timer * 100));
  4145. qla_printk(KERN_INFO, ha,
  4146. "ZIO mode %d enabled; timer delay (%d us).\n",
  4147. ha->zio_mode, ha->zio_timer * 100);
  4148. icb->firmware_options_2 |= cpu_to_le32(
  4149. (uint32_t)ha->zio_mode);
  4150. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4151. vha->flags.process_response_queue = 1;
  4152. }
  4153. if (rval) {
  4154. DEBUG2_3(printk(KERN_WARNING
  4155. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4156. }
  4157. return (rval);
  4158. }
  4159. void
  4160. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  4161. {
  4162. }