mpt2sas_base.c 99 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->shost_recovery)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. /**
  109. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  110. * @ioc: pointer to scsi command object
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. void
  116. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  117. {
  118. unsigned long flags;
  119. if (ioc->fault_reset_work_q)
  120. return;
  121. /* initialize fault polling */
  122. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  123. snprintf(ioc->fault_reset_work_q_name,
  124. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  125. ioc->fault_reset_work_q =
  126. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  127. if (!ioc->fault_reset_work_q) {
  128. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  129. ioc->name, __func__, __LINE__);
  130. return;
  131. }
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->fault_reset_work_q)
  134. queue_delayed_work(ioc->fault_reset_work_q,
  135. &ioc->fault_reset_work,
  136. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  137. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  138. }
  139. /**
  140. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  141. * @ioc: pointer to scsi command object
  142. * Context: sleep.
  143. *
  144. * Return nothing.
  145. */
  146. void
  147. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  148. {
  149. unsigned long flags;
  150. struct workqueue_struct *wq;
  151. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  152. wq = ioc->fault_reset_work_q;
  153. ioc->fault_reset_work_q = NULL;
  154. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  155. if (wq) {
  156. if (!cancel_delayed_work(&ioc->fault_reset_work))
  157. flush_workqueue(wq);
  158. destroy_workqueue(wq);
  159. }
  160. }
  161. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  162. /**
  163. * _base_sas_ioc_info - verbose translation of the ioc status
  164. * @ioc: pointer to scsi command object
  165. * @mpi_reply: reply mf payload returned from firmware
  166. * @request_hdr: request mf
  167. *
  168. * Return nothing.
  169. */
  170. static void
  171. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  172. MPI2RequestHeader_t *request_hdr)
  173. {
  174. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  175. MPI2_IOCSTATUS_MASK;
  176. char *desc = NULL;
  177. u16 frame_sz;
  178. char *func_str = NULL;
  179. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  180. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  181. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  182. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  183. return;
  184. switch (ioc_status) {
  185. /****************************************************************************
  186. * Common IOCStatus values for all replies
  187. ****************************************************************************/
  188. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  189. desc = "invalid function";
  190. break;
  191. case MPI2_IOCSTATUS_BUSY:
  192. desc = "busy";
  193. break;
  194. case MPI2_IOCSTATUS_INVALID_SGL:
  195. desc = "invalid sgl";
  196. break;
  197. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  198. desc = "internal error";
  199. break;
  200. case MPI2_IOCSTATUS_INVALID_VPID:
  201. desc = "invalid vpid";
  202. break;
  203. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  204. desc = "insufficient resources";
  205. break;
  206. case MPI2_IOCSTATUS_INVALID_FIELD:
  207. desc = "invalid field";
  208. break;
  209. case MPI2_IOCSTATUS_INVALID_STATE:
  210. desc = "invalid state";
  211. break;
  212. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  213. desc = "op state not supported";
  214. break;
  215. /****************************************************************************
  216. * Config IOCStatus values
  217. ****************************************************************************/
  218. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  219. desc = "config invalid action";
  220. break;
  221. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  222. desc = "config invalid type";
  223. break;
  224. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  225. desc = "config invalid page";
  226. break;
  227. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  228. desc = "config invalid data";
  229. break;
  230. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  231. desc = "config no defaults";
  232. break;
  233. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  234. desc = "config cant commit";
  235. break;
  236. /****************************************************************************
  237. * SCSI IO Reply
  238. ****************************************************************************/
  239. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  240. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  241. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  242. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  243. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  244. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  245. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  246. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  247. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  248. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  249. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  250. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  251. break;
  252. /****************************************************************************
  253. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  254. ****************************************************************************/
  255. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  256. desc = "eedp guard error";
  257. break;
  258. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  259. desc = "eedp ref tag error";
  260. break;
  261. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  262. desc = "eedp app tag error";
  263. break;
  264. /****************************************************************************
  265. * SCSI Target values
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  268. desc = "target invalid io index";
  269. break;
  270. case MPI2_IOCSTATUS_TARGET_ABORTED:
  271. desc = "target aborted";
  272. break;
  273. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  274. desc = "target no conn retryable";
  275. break;
  276. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  277. desc = "target no connection";
  278. break;
  279. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  280. desc = "target xfer count mismatch";
  281. break;
  282. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  283. desc = "target data offset error";
  284. break;
  285. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  286. desc = "target too much write data";
  287. break;
  288. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  289. desc = "target iu too short";
  290. break;
  291. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  292. desc = "target ack nak timeout";
  293. break;
  294. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  295. desc = "target nak received";
  296. break;
  297. /****************************************************************************
  298. * Serial Attached SCSI values
  299. ****************************************************************************/
  300. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  301. desc = "smp request failed";
  302. break;
  303. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  304. desc = "smp data overrun";
  305. break;
  306. /****************************************************************************
  307. * Diagnostic Buffer Post / Diagnostic Release values
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  310. desc = "diagnostic released";
  311. break;
  312. default:
  313. break;
  314. }
  315. if (!desc)
  316. return;
  317. switch (request_hdr->Function) {
  318. case MPI2_FUNCTION_CONFIG:
  319. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  320. func_str = "config_page";
  321. break;
  322. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  323. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  324. func_str = "task_mgmt";
  325. break;
  326. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  327. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  328. func_str = "sas_iounit_ctl";
  329. break;
  330. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  331. frame_sz = sizeof(Mpi2SepRequest_t);
  332. func_str = "enclosure";
  333. break;
  334. case MPI2_FUNCTION_IOC_INIT:
  335. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  336. func_str = "ioc_init";
  337. break;
  338. case MPI2_FUNCTION_PORT_ENABLE:
  339. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  340. func_str = "port_enable";
  341. break;
  342. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  343. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  344. func_str = "smp_passthru";
  345. break;
  346. default:
  347. frame_sz = 32;
  348. func_str = "unknown";
  349. break;
  350. }
  351. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  352. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  353. _debug_dump_mf(request_hdr, frame_sz/4);
  354. }
  355. /**
  356. * _base_display_event_data - verbose translation of firmware asyn events
  357. * @ioc: pointer to scsi command object
  358. * @mpi_reply: reply mf payload returned from firmware
  359. *
  360. * Return nothing.
  361. */
  362. static void
  363. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  364. Mpi2EventNotificationReply_t *mpi_reply)
  365. {
  366. char *desc = NULL;
  367. u16 event;
  368. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  369. return;
  370. event = le16_to_cpu(mpi_reply->Event);
  371. switch (event) {
  372. case MPI2_EVENT_LOG_DATA:
  373. desc = "Log Data";
  374. break;
  375. case MPI2_EVENT_STATE_CHANGE:
  376. desc = "Status Change";
  377. break;
  378. case MPI2_EVENT_HARD_RESET_RECEIVED:
  379. desc = "Hard Reset Received";
  380. break;
  381. case MPI2_EVENT_EVENT_CHANGE:
  382. desc = "Event Change";
  383. break;
  384. case MPI2_EVENT_TASK_SET_FULL:
  385. desc = "Task Set Full";
  386. break;
  387. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  388. desc = "Device Status Change";
  389. break;
  390. case MPI2_EVENT_IR_OPERATION_STATUS:
  391. desc = "IR Operation Status";
  392. break;
  393. case MPI2_EVENT_SAS_DISCOVERY:
  394. desc = "Discovery";
  395. break;
  396. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  397. desc = "SAS Broadcast Primitive";
  398. break;
  399. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  400. desc = "SAS Init Device Status Change";
  401. break;
  402. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  403. desc = "SAS Init Table Overflow";
  404. break;
  405. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  406. desc = "SAS Topology Change List";
  407. break;
  408. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  409. desc = "SAS Enclosure Device Status Change";
  410. break;
  411. case MPI2_EVENT_IR_VOLUME:
  412. desc = "IR Volume";
  413. break;
  414. case MPI2_EVENT_IR_PHYSICAL_DISK:
  415. desc = "IR Physical Disk";
  416. break;
  417. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  418. desc = "IR Configuration Change List";
  419. break;
  420. case MPI2_EVENT_LOG_ENTRY_ADDED:
  421. desc = "Log Entry Added";
  422. break;
  423. }
  424. if (!desc)
  425. return;
  426. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  427. }
  428. #endif
  429. /**
  430. * _base_sas_log_info - verbose translation of firmware log info
  431. * @ioc: pointer to scsi command object
  432. * @log_info: log info
  433. *
  434. * Return nothing.
  435. */
  436. static void
  437. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  438. {
  439. union loginfo_type {
  440. u32 loginfo;
  441. struct {
  442. u32 subcode:16;
  443. u32 code:8;
  444. u32 originator:4;
  445. u32 bus_type:4;
  446. } dw;
  447. };
  448. union loginfo_type sas_loginfo;
  449. char *originator_str = NULL;
  450. sas_loginfo.loginfo = log_info;
  451. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  452. return;
  453. /* each nexus loss loginfo */
  454. if (log_info == 0x31170000)
  455. return;
  456. /* eat the loginfos associated with task aborts */
  457. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  458. 0x31140000 || log_info == 0x31130000))
  459. return;
  460. switch (sas_loginfo.dw.originator) {
  461. case 0:
  462. originator_str = "IOP";
  463. break;
  464. case 1:
  465. originator_str = "PL";
  466. break;
  467. case 2:
  468. originator_str = "IR";
  469. break;
  470. }
  471. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  472. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  473. originator_str, sas_loginfo.dw.code,
  474. sas_loginfo.dw.subcode);
  475. }
  476. /**
  477. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  478. * @ioc: pointer to scsi command object
  479. * @fault_code: fault code
  480. *
  481. * Return nothing.
  482. */
  483. void
  484. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  485. {
  486. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  487. ioc->name, fault_code);
  488. }
  489. /**
  490. * _base_display_reply_info -
  491. * @ioc: pointer to scsi command object
  492. * @smid: system request message index
  493. * @VF_ID: virtual function id
  494. * @reply: reply message frame(lower 32bit addr)
  495. *
  496. * Return nothing.
  497. */
  498. static void
  499. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  500. u32 reply)
  501. {
  502. MPI2DefaultReply_t *mpi_reply;
  503. u16 ioc_status;
  504. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  505. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  506. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  507. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  508. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  509. _base_sas_ioc_info(ioc , mpi_reply,
  510. mpt2sas_base_get_msg_frame(ioc, smid));
  511. }
  512. #endif
  513. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  514. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  515. }
  516. /**
  517. * mpt2sas_base_done - base internal command completion routine
  518. * @ioc: pointer to scsi command object
  519. * @smid: system request message index
  520. * @VF_ID: virtual function id
  521. * @reply: reply message frame(lower 32bit addr)
  522. *
  523. * Return nothing.
  524. */
  525. void
  526. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  527. {
  528. MPI2DefaultReply_t *mpi_reply;
  529. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  530. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  531. return;
  532. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  533. return;
  534. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  535. if (mpi_reply) {
  536. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  537. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  538. }
  539. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  540. complete(&ioc->base_cmds.done);
  541. }
  542. /**
  543. * _base_async_event - main callback handler for firmware asyn events
  544. * @ioc: pointer to scsi command object
  545. * @VF_ID: virtual function id
  546. * @reply: reply message frame(lower 32bit addr)
  547. *
  548. * Return nothing.
  549. */
  550. static void
  551. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  552. {
  553. Mpi2EventNotificationReply_t *mpi_reply;
  554. Mpi2EventAckRequest_t *ack_request;
  555. u16 smid;
  556. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  557. if (!mpi_reply)
  558. return;
  559. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  560. return;
  561. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  562. _base_display_event_data(ioc, mpi_reply);
  563. #endif
  564. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  565. goto out;
  566. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  567. if (!smid) {
  568. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  569. ioc->name, __func__);
  570. goto out;
  571. }
  572. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  573. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  574. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  575. ack_request->Event = mpi_reply->Event;
  576. ack_request->EventContext = mpi_reply->EventContext;
  577. ack_request->VF_ID = VF_ID;
  578. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  579. out:
  580. /* scsih callback handler */
  581. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  582. /* ctl callback handler */
  583. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  584. }
  585. /**
  586. * _base_mask_interrupts - disable interrupts
  587. * @ioc: pointer to scsi command object
  588. *
  589. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  590. *
  591. * Return nothing.
  592. */
  593. static void
  594. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  595. {
  596. u32 him_register;
  597. ioc->mask_interrupts = 1;
  598. him_register = readl(&ioc->chip->HostInterruptMask);
  599. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  600. writel(him_register, &ioc->chip->HostInterruptMask);
  601. readl(&ioc->chip->HostInterruptMask);
  602. }
  603. /**
  604. * _base_unmask_interrupts - enable interrupts
  605. * @ioc: pointer to scsi command object
  606. *
  607. * Enabling only Reply Interrupts
  608. *
  609. * Return nothing.
  610. */
  611. static void
  612. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  613. {
  614. u32 him_register;
  615. writel(0, &ioc->chip->HostInterruptStatus);
  616. him_register = readl(&ioc->chip->HostInterruptMask);
  617. him_register &= ~MPI2_HIM_RIM;
  618. writel(him_register, &ioc->chip->HostInterruptMask);
  619. ioc->mask_interrupts = 0;
  620. }
  621. union reply_descriptor {
  622. u64 word;
  623. struct {
  624. u32 low;
  625. u32 high;
  626. } u;
  627. };
  628. /**
  629. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  630. * @irq: irq number (not used)
  631. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  632. * @r: pt_regs pointer (not used)
  633. *
  634. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  635. */
  636. static irqreturn_t
  637. _base_interrupt(int irq, void *bus_id)
  638. {
  639. union reply_descriptor rd;
  640. u32 completed_cmds;
  641. u8 request_desript_type;
  642. u16 smid;
  643. u8 cb_idx;
  644. u32 reply;
  645. u8 VF_ID;
  646. struct MPT2SAS_ADAPTER *ioc = bus_id;
  647. Mpi2ReplyDescriptorsUnion_t *rpf;
  648. if (ioc->mask_interrupts)
  649. return IRQ_NONE;
  650. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  651. request_desript_type = rpf->Default.ReplyFlags
  652. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  653. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  654. return IRQ_NONE;
  655. completed_cmds = 0;
  656. do {
  657. rd.word = rpf->Words;
  658. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  659. goto out;
  660. reply = 0;
  661. cb_idx = 0xFF;
  662. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  663. VF_ID = rpf->Default.VF_ID;
  664. if (request_desript_type ==
  665. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  666. reply = le32_to_cpu
  667. (rpf->AddressReply.ReplyFrameAddress);
  668. } else if (request_desript_type ==
  669. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  670. goto next;
  671. else if (request_desript_type ==
  672. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  673. goto next;
  674. if (smid)
  675. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  676. if (smid && cb_idx != 0xFF) {
  677. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  678. if (reply)
  679. _base_display_reply_info(ioc, smid, VF_ID,
  680. reply);
  681. mpt2sas_base_free_smid(ioc, smid);
  682. }
  683. if (!smid)
  684. _base_async_event(ioc, VF_ID, reply);
  685. /* reply free queue handling */
  686. if (reply) {
  687. ioc->reply_free_host_index =
  688. (ioc->reply_free_host_index ==
  689. (ioc->reply_free_queue_depth - 1)) ?
  690. 0 : ioc->reply_free_host_index + 1;
  691. ioc->reply_free[ioc->reply_free_host_index] =
  692. cpu_to_le32(reply);
  693. wmb();
  694. writel(ioc->reply_free_host_index,
  695. &ioc->chip->ReplyFreeHostIndex);
  696. }
  697. next:
  698. rpf->Words = ULLONG_MAX;
  699. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  700. (ioc->reply_post_queue_depth - 1)) ? 0 :
  701. ioc->reply_post_host_index + 1;
  702. request_desript_type =
  703. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  704. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  705. completed_cmds++;
  706. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  707. goto out;
  708. if (!ioc->reply_post_host_index)
  709. rpf = ioc->reply_post_free;
  710. else
  711. rpf++;
  712. } while (1);
  713. out:
  714. if (!completed_cmds)
  715. return IRQ_NONE;
  716. wmb();
  717. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  718. return IRQ_HANDLED;
  719. }
  720. /**
  721. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  722. * @cb_idx: callback index
  723. *
  724. * Return nothing.
  725. */
  726. void
  727. mpt2sas_base_release_callback_handler(u8 cb_idx)
  728. {
  729. mpt_callbacks[cb_idx] = NULL;
  730. }
  731. /**
  732. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  733. * @cb_func: callback function
  734. *
  735. * Returns cb_func.
  736. */
  737. u8
  738. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  739. {
  740. u8 cb_idx;
  741. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  742. if (mpt_callbacks[cb_idx] == NULL)
  743. break;
  744. mpt_callbacks[cb_idx] = cb_func;
  745. return cb_idx;
  746. }
  747. /**
  748. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  749. *
  750. * Return nothing.
  751. */
  752. void
  753. mpt2sas_base_initialize_callback_handler(void)
  754. {
  755. u8 cb_idx;
  756. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  757. mpt2sas_base_release_callback_handler(cb_idx);
  758. }
  759. /**
  760. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  761. * @ioc: per adapter object
  762. * @paddr: virtual address for SGE
  763. *
  764. * Create a zero length scatter gather entry to insure the IOCs hardware has
  765. * something to use if the target device goes brain dead and tries
  766. * to send data even when none is asked for.
  767. *
  768. * Return nothing.
  769. */
  770. void
  771. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  772. {
  773. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  774. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  775. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  776. MPI2_SGE_FLAGS_SHIFT);
  777. ioc->base_add_sg_single(paddr, flags_length, -1);
  778. }
  779. /**
  780. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  781. * @paddr: virtual address for SGE
  782. * @flags_length: SGE flags and data transfer length
  783. * @dma_addr: Physical address
  784. *
  785. * Return nothing.
  786. */
  787. static void
  788. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  789. {
  790. Mpi2SGESimple32_t *sgel = paddr;
  791. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  792. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  793. sgel->FlagsLength = cpu_to_le32(flags_length);
  794. sgel->Address = cpu_to_le32(dma_addr);
  795. }
  796. /**
  797. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  798. * @paddr: virtual address for SGE
  799. * @flags_length: SGE flags and data transfer length
  800. * @dma_addr: Physical address
  801. *
  802. * Return nothing.
  803. */
  804. static void
  805. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  806. {
  807. Mpi2SGESimple64_t *sgel = paddr;
  808. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  809. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  810. sgel->FlagsLength = cpu_to_le32(flags_length);
  811. sgel->Address = cpu_to_le64(dma_addr);
  812. }
  813. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  814. /**
  815. * _base_config_dma_addressing - set dma addressing
  816. * @ioc: per adapter object
  817. * @pdev: PCI device struct
  818. *
  819. * Returns 0 for success, non-zero for failure.
  820. */
  821. static int
  822. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  823. {
  824. struct sysinfo s;
  825. char *desc = NULL;
  826. if (sizeof(dma_addr_t) > 4) {
  827. const uint64_t required_mask =
  828. dma_get_required_mask(&pdev->dev);
  829. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  830. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  831. DMA_BIT_MASK(64))) {
  832. ioc->base_add_sg_single = &_base_add_sg_single_64;
  833. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  834. desc = "64";
  835. goto out;
  836. }
  837. }
  838. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  839. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  840. ioc->base_add_sg_single = &_base_add_sg_single_32;
  841. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  842. desc = "32";
  843. } else
  844. return -ENODEV;
  845. out:
  846. si_meminfo(&s);
  847. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  848. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  849. return 0;
  850. }
  851. /**
  852. * _base_save_msix_table - backup msix vector table
  853. * @ioc: per adapter object
  854. *
  855. * This address an errata where diag reset clears out the table
  856. */
  857. static void
  858. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  859. {
  860. int i;
  861. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  862. return;
  863. for (i = 0; i < ioc->msix_vector_count; i++)
  864. ioc->msix_table_backup[i] = ioc->msix_table[i];
  865. }
  866. /**
  867. * _base_restore_msix_table - this restores the msix vector table
  868. * @ioc: per adapter object
  869. *
  870. */
  871. static void
  872. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  873. {
  874. int i;
  875. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  876. return;
  877. for (i = 0; i < ioc->msix_vector_count; i++)
  878. ioc->msix_table[i] = ioc->msix_table_backup[i];
  879. }
  880. /**
  881. * _base_check_enable_msix - checks MSIX capabable.
  882. * @ioc: per adapter object
  883. *
  884. * Check to see if card is capable of MSIX, and set number
  885. * of avaliable msix vectors
  886. */
  887. static int
  888. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  889. {
  890. int base;
  891. u16 message_control;
  892. u32 msix_table_offset;
  893. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  894. if (!base) {
  895. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  896. "supported\n", ioc->name));
  897. return -EINVAL;
  898. }
  899. /* get msix vector count */
  900. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  901. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  902. /* get msix table */
  903. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  904. msix_table_offset &= 0xFFFFFFF8;
  905. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  906. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  907. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  908. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  909. return 0;
  910. }
  911. /**
  912. * _base_disable_msix - disables msix
  913. * @ioc: per adapter object
  914. *
  915. */
  916. static void
  917. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  918. {
  919. if (ioc->msix_enable) {
  920. pci_disable_msix(ioc->pdev);
  921. kfree(ioc->msix_table_backup);
  922. ioc->msix_table_backup = NULL;
  923. ioc->msix_enable = 0;
  924. }
  925. }
  926. /**
  927. * _base_enable_msix - enables msix, failback to io_apic
  928. * @ioc: per adapter object
  929. *
  930. */
  931. static int
  932. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  933. {
  934. struct msix_entry entries;
  935. int r;
  936. u8 try_msix = 0;
  937. if (msix_disable == -1 || msix_disable == 0)
  938. try_msix = 1;
  939. if (!try_msix)
  940. goto try_ioapic;
  941. if (_base_check_enable_msix(ioc) != 0)
  942. goto try_ioapic;
  943. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  944. sizeof(u32), GFP_KERNEL);
  945. if (!ioc->msix_table_backup) {
  946. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  947. "msix_table_backup failed!!!\n", ioc->name));
  948. goto try_ioapic;
  949. }
  950. memset(&entries, 0, sizeof(struct msix_entry));
  951. r = pci_enable_msix(ioc->pdev, &entries, 1);
  952. if (r) {
  953. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  954. "failed (r=%d) !!!\n", ioc->name, r));
  955. goto try_ioapic;
  956. }
  957. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  958. ioc->name, ioc);
  959. if (r) {
  960. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  961. "interrupt %d !!!\n", ioc->name, entries.vector));
  962. pci_disable_msix(ioc->pdev);
  963. goto try_ioapic;
  964. }
  965. ioc->pci_irq = entries.vector;
  966. ioc->msix_enable = 1;
  967. return 0;
  968. /* failback to io_apic interrupt routing */
  969. try_ioapic:
  970. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  971. ioc->name, ioc);
  972. if (r) {
  973. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  974. ioc->name, ioc->pdev->irq);
  975. r = -EBUSY;
  976. goto out_fail;
  977. }
  978. ioc->pci_irq = ioc->pdev->irq;
  979. return 0;
  980. out_fail:
  981. return r;
  982. }
  983. /**
  984. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  985. * @ioc: per adapter object
  986. *
  987. * Returns 0 for success, non-zero for failure.
  988. */
  989. int
  990. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  991. {
  992. struct pci_dev *pdev = ioc->pdev;
  993. u32 memap_sz;
  994. u32 pio_sz;
  995. int i, r = 0;
  996. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  997. ioc->name, __func__));
  998. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  999. if (pci_enable_device_mem(pdev)) {
  1000. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1001. "failed\n", ioc->name);
  1002. return -ENODEV;
  1003. }
  1004. if (pci_request_selected_regions(pdev, ioc->bars,
  1005. MPT2SAS_DRIVER_NAME)) {
  1006. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1007. "failed\n", ioc->name);
  1008. r = -ENODEV;
  1009. goto out_fail;
  1010. }
  1011. pci_set_master(pdev);
  1012. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1013. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1014. ioc->name, pci_name(pdev));
  1015. r = -ENODEV;
  1016. goto out_fail;
  1017. }
  1018. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1019. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  1020. if (pio_sz)
  1021. continue;
  1022. ioc->pio_chip = pci_resource_start(pdev, i);
  1023. pio_sz = pci_resource_len(pdev, i);
  1024. } else {
  1025. if (memap_sz)
  1026. continue;
  1027. ioc->chip_phys = pci_resource_start(pdev, i);
  1028. memap_sz = pci_resource_len(pdev, i);
  1029. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1030. if (ioc->chip == NULL) {
  1031. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  1032. "memory!\n", ioc->name);
  1033. r = -EINVAL;
  1034. goto out_fail;
  1035. }
  1036. }
  1037. }
  1038. _base_mask_interrupts(ioc);
  1039. r = _base_enable_msix(ioc);
  1040. if (r)
  1041. goto out_fail;
  1042. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1043. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1044. "IO-APIC enabled"), ioc->pci_irq);
  1045. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  1046. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1047. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1048. ioc->name, ioc->pio_chip, pio_sz);
  1049. return 0;
  1050. out_fail:
  1051. if (ioc->chip_phys)
  1052. iounmap(ioc->chip);
  1053. ioc->chip_phys = 0;
  1054. ioc->pci_irq = -1;
  1055. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1056. pci_disable_device(pdev);
  1057. return r;
  1058. }
  1059. /**
  1060. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1061. * @ioc: per adapter object
  1062. * @smid: system request message index(smid zero is invalid)
  1063. *
  1064. * Returns phys pointer to message frame.
  1065. */
  1066. dma_addr_t
  1067. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1068. {
  1069. return ioc->request_dma + (smid * ioc->request_sz);
  1070. }
  1071. /**
  1072. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1073. * @ioc: per adapter object
  1074. * @smid: system request message index(smid zero is invalid)
  1075. *
  1076. * Returns virt pointer to message frame.
  1077. */
  1078. void *
  1079. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1080. {
  1081. return (void *)(ioc->request + (smid * ioc->request_sz));
  1082. }
  1083. /**
  1084. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1085. * @ioc: per adapter object
  1086. * @smid: system request message index
  1087. *
  1088. * Returns virt pointer to sense buffer.
  1089. */
  1090. void *
  1091. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1092. {
  1093. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1094. }
  1095. /**
  1096. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1097. * @ioc: per adapter object
  1098. * @smid: system request message index
  1099. *
  1100. * Returns phys pointer to sense buffer.
  1101. */
  1102. dma_addr_t
  1103. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1104. {
  1105. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1106. }
  1107. /**
  1108. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1109. * @ioc: per adapter object
  1110. * @phys_addr: lower 32 physical addr of the reply
  1111. *
  1112. * Converts 32bit lower physical addr into a virt address.
  1113. */
  1114. void *
  1115. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1116. {
  1117. if (!phys_addr)
  1118. return NULL;
  1119. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1120. }
  1121. /**
  1122. * mpt2sas_base_get_smid - obtain a free smid
  1123. * @ioc: per adapter object
  1124. * @cb_idx: callback index
  1125. *
  1126. * Returns smid (zero is invalid)
  1127. */
  1128. u16
  1129. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1130. {
  1131. unsigned long flags;
  1132. struct request_tracker *request;
  1133. u16 smid;
  1134. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1135. if (list_empty(&ioc->free_list)) {
  1136. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1137. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1138. ioc->name, __func__);
  1139. return 0;
  1140. }
  1141. request = list_entry(ioc->free_list.next,
  1142. struct request_tracker, tracker_list);
  1143. request->cb_idx = cb_idx;
  1144. smid = request->smid;
  1145. list_del(&request->tracker_list);
  1146. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1147. return smid;
  1148. }
  1149. /**
  1150. * mpt2sas_base_free_smid - put smid back on free_list
  1151. * @ioc: per adapter object
  1152. * @smid: system request message index
  1153. *
  1154. * Return nothing.
  1155. */
  1156. void
  1157. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1158. {
  1159. unsigned long flags;
  1160. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1161. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1162. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1163. &ioc->free_list);
  1164. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1165. /*
  1166. * See _wait_for_commands_to_complete() call with regards to this code.
  1167. */
  1168. if (ioc->shost_recovery && ioc->pending_io_count) {
  1169. if (ioc->pending_io_count == 1)
  1170. wake_up(&ioc->reset_wq);
  1171. ioc->pending_io_count--;
  1172. }
  1173. }
  1174. /**
  1175. * _base_writeq - 64 bit write to MMIO
  1176. * @ioc: per adapter object
  1177. * @b: data payload
  1178. * @addr: address in MMIO space
  1179. * @writeq_lock: spin lock
  1180. *
  1181. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1182. * care of 32 bit environment where its not quarenteed to send the entire word
  1183. * in one transfer.
  1184. */
  1185. #ifndef writeq
  1186. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1187. spinlock_t *writeq_lock)
  1188. {
  1189. unsigned long flags;
  1190. __u64 data_out = cpu_to_le64(b);
  1191. spin_lock_irqsave(writeq_lock, flags);
  1192. writel((u32)(data_out), addr);
  1193. writel((u32)(data_out >> 32), (addr + 4));
  1194. spin_unlock_irqrestore(writeq_lock, flags);
  1195. }
  1196. #else
  1197. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1198. spinlock_t *writeq_lock)
  1199. {
  1200. writeq(cpu_to_le64(b), addr);
  1201. }
  1202. #endif
  1203. /**
  1204. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1205. * @ioc: per adapter object
  1206. * @smid: system request message index
  1207. * @vf_id: virtual function id
  1208. * @handle: device handle
  1209. *
  1210. * Return nothing.
  1211. */
  1212. void
  1213. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1214. u16 handle)
  1215. {
  1216. Mpi2RequestDescriptorUnion_t descriptor;
  1217. u64 *request = (u64 *)&descriptor;
  1218. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1219. descriptor.SCSIIO.VF_ID = vf_id;
  1220. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1221. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1222. descriptor.SCSIIO.LMID = 0;
  1223. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1224. &ioc->scsi_lookup_lock);
  1225. }
  1226. /**
  1227. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1228. * @ioc: per adapter object
  1229. * @smid: system request message index
  1230. * @vf_id: virtual function id
  1231. *
  1232. * Return nothing.
  1233. */
  1234. void
  1235. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1236. u8 vf_id)
  1237. {
  1238. Mpi2RequestDescriptorUnion_t descriptor;
  1239. u64 *request = (u64 *)&descriptor;
  1240. descriptor.HighPriority.RequestFlags =
  1241. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1242. descriptor.HighPriority.VF_ID = vf_id;
  1243. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1244. descriptor.HighPriority.LMID = 0;
  1245. descriptor.HighPriority.Reserved1 = 0;
  1246. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1247. &ioc->scsi_lookup_lock);
  1248. }
  1249. /**
  1250. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1251. * @ioc: per adapter object
  1252. * @smid: system request message index
  1253. * @vf_id: virtual function id
  1254. *
  1255. * Return nothing.
  1256. */
  1257. void
  1258. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1259. {
  1260. Mpi2RequestDescriptorUnion_t descriptor;
  1261. u64 *request = (u64 *)&descriptor;
  1262. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1263. descriptor.Default.VF_ID = vf_id;
  1264. descriptor.Default.SMID = cpu_to_le16(smid);
  1265. descriptor.Default.LMID = 0;
  1266. descriptor.Default.DescriptorTypeDependent = 0;
  1267. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1268. &ioc->scsi_lookup_lock);
  1269. }
  1270. /**
  1271. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1272. * @ioc: per adapter object
  1273. * @smid: system request message index
  1274. * @vf_id: virtual function id
  1275. * @io_index: value used to track the IO
  1276. *
  1277. * Return nothing.
  1278. */
  1279. void
  1280. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1281. u8 vf_id, u16 io_index)
  1282. {
  1283. Mpi2RequestDescriptorUnion_t descriptor;
  1284. u64 *request = (u64 *)&descriptor;
  1285. descriptor.SCSITarget.RequestFlags =
  1286. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1287. descriptor.SCSITarget.VF_ID = vf_id;
  1288. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1289. descriptor.SCSITarget.LMID = 0;
  1290. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1291. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1292. &ioc->scsi_lookup_lock);
  1293. }
  1294. /**
  1295. * _base_display_dell_branding - Disply branding string
  1296. * @ioc: per adapter object
  1297. *
  1298. * Return nothing.
  1299. */
  1300. static void
  1301. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1302. {
  1303. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1304. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1305. return;
  1306. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1307. switch (ioc->pdev->subsystem_device) {
  1308. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1309. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1310. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1311. break;
  1312. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1313. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1314. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1315. break;
  1316. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1317. strncpy(dell_branding,
  1318. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1319. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1320. break;
  1321. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1322. strncpy(dell_branding,
  1323. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1324. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1325. break;
  1326. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1327. strncpy(dell_branding,
  1328. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1329. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1330. break;
  1331. case MPT2SAS_DELL_PERC_H200_SSDID:
  1332. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1333. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1334. break;
  1335. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1336. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1337. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1338. break;
  1339. default:
  1340. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1341. break;
  1342. }
  1343. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1344. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1345. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1346. ioc->pdev->subsystem_device);
  1347. }
  1348. /**
  1349. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1350. * @ioc: per adapter object
  1351. *
  1352. * Return nothing.
  1353. */
  1354. static void
  1355. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1356. {
  1357. int i = 0;
  1358. char desc[16];
  1359. u8 revision;
  1360. u32 iounit_pg1_flags;
  1361. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1362. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1363. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1364. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1365. ioc->name, desc,
  1366. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1367. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1368. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1369. ioc->facts.FWVersion.Word & 0x000000FF,
  1370. revision,
  1371. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1372. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1373. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1374. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1375. _base_display_dell_branding(ioc);
  1376. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1377. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1378. printk("Initiator");
  1379. i++;
  1380. }
  1381. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1382. printk("%sTarget", i ? "," : "");
  1383. i++;
  1384. }
  1385. i = 0;
  1386. printk("), ");
  1387. printk("Capabilities=(");
  1388. if (ioc->facts.IOCCapabilities &
  1389. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1390. printk("Raid");
  1391. i++;
  1392. }
  1393. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1394. printk("%sTLR", i ? "," : "");
  1395. i++;
  1396. }
  1397. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1398. printk("%sMulticast", i ? "," : "");
  1399. i++;
  1400. }
  1401. if (ioc->facts.IOCCapabilities &
  1402. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1403. printk("%sBIDI Target", i ? "," : "");
  1404. i++;
  1405. }
  1406. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1407. printk("%sEEDP", i ? "," : "");
  1408. i++;
  1409. }
  1410. if (ioc->facts.IOCCapabilities &
  1411. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1412. printk("%sSnapshot Buffer", i ? "," : "");
  1413. i++;
  1414. }
  1415. if (ioc->facts.IOCCapabilities &
  1416. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1417. printk("%sDiag Trace Buffer", i ? "," : "");
  1418. i++;
  1419. }
  1420. if (ioc->facts.IOCCapabilities &
  1421. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1422. printk("%sTask Set Full", i ? "," : "");
  1423. i++;
  1424. }
  1425. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1426. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1427. printk("%sNCQ", i ? "," : "");
  1428. i++;
  1429. }
  1430. printk(")\n");
  1431. }
  1432. /**
  1433. * _base_static_config_pages - static start of day config pages
  1434. * @ioc: per adapter object
  1435. *
  1436. * Return nothing.
  1437. */
  1438. static void
  1439. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1440. {
  1441. Mpi2ConfigReply_t mpi_reply;
  1442. u32 iounit_pg1_flags;
  1443. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1444. if (ioc->ir_firmware)
  1445. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1446. &ioc->manu_pg10);
  1447. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1448. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1449. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1450. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1451. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1452. _base_display_ioc_capabilities(ioc);
  1453. /*
  1454. * Enable task_set_full handling in iounit_pg1 when the
  1455. * facts capabilities indicate that its supported.
  1456. */
  1457. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1458. if ((ioc->facts.IOCCapabilities &
  1459. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1460. iounit_pg1_flags &=
  1461. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1462. else
  1463. iounit_pg1_flags |=
  1464. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1465. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1466. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1467. }
  1468. /**
  1469. * _base_release_memory_pools - release memory
  1470. * @ioc: per adapter object
  1471. *
  1472. * Free memory allocated from _base_allocate_memory_pools.
  1473. *
  1474. * Return nothing.
  1475. */
  1476. static void
  1477. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1478. {
  1479. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1480. __func__));
  1481. if (ioc->request) {
  1482. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1483. ioc->request, ioc->request_dma);
  1484. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1485. ": free\n", ioc->name, ioc->request));
  1486. ioc->request = NULL;
  1487. }
  1488. if (ioc->sense) {
  1489. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1490. if (ioc->sense_dma_pool)
  1491. pci_pool_destroy(ioc->sense_dma_pool);
  1492. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1493. ": free\n", ioc->name, ioc->sense));
  1494. ioc->sense = NULL;
  1495. }
  1496. if (ioc->reply) {
  1497. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1498. if (ioc->reply_dma_pool)
  1499. pci_pool_destroy(ioc->reply_dma_pool);
  1500. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1501. ": free\n", ioc->name, ioc->reply));
  1502. ioc->reply = NULL;
  1503. }
  1504. if (ioc->reply_free) {
  1505. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1506. ioc->reply_free_dma);
  1507. if (ioc->reply_free_dma_pool)
  1508. pci_pool_destroy(ioc->reply_free_dma_pool);
  1509. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1510. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1511. ioc->reply_free = NULL;
  1512. }
  1513. if (ioc->reply_post_free) {
  1514. pci_pool_free(ioc->reply_post_free_dma_pool,
  1515. ioc->reply_post_free, ioc->reply_post_free_dma);
  1516. if (ioc->reply_post_free_dma_pool)
  1517. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1518. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1519. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1520. ioc->reply_post_free));
  1521. ioc->reply_post_free = NULL;
  1522. }
  1523. if (ioc->config_page) {
  1524. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1525. "config_page(0x%p): free\n", ioc->name,
  1526. ioc->config_page));
  1527. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1528. ioc->config_page, ioc->config_page_dma);
  1529. }
  1530. kfree(ioc->scsi_lookup);
  1531. }
  1532. /**
  1533. * _base_allocate_memory_pools - allocate start of day memory pools
  1534. * @ioc: per adapter object
  1535. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1536. *
  1537. * Returns 0 success, anything else error
  1538. */
  1539. static int
  1540. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1541. {
  1542. Mpi2IOCFactsReply_t *facts;
  1543. u32 queue_size, queue_diff;
  1544. u16 max_sge_elements;
  1545. u16 num_of_reply_frames;
  1546. u16 chains_needed_per_io;
  1547. u32 sz, total_sz;
  1548. u16 i;
  1549. u32 retry_sz;
  1550. u16 max_request_credit;
  1551. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1552. __func__));
  1553. retry_sz = 0;
  1554. facts = &ioc->facts;
  1555. /* command line tunables for max sgl entries */
  1556. if (max_sgl_entries != -1) {
  1557. ioc->shost->sg_tablesize = (max_sgl_entries <
  1558. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1559. MPT2SAS_SG_DEPTH;
  1560. } else {
  1561. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1562. }
  1563. /* command line tunables for max controller queue depth */
  1564. if (max_queue_depth != -1) {
  1565. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1566. ? max_queue_depth : facts->RequestCredit;
  1567. } else {
  1568. max_request_credit = (facts->RequestCredit >
  1569. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1570. facts->RequestCredit;
  1571. }
  1572. ioc->request_depth = max_request_credit;
  1573. /* request frame size */
  1574. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1575. /* reply frame size */
  1576. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1577. retry_allocation:
  1578. total_sz = 0;
  1579. /* calculate number of sg elements left over in the 1st frame */
  1580. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1581. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1582. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1583. /* now do the same for a chain buffer */
  1584. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1585. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1586. ioc->chain_offset_value_for_main_message =
  1587. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1588. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1589. /*
  1590. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1591. */
  1592. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1593. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1594. + 1;
  1595. if (chains_needed_per_io > facts->MaxChainDepth) {
  1596. chains_needed_per_io = facts->MaxChainDepth;
  1597. ioc->shost->sg_tablesize = min_t(u16,
  1598. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1599. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1600. }
  1601. ioc->chains_needed_per_io = chains_needed_per_io;
  1602. /* reply free queue sizing - taking into account for events */
  1603. num_of_reply_frames = ioc->request_depth + 32;
  1604. /* number of replies frames can't be a multiple of 16 */
  1605. /* decrease number of reply frames by 1 */
  1606. if (!(num_of_reply_frames % 16))
  1607. num_of_reply_frames--;
  1608. /* calculate number of reply free queue entries
  1609. * (must be multiple of 16)
  1610. */
  1611. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1612. queue_size = num_of_reply_frames;
  1613. queue_size += 16 - (queue_size % 16);
  1614. ioc->reply_free_queue_depth = queue_size;
  1615. /* reply descriptor post queue sizing */
  1616. /* this size should be the number of request frames + number of reply
  1617. * frames
  1618. */
  1619. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1620. /* round up to 16 byte boundary */
  1621. if (queue_size % 16)
  1622. queue_size += 16 - (queue_size % 16);
  1623. /* check against IOC maximum reply post queue depth */
  1624. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1625. queue_diff = queue_size -
  1626. facts->MaxReplyDescriptorPostQueueDepth;
  1627. /* round queue_diff up to multiple of 16 */
  1628. if (queue_diff % 16)
  1629. queue_diff += 16 - (queue_diff % 16);
  1630. /* adjust request_depth, reply_free_queue_depth,
  1631. * and queue_size
  1632. */
  1633. ioc->request_depth -= queue_diff;
  1634. ioc->reply_free_queue_depth -= queue_diff;
  1635. queue_size -= queue_diff;
  1636. }
  1637. ioc->reply_post_queue_depth = queue_size;
  1638. /* max scsi host queue depth */
  1639. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1640. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1641. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1642. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1643. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1644. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1645. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1646. ioc->chains_needed_per_io));
  1647. /* contiguous pool for request and chains, 16 byte align, one extra "
  1648. * "frame for smid=0
  1649. */
  1650. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1651. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1652. ioc->request_dma_sz = sz;
  1653. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1654. if (!ioc->request) {
  1655. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1656. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1657. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1658. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1659. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1660. goto out;
  1661. retry_sz += 64;
  1662. ioc->request_depth = max_request_credit - retry_sz;
  1663. goto retry_allocation;
  1664. }
  1665. if (retry_sz)
  1666. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1667. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1668. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1669. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1670. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1671. ioc->request_sz);
  1672. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1673. ioc->request_sz);
  1674. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1675. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1676. ioc->request, ioc->request_depth, ioc->request_sz,
  1677. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1678. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1679. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1680. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1681. ioc->request_sz))/1024));
  1682. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1683. ioc->name, (unsigned long long) ioc->request_dma));
  1684. total_sz += sz;
  1685. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1686. sizeof(struct request_tracker), GFP_KERNEL);
  1687. if (!ioc->scsi_lookup) {
  1688. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1689. ioc->name);
  1690. goto out;
  1691. }
  1692. /* initialize some bits */
  1693. for (i = 0; i < ioc->request_depth; i++)
  1694. ioc->scsi_lookup[i].smid = i + 1;
  1695. /* sense buffers, 4 byte align */
  1696. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1697. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1698. 0);
  1699. if (!ioc->sense_dma_pool) {
  1700. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1701. ioc->name);
  1702. goto out;
  1703. }
  1704. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1705. &ioc->sense_dma);
  1706. if (!ioc->sense) {
  1707. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1708. ioc->name);
  1709. goto out;
  1710. }
  1711. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1712. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1713. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1714. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1715. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1716. ioc->name, (unsigned long long)ioc->sense_dma));
  1717. total_sz += sz;
  1718. /* reply pool, 4 byte align */
  1719. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1720. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1721. 0);
  1722. if (!ioc->reply_dma_pool) {
  1723. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1724. ioc->name);
  1725. goto out;
  1726. }
  1727. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1728. &ioc->reply_dma);
  1729. if (!ioc->reply) {
  1730. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1731. ioc->name);
  1732. goto out;
  1733. }
  1734. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1735. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1736. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1737. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1738. ioc->name, (unsigned long long)ioc->reply_dma));
  1739. total_sz += sz;
  1740. /* reply free queue, 16 byte align */
  1741. sz = ioc->reply_free_queue_depth * 4;
  1742. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1743. ioc->pdev, sz, 16, 0);
  1744. if (!ioc->reply_free_dma_pool) {
  1745. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1746. "failed\n", ioc->name);
  1747. goto out;
  1748. }
  1749. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1750. &ioc->reply_free_dma);
  1751. if (!ioc->reply_free) {
  1752. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1753. "failed\n", ioc->name);
  1754. goto out;
  1755. }
  1756. memset(ioc->reply_free, 0, sz);
  1757. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1758. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1759. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1760. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1761. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1762. total_sz += sz;
  1763. /* reply post queue, 16 byte align */
  1764. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1765. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1766. ioc->pdev, sz, 16, 0);
  1767. if (!ioc->reply_post_free_dma_pool) {
  1768. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1769. "failed\n", ioc->name);
  1770. goto out;
  1771. }
  1772. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1773. GFP_KERNEL, &ioc->reply_post_free_dma);
  1774. if (!ioc->reply_post_free) {
  1775. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1776. "failed\n", ioc->name);
  1777. goto out;
  1778. }
  1779. memset(ioc->reply_post_free, 0, sz);
  1780. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1781. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1782. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1783. sz/1024));
  1784. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1785. "(0x%llx)\n", ioc->name, (unsigned long long)
  1786. ioc->reply_post_free_dma));
  1787. total_sz += sz;
  1788. ioc->config_page_sz = 512;
  1789. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1790. ioc->config_page_sz, &ioc->config_page_dma);
  1791. if (!ioc->config_page) {
  1792. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1793. "failed\n", ioc->name);
  1794. goto out;
  1795. }
  1796. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1797. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1798. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1799. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1800. total_sz += ioc->config_page_sz;
  1801. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1802. ioc->name, total_sz/1024);
  1803. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1804. "Max Controller Queue Depth(%d)\n",
  1805. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1806. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1807. ioc->name, ioc->shost->sg_tablesize);
  1808. return 0;
  1809. out:
  1810. _base_release_memory_pools(ioc);
  1811. return -ENOMEM;
  1812. }
  1813. /**
  1814. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1815. * @ioc: Pointer to MPT_ADAPTER structure
  1816. * @cooked: Request raw or cooked IOC state
  1817. *
  1818. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1819. * Doorbell bits in MPI_IOC_STATE_MASK.
  1820. */
  1821. u32
  1822. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1823. {
  1824. u32 s, sc;
  1825. s = readl(&ioc->chip->Doorbell);
  1826. sc = s & MPI2_IOC_STATE_MASK;
  1827. return cooked ? sc : s;
  1828. }
  1829. /**
  1830. * _base_wait_on_iocstate - waiting on a particular ioc state
  1831. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1832. * @timeout: timeout in second
  1833. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1834. *
  1835. * Returns 0 for success, non-zero for failure.
  1836. */
  1837. static int
  1838. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1839. int sleep_flag)
  1840. {
  1841. u32 count, cntdn;
  1842. u32 current_state;
  1843. count = 0;
  1844. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1845. do {
  1846. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1847. if (current_state == ioc_state)
  1848. return 0;
  1849. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1850. break;
  1851. if (sleep_flag == CAN_SLEEP)
  1852. msleep(1);
  1853. else
  1854. udelay(500);
  1855. count++;
  1856. } while (--cntdn);
  1857. return current_state;
  1858. }
  1859. /**
  1860. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1861. * a write to the doorbell)
  1862. * @ioc: per adapter object
  1863. * @timeout: timeout in second
  1864. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1865. *
  1866. * Returns 0 for success, non-zero for failure.
  1867. *
  1868. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1869. */
  1870. static int
  1871. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1872. int sleep_flag)
  1873. {
  1874. u32 cntdn, count;
  1875. u32 int_status;
  1876. count = 0;
  1877. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1878. do {
  1879. int_status = readl(&ioc->chip->HostInterruptStatus);
  1880. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1881. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1882. "successfull count(%d), timeout(%d)\n", ioc->name,
  1883. __func__, count, timeout));
  1884. return 0;
  1885. }
  1886. if (sleep_flag == CAN_SLEEP)
  1887. msleep(1);
  1888. else
  1889. udelay(500);
  1890. count++;
  1891. } while (--cntdn);
  1892. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1893. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1894. return -EFAULT;
  1895. }
  1896. /**
  1897. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1898. * @ioc: per adapter object
  1899. * @timeout: timeout in second
  1900. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1901. *
  1902. * Returns 0 for success, non-zero for failure.
  1903. *
  1904. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1905. * doorbell.
  1906. */
  1907. static int
  1908. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1909. int sleep_flag)
  1910. {
  1911. u32 cntdn, count;
  1912. u32 int_status;
  1913. u32 doorbell;
  1914. count = 0;
  1915. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1916. do {
  1917. int_status = readl(&ioc->chip->HostInterruptStatus);
  1918. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1919. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1920. "successfull count(%d), timeout(%d)\n", ioc->name,
  1921. __func__, count, timeout));
  1922. return 0;
  1923. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1924. doorbell = readl(&ioc->chip->Doorbell);
  1925. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1926. MPI2_IOC_STATE_FAULT) {
  1927. mpt2sas_base_fault_info(ioc , doorbell);
  1928. return -EFAULT;
  1929. }
  1930. } else if (int_status == 0xFFFFFFFF)
  1931. goto out;
  1932. if (sleep_flag == CAN_SLEEP)
  1933. msleep(1);
  1934. else
  1935. udelay(500);
  1936. count++;
  1937. } while (--cntdn);
  1938. out:
  1939. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1940. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1941. return -EFAULT;
  1942. }
  1943. /**
  1944. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1945. * @ioc: per adapter object
  1946. * @timeout: timeout in second
  1947. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1948. *
  1949. * Returns 0 for success, non-zero for failure.
  1950. *
  1951. */
  1952. static int
  1953. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1954. int sleep_flag)
  1955. {
  1956. u32 cntdn, count;
  1957. u32 doorbell_reg;
  1958. count = 0;
  1959. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1960. do {
  1961. doorbell_reg = readl(&ioc->chip->Doorbell);
  1962. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1963. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1964. "successfull count(%d), timeout(%d)\n", ioc->name,
  1965. __func__, count, timeout));
  1966. return 0;
  1967. }
  1968. if (sleep_flag == CAN_SLEEP)
  1969. msleep(1);
  1970. else
  1971. udelay(500);
  1972. count++;
  1973. } while (--cntdn);
  1974. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1975. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1976. return -EFAULT;
  1977. }
  1978. /**
  1979. * _base_send_ioc_reset - send doorbell reset
  1980. * @ioc: per adapter object
  1981. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1982. * @timeout: timeout in second
  1983. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1984. *
  1985. * Returns 0 for success, non-zero for failure.
  1986. */
  1987. static int
  1988. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1989. int sleep_flag)
  1990. {
  1991. u32 ioc_state;
  1992. int r = 0;
  1993. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  1994. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  1995. ioc->name, __func__);
  1996. return -EFAULT;
  1997. }
  1998. if (!(ioc->facts.IOCCapabilities &
  1999. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2000. return -EFAULT;
  2001. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2002. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2003. &ioc->chip->Doorbell);
  2004. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2005. r = -EFAULT;
  2006. goto out;
  2007. }
  2008. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2009. timeout, sleep_flag);
  2010. if (ioc_state) {
  2011. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2012. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2013. r = -EFAULT;
  2014. goto out;
  2015. }
  2016. out:
  2017. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2018. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2019. return r;
  2020. }
  2021. /**
  2022. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2023. * @ioc: per adapter object
  2024. * @request_bytes: request length
  2025. * @request: pointer having request payload
  2026. * @reply_bytes: reply length
  2027. * @reply: pointer to reply payload
  2028. * @timeout: timeout in second
  2029. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2030. *
  2031. * Returns 0 for success, non-zero for failure.
  2032. */
  2033. static int
  2034. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2035. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2036. {
  2037. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2038. int i;
  2039. u8 failed;
  2040. u16 dummy;
  2041. u32 *mfp;
  2042. /* make sure doorbell is not in use */
  2043. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2044. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2045. " (line=%d)\n", ioc->name, __LINE__);
  2046. return -EFAULT;
  2047. }
  2048. /* clear pending doorbell interrupts from previous state changes */
  2049. if (readl(&ioc->chip->HostInterruptStatus) &
  2050. MPI2_HIS_IOC2SYS_DB_STATUS)
  2051. writel(0, &ioc->chip->HostInterruptStatus);
  2052. /* send message to ioc */
  2053. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2054. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2055. &ioc->chip->Doorbell);
  2056. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2057. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2058. "int failed (line=%d)\n", ioc->name, __LINE__);
  2059. return -EFAULT;
  2060. }
  2061. writel(0, &ioc->chip->HostInterruptStatus);
  2062. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2063. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2064. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2065. return -EFAULT;
  2066. }
  2067. /* send message 32-bits at a time */
  2068. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2069. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2070. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2071. failed = 1;
  2072. }
  2073. if (failed) {
  2074. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2075. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2076. return -EFAULT;
  2077. }
  2078. /* now wait for the reply */
  2079. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2080. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2081. "int failed (line=%d)\n", ioc->name, __LINE__);
  2082. return -EFAULT;
  2083. }
  2084. /* read the first two 16-bits, it gives the total length of the reply */
  2085. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2086. & MPI2_DOORBELL_DATA_MASK);
  2087. writel(0, &ioc->chip->HostInterruptStatus);
  2088. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2089. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2090. "int failed (line=%d)\n", ioc->name, __LINE__);
  2091. return -EFAULT;
  2092. }
  2093. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2094. & MPI2_DOORBELL_DATA_MASK);
  2095. writel(0, &ioc->chip->HostInterruptStatus);
  2096. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2097. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2098. printk(MPT2SAS_ERR_FMT "doorbell "
  2099. "handshake int failed (line=%d)\n", ioc->name,
  2100. __LINE__);
  2101. return -EFAULT;
  2102. }
  2103. if (i >= reply_bytes/2) /* overflow case */
  2104. dummy = readl(&ioc->chip->Doorbell);
  2105. else
  2106. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2107. & MPI2_DOORBELL_DATA_MASK);
  2108. writel(0, &ioc->chip->HostInterruptStatus);
  2109. }
  2110. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2111. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2112. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2113. " (line=%d)\n", ioc->name, __LINE__));
  2114. }
  2115. writel(0, &ioc->chip->HostInterruptStatus);
  2116. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2117. mfp = (u32 *)reply;
  2118. printk(KERN_DEBUG "\toffset:data\n");
  2119. for (i = 0; i < reply_bytes/4; i++)
  2120. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2121. le32_to_cpu(mfp[i]));
  2122. }
  2123. return 0;
  2124. }
  2125. /**
  2126. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2127. * @ioc: per adapter object
  2128. * @mpi_reply: the reply payload from FW
  2129. * @mpi_request: the request payload sent to FW
  2130. *
  2131. * The SAS IO Unit Control Request message allows the host to perform low-level
  2132. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2133. * to obtain the IOC assigned device handles for a device if it has other
  2134. * identifying information about the device, in addition allows the host to
  2135. * remove IOC resources associated with the device.
  2136. *
  2137. * Returns 0 for success, non-zero for failure.
  2138. */
  2139. int
  2140. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2141. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2142. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2143. {
  2144. u16 smid;
  2145. u32 ioc_state;
  2146. unsigned long timeleft;
  2147. u8 issue_reset;
  2148. int rc;
  2149. void *request;
  2150. u16 wait_state_count;
  2151. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2152. __func__));
  2153. mutex_lock(&ioc->base_cmds.mutex);
  2154. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2155. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2156. ioc->name, __func__);
  2157. rc = -EAGAIN;
  2158. goto out;
  2159. }
  2160. wait_state_count = 0;
  2161. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2162. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2163. if (wait_state_count++ == 10) {
  2164. printk(MPT2SAS_ERR_FMT
  2165. "%s: failed due to ioc not operational\n",
  2166. ioc->name, __func__);
  2167. rc = -EFAULT;
  2168. goto out;
  2169. }
  2170. ssleep(1);
  2171. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2172. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2173. "operational state(count=%d)\n", ioc->name,
  2174. __func__, wait_state_count);
  2175. }
  2176. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2177. if (!smid) {
  2178. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2179. ioc->name, __func__);
  2180. rc = -EAGAIN;
  2181. goto out;
  2182. }
  2183. rc = 0;
  2184. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2185. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2186. ioc->base_cmds.smid = smid;
  2187. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2188. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2189. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2190. ioc->ioc_link_reset_in_progress = 1;
  2191. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2192. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2193. msecs_to_jiffies(10000));
  2194. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2195. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2196. ioc->ioc_link_reset_in_progress)
  2197. ioc->ioc_link_reset_in_progress = 0;
  2198. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2199. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2200. ioc->name, __func__);
  2201. _debug_dump_mf(mpi_request,
  2202. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2203. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2204. issue_reset = 1;
  2205. goto issue_host_reset;
  2206. }
  2207. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2208. memcpy(mpi_reply, ioc->base_cmds.reply,
  2209. sizeof(Mpi2SasIoUnitControlReply_t));
  2210. else
  2211. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2212. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2213. goto out;
  2214. issue_host_reset:
  2215. if (issue_reset)
  2216. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2217. FORCE_BIG_HAMMER);
  2218. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2219. rc = -EFAULT;
  2220. out:
  2221. mutex_unlock(&ioc->base_cmds.mutex);
  2222. return rc;
  2223. }
  2224. /**
  2225. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2226. * @ioc: per adapter object
  2227. * @mpi_reply: the reply payload from FW
  2228. * @mpi_request: the request payload sent to FW
  2229. *
  2230. * The SCSI Enclosure Processor request message causes the IOC to
  2231. * communicate with SES devices to control LED status signals.
  2232. *
  2233. * Returns 0 for success, non-zero for failure.
  2234. */
  2235. int
  2236. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2237. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2238. {
  2239. u16 smid;
  2240. u32 ioc_state;
  2241. unsigned long timeleft;
  2242. u8 issue_reset;
  2243. int rc;
  2244. void *request;
  2245. u16 wait_state_count;
  2246. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2247. __func__));
  2248. mutex_lock(&ioc->base_cmds.mutex);
  2249. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2250. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2251. ioc->name, __func__);
  2252. rc = -EAGAIN;
  2253. goto out;
  2254. }
  2255. wait_state_count = 0;
  2256. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2257. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2258. if (wait_state_count++ == 10) {
  2259. printk(MPT2SAS_ERR_FMT
  2260. "%s: failed due to ioc not operational\n",
  2261. ioc->name, __func__);
  2262. rc = -EFAULT;
  2263. goto out;
  2264. }
  2265. ssleep(1);
  2266. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2267. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2268. "operational state(count=%d)\n", ioc->name,
  2269. __func__, wait_state_count);
  2270. }
  2271. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2272. if (!smid) {
  2273. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2274. ioc->name, __func__);
  2275. rc = -EAGAIN;
  2276. goto out;
  2277. }
  2278. rc = 0;
  2279. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2280. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2281. ioc->base_cmds.smid = smid;
  2282. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2283. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2284. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2285. msecs_to_jiffies(10000));
  2286. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2287. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2288. ioc->name, __func__);
  2289. _debug_dump_mf(mpi_request,
  2290. sizeof(Mpi2SepRequest_t)/4);
  2291. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2292. issue_reset = 1;
  2293. goto issue_host_reset;
  2294. }
  2295. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2296. memcpy(mpi_reply, ioc->base_cmds.reply,
  2297. sizeof(Mpi2SepReply_t));
  2298. else
  2299. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2300. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2301. goto out;
  2302. issue_host_reset:
  2303. if (issue_reset)
  2304. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2305. FORCE_BIG_HAMMER);
  2306. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2307. rc = -EFAULT;
  2308. out:
  2309. mutex_unlock(&ioc->base_cmds.mutex);
  2310. return rc;
  2311. }
  2312. /**
  2313. * _base_get_port_facts - obtain port facts reply and save in ioc
  2314. * @ioc: per adapter object
  2315. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2316. *
  2317. * Returns 0 for success, non-zero for failure.
  2318. */
  2319. static int
  2320. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2321. {
  2322. Mpi2PortFactsRequest_t mpi_request;
  2323. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2324. int mpi_reply_sz, mpi_request_sz, r;
  2325. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2326. __func__));
  2327. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2328. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2329. memset(&mpi_request, 0, mpi_request_sz);
  2330. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2331. mpi_request.PortNumber = port;
  2332. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2333. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2334. if (r != 0) {
  2335. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2336. ioc->name, __func__, r);
  2337. return r;
  2338. }
  2339. pfacts = &ioc->pfacts[port];
  2340. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2341. pfacts->PortNumber = mpi_reply.PortNumber;
  2342. pfacts->VP_ID = mpi_reply.VP_ID;
  2343. pfacts->VF_ID = mpi_reply.VF_ID;
  2344. pfacts->MaxPostedCmdBuffers =
  2345. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2346. return 0;
  2347. }
  2348. /**
  2349. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2350. * @ioc: per adapter object
  2351. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2352. *
  2353. * Returns 0 for success, non-zero for failure.
  2354. */
  2355. static int
  2356. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2357. {
  2358. Mpi2IOCFactsRequest_t mpi_request;
  2359. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2360. int mpi_reply_sz, mpi_request_sz, r;
  2361. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2362. __func__));
  2363. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2364. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2365. memset(&mpi_request, 0, mpi_request_sz);
  2366. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2367. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2368. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2369. if (r != 0) {
  2370. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2371. ioc->name, __func__, r);
  2372. return r;
  2373. }
  2374. facts = &ioc->facts;
  2375. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2376. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2377. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2378. facts->VP_ID = mpi_reply.VP_ID;
  2379. facts->VF_ID = mpi_reply.VF_ID;
  2380. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2381. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2382. facts->WhoInit = mpi_reply.WhoInit;
  2383. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2384. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2385. facts->MaxReplyDescriptorPostQueueDepth =
  2386. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2387. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2388. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2389. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2390. ioc->ir_firmware = 1;
  2391. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2392. facts->IOCRequestFrameSize =
  2393. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2394. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2395. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2396. ioc->shost->max_id = -1;
  2397. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2398. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2399. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2400. facts->HighPriorityCredit =
  2401. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2402. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2403. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2404. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2405. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2406. facts->MaxChainDepth));
  2407. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2408. "reply frame size(%d)\n", ioc->name,
  2409. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2410. return 0;
  2411. }
  2412. /**
  2413. * _base_send_ioc_init - send ioc_init to firmware
  2414. * @ioc: per adapter object
  2415. * @VF_ID: virtual function id
  2416. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2417. *
  2418. * Returns 0 for success, non-zero for failure.
  2419. */
  2420. static int
  2421. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2422. {
  2423. Mpi2IOCInitRequest_t mpi_request;
  2424. Mpi2IOCInitReply_t mpi_reply;
  2425. int r;
  2426. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2427. __func__));
  2428. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2429. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2430. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2431. mpi_request.VF_ID = VF_ID;
  2432. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2433. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2434. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2435. * removed and made reserved. For those with older firmware will need
  2436. * this fix. It was decided that the Reply and Request frame sizes are
  2437. * the same.
  2438. */
  2439. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2440. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2441. /* mpi_request.SystemReplyFrameSize =
  2442. * cpu_to_le16(ioc->reply_sz);
  2443. */
  2444. }
  2445. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2446. mpi_request.ReplyDescriptorPostQueueDepth =
  2447. cpu_to_le16(ioc->reply_post_queue_depth);
  2448. mpi_request.ReplyFreeQueueDepth =
  2449. cpu_to_le16(ioc->reply_free_queue_depth);
  2450. #if BITS_PER_LONG > 32
  2451. mpi_request.SenseBufferAddressHigh =
  2452. cpu_to_le32(ioc->sense_dma >> 32);
  2453. mpi_request.SystemReplyAddressHigh =
  2454. cpu_to_le32(ioc->reply_dma >> 32);
  2455. mpi_request.SystemRequestFrameBaseAddress =
  2456. cpu_to_le64(ioc->request_dma);
  2457. mpi_request.ReplyFreeQueueAddress =
  2458. cpu_to_le64(ioc->reply_free_dma);
  2459. mpi_request.ReplyDescriptorPostQueueAddress =
  2460. cpu_to_le64(ioc->reply_post_free_dma);
  2461. #else
  2462. mpi_request.SystemRequestFrameBaseAddress =
  2463. cpu_to_le32(ioc->request_dma);
  2464. mpi_request.ReplyFreeQueueAddress =
  2465. cpu_to_le32(ioc->reply_free_dma);
  2466. mpi_request.ReplyDescriptorPostQueueAddress =
  2467. cpu_to_le32(ioc->reply_post_free_dma);
  2468. #endif
  2469. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2470. u32 *mfp;
  2471. int i;
  2472. mfp = (u32 *)&mpi_request;
  2473. printk(KERN_DEBUG "\toffset:data\n");
  2474. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2475. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2476. le32_to_cpu(mfp[i]));
  2477. }
  2478. r = _base_handshake_req_reply_wait(ioc,
  2479. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2480. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2481. sleep_flag);
  2482. if (r != 0) {
  2483. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2484. ioc->name, __func__, r);
  2485. return r;
  2486. }
  2487. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2488. mpi_reply.IOCLogInfo) {
  2489. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2490. r = -EIO;
  2491. }
  2492. return 0;
  2493. }
  2494. /**
  2495. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2496. * @ioc: per adapter object
  2497. * @VF_ID: virtual function id
  2498. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2499. *
  2500. * Returns 0 for success, non-zero for failure.
  2501. */
  2502. static int
  2503. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2504. {
  2505. Mpi2PortEnableRequest_t *mpi_request;
  2506. u32 ioc_state;
  2507. unsigned long timeleft;
  2508. int r = 0;
  2509. u16 smid;
  2510. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2511. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2512. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2513. ioc->name, __func__);
  2514. return -EAGAIN;
  2515. }
  2516. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2517. if (!smid) {
  2518. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2519. ioc->name, __func__);
  2520. return -EAGAIN;
  2521. }
  2522. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2523. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2524. ioc->base_cmds.smid = smid;
  2525. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2526. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2527. mpi_request->VF_ID = VF_ID;
  2528. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2529. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2530. 300*HZ);
  2531. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2532. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2533. ioc->name, __func__);
  2534. _debug_dump_mf(mpi_request,
  2535. sizeof(Mpi2PortEnableRequest_t)/4);
  2536. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2537. r = -EFAULT;
  2538. else
  2539. r = -ETIME;
  2540. goto out;
  2541. } else
  2542. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2543. ioc->name, __func__));
  2544. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2545. 60, sleep_flag);
  2546. if (ioc_state) {
  2547. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2548. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2549. r = -EFAULT;
  2550. }
  2551. out:
  2552. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2553. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2554. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2555. return r;
  2556. }
  2557. /**
  2558. * _base_unmask_events - turn on notification for this event
  2559. * @ioc: per adapter object
  2560. * @event: firmware event
  2561. *
  2562. * The mask is stored in ioc->event_masks.
  2563. */
  2564. static void
  2565. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2566. {
  2567. u32 desired_event;
  2568. if (event >= 128)
  2569. return;
  2570. desired_event = (1 << (event % 32));
  2571. if (event < 32)
  2572. ioc->event_masks[0] &= ~desired_event;
  2573. else if (event < 64)
  2574. ioc->event_masks[1] &= ~desired_event;
  2575. else if (event < 96)
  2576. ioc->event_masks[2] &= ~desired_event;
  2577. else if (event < 128)
  2578. ioc->event_masks[3] &= ~desired_event;
  2579. }
  2580. /**
  2581. * _base_event_notification - send event notification
  2582. * @ioc: per adapter object
  2583. * @VF_ID: virtual function id
  2584. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2585. *
  2586. * Returns 0 for success, non-zero for failure.
  2587. */
  2588. static int
  2589. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2590. {
  2591. Mpi2EventNotificationRequest_t *mpi_request;
  2592. unsigned long timeleft;
  2593. u16 smid;
  2594. int r = 0;
  2595. int i;
  2596. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2597. __func__));
  2598. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2599. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2600. ioc->name, __func__);
  2601. return -EAGAIN;
  2602. }
  2603. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2604. if (!smid) {
  2605. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2606. ioc->name, __func__);
  2607. return -EAGAIN;
  2608. }
  2609. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2610. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2611. ioc->base_cmds.smid = smid;
  2612. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2613. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2614. mpi_request->VF_ID = VF_ID;
  2615. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2616. mpi_request->EventMasks[i] =
  2617. le32_to_cpu(ioc->event_masks[i]);
  2618. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2619. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2620. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2621. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2622. ioc->name, __func__);
  2623. _debug_dump_mf(mpi_request,
  2624. sizeof(Mpi2EventNotificationRequest_t)/4);
  2625. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2626. r = -EFAULT;
  2627. else
  2628. r = -ETIME;
  2629. } else
  2630. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2631. ioc->name, __func__));
  2632. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2633. return r;
  2634. }
  2635. /**
  2636. * mpt2sas_base_validate_event_type - validating event types
  2637. * @ioc: per adapter object
  2638. * @event: firmware event
  2639. *
  2640. * This will turn on firmware event notification when application
  2641. * ask for that event. We don't mask events that are already enabled.
  2642. */
  2643. void
  2644. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2645. {
  2646. int i, j;
  2647. u32 event_mask, desired_event;
  2648. u8 send_update_to_fw;
  2649. for (i = 0, send_update_to_fw = 0; i <
  2650. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2651. event_mask = ~event_type[i];
  2652. desired_event = 1;
  2653. for (j = 0; j < 32; j++) {
  2654. if (!(event_mask & desired_event) &&
  2655. (ioc->event_masks[i] & desired_event)) {
  2656. ioc->event_masks[i] &= ~desired_event;
  2657. send_update_to_fw = 1;
  2658. }
  2659. desired_event = (desired_event << 1);
  2660. }
  2661. }
  2662. if (!send_update_to_fw)
  2663. return;
  2664. mutex_lock(&ioc->base_cmds.mutex);
  2665. _base_event_notification(ioc, 0, CAN_SLEEP);
  2666. mutex_unlock(&ioc->base_cmds.mutex);
  2667. }
  2668. /**
  2669. * _base_diag_reset - the "big hammer" start of day reset
  2670. * @ioc: per adapter object
  2671. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2672. *
  2673. * Returns 0 for success, non-zero for failure.
  2674. */
  2675. static int
  2676. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2677. {
  2678. u32 host_diagnostic;
  2679. u32 ioc_state;
  2680. u32 count;
  2681. u32 hcb_size;
  2682. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2683. _base_save_msix_table(ioc);
  2684. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2685. ioc->name));
  2686. writel(0, &ioc->chip->HostInterruptStatus);
  2687. count = 0;
  2688. do {
  2689. /* Write magic sequence to WriteSequence register
  2690. * Loop until in diagnostic mode
  2691. */
  2692. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2693. "sequence\n", ioc->name));
  2694. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2695. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2696. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2697. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2698. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2699. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2700. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2701. /* wait 100 msec */
  2702. if (sleep_flag == CAN_SLEEP)
  2703. msleep(100);
  2704. else
  2705. mdelay(100);
  2706. if (count++ > 20)
  2707. goto out;
  2708. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2709. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2710. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2711. ioc->name, count, host_diagnostic));
  2712. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2713. hcb_size = readl(&ioc->chip->HCBSize);
  2714. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2715. ioc->name));
  2716. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2717. &ioc->chip->HostDiagnostic);
  2718. /* don't access any registers for 50 milliseconds */
  2719. msleep(50);
  2720. /* 300 second max wait */
  2721. for (count = 0; count < 3000000 ; count++) {
  2722. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2723. if (host_diagnostic == 0xFFFFFFFF)
  2724. goto out;
  2725. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2726. break;
  2727. /* wait 100 msec */
  2728. if (sleep_flag == CAN_SLEEP)
  2729. msleep(1);
  2730. else
  2731. mdelay(1);
  2732. }
  2733. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2734. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2735. "assuming the HCB Address points to good F/W\n",
  2736. ioc->name));
  2737. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2738. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2739. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2740. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2741. "re-enable the HCDW\n", ioc->name));
  2742. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2743. &ioc->chip->HCBSize);
  2744. }
  2745. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2746. ioc->name));
  2747. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2748. &ioc->chip->HostDiagnostic);
  2749. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2750. "diagnostic register\n", ioc->name));
  2751. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2752. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2753. "READY state\n", ioc->name));
  2754. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2755. sleep_flag);
  2756. if (ioc_state) {
  2757. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2758. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2759. goto out;
  2760. }
  2761. _base_restore_msix_table(ioc);
  2762. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2763. return 0;
  2764. out:
  2765. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2766. return -EFAULT;
  2767. }
  2768. /**
  2769. * _base_make_ioc_ready - put controller in READY state
  2770. * @ioc: per adapter object
  2771. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2772. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2773. *
  2774. * Returns 0 for success, non-zero for failure.
  2775. */
  2776. static int
  2777. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2778. enum reset_type type)
  2779. {
  2780. u32 ioc_state;
  2781. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2782. __func__));
  2783. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2784. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2785. ioc->name, __func__, ioc_state));
  2786. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2787. return 0;
  2788. if (ioc_state & MPI2_DOORBELL_USED) {
  2789. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2790. "active!\n", ioc->name));
  2791. goto issue_diag_reset;
  2792. }
  2793. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2794. mpt2sas_base_fault_info(ioc, ioc_state &
  2795. MPI2_DOORBELL_DATA_MASK);
  2796. goto issue_diag_reset;
  2797. }
  2798. if (type == FORCE_BIG_HAMMER)
  2799. goto issue_diag_reset;
  2800. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2801. if (!(_base_send_ioc_reset(ioc,
  2802. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2803. return 0;
  2804. issue_diag_reset:
  2805. return _base_diag_reset(ioc, CAN_SLEEP);
  2806. }
  2807. /**
  2808. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2809. * @ioc: per adapter object
  2810. * @VF_ID: virtual function id
  2811. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2812. *
  2813. * Returns 0 for success, non-zero for failure.
  2814. */
  2815. static int
  2816. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2817. int sleep_flag)
  2818. {
  2819. int r, i;
  2820. unsigned long flags;
  2821. u32 reply_address;
  2822. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2823. __func__));
  2824. /* initialize the scsi lookup free list */
  2825. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2826. INIT_LIST_HEAD(&ioc->free_list);
  2827. for (i = 0; i < ioc->request_depth; i++) {
  2828. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2829. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2830. &ioc->free_list);
  2831. }
  2832. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2833. /* initialize Reply Free Queue */
  2834. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2835. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2836. ioc->reply_sz)
  2837. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2838. /* initialize Reply Post Free Queue */
  2839. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2840. ioc->reply_post_free[i].Words = ULLONG_MAX;
  2841. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2842. if (r)
  2843. return r;
  2844. /* initialize the index's */
  2845. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2846. ioc->reply_post_host_index = 0;
  2847. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2848. writel(0, &ioc->chip->ReplyPostHostIndex);
  2849. _base_unmask_interrupts(ioc);
  2850. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2851. if (r)
  2852. return r;
  2853. if (sleep_flag == CAN_SLEEP)
  2854. _base_static_config_pages(ioc);
  2855. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2856. if (r)
  2857. return r;
  2858. return r;
  2859. }
  2860. /**
  2861. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2862. * @ioc: per adapter object
  2863. *
  2864. * Return nothing.
  2865. */
  2866. void
  2867. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2868. {
  2869. struct pci_dev *pdev = ioc->pdev;
  2870. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2871. __func__));
  2872. _base_mask_interrupts(ioc);
  2873. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2874. if (ioc->pci_irq) {
  2875. synchronize_irq(pdev->irq);
  2876. free_irq(ioc->pci_irq, ioc);
  2877. }
  2878. _base_disable_msix(ioc);
  2879. if (ioc->chip_phys)
  2880. iounmap(ioc->chip);
  2881. ioc->pci_irq = -1;
  2882. ioc->chip_phys = 0;
  2883. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2884. pci_disable_device(pdev);
  2885. return;
  2886. }
  2887. /**
  2888. * mpt2sas_base_attach - attach controller instance
  2889. * @ioc: per adapter object
  2890. *
  2891. * Returns 0 for success, non-zero for failure.
  2892. */
  2893. int
  2894. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2895. {
  2896. int r, i;
  2897. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2898. __func__));
  2899. r = mpt2sas_base_map_resources(ioc);
  2900. if (r)
  2901. return r;
  2902. pci_set_drvdata(ioc->pdev, ioc->shost);
  2903. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2904. if (r)
  2905. goto out_free_resources;
  2906. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2907. if (r)
  2908. goto out_free_resources;
  2909. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2910. if (r)
  2911. goto out_free_resources;
  2912. init_waitqueue_head(&ioc->reset_wq);
  2913. /* base internal command bits */
  2914. mutex_init(&ioc->base_cmds.mutex);
  2915. init_completion(&ioc->base_cmds.done);
  2916. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2917. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2918. /* transport internal command bits */
  2919. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2920. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2921. mutex_init(&ioc->transport_cmds.mutex);
  2922. init_completion(&ioc->transport_cmds.done);
  2923. /* task management internal command bits */
  2924. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2925. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2926. mutex_init(&ioc->tm_cmds.mutex);
  2927. /* config page internal command bits */
  2928. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2929. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2930. mutex_init(&ioc->config_cmds.mutex);
  2931. /* ctl module internal command bits */
  2932. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2933. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2934. mutex_init(&ioc->ctl_cmds.mutex);
  2935. init_completion(&ioc->ctl_cmds.done);
  2936. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2937. ioc->event_masks[i] = -1;
  2938. /* here we enable the events we care about */
  2939. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2940. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2941. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2942. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2943. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2944. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2945. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2946. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2947. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2948. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2949. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2950. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2951. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2952. if (!ioc->pfacts)
  2953. goto out_free_resources;
  2954. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2955. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2956. if (r)
  2957. goto out_free_resources;
  2958. }
  2959. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2960. if (r)
  2961. goto out_free_resources;
  2962. mpt2sas_base_start_watchdog(ioc);
  2963. return 0;
  2964. out_free_resources:
  2965. ioc->remove_host = 1;
  2966. mpt2sas_base_free_resources(ioc);
  2967. _base_release_memory_pools(ioc);
  2968. pci_set_drvdata(ioc->pdev, NULL);
  2969. kfree(ioc->tm_cmds.reply);
  2970. kfree(ioc->transport_cmds.reply);
  2971. kfree(ioc->config_cmds.reply);
  2972. kfree(ioc->base_cmds.reply);
  2973. kfree(ioc->ctl_cmds.reply);
  2974. kfree(ioc->pfacts);
  2975. ioc->ctl_cmds.reply = NULL;
  2976. ioc->base_cmds.reply = NULL;
  2977. ioc->tm_cmds.reply = NULL;
  2978. ioc->transport_cmds.reply = NULL;
  2979. ioc->config_cmds.reply = NULL;
  2980. ioc->pfacts = NULL;
  2981. return r;
  2982. }
  2983. /**
  2984. * mpt2sas_base_detach - remove controller instance
  2985. * @ioc: per adapter object
  2986. *
  2987. * Return nothing.
  2988. */
  2989. void
  2990. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  2991. {
  2992. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2993. __func__));
  2994. mpt2sas_base_stop_watchdog(ioc);
  2995. mpt2sas_base_free_resources(ioc);
  2996. _base_release_memory_pools(ioc);
  2997. pci_set_drvdata(ioc->pdev, NULL);
  2998. kfree(ioc->pfacts);
  2999. kfree(ioc->ctl_cmds.reply);
  3000. kfree(ioc->base_cmds.reply);
  3001. kfree(ioc->tm_cmds.reply);
  3002. kfree(ioc->transport_cmds.reply);
  3003. kfree(ioc->config_cmds.reply);
  3004. }
  3005. /**
  3006. * _base_reset_handler - reset callback handler (for base)
  3007. * @ioc: per adapter object
  3008. * @reset_phase: phase
  3009. *
  3010. * The handler for doing any required cleanup or initialization.
  3011. *
  3012. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3013. * MPT2_IOC_DONE_RESET
  3014. *
  3015. * Return nothing.
  3016. */
  3017. static void
  3018. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3019. {
  3020. switch (reset_phase) {
  3021. case MPT2_IOC_PRE_RESET:
  3022. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3023. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3024. break;
  3025. case MPT2_IOC_AFTER_RESET:
  3026. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3027. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3028. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3029. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3030. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3031. complete(&ioc->transport_cmds.done);
  3032. }
  3033. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3034. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3035. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3036. complete(&ioc->base_cmds.done);
  3037. }
  3038. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3039. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3040. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3041. ioc->config_cmds.smid = USHORT_MAX;
  3042. complete(&ioc->config_cmds.done);
  3043. }
  3044. break;
  3045. case MPT2_IOC_DONE_RESET:
  3046. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3047. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3048. break;
  3049. }
  3050. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3051. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3052. }
  3053. /**
  3054. * _wait_for_commands_to_complete - reset controller
  3055. * @ioc: Pointer to MPT_ADAPTER structure
  3056. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3057. *
  3058. * This function waiting(3s) for all pending commands to complete
  3059. * prior to putting controller in reset.
  3060. */
  3061. static void
  3062. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3063. {
  3064. u32 ioc_state;
  3065. unsigned long flags;
  3066. u16 i;
  3067. ioc->pending_io_count = 0;
  3068. if (sleep_flag != CAN_SLEEP)
  3069. return;
  3070. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3071. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3072. return;
  3073. /* pending command count */
  3074. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3075. for (i = 0; i < ioc->request_depth; i++)
  3076. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3077. ioc->pending_io_count++;
  3078. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3079. if (!ioc->pending_io_count)
  3080. return;
  3081. /* wait for pending commands to complete */
  3082. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3083. }
  3084. /**
  3085. * mpt2sas_base_hard_reset_handler - reset controller
  3086. * @ioc: Pointer to MPT_ADAPTER structure
  3087. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3088. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3089. *
  3090. * Returns 0 for success, non-zero for failure.
  3091. */
  3092. int
  3093. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3094. enum reset_type type)
  3095. {
  3096. int r, i;
  3097. unsigned long flags;
  3098. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3099. __func__));
  3100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3101. if (ioc->shost_recovery) {
  3102. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3103. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3104. ioc->name, __func__);
  3105. return -EBUSY;
  3106. }
  3107. ioc->shost_recovery = 1;
  3108. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3109. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3110. _wait_for_commands_to_complete(ioc, sleep_flag);
  3111. _base_mask_interrupts(ioc);
  3112. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3113. if (r)
  3114. goto out;
  3115. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3116. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3117. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3118. sleep_flag);
  3119. if (!r)
  3120. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3121. out:
  3122. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3123. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3124. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3125. ioc->shost_recovery = 0;
  3126. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3127. if (!r)
  3128. _base_reset_handler(ioc, MPT2_IOC_RUNNING);
  3129. return r;
  3130. }