qdio_main.c 38 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <asm/atomic.h>
  17. #include <asm/debug.h>
  18. #include <asm/qdio.h>
  19. #include "cio.h"
  20. #include "css.h"
  21. #include "device.h"
  22. #include "qdio.h"
  23. #include "qdio_debug.h"
  24. #include "qdio_perf.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(struct subchannel_id schid,
  30. unsigned int out_mask, unsigned int in_mask)
  31. {
  32. register unsigned long __fc asm ("0") = 2;
  33. register struct subchannel_id __schid asm ("1") = schid;
  34. register unsigned long out asm ("2") = out_mask;
  35. register unsigned long in asm ("3") = in_mask;
  36. int cc;
  37. asm volatile(
  38. " siga 0\n"
  39. " ipm %0\n"
  40. " srl %0,28\n"
  41. : "=d" (cc)
  42. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  43. return cc;
  44. }
  45. static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
  46. {
  47. register unsigned long __fc asm ("0") = 1;
  48. register struct subchannel_id __schid asm ("1") = schid;
  49. register unsigned long __mask asm ("2") = mask;
  50. int cc;
  51. asm volatile(
  52. " siga 0\n"
  53. " ipm %0\n"
  54. " srl %0,28\n"
  55. : "=d" (cc)
  56. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  57. return cc;
  58. }
  59. /**
  60. * do_siga_output - perform SIGA-w/wt function
  61. * @schid: subchannel id or in case of QEBSM the subchannel token
  62. * @mask: which output queues to process
  63. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  64. * @fc: function code to perform
  65. *
  66. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  67. * Note: For IQDC unicast queues only the highest priority queue is processed.
  68. */
  69. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  70. unsigned int *bb, unsigned int fc)
  71. {
  72. register unsigned long __fc asm("0") = fc;
  73. register unsigned long __schid asm("1") = schid;
  74. register unsigned long __mask asm("2") = mask;
  75. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  76. asm volatile(
  77. " siga 0\n"
  78. "0: ipm %0\n"
  79. " srl %0,28\n"
  80. "1:\n"
  81. EX_TABLE(0b, 1b)
  82. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  83. : : "cc", "memory");
  84. *bb = ((unsigned int) __fc) >> 31;
  85. return cc;
  86. }
  87. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  88. {
  89. /* all done or next buffer state different */
  90. if (ccq == 0 || ccq == 32)
  91. return 0;
  92. /* not all buffers processed */
  93. if (ccq == 96 || ccq == 97)
  94. return 1;
  95. /* notify devices immediately */
  96. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  97. return -EIO;
  98. }
  99. /**
  100. * qdio_do_eqbs - extract buffer states for QEBSM
  101. * @q: queue to manipulate
  102. * @state: state of the extracted buffers
  103. * @start: buffer number to start at
  104. * @count: count of buffers to examine
  105. * @auto_ack: automatically acknowledge buffers
  106. *
  107. * Returns the number of successfully extracted equal buffer states.
  108. * Stops processing if a state is different from the last buffers state.
  109. */
  110. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  111. int start, int count, int auto_ack)
  112. {
  113. unsigned int ccq = 0;
  114. int tmp_count = count, tmp_start = start;
  115. int nr = q->nr;
  116. int rc;
  117. BUG_ON(!q->irq_ptr->sch_token);
  118. qdio_perf_stat_inc(&perf_stats.debug_eqbs_all);
  119. if (!q->is_input_q)
  120. nr += q->irq_ptr->nr_input_qs;
  121. again:
  122. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  123. auto_ack);
  124. rc = qdio_check_ccq(q, ccq);
  125. /* At least one buffer was processed, return and extract the remaining
  126. * buffers later.
  127. */
  128. if ((ccq == 96) && (count != tmp_count)) {
  129. qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete);
  130. return (count - tmp_count);
  131. }
  132. if (rc == 1) {
  133. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  134. goto again;
  135. }
  136. if (rc < 0) {
  137. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  138. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  139. q->handler(q->irq_ptr->cdev,
  140. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  141. 0, -1, -1, q->irq_ptr->int_parm);
  142. return 0;
  143. }
  144. return count - tmp_count;
  145. }
  146. /**
  147. * qdio_do_sqbs - set buffer states for QEBSM
  148. * @q: queue to manipulate
  149. * @state: new state of the buffers
  150. * @start: first buffer number to change
  151. * @count: how many buffers to change
  152. *
  153. * Returns the number of successfully changed buffers.
  154. * Does retrying until the specified count of buffer states is set or an
  155. * error occurs.
  156. */
  157. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  158. int count)
  159. {
  160. unsigned int ccq = 0;
  161. int tmp_count = count, tmp_start = start;
  162. int nr = q->nr;
  163. int rc;
  164. if (!count)
  165. return 0;
  166. BUG_ON(!q->irq_ptr->sch_token);
  167. qdio_perf_stat_inc(&perf_stats.debug_sqbs_all);
  168. if (!q->is_input_q)
  169. nr += q->irq_ptr->nr_input_qs;
  170. again:
  171. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  172. rc = qdio_check_ccq(q, ccq);
  173. if (rc == 1) {
  174. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  175. qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete);
  176. goto again;
  177. }
  178. if (rc < 0) {
  179. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  180. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  181. q->handler(q->irq_ptr->cdev,
  182. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  183. 0, -1, -1, q->irq_ptr->int_parm);
  184. return 0;
  185. }
  186. WARN_ON(tmp_count);
  187. return count - tmp_count;
  188. }
  189. /* returns number of examined buffers and their common state in *state */
  190. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  191. unsigned char *state, unsigned int count,
  192. int auto_ack)
  193. {
  194. unsigned char __state = 0;
  195. int i;
  196. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  197. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  198. if (is_qebsm(q))
  199. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  200. for (i = 0; i < count; i++) {
  201. if (!__state)
  202. __state = q->slsb.val[bufnr];
  203. else if (q->slsb.val[bufnr] != __state)
  204. break;
  205. bufnr = next_buf(bufnr);
  206. }
  207. *state = __state;
  208. return i;
  209. }
  210. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  211. unsigned char *state, int auto_ack)
  212. {
  213. return get_buf_states(q, bufnr, state, 1, auto_ack);
  214. }
  215. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  216. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  217. unsigned char state, int count)
  218. {
  219. int i;
  220. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  221. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  222. if (is_qebsm(q))
  223. return qdio_do_sqbs(q, state, bufnr, count);
  224. for (i = 0; i < count; i++) {
  225. xchg(&q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. return count;
  229. }
  230. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  231. unsigned char state)
  232. {
  233. return set_buf_states(q, bufnr, state, 1);
  234. }
  235. /* set slsb states to initial state */
  236. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  237. {
  238. struct qdio_q *q;
  239. int i;
  240. for_each_input_queue(irq_ptr, q, i)
  241. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  242. QDIO_MAX_BUFFERS_PER_Q);
  243. for_each_output_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. }
  247. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  248. unsigned int input)
  249. {
  250. int cc;
  251. if (!need_siga_sync(q))
  252. return 0;
  253. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  254. qdio_perf_stat_inc(&perf_stats.siga_sync);
  255. cc = do_siga_sync(q->irq_ptr->schid, output, input);
  256. if (cc)
  257. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  258. return cc;
  259. }
  260. static inline int qdio_siga_sync_q(struct qdio_q *q)
  261. {
  262. if (q->is_input_q)
  263. return qdio_siga_sync(q, 0, q->mask);
  264. else
  265. return qdio_siga_sync(q, q->mask, 0);
  266. }
  267. static inline int qdio_siga_sync_out(struct qdio_q *q)
  268. {
  269. return qdio_siga_sync(q, ~0U, 0);
  270. }
  271. static inline int qdio_siga_sync_all(struct qdio_q *q)
  272. {
  273. return qdio_siga_sync(q, ~0U, ~0U);
  274. }
  275. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  276. {
  277. unsigned long schid;
  278. unsigned int fc = 0;
  279. u64 start_time = 0;
  280. int cc;
  281. if (q->u.out.use_enh_siga)
  282. fc = 3;
  283. if (is_qebsm(q)) {
  284. schid = q->irq_ptr->sch_token;
  285. fc |= 0x80;
  286. }
  287. else
  288. schid = *((u32 *)&q->irq_ptr->schid);
  289. again:
  290. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  291. /* hipersocket busy condition */
  292. if (*busy_bit) {
  293. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  294. if (!start_time) {
  295. start_time = get_usecs();
  296. goto again;
  297. }
  298. if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  299. goto again;
  300. }
  301. return cc;
  302. }
  303. static inline int qdio_siga_input(struct qdio_q *q)
  304. {
  305. int cc;
  306. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  307. qdio_perf_stat_inc(&perf_stats.siga_in);
  308. cc = do_siga_input(q->irq_ptr->schid, q->mask);
  309. if (cc)
  310. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  311. return cc;
  312. }
  313. static inline void qdio_sync_after_thinint(struct qdio_q *q)
  314. {
  315. if (pci_out_supported(q)) {
  316. if (need_siga_sync_thinint(q))
  317. qdio_siga_sync_all(q);
  318. else if (need_siga_sync_out_thinint(q))
  319. qdio_siga_sync_out(q);
  320. } else
  321. qdio_siga_sync_q(q);
  322. }
  323. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  324. unsigned char *state)
  325. {
  326. qdio_siga_sync_q(q);
  327. return get_buf_states(q, bufnr, state, 1, 0);
  328. }
  329. static inline void qdio_stop_polling(struct qdio_q *q)
  330. {
  331. if (!q->u.in.polling)
  332. return;
  333. q->u.in.polling = 0;
  334. qdio_perf_stat_inc(&perf_stats.debug_stop_polling);
  335. /* show the card that we are not polling anymore */
  336. if (is_qebsm(q)) {
  337. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  338. q->u.in.ack_count);
  339. q->u.in.ack_count = 0;
  340. } else
  341. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  342. }
  343. static void announce_buffer_error(struct qdio_q *q, int count)
  344. {
  345. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  346. /* special handling for no target buffer empty */
  347. if ((!q->is_input_q &&
  348. (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
  349. qdio_perf_stat_inc(&perf_stats.outbound_target_full);
  350. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%3d",
  351. q->first_to_check);
  352. return;
  353. }
  354. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  355. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  356. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  357. DBF_ERROR("F14:%2x F15:%2x",
  358. q->sbal[q->first_to_check]->element[14].flags & 0xff,
  359. q->sbal[q->first_to_check]->element[15].flags & 0xff);
  360. }
  361. static inline void inbound_primed(struct qdio_q *q, int count)
  362. {
  363. int new;
  364. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %3d", count);
  365. /* for QEBSM the ACK was already set by EQBS */
  366. if (is_qebsm(q)) {
  367. if (!q->u.in.polling) {
  368. q->u.in.polling = 1;
  369. q->u.in.ack_count = count;
  370. q->u.in.ack_start = q->first_to_check;
  371. return;
  372. }
  373. /* delete the previous ACK's */
  374. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  375. q->u.in.ack_count);
  376. q->u.in.ack_count = count;
  377. q->u.in.ack_start = q->first_to_check;
  378. return;
  379. }
  380. /*
  381. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  382. * or by the next inbound run.
  383. */
  384. new = add_buf(q->first_to_check, count - 1);
  385. if (q->u.in.polling) {
  386. /* reset the previous ACK but first set the new one */
  387. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  388. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  389. } else {
  390. q->u.in.polling = 1;
  391. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  392. }
  393. q->u.in.ack_start = new;
  394. count--;
  395. if (!count)
  396. return;
  397. }
  398. static int get_inbound_buffer_frontier(struct qdio_q *q)
  399. {
  400. int count, stop;
  401. unsigned char state;
  402. /*
  403. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  404. * would return 0.
  405. */
  406. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  407. stop = add_buf(q->first_to_check, count);
  408. if (q->first_to_check == stop)
  409. goto out;
  410. /*
  411. * No siga sync here, as a PCI or we after a thin interrupt
  412. * already sync'ed the queues.
  413. */
  414. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  415. if (!count)
  416. goto out;
  417. switch (state) {
  418. case SLSB_P_INPUT_PRIMED:
  419. inbound_primed(q, count);
  420. q->first_to_check = add_buf(q->first_to_check, count);
  421. atomic_sub(count, &q->nr_buf_used);
  422. break;
  423. case SLSB_P_INPUT_ERROR:
  424. announce_buffer_error(q, count);
  425. /* process the buffer, the upper layer will take care of it */
  426. q->first_to_check = add_buf(q->first_to_check, count);
  427. atomic_sub(count, &q->nr_buf_used);
  428. break;
  429. case SLSB_CU_INPUT_EMPTY:
  430. case SLSB_P_INPUT_NOT_INIT:
  431. case SLSB_P_INPUT_ACK:
  432. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  433. break;
  434. default:
  435. BUG();
  436. }
  437. out:
  438. return q->first_to_check;
  439. }
  440. static int qdio_inbound_q_moved(struct qdio_q *q)
  441. {
  442. int bufnr;
  443. bufnr = get_inbound_buffer_frontier(q);
  444. if ((bufnr != q->last_move) || q->qdio_error) {
  445. q->last_move = bufnr;
  446. if (!is_thinint_irq(q->irq_ptr) && !MACHINE_IS_VM)
  447. q->u.in.timestamp = get_usecs();
  448. return 1;
  449. } else
  450. return 0;
  451. }
  452. static inline int qdio_inbound_q_done(struct qdio_q *q)
  453. {
  454. unsigned char state = 0;
  455. if (!atomic_read(&q->nr_buf_used))
  456. return 1;
  457. qdio_siga_sync_q(q);
  458. get_buf_state(q, q->first_to_check, &state, 0);
  459. if (state == SLSB_P_INPUT_PRIMED)
  460. /* more work coming */
  461. return 0;
  462. if (is_thinint_irq(q->irq_ptr))
  463. return 1;
  464. /* don't poll under z/VM */
  465. if (MACHINE_IS_VM)
  466. return 1;
  467. /*
  468. * At this point we know, that inbound first_to_check
  469. * has (probably) not moved (see qdio_inbound_processing).
  470. */
  471. if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  472. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%3d",
  473. q->first_to_check);
  474. return 1;
  475. } else
  476. return 0;
  477. }
  478. static void qdio_kick_handler(struct qdio_q *q)
  479. {
  480. int start = q->first_to_kick;
  481. int end = q->first_to_check;
  482. int count;
  483. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  484. return;
  485. count = sub_buf(end, start);
  486. if (q->is_input_q) {
  487. qdio_perf_stat_inc(&perf_stats.inbound_handler);
  488. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%3d c:%3d", start, count);
  489. } else {
  490. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: nr:%1d", q->nr);
  491. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "s:%3d c:%3d", start, count);
  492. }
  493. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  494. q->irq_ptr->int_parm);
  495. /* for the next time */
  496. q->first_to_kick = end;
  497. q->qdio_error = 0;
  498. }
  499. static void __qdio_inbound_processing(struct qdio_q *q)
  500. {
  501. qdio_perf_stat_inc(&perf_stats.tasklet_inbound);
  502. again:
  503. if (!qdio_inbound_q_moved(q))
  504. return;
  505. qdio_kick_handler(q);
  506. if (!qdio_inbound_q_done(q))
  507. /* means poll time is not yet over */
  508. goto again;
  509. qdio_stop_polling(q);
  510. /*
  511. * We need to check again to not lose initiative after
  512. * resetting the ACK state.
  513. */
  514. if (!qdio_inbound_q_done(q))
  515. goto again;
  516. }
  517. void qdio_inbound_processing(unsigned long data)
  518. {
  519. struct qdio_q *q = (struct qdio_q *)data;
  520. __qdio_inbound_processing(q);
  521. }
  522. static int get_outbound_buffer_frontier(struct qdio_q *q)
  523. {
  524. int count, stop;
  525. unsigned char state;
  526. if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
  527. (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
  528. qdio_siga_sync_q(q);
  529. /*
  530. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  531. * would return 0.
  532. */
  533. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  534. stop = add_buf(q->first_to_check, count);
  535. if (q->first_to_check == stop)
  536. return q->first_to_check;
  537. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  538. if (!count)
  539. return q->first_to_check;
  540. switch (state) {
  541. case SLSB_P_OUTPUT_EMPTY:
  542. /* the adapter got it */
  543. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %3d", q->nr, count);
  544. atomic_sub(count, &q->nr_buf_used);
  545. q->first_to_check = add_buf(q->first_to_check, count);
  546. break;
  547. case SLSB_P_OUTPUT_ERROR:
  548. announce_buffer_error(q, count);
  549. /* process the buffer, the upper layer will take care of it */
  550. q->first_to_check = add_buf(q->first_to_check, count);
  551. atomic_sub(count, &q->nr_buf_used);
  552. break;
  553. case SLSB_CU_OUTPUT_PRIMED:
  554. /* the adapter has not fetched the output yet */
  555. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  556. break;
  557. case SLSB_P_OUTPUT_NOT_INIT:
  558. case SLSB_P_OUTPUT_HALTED:
  559. break;
  560. default:
  561. BUG();
  562. }
  563. return q->first_to_check;
  564. }
  565. /* all buffers processed? */
  566. static inline int qdio_outbound_q_done(struct qdio_q *q)
  567. {
  568. return atomic_read(&q->nr_buf_used) == 0;
  569. }
  570. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  571. {
  572. int bufnr;
  573. bufnr = get_outbound_buffer_frontier(q);
  574. if ((bufnr != q->last_move) || q->qdio_error) {
  575. q->last_move = bufnr;
  576. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  577. return 1;
  578. } else
  579. return 0;
  580. }
  581. static int qdio_kick_outbound_q(struct qdio_q *q)
  582. {
  583. unsigned int busy_bit;
  584. int cc;
  585. if (!need_siga_out(q))
  586. return 0;
  587. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  588. qdio_perf_stat_inc(&perf_stats.siga_out);
  589. cc = qdio_siga_output(q, &busy_bit);
  590. switch (cc) {
  591. case 0:
  592. break;
  593. case 2:
  594. if (busy_bit) {
  595. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  596. cc |= QDIO_ERROR_SIGA_BUSY;
  597. } else
  598. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  599. break;
  600. case 1:
  601. case 3:
  602. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  603. break;
  604. }
  605. return cc;
  606. }
  607. static void __qdio_outbound_processing(struct qdio_q *q)
  608. {
  609. qdio_perf_stat_inc(&perf_stats.tasklet_outbound);
  610. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  611. if (qdio_outbound_q_moved(q))
  612. qdio_kick_handler(q);
  613. if (queue_type(q) == QDIO_ZFCP_QFMT)
  614. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  615. goto sched;
  616. /* bail out for HiperSockets unicast queues */
  617. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  618. return;
  619. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  620. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  621. goto sched;
  622. if (q->u.out.pci_out_enabled)
  623. return;
  624. /*
  625. * Now we know that queue type is either qeth without pci enabled
  626. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  627. * EMPTY is noticed and outbound_handler is called after some time.
  628. */
  629. if (qdio_outbound_q_done(q))
  630. del_timer(&q->u.out.timer);
  631. else {
  632. if (!timer_pending(&q->u.out.timer)) {
  633. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  634. qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer);
  635. }
  636. }
  637. return;
  638. sched:
  639. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  640. return;
  641. tasklet_schedule(&q->tasklet);
  642. }
  643. /* outbound tasklet */
  644. void qdio_outbound_processing(unsigned long data)
  645. {
  646. struct qdio_q *q = (struct qdio_q *)data;
  647. __qdio_outbound_processing(q);
  648. }
  649. void qdio_outbound_timer(unsigned long data)
  650. {
  651. struct qdio_q *q = (struct qdio_q *)data;
  652. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  653. return;
  654. tasklet_schedule(&q->tasklet);
  655. }
  656. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  657. {
  658. struct qdio_q *out;
  659. int i;
  660. if (!pci_out_supported(q))
  661. return;
  662. for_each_output_queue(q->irq_ptr, out, i)
  663. if (!qdio_outbound_q_done(out))
  664. tasklet_schedule(&out->tasklet);
  665. }
  666. static void __tiqdio_inbound_processing(struct qdio_q *q)
  667. {
  668. qdio_perf_stat_inc(&perf_stats.thinint_inbound);
  669. qdio_sync_after_thinint(q);
  670. /*
  671. * The interrupt could be caused by a PCI request. Check the
  672. * PCI capable outbound queues.
  673. */
  674. qdio_check_outbound_after_thinint(q);
  675. if (!qdio_inbound_q_moved(q))
  676. return;
  677. qdio_kick_handler(q);
  678. if (!qdio_inbound_q_done(q)) {
  679. qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop);
  680. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  681. tasklet_schedule(&q->tasklet);
  682. return;
  683. }
  684. }
  685. qdio_stop_polling(q);
  686. /*
  687. * We need to check again to not lose initiative after
  688. * resetting the ACK state.
  689. */
  690. if (!qdio_inbound_q_done(q)) {
  691. qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop2);
  692. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  693. tasklet_schedule(&q->tasklet);
  694. }
  695. }
  696. void tiqdio_inbound_processing(unsigned long data)
  697. {
  698. struct qdio_q *q = (struct qdio_q *)data;
  699. __tiqdio_inbound_processing(q);
  700. }
  701. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  702. enum qdio_irq_states state)
  703. {
  704. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  705. irq_ptr->state = state;
  706. mb();
  707. }
  708. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  709. {
  710. if (irb->esw.esw0.erw.cons) {
  711. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  712. DBF_ERROR_HEX(irb, 64);
  713. DBF_ERROR_HEX(irb->ecw, 64);
  714. }
  715. }
  716. /* PCI interrupt handler */
  717. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  718. {
  719. int i;
  720. struct qdio_q *q;
  721. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  722. return;
  723. qdio_perf_stat_inc(&perf_stats.pci_int);
  724. for_each_input_queue(irq_ptr, q, i)
  725. tasklet_schedule(&q->tasklet);
  726. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  727. return;
  728. for_each_output_queue(irq_ptr, q, i) {
  729. if (qdio_outbound_q_done(q))
  730. continue;
  731. if (!siga_syncs_out_pci(q))
  732. qdio_siga_sync_q(q);
  733. tasklet_schedule(&q->tasklet);
  734. }
  735. }
  736. static void qdio_handle_activate_check(struct ccw_device *cdev,
  737. unsigned long intparm, int cstat, int dstat)
  738. {
  739. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  740. struct qdio_q *q;
  741. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  742. DBF_ERROR("intp :%lx", intparm);
  743. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  744. if (irq_ptr->nr_input_qs) {
  745. q = irq_ptr->input_qs[0];
  746. } else if (irq_ptr->nr_output_qs) {
  747. q = irq_ptr->output_qs[0];
  748. } else {
  749. dump_stack();
  750. goto no_handler;
  751. }
  752. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  753. 0, -1, -1, irq_ptr->int_parm);
  754. no_handler:
  755. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  756. }
  757. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  758. int dstat)
  759. {
  760. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  761. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  762. if (cstat)
  763. goto error;
  764. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  765. goto error;
  766. if (!(dstat & DEV_STAT_DEV_END))
  767. goto error;
  768. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  769. return;
  770. error:
  771. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  772. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  773. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  774. }
  775. /* qdio interrupt handler */
  776. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  777. struct irb *irb)
  778. {
  779. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  780. int cstat, dstat;
  781. qdio_perf_stat_inc(&perf_stats.qdio_int);
  782. if (!intparm || !irq_ptr) {
  783. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  784. return;
  785. }
  786. if (IS_ERR(irb)) {
  787. switch (PTR_ERR(irb)) {
  788. case -EIO:
  789. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  790. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  791. wake_up(&cdev->private->wait_q);
  792. return;
  793. default:
  794. WARN_ON(1);
  795. return;
  796. }
  797. }
  798. qdio_irq_check_sense(irq_ptr, irb);
  799. cstat = irb->scsw.cmd.cstat;
  800. dstat = irb->scsw.cmd.dstat;
  801. switch (irq_ptr->state) {
  802. case QDIO_IRQ_STATE_INACTIVE:
  803. qdio_establish_handle_irq(cdev, cstat, dstat);
  804. break;
  805. case QDIO_IRQ_STATE_CLEANUP:
  806. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  807. break;
  808. case QDIO_IRQ_STATE_ESTABLISHED:
  809. case QDIO_IRQ_STATE_ACTIVE:
  810. if (cstat & SCHN_STAT_PCI) {
  811. qdio_int_handler_pci(irq_ptr);
  812. return;
  813. }
  814. if (cstat || dstat)
  815. qdio_handle_activate_check(cdev, intparm, cstat,
  816. dstat);
  817. break;
  818. default:
  819. WARN_ON(1);
  820. }
  821. wake_up(&cdev->private->wait_q);
  822. }
  823. /**
  824. * qdio_get_ssqd_desc - get qdio subchannel description
  825. * @cdev: ccw device to get description for
  826. * @data: where to store the ssqd
  827. *
  828. * Returns 0 or an error code. The results of the chsc are stored in the
  829. * specified structure.
  830. */
  831. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  832. struct qdio_ssqd_desc *data)
  833. {
  834. if (!cdev || !cdev->private)
  835. return -EINVAL;
  836. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  837. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  838. }
  839. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  840. /**
  841. * qdio_cleanup - shutdown queues and free data structures
  842. * @cdev: associated ccw device
  843. * @how: use halt or clear to shutdown
  844. *
  845. * This function calls qdio_shutdown() for @cdev with method @how.
  846. * and qdio_free(). The qdio_free() return value is ignored since
  847. * !irq_ptr is already checked.
  848. */
  849. int qdio_cleanup(struct ccw_device *cdev, int how)
  850. {
  851. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  852. int rc;
  853. if (!irq_ptr)
  854. return -ENODEV;
  855. rc = qdio_shutdown(cdev, how);
  856. qdio_free(cdev);
  857. return rc;
  858. }
  859. EXPORT_SYMBOL_GPL(qdio_cleanup);
  860. static void qdio_shutdown_queues(struct ccw_device *cdev)
  861. {
  862. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  863. struct qdio_q *q;
  864. int i;
  865. for_each_input_queue(irq_ptr, q, i)
  866. tasklet_kill(&q->tasklet);
  867. for_each_output_queue(irq_ptr, q, i) {
  868. del_timer(&q->u.out.timer);
  869. tasklet_kill(&q->tasklet);
  870. }
  871. }
  872. /**
  873. * qdio_shutdown - shut down a qdio subchannel
  874. * @cdev: associated ccw device
  875. * @how: use halt or clear to shutdown
  876. */
  877. int qdio_shutdown(struct ccw_device *cdev, int how)
  878. {
  879. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  880. int rc;
  881. unsigned long flags;
  882. if (!irq_ptr)
  883. return -ENODEV;
  884. BUG_ON(irqs_disabled());
  885. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  886. mutex_lock(&irq_ptr->setup_mutex);
  887. /*
  888. * Subchannel was already shot down. We cannot prevent being called
  889. * twice since cio may trigger a shutdown asynchronously.
  890. */
  891. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  892. mutex_unlock(&irq_ptr->setup_mutex);
  893. return 0;
  894. }
  895. /*
  896. * Indicate that the device is going down. Scheduling the queue
  897. * tasklets is forbidden from here on.
  898. */
  899. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  900. tiqdio_remove_input_queues(irq_ptr);
  901. qdio_shutdown_queues(cdev);
  902. qdio_shutdown_debug_entries(irq_ptr, cdev);
  903. /* cleanup subchannel */
  904. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  905. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  906. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  907. else
  908. /* default behaviour is halt */
  909. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  910. if (rc) {
  911. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  912. DBF_ERROR("rc:%4d", rc);
  913. goto no_cleanup;
  914. }
  915. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  916. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  917. wait_event_interruptible_timeout(cdev->private->wait_q,
  918. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  919. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  920. 10 * HZ);
  921. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  922. no_cleanup:
  923. qdio_shutdown_thinint(irq_ptr);
  924. /* restore interrupt handler */
  925. if ((void *)cdev->handler == (void *)qdio_int_handler)
  926. cdev->handler = irq_ptr->orig_handler;
  927. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  928. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  929. mutex_unlock(&irq_ptr->setup_mutex);
  930. if (rc)
  931. return rc;
  932. return 0;
  933. }
  934. EXPORT_SYMBOL_GPL(qdio_shutdown);
  935. /**
  936. * qdio_free - free data structures for a qdio subchannel
  937. * @cdev: associated ccw device
  938. */
  939. int qdio_free(struct ccw_device *cdev)
  940. {
  941. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  942. if (!irq_ptr)
  943. return -ENODEV;
  944. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  945. mutex_lock(&irq_ptr->setup_mutex);
  946. if (irq_ptr->debug_area != NULL) {
  947. debug_unregister(irq_ptr->debug_area);
  948. irq_ptr->debug_area = NULL;
  949. }
  950. cdev->private->qdio_data = NULL;
  951. mutex_unlock(&irq_ptr->setup_mutex);
  952. qdio_release_memory(irq_ptr);
  953. return 0;
  954. }
  955. EXPORT_SYMBOL_GPL(qdio_free);
  956. /**
  957. * qdio_initialize - allocate and establish queues for a qdio subchannel
  958. * @init_data: initialization data
  959. *
  960. * This function first allocates queues via qdio_allocate() and on success
  961. * establishes them via qdio_establish().
  962. */
  963. int qdio_initialize(struct qdio_initialize *init_data)
  964. {
  965. int rc;
  966. rc = qdio_allocate(init_data);
  967. if (rc)
  968. return rc;
  969. rc = qdio_establish(init_data);
  970. if (rc)
  971. qdio_free(init_data->cdev);
  972. return rc;
  973. }
  974. EXPORT_SYMBOL_GPL(qdio_initialize);
  975. /**
  976. * qdio_allocate - allocate qdio queues and associated data
  977. * @init_data: initialization data
  978. */
  979. int qdio_allocate(struct qdio_initialize *init_data)
  980. {
  981. struct qdio_irq *irq_ptr;
  982. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  983. if ((init_data->no_input_qs && !init_data->input_handler) ||
  984. (init_data->no_output_qs && !init_data->output_handler))
  985. return -EINVAL;
  986. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  987. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  988. return -EINVAL;
  989. if ((!init_data->input_sbal_addr_array) ||
  990. (!init_data->output_sbal_addr_array))
  991. return -EINVAL;
  992. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  993. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  994. if (!irq_ptr)
  995. goto out_err;
  996. mutex_init(&irq_ptr->setup_mutex);
  997. qdio_allocate_dbf(init_data, irq_ptr);
  998. /*
  999. * Allocate a page for the chsc calls in qdio_establish.
  1000. * Must be pre-allocated since a zfcp recovery will call
  1001. * qdio_establish. In case of low memory and swap on a zfcp disk
  1002. * we may not be able to allocate memory otherwise.
  1003. */
  1004. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1005. if (!irq_ptr->chsc_page)
  1006. goto out_rel;
  1007. /* qdr is used in ccw1.cda which is u32 */
  1008. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1009. if (!irq_ptr->qdr)
  1010. goto out_rel;
  1011. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1012. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1013. init_data->no_output_qs))
  1014. goto out_rel;
  1015. init_data->cdev->private->qdio_data = irq_ptr;
  1016. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1017. return 0;
  1018. out_rel:
  1019. qdio_release_memory(irq_ptr);
  1020. out_err:
  1021. return -ENOMEM;
  1022. }
  1023. EXPORT_SYMBOL_GPL(qdio_allocate);
  1024. /**
  1025. * qdio_establish - establish queues on a qdio subchannel
  1026. * @init_data: initialization data
  1027. */
  1028. int qdio_establish(struct qdio_initialize *init_data)
  1029. {
  1030. struct qdio_irq *irq_ptr;
  1031. struct ccw_device *cdev = init_data->cdev;
  1032. unsigned long saveflags;
  1033. int rc;
  1034. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1035. irq_ptr = cdev->private->qdio_data;
  1036. if (!irq_ptr)
  1037. return -ENODEV;
  1038. if (cdev->private->state != DEV_STATE_ONLINE)
  1039. return -EINVAL;
  1040. mutex_lock(&irq_ptr->setup_mutex);
  1041. qdio_setup_irq(init_data);
  1042. rc = qdio_establish_thinint(irq_ptr);
  1043. if (rc) {
  1044. mutex_unlock(&irq_ptr->setup_mutex);
  1045. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1046. return rc;
  1047. }
  1048. /* establish q */
  1049. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1050. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1051. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1052. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1053. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1054. ccw_device_set_options_mask(cdev, 0);
  1055. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1056. if (rc) {
  1057. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1058. DBF_ERROR("rc:%4x", rc);
  1059. }
  1060. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1061. if (rc) {
  1062. mutex_unlock(&irq_ptr->setup_mutex);
  1063. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1064. return rc;
  1065. }
  1066. wait_event_interruptible_timeout(cdev->private->wait_q,
  1067. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1068. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1069. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1070. mutex_unlock(&irq_ptr->setup_mutex);
  1071. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1072. return -EIO;
  1073. }
  1074. qdio_setup_ssqd_info(irq_ptr);
  1075. DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
  1076. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1077. /* qebsm is now setup if available, initialize buffer states */
  1078. qdio_init_buf_states(irq_ptr);
  1079. mutex_unlock(&irq_ptr->setup_mutex);
  1080. qdio_print_subchannel_info(irq_ptr, cdev);
  1081. qdio_setup_debug_entries(irq_ptr, cdev);
  1082. return 0;
  1083. }
  1084. EXPORT_SYMBOL_GPL(qdio_establish);
  1085. /**
  1086. * qdio_activate - activate queues on a qdio subchannel
  1087. * @cdev: associated cdev
  1088. */
  1089. int qdio_activate(struct ccw_device *cdev)
  1090. {
  1091. struct qdio_irq *irq_ptr;
  1092. int rc;
  1093. unsigned long saveflags;
  1094. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1095. irq_ptr = cdev->private->qdio_data;
  1096. if (!irq_ptr)
  1097. return -ENODEV;
  1098. if (cdev->private->state != DEV_STATE_ONLINE)
  1099. return -EINVAL;
  1100. mutex_lock(&irq_ptr->setup_mutex);
  1101. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1102. rc = -EBUSY;
  1103. goto out;
  1104. }
  1105. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1106. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1107. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1108. irq_ptr->ccw.cda = 0;
  1109. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1110. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1111. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1112. 0, DOIO_DENY_PREFETCH);
  1113. if (rc) {
  1114. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1115. DBF_ERROR("rc:%4x", rc);
  1116. }
  1117. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1118. if (rc)
  1119. goto out;
  1120. if (is_thinint_irq(irq_ptr))
  1121. tiqdio_add_input_queues(irq_ptr);
  1122. /* wait for subchannel to become active */
  1123. msleep(5);
  1124. switch (irq_ptr->state) {
  1125. case QDIO_IRQ_STATE_STOPPED:
  1126. case QDIO_IRQ_STATE_ERR:
  1127. rc = -EIO;
  1128. break;
  1129. default:
  1130. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1131. rc = 0;
  1132. }
  1133. out:
  1134. mutex_unlock(&irq_ptr->setup_mutex);
  1135. return rc;
  1136. }
  1137. EXPORT_SYMBOL_GPL(qdio_activate);
  1138. static inline int buf_in_between(int bufnr, int start, int count)
  1139. {
  1140. int end = add_buf(start, count);
  1141. if (end > start) {
  1142. if (bufnr >= start && bufnr < end)
  1143. return 1;
  1144. else
  1145. return 0;
  1146. }
  1147. /* wrap-around case */
  1148. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1149. (bufnr < end))
  1150. return 1;
  1151. else
  1152. return 0;
  1153. }
  1154. /**
  1155. * handle_inbound - reset processed input buffers
  1156. * @q: queue containing the buffers
  1157. * @callflags: flags
  1158. * @bufnr: first buffer to process
  1159. * @count: how many buffers are emptied
  1160. */
  1161. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1162. int bufnr, int count)
  1163. {
  1164. int used, diff;
  1165. if (!q->u.in.polling)
  1166. goto set;
  1167. /* protect against stop polling setting an ACK for an emptied slsb */
  1168. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1169. /* overwriting everything, just delete polling status */
  1170. q->u.in.polling = 0;
  1171. q->u.in.ack_count = 0;
  1172. goto set;
  1173. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1174. if (is_qebsm(q)) {
  1175. /* partial overwrite, just update ack_start */
  1176. diff = add_buf(bufnr, count);
  1177. diff = sub_buf(diff, q->u.in.ack_start);
  1178. q->u.in.ack_count -= diff;
  1179. if (q->u.in.ack_count <= 0) {
  1180. q->u.in.polling = 0;
  1181. q->u.in.ack_count = 0;
  1182. goto set;
  1183. }
  1184. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1185. }
  1186. else
  1187. /* the only ACK will be deleted, so stop polling */
  1188. q->u.in.polling = 0;
  1189. }
  1190. set:
  1191. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1192. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1193. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1194. /* no need to signal as long as the adapter had free buffers */
  1195. if (used)
  1196. return 0;
  1197. if (need_siga_in(q))
  1198. return qdio_siga_input(q);
  1199. return 0;
  1200. }
  1201. /**
  1202. * handle_outbound - process filled outbound buffers
  1203. * @q: queue containing the buffers
  1204. * @callflags: flags
  1205. * @bufnr: first buffer to process
  1206. * @count: how many buffers are filled
  1207. */
  1208. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1209. int bufnr, int count)
  1210. {
  1211. unsigned char state;
  1212. int used, rc = 0;
  1213. qdio_perf_stat_inc(&perf_stats.outbound_handler);
  1214. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1215. used = atomic_add_return(count, &q->nr_buf_used);
  1216. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1217. if (callflags & QDIO_FLAG_PCI_OUT)
  1218. q->u.out.pci_out_enabled = 1;
  1219. else
  1220. q->u.out.pci_out_enabled = 0;
  1221. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1222. if (multicast_outbound(q))
  1223. rc = qdio_kick_outbound_q(q);
  1224. else
  1225. if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
  1226. (count > 1) &&
  1227. (count <= q->irq_ptr->ssqd_desc.mmwc)) {
  1228. /* exploit enhanced SIGA */
  1229. q->u.out.use_enh_siga = 1;
  1230. rc = qdio_kick_outbound_q(q);
  1231. } else {
  1232. /*
  1233. * One siga-w per buffer required for unicast
  1234. * HiperSockets.
  1235. */
  1236. q->u.out.use_enh_siga = 0;
  1237. while (count--) {
  1238. rc = qdio_kick_outbound_q(q);
  1239. if (rc)
  1240. goto out;
  1241. }
  1242. }
  1243. goto out;
  1244. }
  1245. if (need_siga_sync(q)) {
  1246. qdio_siga_sync_q(q);
  1247. goto out;
  1248. }
  1249. /* try to fast requeue buffers */
  1250. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1251. if (state != SLSB_CU_OUTPUT_PRIMED)
  1252. rc = qdio_kick_outbound_q(q);
  1253. else {
  1254. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "fast-req");
  1255. qdio_perf_stat_inc(&perf_stats.fast_requeue);
  1256. }
  1257. out:
  1258. tasklet_schedule(&q->tasklet);
  1259. return rc;
  1260. }
  1261. /**
  1262. * do_QDIO - process input or output buffers
  1263. * @cdev: associated ccw_device for the qdio subchannel
  1264. * @callflags: input or output and special flags from the program
  1265. * @q_nr: queue number
  1266. * @bufnr: buffer number
  1267. * @count: how many buffers to process
  1268. */
  1269. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1270. int q_nr, unsigned int bufnr, unsigned int count)
  1271. {
  1272. struct qdio_irq *irq_ptr;
  1273. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1274. return -EINVAL;
  1275. irq_ptr = cdev->private->qdio_data;
  1276. if (!irq_ptr)
  1277. return -ENODEV;
  1278. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1279. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO input");
  1280. else
  1281. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO output");
  1282. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "q:%1d flag:%4x", q_nr, callflags);
  1283. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "buf:%2d cnt:%3d", bufnr, count);
  1284. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1285. return -EBUSY;
  1286. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1287. return handle_inbound(irq_ptr->input_qs[q_nr],
  1288. callflags, bufnr, count);
  1289. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1290. return handle_outbound(irq_ptr->output_qs[q_nr],
  1291. callflags, bufnr, count);
  1292. return -EINVAL;
  1293. }
  1294. EXPORT_SYMBOL_GPL(do_QDIO);
  1295. static int __init init_QDIO(void)
  1296. {
  1297. int rc;
  1298. rc = qdio_setup_init();
  1299. if (rc)
  1300. return rc;
  1301. rc = tiqdio_allocate_memory();
  1302. if (rc)
  1303. goto out_cache;
  1304. rc = qdio_debug_init();
  1305. if (rc)
  1306. goto out_ti;
  1307. rc = qdio_setup_perf_stats();
  1308. if (rc)
  1309. goto out_debug;
  1310. rc = tiqdio_register_thinints();
  1311. if (rc)
  1312. goto out_perf;
  1313. return 0;
  1314. out_perf:
  1315. qdio_remove_perf_stats();
  1316. out_debug:
  1317. qdio_debug_exit();
  1318. out_ti:
  1319. tiqdio_free_memory();
  1320. out_cache:
  1321. qdio_setup_exit();
  1322. return rc;
  1323. }
  1324. static void __exit exit_QDIO(void)
  1325. {
  1326. tiqdio_unregister_thinints();
  1327. tiqdio_free_memory();
  1328. qdio_remove_perf_stats();
  1329. qdio_debug_exit();
  1330. qdio_setup_exit();
  1331. }
  1332. module_init(init_QDIO);
  1333. module_exit(exit_QDIO);