cnic.c 67 KB

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  1. /* cnic.c: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2009 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10. * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/uio_driver.h>
  21. #include <linux/in.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/delay.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/if_vlan.h>
  26. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  27. #define BCM_VLAN 1
  28. #endif
  29. #include <net/ip.h>
  30. #include <net/tcp.h>
  31. #include <net/route.h>
  32. #include <net/ipv6.h>
  33. #include <net/ip6_route.h>
  34. #include <scsi/iscsi_if.h>
  35. #include "cnic_if.h"
  36. #include "bnx2.h"
  37. #include "cnic.h"
  38. #include "cnic_defs.h"
  39. #define DRV_MODULE_NAME "cnic"
  40. #define PFX DRV_MODULE_NAME ": "
  41. static char version[] __devinitdata =
  42. "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  43. MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  44. "Chen (zongxi@broadcom.com");
  45. MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  46. MODULE_LICENSE("GPL");
  47. MODULE_VERSION(CNIC_MODULE_VERSION);
  48. static LIST_HEAD(cnic_dev_list);
  49. static DEFINE_RWLOCK(cnic_dev_lock);
  50. static DEFINE_MUTEX(cnic_lock);
  51. static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  52. static int cnic_service_bnx2(void *, void *);
  53. static int cnic_ctl(void *, struct cnic_ctl_info *);
  54. static struct cnic_ops cnic_bnx2_ops = {
  55. .cnic_owner = THIS_MODULE,
  56. .cnic_handler = cnic_service_bnx2,
  57. .cnic_ctl = cnic_ctl,
  58. };
  59. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
  60. static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
  61. static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
  62. static int cnic_cm_set_pg(struct cnic_sock *);
  63. static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  64. {
  65. struct cnic_dev *dev = uinfo->priv;
  66. struct cnic_local *cp = dev->cnic_priv;
  67. if (!capable(CAP_NET_ADMIN))
  68. return -EPERM;
  69. if (cp->uio_dev != -1)
  70. return -EBUSY;
  71. cp->uio_dev = iminor(inode);
  72. cnic_shutdown_bnx2_rx_ring(dev);
  73. cnic_init_bnx2_tx_ring(dev);
  74. cnic_init_bnx2_rx_ring(dev);
  75. return 0;
  76. }
  77. static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
  78. {
  79. struct cnic_dev *dev = uinfo->priv;
  80. struct cnic_local *cp = dev->cnic_priv;
  81. cp->uio_dev = -1;
  82. return 0;
  83. }
  84. static inline void cnic_hold(struct cnic_dev *dev)
  85. {
  86. atomic_inc(&dev->ref_count);
  87. }
  88. static inline void cnic_put(struct cnic_dev *dev)
  89. {
  90. atomic_dec(&dev->ref_count);
  91. }
  92. static inline void csk_hold(struct cnic_sock *csk)
  93. {
  94. atomic_inc(&csk->ref_count);
  95. }
  96. static inline void csk_put(struct cnic_sock *csk)
  97. {
  98. atomic_dec(&csk->ref_count);
  99. }
  100. static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
  101. {
  102. struct cnic_dev *cdev;
  103. read_lock(&cnic_dev_lock);
  104. list_for_each_entry(cdev, &cnic_dev_list, list) {
  105. if (netdev == cdev->netdev) {
  106. cnic_hold(cdev);
  107. read_unlock(&cnic_dev_lock);
  108. return cdev;
  109. }
  110. }
  111. read_unlock(&cnic_dev_lock);
  112. return NULL;
  113. }
  114. static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
  115. {
  116. atomic_inc(&ulp_ops->ref_count);
  117. }
  118. static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
  119. {
  120. atomic_dec(&ulp_ops->ref_count);
  121. }
  122. static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
  123. {
  124. struct cnic_local *cp = dev->cnic_priv;
  125. struct cnic_eth_dev *ethdev = cp->ethdev;
  126. struct drv_ctl_info info;
  127. struct drv_ctl_io *io = &info.data.io;
  128. info.cmd = DRV_CTL_CTX_WR_CMD;
  129. io->cid_addr = cid_addr;
  130. io->offset = off;
  131. io->data = val;
  132. ethdev->drv_ctl(dev->netdev, &info);
  133. }
  134. static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
  135. {
  136. struct cnic_local *cp = dev->cnic_priv;
  137. struct cnic_eth_dev *ethdev = cp->ethdev;
  138. struct drv_ctl_info info;
  139. struct drv_ctl_io *io = &info.data.io;
  140. info.cmd = DRV_CTL_IO_WR_CMD;
  141. io->offset = off;
  142. io->data = val;
  143. ethdev->drv_ctl(dev->netdev, &info);
  144. }
  145. static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
  146. {
  147. struct cnic_local *cp = dev->cnic_priv;
  148. struct cnic_eth_dev *ethdev = cp->ethdev;
  149. struct drv_ctl_info info;
  150. struct drv_ctl_io *io = &info.data.io;
  151. info.cmd = DRV_CTL_IO_RD_CMD;
  152. io->offset = off;
  153. ethdev->drv_ctl(dev->netdev, &info);
  154. return io->data;
  155. }
  156. static int cnic_in_use(struct cnic_sock *csk)
  157. {
  158. return test_bit(SK_F_INUSE, &csk->flags);
  159. }
  160. static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
  161. {
  162. struct cnic_local *cp = dev->cnic_priv;
  163. struct cnic_eth_dev *ethdev = cp->ethdev;
  164. struct drv_ctl_info info;
  165. info.cmd = DRV_CTL_COMPLETION_CMD;
  166. info.data.comp.comp_count = count;
  167. ethdev->drv_ctl(dev->netdev, &info);
  168. }
  169. static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
  170. struct cnic_sock *csk)
  171. {
  172. struct iscsi_path path_req;
  173. char *buf = NULL;
  174. u16 len = 0;
  175. u32 msg_type = ISCSI_KEVENT_IF_DOWN;
  176. struct cnic_ulp_ops *ulp_ops;
  177. if (cp->uio_dev == -1)
  178. return -ENODEV;
  179. if (csk) {
  180. len = sizeof(path_req);
  181. buf = (char *) &path_req;
  182. memset(&path_req, 0, len);
  183. msg_type = ISCSI_KEVENT_PATH_REQ;
  184. path_req.handle = (u64) csk->l5_cid;
  185. if (test_bit(SK_F_IPV6, &csk->flags)) {
  186. memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
  187. sizeof(struct in6_addr));
  188. path_req.ip_addr_len = 16;
  189. } else {
  190. memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
  191. sizeof(struct in_addr));
  192. path_req.ip_addr_len = 4;
  193. }
  194. path_req.vlan_id = csk->vlan_id;
  195. path_req.pmtu = csk->mtu;
  196. }
  197. rcu_read_lock();
  198. ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
  199. if (ulp_ops)
  200. ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
  201. rcu_read_unlock();
  202. return 0;
  203. }
  204. static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
  205. char *buf, u16 len)
  206. {
  207. int rc = -EINVAL;
  208. switch (msg_type) {
  209. case ISCSI_UEVENT_PATH_UPDATE: {
  210. struct cnic_local *cp;
  211. u32 l5_cid;
  212. struct cnic_sock *csk;
  213. struct iscsi_path *path_resp;
  214. if (len < sizeof(*path_resp))
  215. break;
  216. path_resp = (struct iscsi_path *) buf;
  217. cp = dev->cnic_priv;
  218. l5_cid = (u32) path_resp->handle;
  219. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  220. break;
  221. csk = &cp->csk_tbl[l5_cid];
  222. csk_hold(csk);
  223. if (cnic_in_use(csk)) {
  224. memcpy(csk->ha, path_resp->mac_addr, 6);
  225. if (test_bit(SK_F_IPV6, &csk->flags))
  226. memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
  227. sizeof(struct in6_addr));
  228. else
  229. memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
  230. sizeof(struct in_addr));
  231. if (is_valid_ether_addr(csk->ha))
  232. cnic_cm_set_pg(csk);
  233. }
  234. csk_put(csk);
  235. rc = 0;
  236. }
  237. }
  238. return rc;
  239. }
  240. static int cnic_offld_prep(struct cnic_sock *csk)
  241. {
  242. if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  243. return 0;
  244. if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
  245. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  246. return 0;
  247. }
  248. return 1;
  249. }
  250. static int cnic_close_prep(struct cnic_sock *csk)
  251. {
  252. clear_bit(SK_F_CONNECT_START, &csk->flags);
  253. smp_mb__after_clear_bit();
  254. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  255. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  256. msleep(1);
  257. return 1;
  258. }
  259. return 0;
  260. }
  261. static int cnic_abort_prep(struct cnic_sock *csk)
  262. {
  263. clear_bit(SK_F_CONNECT_START, &csk->flags);
  264. smp_mb__after_clear_bit();
  265. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  266. msleep(1);
  267. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  268. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  269. return 1;
  270. }
  271. return 0;
  272. }
  273. static void cnic_uio_stop(void)
  274. {
  275. struct cnic_dev *dev;
  276. read_lock(&cnic_dev_lock);
  277. list_for_each_entry(dev, &cnic_dev_list, list) {
  278. struct cnic_local *cp = dev->cnic_priv;
  279. if (cp->cnic_uinfo)
  280. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  281. }
  282. read_unlock(&cnic_dev_lock);
  283. }
  284. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
  285. {
  286. struct cnic_dev *dev;
  287. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  288. printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
  289. ulp_type);
  290. return -EINVAL;
  291. }
  292. mutex_lock(&cnic_lock);
  293. if (cnic_ulp_tbl[ulp_type]) {
  294. printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
  295. "been registered\n", ulp_type);
  296. mutex_unlock(&cnic_lock);
  297. return -EBUSY;
  298. }
  299. read_lock(&cnic_dev_lock);
  300. list_for_each_entry(dev, &cnic_dev_list, list) {
  301. struct cnic_local *cp = dev->cnic_priv;
  302. clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
  303. }
  304. read_unlock(&cnic_dev_lock);
  305. atomic_set(&ulp_ops->ref_count, 0);
  306. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
  307. mutex_unlock(&cnic_lock);
  308. /* Prevent race conditions with netdev_event */
  309. rtnl_lock();
  310. read_lock(&cnic_dev_lock);
  311. list_for_each_entry(dev, &cnic_dev_list, list) {
  312. struct cnic_local *cp = dev->cnic_priv;
  313. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
  314. ulp_ops->cnic_init(dev);
  315. }
  316. read_unlock(&cnic_dev_lock);
  317. rtnl_unlock();
  318. return 0;
  319. }
  320. int cnic_unregister_driver(int ulp_type)
  321. {
  322. struct cnic_dev *dev;
  323. struct cnic_ulp_ops *ulp_ops;
  324. int i = 0;
  325. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  326. printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
  327. ulp_type);
  328. return -EINVAL;
  329. }
  330. mutex_lock(&cnic_lock);
  331. ulp_ops = cnic_ulp_tbl[ulp_type];
  332. if (!ulp_ops) {
  333. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
  334. "been registered\n", ulp_type);
  335. goto out_unlock;
  336. }
  337. read_lock(&cnic_dev_lock);
  338. list_for_each_entry(dev, &cnic_dev_list, list) {
  339. struct cnic_local *cp = dev->cnic_priv;
  340. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  341. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
  342. "still has devices registered\n", ulp_type);
  343. read_unlock(&cnic_dev_lock);
  344. goto out_unlock;
  345. }
  346. }
  347. read_unlock(&cnic_dev_lock);
  348. if (ulp_type == CNIC_ULP_ISCSI)
  349. cnic_uio_stop();
  350. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
  351. mutex_unlock(&cnic_lock);
  352. synchronize_rcu();
  353. while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
  354. msleep(100);
  355. i++;
  356. }
  357. if (atomic_read(&ulp_ops->ref_count) != 0)
  358. printk(KERN_WARNING PFX "%s: Failed waiting for ref count to go"
  359. " to zero.\n", dev->netdev->name);
  360. return 0;
  361. out_unlock:
  362. mutex_unlock(&cnic_lock);
  363. return -EINVAL;
  364. }
  365. static int cnic_start_hw(struct cnic_dev *);
  366. static void cnic_stop_hw(struct cnic_dev *);
  367. static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
  368. void *ulp_ctx)
  369. {
  370. struct cnic_local *cp = dev->cnic_priv;
  371. struct cnic_ulp_ops *ulp_ops;
  372. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  373. printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
  374. ulp_type);
  375. return -EINVAL;
  376. }
  377. mutex_lock(&cnic_lock);
  378. if (cnic_ulp_tbl[ulp_type] == NULL) {
  379. printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
  380. "has not been registered\n", ulp_type);
  381. mutex_unlock(&cnic_lock);
  382. return -EAGAIN;
  383. }
  384. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  385. printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
  386. "been registered to this device\n", ulp_type);
  387. mutex_unlock(&cnic_lock);
  388. return -EBUSY;
  389. }
  390. clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
  391. cp->ulp_handle[ulp_type] = ulp_ctx;
  392. ulp_ops = cnic_ulp_tbl[ulp_type];
  393. rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
  394. cnic_hold(dev);
  395. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  396. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
  397. ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
  398. mutex_unlock(&cnic_lock);
  399. return 0;
  400. }
  401. EXPORT_SYMBOL(cnic_register_driver);
  402. static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
  403. {
  404. struct cnic_local *cp = dev->cnic_priv;
  405. int i = 0;
  406. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  407. printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
  408. ulp_type);
  409. return -EINVAL;
  410. }
  411. mutex_lock(&cnic_lock);
  412. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  413. rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
  414. cnic_put(dev);
  415. } else {
  416. printk(KERN_ERR PFX "cnic_unregister_device: device not "
  417. "registered to this ulp type %d\n", ulp_type);
  418. mutex_unlock(&cnic_lock);
  419. return -EINVAL;
  420. }
  421. mutex_unlock(&cnic_lock);
  422. synchronize_rcu();
  423. while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
  424. i < 20) {
  425. msleep(100);
  426. i++;
  427. }
  428. if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
  429. printk(KERN_WARNING PFX "%s: Failed waiting for ULP up call"
  430. " to complete.\n", dev->netdev->name);
  431. return 0;
  432. }
  433. EXPORT_SYMBOL(cnic_unregister_driver);
  434. static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
  435. {
  436. id_tbl->start = start_id;
  437. id_tbl->max = size;
  438. id_tbl->next = 0;
  439. spin_lock_init(&id_tbl->lock);
  440. id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
  441. if (!id_tbl->table)
  442. return -ENOMEM;
  443. return 0;
  444. }
  445. static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
  446. {
  447. kfree(id_tbl->table);
  448. id_tbl->table = NULL;
  449. }
  450. static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
  451. {
  452. int ret = -1;
  453. id -= id_tbl->start;
  454. if (id >= id_tbl->max)
  455. return ret;
  456. spin_lock(&id_tbl->lock);
  457. if (!test_bit(id, id_tbl->table)) {
  458. set_bit(id, id_tbl->table);
  459. ret = 0;
  460. }
  461. spin_unlock(&id_tbl->lock);
  462. return ret;
  463. }
  464. /* Returns -1 if not successful */
  465. static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
  466. {
  467. u32 id;
  468. spin_lock(&id_tbl->lock);
  469. id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
  470. if (id >= id_tbl->max) {
  471. id = -1;
  472. if (id_tbl->next != 0) {
  473. id = find_first_zero_bit(id_tbl->table, id_tbl->next);
  474. if (id >= id_tbl->next)
  475. id = -1;
  476. }
  477. }
  478. if (id < id_tbl->max) {
  479. set_bit(id, id_tbl->table);
  480. id_tbl->next = (id + 1) & (id_tbl->max - 1);
  481. id += id_tbl->start;
  482. }
  483. spin_unlock(&id_tbl->lock);
  484. return id;
  485. }
  486. static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
  487. {
  488. if (id == -1)
  489. return;
  490. id -= id_tbl->start;
  491. if (id >= id_tbl->max)
  492. return;
  493. clear_bit(id, id_tbl->table);
  494. }
  495. static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
  496. {
  497. int i;
  498. if (!dma->pg_arr)
  499. return;
  500. for (i = 0; i < dma->num_pages; i++) {
  501. if (dma->pg_arr[i]) {
  502. pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
  503. dma->pg_arr[i], dma->pg_map_arr[i]);
  504. dma->pg_arr[i] = NULL;
  505. }
  506. }
  507. if (dma->pgtbl) {
  508. pci_free_consistent(dev->pcidev, dma->pgtbl_size,
  509. dma->pgtbl, dma->pgtbl_map);
  510. dma->pgtbl = NULL;
  511. }
  512. kfree(dma->pg_arr);
  513. dma->pg_arr = NULL;
  514. dma->num_pages = 0;
  515. }
  516. static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
  517. {
  518. int i;
  519. u32 *page_table = dma->pgtbl;
  520. for (i = 0; i < dma->num_pages; i++) {
  521. /* Each entry needs to be in big endian format. */
  522. *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
  523. page_table++;
  524. *page_table = (u32) dma->pg_map_arr[i];
  525. page_table++;
  526. }
  527. }
  528. static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
  529. int pages, int use_pg_tbl)
  530. {
  531. int i, size;
  532. struct cnic_local *cp = dev->cnic_priv;
  533. size = pages * (sizeof(void *) + sizeof(dma_addr_t));
  534. dma->pg_arr = kzalloc(size, GFP_ATOMIC);
  535. if (dma->pg_arr == NULL)
  536. return -ENOMEM;
  537. dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
  538. dma->num_pages = pages;
  539. for (i = 0; i < pages; i++) {
  540. dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
  541. BCM_PAGE_SIZE,
  542. &dma->pg_map_arr[i]);
  543. if (dma->pg_arr[i] == NULL)
  544. goto error;
  545. }
  546. if (!use_pg_tbl)
  547. return 0;
  548. dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
  549. ~(BCM_PAGE_SIZE - 1);
  550. dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
  551. &dma->pgtbl_map);
  552. if (dma->pgtbl == NULL)
  553. goto error;
  554. cp->setup_pgtbl(dev, dma);
  555. return 0;
  556. error:
  557. cnic_free_dma(dev, dma);
  558. return -ENOMEM;
  559. }
  560. static void cnic_free_resc(struct cnic_dev *dev)
  561. {
  562. struct cnic_local *cp = dev->cnic_priv;
  563. int i = 0;
  564. if (cp->cnic_uinfo) {
  565. while (cp->uio_dev != -1 && i < 15) {
  566. msleep(100);
  567. i++;
  568. }
  569. uio_unregister_device(cp->cnic_uinfo);
  570. kfree(cp->cnic_uinfo);
  571. cp->cnic_uinfo = NULL;
  572. }
  573. if (cp->l2_buf) {
  574. pci_free_consistent(dev->pcidev, cp->l2_buf_size,
  575. cp->l2_buf, cp->l2_buf_map);
  576. cp->l2_buf = NULL;
  577. }
  578. if (cp->l2_ring) {
  579. pci_free_consistent(dev->pcidev, cp->l2_ring_size,
  580. cp->l2_ring, cp->l2_ring_map);
  581. cp->l2_ring = NULL;
  582. }
  583. for (i = 0; i < cp->ctx_blks; i++) {
  584. if (cp->ctx_arr[i].ctx) {
  585. pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
  586. cp->ctx_arr[i].ctx,
  587. cp->ctx_arr[i].mapping);
  588. cp->ctx_arr[i].ctx = NULL;
  589. }
  590. }
  591. kfree(cp->ctx_arr);
  592. cp->ctx_arr = NULL;
  593. cp->ctx_blks = 0;
  594. cnic_free_dma(dev, &cp->gbl_buf_info);
  595. cnic_free_dma(dev, &cp->conn_buf_info);
  596. cnic_free_dma(dev, &cp->kwq_info);
  597. cnic_free_dma(dev, &cp->kcq_info);
  598. kfree(cp->iscsi_tbl);
  599. cp->iscsi_tbl = NULL;
  600. kfree(cp->ctx_tbl);
  601. cp->ctx_tbl = NULL;
  602. cnic_free_id_tbl(&cp->cid_tbl);
  603. }
  604. static int cnic_alloc_context(struct cnic_dev *dev)
  605. {
  606. struct cnic_local *cp = dev->cnic_priv;
  607. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  608. int i, k, arr_size;
  609. cp->ctx_blk_size = BCM_PAGE_SIZE;
  610. cp->cids_per_blk = BCM_PAGE_SIZE / 128;
  611. arr_size = BNX2_MAX_CID / cp->cids_per_blk *
  612. sizeof(struct cnic_ctx);
  613. cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
  614. if (cp->ctx_arr == NULL)
  615. return -ENOMEM;
  616. k = 0;
  617. for (i = 0; i < 2; i++) {
  618. u32 j, reg, off, lo, hi;
  619. if (i == 0)
  620. off = BNX2_PG_CTX_MAP;
  621. else
  622. off = BNX2_ISCSI_CTX_MAP;
  623. reg = cnic_reg_rd_ind(dev, off);
  624. lo = reg >> 16;
  625. hi = reg & 0xffff;
  626. for (j = lo; j < hi; j += cp->cids_per_blk, k++)
  627. cp->ctx_arr[k].cid = j;
  628. }
  629. cp->ctx_blks = k;
  630. if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
  631. cp->ctx_blks = 0;
  632. return -ENOMEM;
  633. }
  634. for (i = 0; i < cp->ctx_blks; i++) {
  635. cp->ctx_arr[i].ctx =
  636. pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
  637. &cp->ctx_arr[i].mapping);
  638. if (cp->ctx_arr[i].ctx == NULL)
  639. return -ENOMEM;
  640. }
  641. }
  642. return 0;
  643. }
  644. static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
  645. {
  646. struct cnic_local *cp = dev->cnic_priv;
  647. cp->l2_ring_size = pages * BCM_PAGE_SIZE;
  648. cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
  649. &cp->l2_ring_map);
  650. if (!cp->l2_ring)
  651. return -ENOMEM;
  652. cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
  653. cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
  654. cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
  655. &cp->l2_buf_map);
  656. if (!cp->l2_buf)
  657. return -ENOMEM;
  658. return 0;
  659. }
  660. static int cnic_alloc_uio(struct cnic_dev *dev) {
  661. struct cnic_local *cp = dev->cnic_priv;
  662. struct uio_info *uinfo;
  663. int ret;
  664. uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
  665. if (!uinfo)
  666. return -ENOMEM;
  667. uinfo->mem[0].addr = dev->netdev->base_addr;
  668. uinfo->mem[0].internal_addr = dev->regview;
  669. uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
  670. uinfo->mem[0].memtype = UIO_MEM_PHYS;
  671. uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
  672. if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
  673. if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
  674. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
  675. else
  676. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
  677. uinfo->name = "bnx2_cnic";
  678. }
  679. uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
  680. uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
  681. uinfo->mem[2].size = cp->l2_ring_size;
  682. uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
  683. uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
  684. uinfo->mem[3].size = cp->l2_buf_size;
  685. uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
  686. uinfo->version = CNIC_MODULE_VERSION;
  687. uinfo->irq = UIO_IRQ_CUSTOM;
  688. uinfo->open = cnic_uio_open;
  689. uinfo->release = cnic_uio_close;
  690. uinfo->priv = dev;
  691. ret = uio_register_device(&dev->pcidev->dev, uinfo);
  692. if (ret) {
  693. kfree(uinfo);
  694. return ret;
  695. }
  696. cp->cnic_uinfo = uinfo;
  697. return 0;
  698. }
  699. static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
  700. {
  701. struct cnic_local *cp = dev->cnic_priv;
  702. int ret;
  703. ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
  704. if (ret)
  705. goto error;
  706. cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
  707. ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
  708. if (ret)
  709. goto error;
  710. cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
  711. ret = cnic_alloc_context(dev);
  712. if (ret)
  713. goto error;
  714. ret = cnic_alloc_l2_rings(dev, 2);
  715. if (ret)
  716. goto error;
  717. ret = cnic_alloc_uio(dev);
  718. if (ret)
  719. goto error;
  720. return 0;
  721. error:
  722. cnic_free_resc(dev);
  723. return ret;
  724. }
  725. static inline u32 cnic_kwq_avail(struct cnic_local *cp)
  726. {
  727. return cp->max_kwq_idx -
  728. ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
  729. }
  730. static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
  731. u32 num_wqes)
  732. {
  733. struct cnic_local *cp = dev->cnic_priv;
  734. struct kwqe *prod_qe;
  735. u16 prod, sw_prod, i;
  736. if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
  737. return -EAGAIN; /* bnx2 is down */
  738. spin_lock_bh(&cp->cnic_ulp_lock);
  739. if (num_wqes > cnic_kwq_avail(cp) &&
  740. !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
  741. spin_unlock_bh(&cp->cnic_ulp_lock);
  742. return -EAGAIN;
  743. }
  744. cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
  745. prod = cp->kwq_prod_idx;
  746. sw_prod = prod & MAX_KWQ_IDX;
  747. for (i = 0; i < num_wqes; i++) {
  748. prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
  749. memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
  750. prod++;
  751. sw_prod = prod & MAX_KWQ_IDX;
  752. }
  753. cp->kwq_prod_idx = prod;
  754. CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
  755. spin_unlock_bh(&cp->cnic_ulp_lock);
  756. return 0;
  757. }
  758. static void service_kcqes(struct cnic_dev *dev, int num_cqes)
  759. {
  760. struct cnic_local *cp = dev->cnic_priv;
  761. int i, j;
  762. i = 0;
  763. j = 1;
  764. while (num_cqes) {
  765. struct cnic_ulp_ops *ulp_ops;
  766. int ulp_type;
  767. u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
  768. u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
  769. if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
  770. cnic_kwq_completion(dev, 1);
  771. while (j < num_cqes) {
  772. u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
  773. if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
  774. break;
  775. if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
  776. cnic_kwq_completion(dev, 1);
  777. j++;
  778. }
  779. if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
  780. ulp_type = CNIC_ULP_RDMA;
  781. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
  782. ulp_type = CNIC_ULP_ISCSI;
  783. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
  784. ulp_type = CNIC_ULP_L4;
  785. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
  786. goto end;
  787. else {
  788. printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
  789. dev->netdev->name, kcqe_op_flag);
  790. goto end;
  791. }
  792. rcu_read_lock();
  793. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  794. if (likely(ulp_ops)) {
  795. ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
  796. cp->completed_kcq + i, j);
  797. }
  798. rcu_read_unlock();
  799. end:
  800. num_cqes -= j;
  801. i += j;
  802. j = 1;
  803. }
  804. return;
  805. }
  806. static u16 cnic_bnx2_next_idx(u16 idx)
  807. {
  808. return idx + 1;
  809. }
  810. static u16 cnic_bnx2_hw_idx(u16 idx)
  811. {
  812. return idx;
  813. }
  814. static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
  815. {
  816. struct cnic_local *cp = dev->cnic_priv;
  817. u16 i, ri, last;
  818. struct kcqe *kcqe;
  819. int kcqe_cnt = 0, last_cnt = 0;
  820. i = ri = last = *sw_prod;
  821. ri &= MAX_KCQ_IDX;
  822. while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
  823. kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
  824. cp->completed_kcq[kcqe_cnt++] = kcqe;
  825. i = cp->next_idx(i);
  826. ri = i & MAX_KCQ_IDX;
  827. if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
  828. last_cnt = kcqe_cnt;
  829. last = i;
  830. }
  831. }
  832. *sw_prod = last;
  833. return last_cnt;
  834. }
  835. static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
  836. {
  837. u16 rx_cons = *cp->rx_cons_ptr;
  838. u16 tx_cons = *cp->tx_cons_ptr;
  839. if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
  840. cp->tx_cons = tx_cons;
  841. cp->rx_cons = rx_cons;
  842. uio_event_notify(cp->cnic_uinfo);
  843. }
  844. }
  845. static int cnic_service_bnx2(void *data, void *status_blk)
  846. {
  847. struct cnic_dev *dev = data;
  848. struct status_block *sblk = status_blk;
  849. struct cnic_local *cp = dev->cnic_priv;
  850. u32 status_idx = sblk->status_idx;
  851. u16 hw_prod, sw_prod;
  852. int kcqe_cnt;
  853. if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  854. return status_idx;
  855. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  856. hw_prod = sblk->status_completion_producer_index;
  857. sw_prod = cp->kcq_prod_idx;
  858. while (sw_prod != hw_prod) {
  859. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  860. if (kcqe_cnt == 0)
  861. goto done;
  862. service_kcqes(dev, kcqe_cnt);
  863. /* Tell compiler that status_blk fields can change. */
  864. barrier();
  865. if (status_idx != sblk->status_idx) {
  866. status_idx = sblk->status_idx;
  867. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  868. hw_prod = sblk->status_completion_producer_index;
  869. } else
  870. break;
  871. }
  872. done:
  873. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  874. cp->kcq_prod_idx = sw_prod;
  875. cnic_chk_bnx2_pkt_rings(cp);
  876. return status_idx;
  877. }
  878. static void cnic_service_bnx2_msix(unsigned long data)
  879. {
  880. struct cnic_dev *dev = (struct cnic_dev *) data;
  881. struct cnic_local *cp = dev->cnic_priv;
  882. struct status_block_msix *status_blk = cp->bnx2_status_blk;
  883. u32 status_idx = status_blk->status_idx;
  884. u16 hw_prod, sw_prod;
  885. int kcqe_cnt;
  886. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  887. hw_prod = status_blk->status_completion_producer_index;
  888. sw_prod = cp->kcq_prod_idx;
  889. while (sw_prod != hw_prod) {
  890. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  891. if (kcqe_cnt == 0)
  892. goto done;
  893. service_kcqes(dev, kcqe_cnt);
  894. /* Tell compiler that status_blk fields can change. */
  895. barrier();
  896. if (status_idx != status_blk->status_idx) {
  897. status_idx = status_blk->status_idx;
  898. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  899. hw_prod = status_blk->status_completion_producer_index;
  900. } else
  901. break;
  902. }
  903. done:
  904. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  905. cp->kcq_prod_idx = sw_prod;
  906. cnic_chk_bnx2_pkt_rings(cp);
  907. cp->last_status_idx = status_idx;
  908. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  909. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  910. }
  911. static irqreturn_t cnic_irq(int irq, void *dev_instance)
  912. {
  913. struct cnic_dev *dev = dev_instance;
  914. struct cnic_local *cp = dev->cnic_priv;
  915. u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
  916. if (cp->ack_int)
  917. cp->ack_int(dev);
  918. prefetch(cp->status_blk);
  919. prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
  920. if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  921. tasklet_schedule(&cp->cnic_irq_task);
  922. return IRQ_HANDLED;
  923. }
  924. static void cnic_ulp_stop(struct cnic_dev *dev)
  925. {
  926. struct cnic_local *cp = dev->cnic_priv;
  927. int if_type;
  928. if (cp->cnic_uinfo)
  929. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  930. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  931. struct cnic_ulp_ops *ulp_ops;
  932. mutex_lock(&cnic_lock);
  933. ulp_ops = cp->ulp_ops[if_type];
  934. if (!ulp_ops) {
  935. mutex_unlock(&cnic_lock);
  936. continue;
  937. }
  938. set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  939. mutex_unlock(&cnic_lock);
  940. if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  941. ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
  942. clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  943. }
  944. }
  945. static void cnic_ulp_start(struct cnic_dev *dev)
  946. {
  947. struct cnic_local *cp = dev->cnic_priv;
  948. int if_type;
  949. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  950. struct cnic_ulp_ops *ulp_ops;
  951. mutex_lock(&cnic_lock);
  952. ulp_ops = cp->ulp_ops[if_type];
  953. if (!ulp_ops || !ulp_ops->cnic_start) {
  954. mutex_unlock(&cnic_lock);
  955. continue;
  956. }
  957. set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  958. mutex_unlock(&cnic_lock);
  959. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  960. ulp_ops->cnic_start(cp->ulp_handle[if_type]);
  961. clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
  962. }
  963. }
  964. static int cnic_ctl(void *data, struct cnic_ctl_info *info)
  965. {
  966. struct cnic_dev *dev = data;
  967. switch (info->cmd) {
  968. case CNIC_CTL_STOP_CMD:
  969. cnic_hold(dev);
  970. cnic_ulp_stop(dev);
  971. cnic_stop_hw(dev);
  972. cnic_put(dev);
  973. break;
  974. case CNIC_CTL_START_CMD:
  975. cnic_hold(dev);
  976. if (!cnic_start_hw(dev))
  977. cnic_ulp_start(dev);
  978. cnic_put(dev);
  979. break;
  980. default:
  981. return -EINVAL;
  982. }
  983. return 0;
  984. }
  985. static void cnic_ulp_init(struct cnic_dev *dev)
  986. {
  987. int i;
  988. struct cnic_local *cp = dev->cnic_priv;
  989. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  990. struct cnic_ulp_ops *ulp_ops;
  991. mutex_lock(&cnic_lock);
  992. ulp_ops = cnic_ulp_tbl[i];
  993. if (!ulp_ops || !ulp_ops->cnic_init) {
  994. mutex_unlock(&cnic_lock);
  995. continue;
  996. }
  997. ulp_get(ulp_ops);
  998. mutex_unlock(&cnic_lock);
  999. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  1000. ulp_ops->cnic_init(dev);
  1001. ulp_put(ulp_ops);
  1002. }
  1003. }
  1004. static void cnic_ulp_exit(struct cnic_dev *dev)
  1005. {
  1006. int i;
  1007. struct cnic_local *cp = dev->cnic_priv;
  1008. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  1009. struct cnic_ulp_ops *ulp_ops;
  1010. mutex_lock(&cnic_lock);
  1011. ulp_ops = cnic_ulp_tbl[i];
  1012. if (!ulp_ops || !ulp_ops->cnic_exit) {
  1013. mutex_unlock(&cnic_lock);
  1014. continue;
  1015. }
  1016. ulp_get(ulp_ops);
  1017. mutex_unlock(&cnic_lock);
  1018. if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  1019. ulp_ops->cnic_exit(dev);
  1020. ulp_put(ulp_ops);
  1021. }
  1022. }
  1023. static int cnic_cm_offload_pg(struct cnic_sock *csk)
  1024. {
  1025. struct cnic_dev *dev = csk->dev;
  1026. struct l4_kwq_offload_pg *l4kwqe;
  1027. struct kwqe *wqes[1];
  1028. l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
  1029. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1030. wqes[0] = (struct kwqe *) l4kwqe;
  1031. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
  1032. l4kwqe->flags =
  1033. L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
  1034. l4kwqe->l2hdr_nbytes = ETH_HLEN;
  1035. l4kwqe->da0 = csk->ha[0];
  1036. l4kwqe->da1 = csk->ha[1];
  1037. l4kwqe->da2 = csk->ha[2];
  1038. l4kwqe->da3 = csk->ha[3];
  1039. l4kwqe->da4 = csk->ha[4];
  1040. l4kwqe->da5 = csk->ha[5];
  1041. l4kwqe->sa0 = dev->mac_addr[0];
  1042. l4kwqe->sa1 = dev->mac_addr[1];
  1043. l4kwqe->sa2 = dev->mac_addr[2];
  1044. l4kwqe->sa3 = dev->mac_addr[3];
  1045. l4kwqe->sa4 = dev->mac_addr[4];
  1046. l4kwqe->sa5 = dev->mac_addr[5];
  1047. l4kwqe->etype = ETH_P_IP;
  1048. l4kwqe->ipid_count = DEF_IPID_COUNT;
  1049. l4kwqe->host_opaque = csk->l5_cid;
  1050. if (csk->vlan_id) {
  1051. l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
  1052. l4kwqe->vlan_tag = csk->vlan_id;
  1053. l4kwqe->l2hdr_nbytes += 4;
  1054. }
  1055. return dev->submit_kwqes(dev, wqes, 1);
  1056. }
  1057. static int cnic_cm_update_pg(struct cnic_sock *csk)
  1058. {
  1059. struct cnic_dev *dev = csk->dev;
  1060. struct l4_kwq_update_pg *l4kwqe;
  1061. struct kwqe *wqes[1];
  1062. l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
  1063. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1064. wqes[0] = (struct kwqe *) l4kwqe;
  1065. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
  1066. l4kwqe->flags =
  1067. L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
  1068. l4kwqe->pg_cid = csk->pg_cid;
  1069. l4kwqe->da0 = csk->ha[0];
  1070. l4kwqe->da1 = csk->ha[1];
  1071. l4kwqe->da2 = csk->ha[2];
  1072. l4kwqe->da3 = csk->ha[3];
  1073. l4kwqe->da4 = csk->ha[4];
  1074. l4kwqe->da5 = csk->ha[5];
  1075. l4kwqe->pg_host_opaque = csk->l5_cid;
  1076. l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
  1077. return dev->submit_kwqes(dev, wqes, 1);
  1078. }
  1079. static int cnic_cm_upload_pg(struct cnic_sock *csk)
  1080. {
  1081. struct cnic_dev *dev = csk->dev;
  1082. struct l4_kwq_upload *l4kwqe;
  1083. struct kwqe *wqes[1];
  1084. l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
  1085. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1086. wqes[0] = (struct kwqe *) l4kwqe;
  1087. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
  1088. l4kwqe->flags =
  1089. L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
  1090. l4kwqe->cid = csk->pg_cid;
  1091. return dev->submit_kwqes(dev, wqes, 1);
  1092. }
  1093. static int cnic_cm_conn_req(struct cnic_sock *csk)
  1094. {
  1095. struct cnic_dev *dev = csk->dev;
  1096. struct l4_kwq_connect_req1 *l4kwqe1;
  1097. struct l4_kwq_connect_req2 *l4kwqe2;
  1098. struct l4_kwq_connect_req3 *l4kwqe3;
  1099. struct kwqe *wqes[3];
  1100. u8 tcp_flags = 0;
  1101. int num_wqes = 2;
  1102. l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
  1103. l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
  1104. l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
  1105. memset(l4kwqe1, 0, sizeof(*l4kwqe1));
  1106. memset(l4kwqe2, 0, sizeof(*l4kwqe2));
  1107. memset(l4kwqe3, 0, sizeof(*l4kwqe3));
  1108. l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
  1109. l4kwqe3->flags =
  1110. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
  1111. l4kwqe3->ka_timeout = csk->ka_timeout;
  1112. l4kwqe3->ka_interval = csk->ka_interval;
  1113. l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
  1114. l4kwqe3->tos = csk->tos;
  1115. l4kwqe3->ttl = csk->ttl;
  1116. l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
  1117. l4kwqe3->pmtu = csk->mtu;
  1118. l4kwqe3->rcv_buf = csk->rcv_buf;
  1119. l4kwqe3->snd_buf = csk->snd_buf;
  1120. l4kwqe3->seed = csk->seed;
  1121. wqes[0] = (struct kwqe *) l4kwqe1;
  1122. if (test_bit(SK_F_IPV6, &csk->flags)) {
  1123. wqes[1] = (struct kwqe *) l4kwqe2;
  1124. wqes[2] = (struct kwqe *) l4kwqe3;
  1125. num_wqes = 3;
  1126. l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
  1127. l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
  1128. l4kwqe2->flags =
  1129. L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
  1130. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
  1131. l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
  1132. l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
  1133. l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
  1134. l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
  1135. l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
  1136. l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
  1137. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
  1138. sizeof(struct tcphdr);
  1139. } else {
  1140. wqes[1] = (struct kwqe *) l4kwqe3;
  1141. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
  1142. sizeof(struct tcphdr);
  1143. }
  1144. l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
  1145. l4kwqe1->flags =
  1146. (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
  1147. L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
  1148. l4kwqe1->cid = csk->cid;
  1149. l4kwqe1->pg_cid = csk->pg_cid;
  1150. l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
  1151. l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
  1152. l4kwqe1->src_port = be16_to_cpu(csk->src_port);
  1153. l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
  1154. if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
  1155. tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
  1156. if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
  1157. tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
  1158. if (csk->tcp_flags & SK_TCP_NAGLE)
  1159. tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
  1160. if (csk->tcp_flags & SK_TCP_TIMESTAMP)
  1161. tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
  1162. if (csk->tcp_flags & SK_TCP_SACK)
  1163. tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
  1164. if (csk->tcp_flags & SK_TCP_SEG_SCALING)
  1165. tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
  1166. l4kwqe1->tcp_flags = tcp_flags;
  1167. return dev->submit_kwqes(dev, wqes, num_wqes);
  1168. }
  1169. static int cnic_cm_close_req(struct cnic_sock *csk)
  1170. {
  1171. struct cnic_dev *dev = csk->dev;
  1172. struct l4_kwq_close_req *l4kwqe;
  1173. struct kwqe *wqes[1];
  1174. l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
  1175. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1176. wqes[0] = (struct kwqe *) l4kwqe;
  1177. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
  1178. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
  1179. l4kwqe->cid = csk->cid;
  1180. return dev->submit_kwqes(dev, wqes, 1);
  1181. }
  1182. static int cnic_cm_abort_req(struct cnic_sock *csk)
  1183. {
  1184. struct cnic_dev *dev = csk->dev;
  1185. struct l4_kwq_reset_req *l4kwqe;
  1186. struct kwqe *wqes[1];
  1187. l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
  1188. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1189. wqes[0] = (struct kwqe *) l4kwqe;
  1190. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
  1191. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
  1192. l4kwqe->cid = csk->cid;
  1193. return dev->submit_kwqes(dev, wqes, 1);
  1194. }
  1195. static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
  1196. u32 l5_cid, struct cnic_sock **csk, void *context)
  1197. {
  1198. struct cnic_local *cp = dev->cnic_priv;
  1199. struct cnic_sock *csk1;
  1200. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1201. return -EINVAL;
  1202. csk1 = &cp->csk_tbl[l5_cid];
  1203. if (atomic_read(&csk1->ref_count))
  1204. return -EAGAIN;
  1205. if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
  1206. return -EBUSY;
  1207. csk1->dev = dev;
  1208. csk1->cid = cid;
  1209. csk1->l5_cid = l5_cid;
  1210. csk1->ulp_type = ulp_type;
  1211. csk1->context = context;
  1212. csk1->ka_timeout = DEF_KA_TIMEOUT;
  1213. csk1->ka_interval = DEF_KA_INTERVAL;
  1214. csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
  1215. csk1->tos = DEF_TOS;
  1216. csk1->ttl = DEF_TTL;
  1217. csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
  1218. csk1->rcv_buf = DEF_RCV_BUF;
  1219. csk1->snd_buf = DEF_SND_BUF;
  1220. csk1->seed = DEF_SEED;
  1221. *csk = csk1;
  1222. return 0;
  1223. }
  1224. static void cnic_cm_cleanup(struct cnic_sock *csk)
  1225. {
  1226. if (csk->src_port) {
  1227. struct cnic_dev *dev = csk->dev;
  1228. struct cnic_local *cp = dev->cnic_priv;
  1229. cnic_free_id(&cp->csk_port_tbl, csk->src_port);
  1230. csk->src_port = 0;
  1231. }
  1232. }
  1233. static void cnic_close_conn(struct cnic_sock *csk)
  1234. {
  1235. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
  1236. cnic_cm_upload_pg(csk);
  1237. clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1238. }
  1239. cnic_cm_cleanup(csk);
  1240. }
  1241. static int cnic_cm_destroy(struct cnic_sock *csk)
  1242. {
  1243. if (!cnic_in_use(csk))
  1244. return -EINVAL;
  1245. csk_hold(csk);
  1246. clear_bit(SK_F_INUSE, &csk->flags);
  1247. smp_mb__after_clear_bit();
  1248. while (atomic_read(&csk->ref_count) != 1)
  1249. msleep(1);
  1250. cnic_cm_cleanup(csk);
  1251. csk->flags = 0;
  1252. csk_put(csk);
  1253. return 0;
  1254. }
  1255. static inline u16 cnic_get_vlan(struct net_device *dev,
  1256. struct net_device **vlan_dev)
  1257. {
  1258. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  1259. *vlan_dev = vlan_dev_real_dev(dev);
  1260. return vlan_dev_vlan_id(dev);
  1261. }
  1262. *vlan_dev = dev;
  1263. return 0;
  1264. }
  1265. static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
  1266. struct dst_entry **dst)
  1267. {
  1268. #if defined(CONFIG_INET)
  1269. struct flowi fl;
  1270. int err;
  1271. struct rtable *rt;
  1272. memset(&fl, 0, sizeof(fl));
  1273. fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
  1274. err = ip_route_output_key(&init_net, &rt, &fl);
  1275. if (!err)
  1276. *dst = &rt->u.dst;
  1277. return err;
  1278. #else
  1279. return -ENETUNREACH;
  1280. #endif
  1281. }
  1282. static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
  1283. struct dst_entry **dst)
  1284. {
  1285. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1286. struct flowi fl;
  1287. memset(&fl, 0, sizeof(fl));
  1288. ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
  1289. if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
  1290. fl.oif = dst_addr->sin6_scope_id;
  1291. *dst = ip6_route_output(&init_net, NULL, &fl);
  1292. if (*dst)
  1293. return 0;
  1294. #endif
  1295. return -ENETUNREACH;
  1296. }
  1297. static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
  1298. int ulp_type)
  1299. {
  1300. struct cnic_dev *dev = NULL;
  1301. struct dst_entry *dst;
  1302. struct net_device *netdev = NULL;
  1303. int err = -ENETUNREACH;
  1304. if (dst_addr->sin_family == AF_INET)
  1305. err = cnic_get_v4_route(dst_addr, &dst);
  1306. else if (dst_addr->sin_family == AF_INET6) {
  1307. struct sockaddr_in6 *dst_addr6 =
  1308. (struct sockaddr_in6 *) dst_addr;
  1309. err = cnic_get_v6_route(dst_addr6, &dst);
  1310. } else
  1311. return NULL;
  1312. if (err)
  1313. return NULL;
  1314. if (!dst->dev)
  1315. goto done;
  1316. cnic_get_vlan(dst->dev, &netdev);
  1317. dev = cnic_from_netdev(netdev);
  1318. done:
  1319. dst_release(dst);
  1320. if (dev)
  1321. cnic_put(dev);
  1322. return dev;
  1323. }
  1324. static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1325. {
  1326. struct cnic_dev *dev = csk->dev;
  1327. struct cnic_local *cp = dev->cnic_priv;
  1328. return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
  1329. }
  1330. static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1331. {
  1332. struct cnic_dev *dev = csk->dev;
  1333. struct cnic_local *cp = dev->cnic_priv;
  1334. int is_v6, err, rc = -ENETUNREACH;
  1335. struct dst_entry *dst;
  1336. struct net_device *realdev;
  1337. u32 local_port;
  1338. if (saddr->local.v6.sin6_family == AF_INET6 &&
  1339. saddr->remote.v6.sin6_family == AF_INET6)
  1340. is_v6 = 1;
  1341. else if (saddr->local.v4.sin_family == AF_INET &&
  1342. saddr->remote.v4.sin_family == AF_INET)
  1343. is_v6 = 0;
  1344. else
  1345. return -EINVAL;
  1346. clear_bit(SK_F_IPV6, &csk->flags);
  1347. if (is_v6) {
  1348. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1349. set_bit(SK_F_IPV6, &csk->flags);
  1350. err = cnic_get_v6_route(&saddr->remote.v6, &dst);
  1351. if (err)
  1352. return err;
  1353. if (!dst || dst->error || !dst->dev)
  1354. goto err_out;
  1355. memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
  1356. sizeof(struct in6_addr));
  1357. csk->dst_port = saddr->remote.v6.sin6_port;
  1358. local_port = saddr->local.v6.sin6_port;
  1359. #else
  1360. return rc;
  1361. #endif
  1362. } else {
  1363. err = cnic_get_v4_route(&saddr->remote.v4, &dst);
  1364. if (err)
  1365. return err;
  1366. if (!dst || dst->error || !dst->dev)
  1367. goto err_out;
  1368. csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
  1369. csk->dst_port = saddr->remote.v4.sin_port;
  1370. local_port = saddr->local.v4.sin_port;
  1371. }
  1372. csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
  1373. if (realdev != dev->netdev)
  1374. goto err_out;
  1375. if (local_port >= CNIC_LOCAL_PORT_MIN &&
  1376. local_port < CNIC_LOCAL_PORT_MAX) {
  1377. if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
  1378. local_port = 0;
  1379. } else
  1380. local_port = 0;
  1381. if (!local_port) {
  1382. local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
  1383. if (local_port == -1) {
  1384. rc = -ENOMEM;
  1385. goto err_out;
  1386. }
  1387. }
  1388. csk->src_port = local_port;
  1389. csk->mtu = dst_mtu(dst);
  1390. rc = 0;
  1391. err_out:
  1392. dst_release(dst);
  1393. return rc;
  1394. }
  1395. static void cnic_init_csk_state(struct cnic_sock *csk)
  1396. {
  1397. csk->state = 0;
  1398. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1399. clear_bit(SK_F_CLOSING, &csk->flags);
  1400. }
  1401. static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1402. {
  1403. int err = 0;
  1404. if (!cnic_in_use(csk))
  1405. return -EINVAL;
  1406. if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
  1407. return -EINVAL;
  1408. cnic_init_csk_state(csk);
  1409. err = cnic_get_route(csk, saddr);
  1410. if (err)
  1411. goto err_out;
  1412. err = cnic_resolve_addr(csk, saddr);
  1413. if (!err)
  1414. return 0;
  1415. err_out:
  1416. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1417. return err;
  1418. }
  1419. static int cnic_cm_abort(struct cnic_sock *csk)
  1420. {
  1421. struct cnic_local *cp = csk->dev->cnic_priv;
  1422. u32 opcode;
  1423. if (!cnic_in_use(csk))
  1424. return -EINVAL;
  1425. if (cnic_abort_prep(csk))
  1426. return cnic_cm_abort_req(csk);
  1427. /* Getting here means that we haven't started connect, or
  1428. * connect was not successful.
  1429. */
  1430. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  1431. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1432. opcode = csk->state;
  1433. else
  1434. opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
  1435. cp->close_conn(csk, opcode);
  1436. return 0;
  1437. }
  1438. static int cnic_cm_close(struct cnic_sock *csk)
  1439. {
  1440. if (!cnic_in_use(csk))
  1441. return -EINVAL;
  1442. if (cnic_close_prep(csk)) {
  1443. csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
  1444. return cnic_cm_close_req(csk);
  1445. }
  1446. return 0;
  1447. }
  1448. static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
  1449. u8 opcode)
  1450. {
  1451. struct cnic_ulp_ops *ulp_ops;
  1452. int ulp_type = csk->ulp_type;
  1453. rcu_read_lock();
  1454. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  1455. if (ulp_ops) {
  1456. if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
  1457. ulp_ops->cm_connect_complete(csk);
  1458. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
  1459. ulp_ops->cm_close_complete(csk);
  1460. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
  1461. ulp_ops->cm_remote_abort(csk);
  1462. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
  1463. ulp_ops->cm_abort_complete(csk);
  1464. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
  1465. ulp_ops->cm_remote_close(csk);
  1466. }
  1467. rcu_read_unlock();
  1468. }
  1469. static int cnic_cm_set_pg(struct cnic_sock *csk)
  1470. {
  1471. if (cnic_offld_prep(csk)) {
  1472. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1473. cnic_cm_update_pg(csk);
  1474. else
  1475. cnic_cm_offload_pg(csk);
  1476. }
  1477. return 0;
  1478. }
  1479. static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
  1480. {
  1481. struct cnic_local *cp = dev->cnic_priv;
  1482. u32 l5_cid = kcqe->pg_host_opaque;
  1483. u8 opcode = kcqe->op_code;
  1484. struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
  1485. csk_hold(csk);
  1486. if (!cnic_in_use(csk))
  1487. goto done;
  1488. if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1489. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1490. goto done;
  1491. }
  1492. csk->pg_cid = kcqe->pg_cid;
  1493. set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1494. cnic_cm_conn_req(csk);
  1495. done:
  1496. csk_put(csk);
  1497. }
  1498. static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
  1499. {
  1500. struct cnic_local *cp = dev->cnic_priv;
  1501. struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
  1502. u8 opcode = l4kcqe->op_code;
  1503. u32 l5_cid;
  1504. struct cnic_sock *csk;
  1505. if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
  1506. opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1507. cnic_cm_process_offld_pg(dev, l4kcqe);
  1508. return;
  1509. }
  1510. l5_cid = l4kcqe->conn_id;
  1511. if (opcode & 0x80)
  1512. l5_cid = l4kcqe->cid;
  1513. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1514. return;
  1515. csk = &cp->csk_tbl[l5_cid];
  1516. csk_hold(csk);
  1517. if (!cnic_in_use(csk)) {
  1518. csk_put(csk);
  1519. return;
  1520. }
  1521. switch (opcode) {
  1522. case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
  1523. if (l4kcqe->status == 0)
  1524. set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
  1525. smp_mb__before_clear_bit();
  1526. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1527. cnic_cm_upcall(cp, csk, opcode);
  1528. break;
  1529. case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
  1530. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
  1531. csk->state = opcode;
  1532. /* fall through */
  1533. case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
  1534. case L4_KCQE_OPCODE_VALUE_RESET_COMP:
  1535. cp->close_conn(csk, opcode);
  1536. break;
  1537. case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
  1538. cnic_cm_upcall(cp, csk, opcode);
  1539. break;
  1540. }
  1541. csk_put(csk);
  1542. }
  1543. static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
  1544. {
  1545. struct cnic_dev *dev = data;
  1546. int i;
  1547. for (i = 0; i < num; i++)
  1548. cnic_cm_process_kcqe(dev, kcqe[i]);
  1549. }
  1550. static struct cnic_ulp_ops cm_ulp_ops = {
  1551. .indicate_kcqes = cnic_cm_indicate_kcqe,
  1552. };
  1553. static void cnic_cm_free_mem(struct cnic_dev *dev)
  1554. {
  1555. struct cnic_local *cp = dev->cnic_priv;
  1556. kfree(cp->csk_tbl);
  1557. cp->csk_tbl = NULL;
  1558. cnic_free_id_tbl(&cp->csk_port_tbl);
  1559. }
  1560. static int cnic_cm_alloc_mem(struct cnic_dev *dev)
  1561. {
  1562. struct cnic_local *cp = dev->cnic_priv;
  1563. cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
  1564. GFP_KERNEL);
  1565. if (!cp->csk_tbl)
  1566. return -ENOMEM;
  1567. if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
  1568. CNIC_LOCAL_PORT_MIN)) {
  1569. cnic_cm_free_mem(dev);
  1570. return -ENOMEM;
  1571. }
  1572. return 0;
  1573. }
  1574. static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
  1575. {
  1576. if ((opcode == csk->state) ||
  1577. (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
  1578. csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
  1579. if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
  1580. return 1;
  1581. }
  1582. return 0;
  1583. }
  1584. static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
  1585. {
  1586. struct cnic_dev *dev = csk->dev;
  1587. struct cnic_local *cp = dev->cnic_priv;
  1588. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1589. if (cnic_ready_to_close(csk, opcode)) {
  1590. cnic_close_conn(csk);
  1591. cnic_cm_upcall(cp, csk, opcode);
  1592. }
  1593. }
  1594. static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
  1595. {
  1596. }
  1597. static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
  1598. {
  1599. u32 seed;
  1600. get_random_bytes(&seed, 4);
  1601. cnic_ctx_wr(dev, 45, 0, seed);
  1602. return 0;
  1603. }
  1604. static int cnic_cm_open(struct cnic_dev *dev)
  1605. {
  1606. struct cnic_local *cp = dev->cnic_priv;
  1607. int err;
  1608. err = cnic_cm_alloc_mem(dev);
  1609. if (err)
  1610. return err;
  1611. err = cp->start_cm(dev);
  1612. if (err)
  1613. goto err_out;
  1614. dev->cm_create = cnic_cm_create;
  1615. dev->cm_destroy = cnic_cm_destroy;
  1616. dev->cm_connect = cnic_cm_connect;
  1617. dev->cm_abort = cnic_cm_abort;
  1618. dev->cm_close = cnic_cm_close;
  1619. dev->cm_select_dev = cnic_cm_select_dev;
  1620. cp->ulp_handle[CNIC_ULP_L4] = dev;
  1621. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
  1622. return 0;
  1623. err_out:
  1624. cnic_cm_free_mem(dev);
  1625. return err;
  1626. }
  1627. static int cnic_cm_shutdown(struct cnic_dev *dev)
  1628. {
  1629. struct cnic_local *cp = dev->cnic_priv;
  1630. int i;
  1631. cp->stop_cm(dev);
  1632. if (!cp->csk_tbl)
  1633. return 0;
  1634. for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
  1635. struct cnic_sock *csk = &cp->csk_tbl[i];
  1636. clear_bit(SK_F_INUSE, &csk->flags);
  1637. cnic_cm_cleanup(csk);
  1638. }
  1639. cnic_cm_free_mem(dev);
  1640. return 0;
  1641. }
  1642. static void cnic_init_context(struct cnic_dev *dev, u32 cid)
  1643. {
  1644. struct cnic_local *cp = dev->cnic_priv;
  1645. u32 cid_addr;
  1646. int i;
  1647. if (CHIP_NUM(cp) == CHIP_NUM_5709)
  1648. return;
  1649. cid_addr = GET_CID_ADDR(cid);
  1650. for (i = 0; i < CTX_SIZE; i += 4)
  1651. cnic_ctx_wr(dev, cid_addr, i, 0);
  1652. }
  1653. static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
  1654. {
  1655. struct cnic_local *cp = dev->cnic_priv;
  1656. int ret = 0, i;
  1657. u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
  1658. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1659. return 0;
  1660. for (i = 0; i < cp->ctx_blks; i++) {
  1661. int j;
  1662. u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
  1663. u32 val;
  1664. memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
  1665. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
  1666. (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
  1667. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
  1668. (u64) cp->ctx_arr[i].mapping >> 32);
  1669. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
  1670. BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
  1671. for (j = 0; j < 10; j++) {
  1672. val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
  1673. if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
  1674. break;
  1675. udelay(5);
  1676. }
  1677. if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
  1678. ret = -EBUSY;
  1679. break;
  1680. }
  1681. }
  1682. return ret;
  1683. }
  1684. static void cnic_free_irq(struct cnic_dev *dev)
  1685. {
  1686. struct cnic_local *cp = dev->cnic_priv;
  1687. struct cnic_eth_dev *ethdev = cp->ethdev;
  1688. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1689. cp->disable_int_sync(dev);
  1690. tasklet_disable(&cp->cnic_irq_task);
  1691. free_irq(ethdev->irq_arr[0].vector, dev);
  1692. }
  1693. }
  1694. static int cnic_init_bnx2_irq(struct cnic_dev *dev)
  1695. {
  1696. struct cnic_local *cp = dev->cnic_priv;
  1697. struct cnic_eth_dev *ethdev = cp->ethdev;
  1698. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1699. int err, i = 0;
  1700. int sblk_num = cp->status_blk_num;
  1701. u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
  1702. BNX2_HC_SB_CONFIG_1;
  1703. CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
  1704. CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
  1705. CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
  1706. CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
  1707. cp->bnx2_status_blk = cp->status_blk;
  1708. cp->last_status_idx = cp->bnx2_status_blk->status_idx;
  1709. tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
  1710. (unsigned long) dev);
  1711. err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
  1712. "cnic", dev);
  1713. if (err) {
  1714. tasklet_disable(&cp->cnic_irq_task);
  1715. return err;
  1716. }
  1717. while (cp->bnx2_status_blk->status_completion_producer_index &&
  1718. i < 10) {
  1719. CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
  1720. 1 << (11 + sblk_num));
  1721. udelay(10);
  1722. i++;
  1723. barrier();
  1724. }
  1725. if (cp->bnx2_status_blk->status_completion_producer_index) {
  1726. cnic_free_irq(dev);
  1727. goto failed;
  1728. }
  1729. } else {
  1730. struct status_block *sblk = cp->status_blk;
  1731. u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
  1732. int i = 0;
  1733. while (sblk->status_completion_producer_index && i < 10) {
  1734. CNIC_WR(dev, BNX2_HC_COMMAND,
  1735. hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
  1736. udelay(10);
  1737. i++;
  1738. barrier();
  1739. }
  1740. if (sblk->status_completion_producer_index)
  1741. goto failed;
  1742. }
  1743. return 0;
  1744. failed:
  1745. printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
  1746. dev->netdev->name);
  1747. return -EBUSY;
  1748. }
  1749. static void cnic_enable_bnx2_int(struct cnic_dev *dev)
  1750. {
  1751. struct cnic_local *cp = dev->cnic_priv;
  1752. struct cnic_eth_dev *ethdev = cp->ethdev;
  1753. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1754. return;
  1755. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1756. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  1757. }
  1758. static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
  1759. {
  1760. struct cnic_local *cp = dev->cnic_priv;
  1761. struct cnic_eth_dev *ethdev = cp->ethdev;
  1762. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1763. return;
  1764. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1765. BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
  1766. CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
  1767. synchronize_irq(ethdev->irq_arr[0].vector);
  1768. }
  1769. static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
  1770. {
  1771. struct cnic_local *cp = dev->cnic_priv;
  1772. struct cnic_eth_dev *ethdev = cp->ethdev;
  1773. u32 cid_addr, tx_cid, sb_id;
  1774. u32 val, offset0, offset1, offset2, offset3;
  1775. int i;
  1776. struct tx_bd *txbd;
  1777. dma_addr_t buf_map;
  1778. struct status_block *s_blk = cp->status_blk;
  1779. sb_id = cp->status_blk_num;
  1780. tx_cid = 20;
  1781. cnic_init_context(dev, tx_cid);
  1782. cnic_init_context(dev, tx_cid + 1);
  1783. cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
  1784. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1785. struct status_block_msix *sblk = cp->status_blk;
  1786. tx_cid = TX_TSS_CID + sb_id - 1;
  1787. cnic_init_context(dev, tx_cid);
  1788. CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
  1789. (TX_TSS_CID << 7));
  1790. cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
  1791. }
  1792. cp->tx_cons = *cp->tx_cons_ptr;
  1793. cid_addr = GET_CID_ADDR(tx_cid);
  1794. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  1795. u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
  1796. for (i = 0; i < PHY_CTX_SIZE; i += 4)
  1797. cnic_ctx_wr(dev, cid_addr2, i, 0);
  1798. offset0 = BNX2_L2CTX_TYPE_XI;
  1799. offset1 = BNX2_L2CTX_CMD_TYPE_XI;
  1800. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
  1801. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
  1802. } else {
  1803. offset0 = BNX2_L2CTX_TYPE;
  1804. offset1 = BNX2_L2CTX_CMD_TYPE;
  1805. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
  1806. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
  1807. }
  1808. val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
  1809. cnic_ctx_wr(dev, cid_addr, offset0, val);
  1810. val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
  1811. cnic_ctx_wr(dev, cid_addr, offset1, val);
  1812. txbd = (struct tx_bd *) cp->l2_ring;
  1813. buf_map = cp->l2_buf_map;
  1814. for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
  1815. txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
  1816. txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1817. }
  1818. val = (u64) cp->l2_ring_map >> 32;
  1819. cnic_ctx_wr(dev, cid_addr, offset2, val);
  1820. txbd->tx_bd_haddr_hi = val;
  1821. val = (u64) cp->l2_ring_map & 0xffffffff;
  1822. cnic_ctx_wr(dev, cid_addr, offset3, val);
  1823. txbd->tx_bd_haddr_lo = val;
  1824. }
  1825. static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
  1826. {
  1827. struct cnic_local *cp = dev->cnic_priv;
  1828. struct cnic_eth_dev *ethdev = cp->ethdev;
  1829. u32 cid_addr, sb_id, val, coal_reg, coal_val;
  1830. int i;
  1831. struct rx_bd *rxbd;
  1832. struct status_block *s_blk = cp->status_blk;
  1833. sb_id = cp->status_blk_num;
  1834. cnic_init_context(dev, 2);
  1835. cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
  1836. coal_reg = BNX2_HC_COMMAND;
  1837. coal_val = CNIC_RD(dev, coal_reg);
  1838. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1839. struct status_block_msix *sblk = cp->status_blk;
  1840. cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
  1841. coal_reg = BNX2_HC_COALESCE_NOW;
  1842. coal_val = 1 << (11 + sb_id);
  1843. }
  1844. i = 0;
  1845. while (!(*cp->rx_cons_ptr != 0) && i < 10) {
  1846. CNIC_WR(dev, coal_reg, coal_val);
  1847. udelay(10);
  1848. i++;
  1849. barrier();
  1850. }
  1851. cp->rx_cons = *cp->rx_cons_ptr;
  1852. cid_addr = GET_CID_ADDR(2);
  1853. val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
  1854. BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
  1855. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
  1856. if (sb_id == 0)
  1857. val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
  1858. else
  1859. val = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1860. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
  1861. rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
  1862. for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
  1863. dma_addr_t buf_map;
  1864. int n = (i % cp->l2_rx_ring_size) + 1;
  1865. buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
  1866. rxbd->rx_bd_len = cp->l2_single_buf_size;
  1867. rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
  1868. rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
  1869. rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1870. }
  1871. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
  1872. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
  1873. rxbd->rx_bd_haddr_hi = val;
  1874. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
  1875. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
  1876. rxbd->rx_bd_haddr_lo = val;
  1877. val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
  1878. cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
  1879. }
  1880. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
  1881. {
  1882. struct kwqe *wqes[1], l2kwqe;
  1883. memset(&l2kwqe, 0, sizeof(l2kwqe));
  1884. wqes[0] = &l2kwqe;
  1885. l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
  1886. (L2_KWQE_OPCODE_VALUE_FLUSH <<
  1887. KWQE_OPCODE_SHIFT) | 2;
  1888. dev->submit_kwqes(dev, wqes, 1);
  1889. }
  1890. static void cnic_set_bnx2_mac(struct cnic_dev *dev)
  1891. {
  1892. struct cnic_local *cp = dev->cnic_priv;
  1893. u32 val;
  1894. val = cp->func << 2;
  1895. cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
  1896. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1897. BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
  1898. dev->mac_addr[0] = (u8) (val >> 8);
  1899. dev->mac_addr[1] = (u8) val;
  1900. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
  1901. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1902. BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
  1903. dev->mac_addr[2] = (u8) (val >> 24);
  1904. dev->mac_addr[3] = (u8) (val >> 16);
  1905. dev->mac_addr[4] = (u8) (val >> 8);
  1906. dev->mac_addr[5] = (u8) val;
  1907. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
  1908. val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
  1909. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1910. val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
  1911. CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
  1912. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
  1913. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
  1914. }
  1915. static int cnic_start_bnx2_hw(struct cnic_dev *dev)
  1916. {
  1917. struct cnic_local *cp = dev->cnic_priv;
  1918. struct cnic_eth_dev *ethdev = cp->ethdev;
  1919. struct status_block *sblk = cp->status_blk;
  1920. u32 val;
  1921. int err;
  1922. cnic_set_bnx2_mac(dev);
  1923. val = CNIC_RD(dev, BNX2_MQ_CONFIG);
  1924. val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
  1925. if (BCM_PAGE_BITS > 12)
  1926. val |= (12 - 8) << 4;
  1927. else
  1928. val |= (BCM_PAGE_BITS - 8) << 4;
  1929. CNIC_WR(dev, BNX2_MQ_CONFIG, val);
  1930. CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
  1931. CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
  1932. CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
  1933. err = cnic_setup_5709_context(dev, 1);
  1934. if (err)
  1935. return err;
  1936. cnic_init_context(dev, KWQ_CID);
  1937. cnic_init_context(dev, KCQ_CID);
  1938. cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
  1939. cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
  1940. cp->max_kwq_idx = MAX_KWQ_IDX;
  1941. cp->kwq_prod_idx = 0;
  1942. cp->kwq_con_idx = 0;
  1943. cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
  1944. if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
  1945. cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
  1946. else
  1947. cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
  1948. /* Initialize the kernel work queue context. */
  1949. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1950. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1951. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
  1952. val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
  1953. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1954. val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
  1955. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1956. val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
  1957. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1958. val = (u32) cp->kwq_info.pgtbl_map;
  1959. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1960. cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
  1961. cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
  1962. cp->kcq_prod_idx = 0;
  1963. /* Initialize the kernel complete queue context. */
  1964. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1965. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1966. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
  1967. val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
  1968. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1969. val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
  1970. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1971. val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
  1972. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1973. val = (u32) cp->kcq_info.pgtbl_map;
  1974. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1975. cp->int_num = 0;
  1976. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1977. u32 sb_id = cp->status_blk_num;
  1978. u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1979. cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
  1980. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1981. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1982. }
  1983. /* Enable Commnad Scheduler notification when we write to the
  1984. * host producer index of the kernel contexts. */
  1985. CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
  1986. /* Enable Command Scheduler notification when we write to either
  1987. * the Send Queue or Receive Queue producer indexes of the kernel
  1988. * bypass contexts. */
  1989. CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
  1990. CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
  1991. /* Notify COM when the driver post an application buffer. */
  1992. CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
  1993. /* Set the CP and COM doorbells. These two processors polls the
  1994. * doorbell for a non zero value before running. This must be done
  1995. * after setting up the kernel queue contexts. */
  1996. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
  1997. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
  1998. cnic_init_bnx2_tx_ring(dev);
  1999. cnic_init_bnx2_rx_ring(dev);
  2000. err = cnic_init_bnx2_irq(dev);
  2001. if (err) {
  2002. printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
  2003. dev->netdev->name);
  2004. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  2005. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  2006. return err;
  2007. }
  2008. return 0;
  2009. }
  2010. static int cnic_register_netdev(struct cnic_dev *dev)
  2011. {
  2012. struct cnic_local *cp = dev->cnic_priv;
  2013. struct cnic_eth_dev *ethdev = cp->ethdev;
  2014. int err;
  2015. if (!ethdev)
  2016. return -ENODEV;
  2017. if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
  2018. return 0;
  2019. err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
  2020. if (err)
  2021. printk(KERN_ERR PFX "%s: register_cnic failed\n",
  2022. dev->netdev->name);
  2023. return err;
  2024. }
  2025. static void cnic_unregister_netdev(struct cnic_dev *dev)
  2026. {
  2027. struct cnic_local *cp = dev->cnic_priv;
  2028. struct cnic_eth_dev *ethdev = cp->ethdev;
  2029. if (!ethdev)
  2030. return;
  2031. ethdev->drv_unregister_cnic(dev->netdev);
  2032. }
  2033. static int cnic_start_hw(struct cnic_dev *dev)
  2034. {
  2035. struct cnic_local *cp = dev->cnic_priv;
  2036. struct cnic_eth_dev *ethdev = cp->ethdev;
  2037. int err;
  2038. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  2039. return -EALREADY;
  2040. dev->regview = ethdev->io_base;
  2041. cp->chip_id = ethdev->chip_id;
  2042. pci_dev_get(dev->pcidev);
  2043. cp->func = PCI_FUNC(dev->pcidev->devfn);
  2044. cp->status_blk = ethdev->irq_arr[0].status_blk;
  2045. cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
  2046. err = cp->alloc_resc(dev);
  2047. if (err) {
  2048. printk(KERN_ERR PFX "%s: allocate resource failure\n",
  2049. dev->netdev->name);
  2050. goto err1;
  2051. }
  2052. err = cp->start_hw(dev);
  2053. if (err)
  2054. goto err1;
  2055. err = cnic_cm_open(dev);
  2056. if (err)
  2057. goto err1;
  2058. set_bit(CNIC_F_CNIC_UP, &dev->flags);
  2059. cp->enable_int(dev);
  2060. return 0;
  2061. err1:
  2062. cp->free_resc(dev);
  2063. pci_dev_put(dev->pcidev);
  2064. return err;
  2065. }
  2066. static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
  2067. {
  2068. cnic_disable_bnx2_int_sync(dev);
  2069. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  2070. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  2071. cnic_init_context(dev, KWQ_CID);
  2072. cnic_init_context(dev, KCQ_CID);
  2073. cnic_setup_5709_context(dev, 0);
  2074. cnic_free_irq(dev);
  2075. cnic_free_resc(dev);
  2076. }
  2077. static void cnic_stop_hw(struct cnic_dev *dev)
  2078. {
  2079. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2080. struct cnic_local *cp = dev->cnic_priv;
  2081. clear_bit(CNIC_F_CNIC_UP, &dev->flags);
  2082. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
  2083. synchronize_rcu();
  2084. cnic_cm_shutdown(dev);
  2085. cp->stop_hw(dev);
  2086. pci_dev_put(dev->pcidev);
  2087. }
  2088. }
  2089. static void cnic_free_dev(struct cnic_dev *dev)
  2090. {
  2091. int i = 0;
  2092. while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
  2093. msleep(100);
  2094. i++;
  2095. }
  2096. if (atomic_read(&dev->ref_count) != 0)
  2097. printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
  2098. " to zero.\n", dev->netdev->name);
  2099. printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
  2100. dev_put(dev->netdev);
  2101. kfree(dev);
  2102. }
  2103. static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
  2104. struct pci_dev *pdev)
  2105. {
  2106. struct cnic_dev *cdev;
  2107. struct cnic_local *cp;
  2108. int alloc_size;
  2109. alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
  2110. cdev = kzalloc(alloc_size , GFP_KERNEL);
  2111. if (cdev == NULL) {
  2112. printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
  2113. dev->name);
  2114. return NULL;
  2115. }
  2116. cdev->netdev = dev;
  2117. cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
  2118. cdev->register_device = cnic_register_device;
  2119. cdev->unregister_device = cnic_unregister_device;
  2120. cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
  2121. cp = cdev->cnic_priv;
  2122. cp->dev = cdev;
  2123. cp->uio_dev = -1;
  2124. cp->l2_single_buf_size = 0x400;
  2125. cp->l2_rx_ring_size = 3;
  2126. spin_lock_init(&cp->cnic_ulp_lock);
  2127. printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
  2128. return cdev;
  2129. }
  2130. static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
  2131. {
  2132. struct pci_dev *pdev;
  2133. struct cnic_dev *cdev;
  2134. struct cnic_local *cp;
  2135. struct cnic_eth_dev *ethdev = NULL;
  2136. struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
  2137. probe = symbol_get(bnx2_cnic_probe);
  2138. if (probe) {
  2139. ethdev = (*probe)(dev);
  2140. symbol_put(bnx2_cnic_probe);
  2141. }
  2142. if (!ethdev)
  2143. return NULL;
  2144. pdev = ethdev->pdev;
  2145. if (!pdev)
  2146. return NULL;
  2147. dev_hold(dev);
  2148. pci_dev_get(pdev);
  2149. if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
  2150. pdev->device == PCI_DEVICE_ID_NX2_5709S) {
  2151. u8 rev;
  2152. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  2153. if (rev < 0x10) {
  2154. pci_dev_put(pdev);
  2155. goto cnic_err;
  2156. }
  2157. }
  2158. pci_dev_put(pdev);
  2159. cdev = cnic_alloc_dev(dev, pdev);
  2160. if (cdev == NULL)
  2161. goto cnic_err;
  2162. set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
  2163. cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
  2164. cp = cdev->cnic_priv;
  2165. cp->ethdev = ethdev;
  2166. cdev->pcidev = pdev;
  2167. cp->cnic_ops = &cnic_bnx2_ops;
  2168. cp->start_hw = cnic_start_bnx2_hw;
  2169. cp->stop_hw = cnic_stop_bnx2_hw;
  2170. cp->setup_pgtbl = cnic_setup_page_tbl;
  2171. cp->alloc_resc = cnic_alloc_bnx2_resc;
  2172. cp->free_resc = cnic_free_resc;
  2173. cp->start_cm = cnic_cm_init_bnx2_hw;
  2174. cp->stop_cm = cnic_cm_stop_bnx2_hw;
  2175. cp->enable_int = cnic_enable_bnx2_int;
  2176. cp->disable_int_sync = cnic_disable_bnx2_int_sync;
  2177. cp->close_conn = cnic_close_bnx2_conn;
  2178. cp->next_idx = cnic_bnx2_next_idx;
  2179. cp->hw_idx = cnic_bnx2_hw_idx;
  2180. return cdev;
  2181. cnic_err:
  2182. dev_put(dev);
  2183. return NULL;
  2184. }
  2185. static struct cnic_dev *is_cnic_dev(struct net_device *dev)
  2186. {
  2187. struct ethtool_drvinfo drvinfo;
  2188. struct cnic_dev *cdev = NULL;
  2189. if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
  2190. memset(&drvinfo, 0, sizeof(drvinfo));
  2191. dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
  2192. if (!strcmp(drvinfo.driver, "bnx2"))
  2193. cdev = init_bnx2_cnic(dev);
  2194. if (cdev) {
  2195. write_lock(&cnic_dev_lock);
  2196. list_add(&cdev->list, &cnic_dev_list);
  2197. write_unlock(&cnic_dev_lock);
  2198. }
  2199. }
  2200. return cdev;
  2201. }
  2202. /**
  2203. * netdev event handler
  2204. */
  2205. static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
  2206. void *ptr)
  2207. {
  2208. struct net_device *netdev = ptr;
  2209. struct cnic_dev *dev;
  2210. int if_type;
  2211. int new_dev = 0;
  2212. dev = cnic_from_netdev(netdev);
  2213. if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
  2214. /* Check for the hot-plug device */
  2215. dev = is_cnic_dev(netdev);
  2216. if (dev) {
  2217. new_dev = 1;
  2218. cnic_hold(dev);
  2219. }
  2220. }
  2221. if (dev) {
  2222. struct cnic_local *cp = dev->cnic_priv;
  2223. if (new_dev)
  2224. cnic_ulp_init(dev);
  2225. else if (event == NETDEV_UNREGISTER)
  2226. cnic_ulp_exit(dev);
  2227. else if (event == NETDEV_UP) {
  2228. if (cnic_register_netdev(dev) != 0) {
  2229. cnic_put(dev);
  2230. goto done;
  2231. }
  2232. if (!cnic_start_hw(dev))
  2233. cnic_ulp_start(dev);
  2234. }
  2235. rcu_read_lock();
  2236. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  2237. struct cnic_ulp_ops *ulp_ops;
  2238. void *ctx;
  2239. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  2240. if (!ulp_ops || !ulp_ops->indicate_netevent)
  2241. continue;
  2242. ctx = cp->ulp_handle[if_type];
  2243. ulp_ops->indicate_netevent(ctx, event);
  2244. }
  2245. rcu_read_unlock();
  2246. if (event == NETDEV_GOING_DOWN) {
  2247. cnic_ulp_stop(dev);
  2248. cnic_stop_hw(dev);
  2249. cnic_unregister_netdev(dev);
  2250. } else if (event == NETDEV_UNREGISTER) {
  2251. write_lock(&cnic_dev_lock);
  2252. list_del_init(&dev->list);
  2253. write_unlock(&cnic_dev_lock);
  2254. cnic_put(dev);
  2255. cnic_free_dev(dev);
  2256. goto done;
  2257. }
  2258. cnic_put(dev);
  2259. }
  2260. done:
  2261. return NOTIFY_DONE;
  2262. }
  2263. static struct notifier_block cnic_netdev_notifier = {
  2264. .notifier_call = cnic_netdev_event
  2265. };
  2266. static void cnic_release(void)
  2267. {
  2268. struct cnic_dev *dev;
  2269. while (!list_empty(&cnic_dev_list)) {
  2270. dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
  2271. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2272. cnic_ulp_stop(dev);
  2273. cnic_stop_hw(dev);
  2274. }
  2275. cnic_ulp_exit(dev);
  2276. cnic_unregister_netdev(dev);
  2277. list_del_init(&dev->list);
  2278. cnic_free_dev(dev);
  2279. }
  2280. }
  2281. static int __init cnic_init(void)
  2282. {
  2283. int rc = 0;
  2284. printk(KERN_INFO "%s", version);
  2285. rc = register_netdevice_notifier(&cnic_netdev_notifier);
  2286. if (rc) {
  2287. cnic_release();
  2288. return rc;
  2289. }
  2290. return 0;
  2291. }
  2292. static void __exit cnic_exit(void)
  2293. {
  2294. unregister_netdevice_notifier(&cnic_netdev_notifier);
  2295. cnic_release();
  2296. return;
  2297. }
  2298. module_init(cnic_init);
  2299. module_exit(cnic_exit);