be_main.c 55 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  32. { 0 }
  33. };
  34. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  35. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  36. {
  37. struct be_dma_mem *mem = &q->dma_mem;
  38. if (mem->va)
  39. pci_free_consistent(adapter->pdev, mem->size,
  40. mem->va, mem->dma);
  41. }
  42. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  43. u16 len, u16 entry_size)
  44. {
  45. struct be_dma_mem *mem = &q->dma_mem;
  46. memset(q, 0, sizeof(*q));
  47. q->len = len;
  48. q->entry_size = entry_size;
  49. mem->size = len * entry_size;
  50. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  51. if (!mem->va)
  52. return -1;
  53. memset(mem->va, 0, mem->size);
  54. return 0;
  55. }
  56. static void be_intr_set(struct be_adapter *adapter, bool enable)
  57. {
  58. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  59. u32 reg = ioread32(addr);
  60. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  61. if (!enabled && enable)
  62. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. else if (enabled && !enable)
  64. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else
  66. return;
  67. iowrite32(reg, addr);
  68. }
  69. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  70. {
  71. u32 val = 0;
  72. val |= qid & DB_RQ_RING_ID_MASK;
  73. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  74. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  75. }
  76. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  77. {
  78. u32 val = 0;
  79. val |= qid & DB_TXULP_RING_ID_MASK;
  80. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  81. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  82. }
  83. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  84. bool arm, bool clear_int, u16 num_popped)
  85. {
  86. u32 val = 0;
  87. val |= qid & DB_EQ_RING_ID_MASK;
  88. if (arm)
  89. val |= 1 << DB_EQ_REARM_SHIFT;
  90. if (clear_int)
  91. val |= 1 << DB_EQ_CLR_SHIFT;
  92. val |= 1 << DB_EQ_EVNT_SHIFT;
  93. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  94. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  95. }
  96. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  97. {
  98. u32 val = 0;
  99. val |= qid & DB_CQ_RING_ID_MASK;
  100. if (arm)
  101. val |= 1 << DB_CQ_REARM_SHIFT;
  102. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  103. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  104. }
  105. static int be_mac_addr_set(struct net_device *netdev, void *p)
  106. {
  107. struct be_adapter *adapter = netdev_priv(netdev);
  108. struct sockaddr *addr = p;
  109. int status = 0;
  110. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  111. if (status)
  112. return status;
  113. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  114. adapter->if_handle, &adapter->pmac_id);
  115. if (!status)
  116. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  117. return status;
  118. }
  119. void netdev_stats_update(struct be_adapter *adapter)
  120. {
  121. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  122. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  123. struct be_port_rxf_stats *port_stats =
  124. &rxf_stats->port[adapter->port_num];
  125. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  126. struct be_erx_stats *erx_stats = &hw_stats->erx;
  127. dev_stats->rx_packets = port_stats->rx_total_frames;
  128. dev_stats->tx_packets = port_stats->tx_unicastframes +
  129. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  130. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  131. (u64) port_stats->rx_bytes_lsd;
  132. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  133. (u64) port_stats->tx_bytes_lsd;
  134. /* bad pkts received */
  135. dev_stats->rx_errors = port_stats->rx_crc_errors +
  136. port_stats->rx_alignment_symbol_errors +
  137. port_stats->rx_in_range_errors +
  138. port_stats->rx_out_range_errors +
  139. port_stats->rx_frame_too_long +
  140. port_stats->rx_dropped_too_small +
  141. port_stats->rx_dropped_too_short +
  142. port_stats->rx_dropped_header_too_small +
  143. port_stats->rx_dropped_tcp_length +
  144. port_stats->rx_dropped_runt +
  145. port_stats->rx_tcp_checksum_errs +
  146. port_stats->rx_ip_checksum_errs +
  147. port_stats->rx_udp_checksum_errs;
  148. /* no space in linux buffers: best possible approximation */
  149. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  150. /* detailed rx errors */
  151. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  152. port_stats->rx_out_range_errors +
  153. port_stats->rx_frame_too_long;
  154. /* receive ring buffer overflow */
  155. dev_stats->rx_over_errors = 0;
  156. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  157. /* frame alignment errors */
  158. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  159. /* receiver fifo overrun */
  160. /* drops_no_pbuf is no per i/f, it's per BE card */
  161. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  162. port_stats->rx_input_fifo_overflow +
  163. rxf_stats->rx_drops_no_pbuf;
  164. /* receiver missed packetd */
  165. dev_stats->rx_missed_errors = 0;
  166. /* packet transmit problems */
  167. dev_stats->tx_errors = 0;
  168. /* no space available in linux */
  169. dev_stats->tx_dropped = 0;
  170. dev_stats->multicast = port_stats->tx_multicastframes;
  171. dev_stats->collisions = 0;
  172. /* detailed tx_errors */
  173. dev_stats->tx_aborted_errors = 0;
  174. dev_stats->tx_carrier_errors = 0;
  175. dev_stats->tx_fifo_errors = 0;
  176. dev_stats->tx_heartbeat_errors = 0;
  177. dev_stats->tx_window_errors = 0;
  178. }
  179. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  180. {
  181. struct net_device *netdev = adapter->netdev;
  182. /* If link came up or went down */
  183. if (adapter->link_up != link_up) {
  184. if (link_up) {
  185. netif_start_queue(netdev);
  186. netif_carrier_on(netdev);
  187. printk(KERN_INFO "%s: Link up\n", netdev->name);
  188. } else {
  189. netif_stop_queue(netdev);
  190. netif_carrier_off(netdev);
  191. printk(KERN_INFO "%s: Link down\n", netdev->name);
  192. }
  193. adapter->link_up = link_up;
  194. }
  195. }
  196. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  197. static void be_rx_eqd_update(struct be_adapter *adapter)
  198. {
  199. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  200. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  201. ulong now = jiffies;
  202. u32 eqd;
  203. if (!rx_eq->enable_aic)
  204. return;
  205. /* Wrapped around */
  206. if (time_before(now, stats->rx_fps_jiffies)) {
  207. stats->rx_fps_jiffies = now;
  208. return;
  209. }
  210. /* Update once a second */
  211. if ((now - stats->rx_fps_jiffies) < HZ)
  212. return;
  213. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  214. ((now - stats->rx_fps_jiffies) / HZ);
  215. stats->rx_fps_jiffies = now;
  216. stats->be_prev_rx_frags = stats->be_rx_frags;
  217. eqd = stats->be_rx_fps / 110000;
  218. eqd = eqd << 3;
  219. if (eqd > rx_eq->max_eqd)
  220. eqd = rx_eq->max_eqd;
  221. if (eqd < rx_eq->min_eqd)
  222. eqd = rx_eq->min_eqd;
  223. if (eqd < 10)
  224. eqd = 0;
  225. if (eqd != rx_eq->cur_eqd)
  226. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  227. rx_eq->cur_eqd = eqd;
  228. }
  229. static struct net_device_stats *be_get_stats(struct net_device *dev)
  230. {
  231. struct be_adapter *adapter = netdev_priv(dev);
  232. return &adapter->stats.net_stats;
  233. }
  234. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  235. {
  236. u64 rate = bytes;
  237. do_div(rate, ticks / HZ);
  238. rate <<= 3; /* bytes/sec -> bits/sec */
  239. do_div(rate, 1000000ul); /* MB/Sec */
  240. return rate;
  241. }
  242. static void be_tx_rate_update(struct be_adapter *adapter)
  243. {
  244. struct be_drvr_stats *stats = drvr_stats(adapter);
  245. ulong now = jiffies;
  246. /* Wrapped around? */
  247. if (time_before(now, stats->be_tx_jiffies)) {
  248. stats->be_tx_jiffies = now;
  249. return;
  250. }
  251. /* Update tx rate once in two seconds */
  252. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  253. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  254. - stats->be_tx_bytes_prev,
  255. now - stats->be_tx_jiffies);
  256. stats->be_tx_jiffies = now;
  257. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  258. }
  259. }
  260. static void be_tx_stats_update(struct be_adapter *adapter,
  261. u32 wrb_cnt, u32 copied, bool stopped)
  262. {
  263. struct be_drvr_stats *stats = drvr_stats(adapter);
  264. stats->be_tx_reqs++;
  265. stats->be_tx_wrbs += wrb_cnt;
  266. stats->be_tx_bytes += copied;
  267. if (stopped)
  268. stats->be_tx_stops++;
  269. }
  270. /* Determine number of WRB entries needed to xmit data in an skb */
  271. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  272. {
  273. int cnt = (skb->len > skb->data_len);
  274. cnt += skb_shinfo(skb)->nr_frags;
  275. /* to account for hdr wrb */
  276. cnt++;
  277. if (cnt & 1) {
  278. /* add a dummy to make it an even num */
  279. cnt++;
  280. *dummy = true;
  281. } else
  282. *dummy = false;
  283. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  284. return cnt;
  285. }
  286. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  287. {
  288. wrb->frag_pa_hi = upper_32_bits(addr);
  289. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  290. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  291. }
  292. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  293. bool vlan, u32 wrb_cnt, u32 len)
  294. {
  295. memset(hdr, 0, sizeof(*hdr));
  296. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  297. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  298. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  299. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  300. hdr, skb_shinfo(skb)->gso_size);
  301. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  302. if (is_tcp_pkt(skb))
  303. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  304. else if (is_udp_pkt(skb))
  305. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  306. }
  307. if (vlan && vlan_tx_tag_present(skb)) {
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  309. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  310. hdr, vlan_tx_tag_get(skb));
  311. }
  312. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  315. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  316. }
  317. static int make_tx_wrbs(struct be_adapter *adapter,
  318. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  319. {
  320. u64 busaddr;
  321. u32 i, copied = 0;
  322. struct pci_dev *pdev = adapter->pdev;
  323. struct sk_buff *first_skb = skb;
  324. struct be_queue_info *txq = &adapter->tx_obj.q;
  325. struct be_eth_wrb *wrb;
  326. struct be_eth_hdr_wrb *hdr;
  327. hdr = queue_head_node(txq);
  328. atomic_add(wrb_cnt, &txq->used);
  329. queue_head_inc(txq);
  330. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  331. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  332. return 0;
  333. }
  334. if (skb->len > skb->data_len) {
  335. int len = skb->len - skb->data_len;
  336. wrb = queue_head_node(txq);
  337. busaddr = skb_shinfo(skb)->dma_head;
  338. wrb_fill(wrb, busaddr, len);
  339. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  340. queue_head_inc(txq);
  341. copied += len;
  342. }
  343. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  344. struct skb_frag_struct *frag =
  345. &skb_shinfo(skb)->frags[i];
  346. busaddr = skb_shinfo(skb)->dma_maps[i];
  347. wrb = queue_head_node(txq);
  348. wrb_fill(wrb, busaddr, frag->size);
  349. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  350. queue_head_inc(txq);
  351. copied += frag->size;
  352. }
  353. if (dummy_wrb) {
  354. wrb = queue_head_node(txq);
  355. wrb_fill(wrb, 0, 0);
  356. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  357. queue_head_inc(txq);
  358. }
  359. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  360. wrb_cnt, copied);
  361. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  362. return copied;
  363. }
  364. static netdev_tx_t be_xmit(struct sk_buff *skb,
  365. struct net_device *netdev)
  366. {
  367. struct be_adapter *adapter = netdev_priv(netdev);
  368. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  369. struct be_queue_info *txq = &tx_obj->q;
  370. u32 wrb_cnt = 0, copied = 0;
  371. u32 start = txq->head;
  372. bool dummy_wrb, stopped = false;
  373. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  374. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  375. if (copied) {
  376. /* record the sent skb in the sent_skb table */
  377. BUG_ON(tx_obj->sent_skb_list[start]);
  378. tx_obj->sent_skb_list[start] = skb;
  379. /* Ensure txq has space for the next skb; Else stop the queue
  380. * *BEFORE* ringing the tx doorbell, so that we serialze the
  381. * tx compls of the current transmit which'll wake up the queue
  382. */
  383. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  384. txq->len) {
  385. netif_stop_queue(netdev);
  386. stopped = true;
  387. }
  388. be_txq_notify(adapter, txq->id, wrb_cnt);
  389. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  390. } else {
  391. txq->head = start;
  392. dev_kfree_skb_any(skb);
  393. }
  394. return NETDEV_TX_OK;
  395. }
  396. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  397. {
  398. struct be_adapter *adapter = netdev_priv(netdev);
  399. if (new_mtu < BE_MIN_MTU ||
  400. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  401. dev_info(&adapter->pdev->dev,
  402. "MTU must be between %d and %d bytes\n",
  403. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  404. return -EINVAL;
  405. }
  406. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  407. netdev->mtu, new_mtu);
  408. netdev->mtu = new_mtu;
  409. return 0;
  410. }
  411. /*
  412. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  413. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  414. * set the BE in promiscuous VLAN mode.
  415. */
  416. static int be_vid_config(struct be_adapter *adapter)
  417. {
  418. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  419. u16 ntags = 0, i;
  420. int status;
  421. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  422. /* Construct VLAN Table to give to HW */
  423. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  424. if (adapter->vlan_tag[i]) {
  425. vtag[ntags] = cpu_to_le16(i);
  426. ntags++;
  427. }
  428. }
  429. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  430. vtag, ntags, 1, 0);
  431. } else {
  432. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  433. NULL, 0, 1, 1);
  434. }
  435. return status;
  436. }
  437. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  438. {
  439. struct be_adapter *adapter = netdev_priv(netdev);
  440. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  441. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  442. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  443. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  444. adapter->vlan_grp = grp;
  445. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  446. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  447. }
  448. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  449. {
  450. struct be_adapter *adapter = netdev_priv(netdev);
  451. adapter->num_vlans++;
  452. adapter->vlan_tag[vid] = 1;
  453. be_vid_config(adapter);
  454. }
  455. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  456. {
  457. struct be_adapter *adapter = netdev_priv(netdev);
  458. adapter->num_vlans--;
  459. adapter->vlan_tag[vid] = 0;
  460. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  461. be_vid_config(adapter);
  462. }
  463. static void be_set_multicast_list(struct net_device *netdev)
  464. {
  465. struct be_adapter *adapter = netdev_priv(netdev);
  466. if (netdev->flags & IFF_PROMISC) {
  467. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  468. adapter->promiscuous = true;
  469. goto done;
  470. }
  471. /* BE was previously in promiscous mode; disable it */
  472. if (adapter->promiscuous) {
  473. adapter->promiscuous = false;
  474. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  475. }
  476. if (netdev->flags & IFF_ALLMULTI) {
  477. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
  478. goto done;
  479. }
  480. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  481. netdev->mc_count);
  482. done:
  483. return;
  484. }
  485. static void be_rx_rate_update(struct be_adapter *adapter)
  486. {
  487. struct be_drvr_stats *stats = drvr_stats(adapter);
  488. ulong now = jiffies;
  489. /* Wrapped around */
  490. if (time_before(now, stats->be_rx_jiffies)) {
  491. stats->be_rx_jiffies = now;
  492. return;
  493. }
  494. /* Update the rate once in two seconds */
  495. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  496. return;
  497. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  498. - stats->be_rx_bytes_prev,
  499. now - stats->be_rx_jiffies);
  500. stats->be_rx_jiffies = now;
  501. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  502. }
  503. static void be_rx_stats_update(struct be_adapter *adapter,
  504. u32 pktsize, u16 numfrags)
  505. {
  506. struct be_drvr_stats *stats = drvr_stats(adapter);
  507. stats->be_rx_compl++;
  508. stats->be_rx_frags += numfrags;
  509. stats->be_rx_bytes += pktsize;
  510. }
  511. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  512. {
  513. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  514. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  515. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  516. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  517. if (ip_version) {
  518. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  519. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  520. }
  521. ipv6_chk = (ip_version && (tcpf || udpf));
  522. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  523. }
  524. static struct be_rx_page_info *
  525. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  526. {
  527. struct be_rx_page_info *rx_page_info;
  528. struct be_queue_info *rxq = &adapter->rx_obj.q;
  529. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  530. BUG_ON(!rx_page_info->page);
  531. if (rx_page_info->last_page_user)
  532. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  533. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  534. atomic_dec(&rxq->used);
  535. return rx_page_info;
  536. }
  537. /* Throwaway the data in the Rx completion */
  538. static void be_rx_compl_discard(struct be_adapter *adapter,
  539. struct be_eth_rx_compl *rxcp)
  540. {
  541. struct be_queue_info *rxq = &adapter->rx_obj.q;
  542. struct be_rx_page_info *page_info;
  543. u16 rxq_idx, i, num_rcvd;
  544. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  545. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  546. for (i = 0; i < num_rcvd; i++) {
  547. page_info = get_rx_page_info(adapter, rxq_idx);
  548. put_page(page_info->page);
  549. memset(page_info, 0, sizeof(*page_info));
  550. index_inc(&rxq_idx, rxq->len);
  551. }
  552. }
  553. /*
  554. * skb_fill_rx_data forms a complete skb for an ether frame
  555. * indicated by rxcp.
  556. */
  557. static void skb_fill_rx_data(struct be_adapter *adapter,
  558. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  559. {
  560. struct be_queue_info *rxq = &adapter->rx_obj.q;
  561. struct be_rx_page_info *page_info;
  562. u16 rxq_idx, i, num_rcvd, j;
  563. u32 pktsize, hdr_len, curr_frag_len, size;
  564. u8 *start;
  565. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  566. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  567. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  568. page_info = get_rx_page_info(adapter, rxq_idx);
  569. start = page_address(page_info->page) + page_info->page_offset;
  570. prefetch(start);
  571. /* Copy data in the first descriptor of this completion */
  572. curr_frag_len = min(pktsize, rx_frag_size);
  573. /* Copy the header portion into skb_data */
  574. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  575. memcpy(skb->data, start, hdr_len);
  576. skb->len = curr_frag_len;
  577. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  578. /* Complete packet has now been moved to data */
  579. put_page(page_info->page);
  580. skb->data_len = 0;
  581. skb->tail += curr_frag_len;
  582. } else {
  583. skb_shinfo(skb)->nr_frags = 1;
  584. skb_shinfo(skb)->frags[0].page = page_info->page;
  585. skb_shinfo(skb)->frags[0].page_offset =
  586. page_info->page_offset + hdr_len;
  587. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  588. skb->data_len = curr_frag_len - hdr_len;
  589. skb->tail += hdr_len;
  590. }
  591. memset(page_info, 0, sizeof(*page_info));
  592. if (pktsize <= rx_frag_size) {
  593. BUG_ON(num_rcvd != 1);
  594. goto done;
  595. }
  596. /* More frags present for this completion */
  597. size = pktsize;
  598. for (i = 1, j = 0; i < num_rcvd; i++) {
  599. size -= curr_frag_len;
  600. index_inc(&rxq_idx, rxq->len);
  601. page_info = get_rx_page_info(adapter, rxq_idx);
  602. curr_frag_len = min(size, rx_frag_size);
  603. /* Coalesce all frags from the same physical page in one slot */
  604. if (page_info->page_offset == 0) {
  605. /* Fresh page */
  606. j++;
  607. skb_shinfo(skb)->frags[j].page = page_info->page;
  608. skb_shinfo(skb)->frags[j].page_offset =
  609. page_info->page_offset;
  610. skb_shinfo(skb)->frags[j].size = 0;
  611. skb_shinfo(skb)->nr_frags++;
  612. } else {
  613. put_page(page_info->page);
  614. }
  615. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  616. skb->len += curr_frag_len;
  617. skb->data_len += curr_frag_len;
  618. memset(page_info, 0, sizeof(*page_info));
  619. }
  620. BUG_ON(j > MAX_SKB_FRAGS);
  621. done:
  622. be_rx_stats_update(adapter, pktsize, num_rcvd);
  623. return;
  624. }
  625. /* Process the RX completion indicated by rxcp when GRO is disabled */
  626. static void be_rx_compl_process(struct be_adapter *adapter,
  627. struct be_eth_rx_compl *rxcp)
  628. {
  629. struct sk_buff *skb;
  630. u32 vtp, vid;
  631. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  632. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  633. if (!skb) {
  634. if (net_ratelimit())
  635. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  636. be_rx_compl_discard(adapter, rxcp);
  637. return;
  638. }
  639. skb_reserve(skb, NET_IP_ALIGN);
  640. skb_fill_rx_data(adapter, skb, rxcp);
  641. if (do_pkt_csum(rxcp, adapter->rx_csum))
  642. skb->ip_summed = CHECKSUM_NONE;
  643. else
  644. skb->ip_summed = CHECKSUM_UNNECESSARY;
  645. skb->truesize = skb->len + sizeof(struct sk_buff);
  646. skb->protocol = eth_type_trans(skb, adapter->netdev);
  647. skb->dev = adapter->netdev;
  648. if (vtp) {
  649. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  650. kfree_skb(skb);
  651. return;
  652. }
  653. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  654. vid = be16_to_cpu(vid);
  655. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  656. } else {
  657. netif_receive_skb(skb);
  658. }
  659. return;
  660. }
  661. /* Process the RX completion indicated by rxcp when GRO is enabled */
  662. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  663. struct be_eth_rx_compl *rxcp)
  664. {
  665. struct be_rx_page_info *page_info;
  666. struct sk_buff *skb = NULL;
  667. struct be_queue_info *rxq = &adapter->rx_obj.q;
  668. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  669. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  670. u16 i, rxq_idx = 0, vid, j;
  671. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  672. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  673. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  674. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  675. skb = napi_get_frags(&eq_obj->napi);
  676. if (!skb) {
  677. be_rx_compl_discard(adapter, rxcp);
  678. return;
  679. }
  680. remaining = pkt_size;
  681. for (i = 0, j = -1; i < num_rcvd; i++) {
  682. page_info = get_rx_page_info(adapter, rxq_idx);
  683. curr_frag_len = min(remaining, rx_frag_size);
  684. /* Coalesce all frags from the same physical page in one slot */
  685. if (i == 0 || page_info->page_offset == 0) {
  686. /* First frag or Fresh page */
  687. j++;
  688. skb_shinfo(skb)->frags[j].page = page_info->page;
  689. skb_shinfo(skb)->frags[j].page_offset =
  690. page_info->page_offset;
  691. skb_shinfo(skb)->frags[j].size = 0;
  692. } else {
  693. put_page(page_info->page);
  694. }
  695. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  696. remaining -= curr_frag_len;
  697. index_inc(&rxq_idx, rxq->len);
  698. memset(page_info, 0, sizeof(*page_info));
  699. }
  700. BUG_ON(j > MAX_SKB_FRAGS);
  701. skb_shinfo(skb)->nr_frags = j + 1;
  702. skb->len = pkt_size;
  703. skb->data_len = pkt_size;
  704. skb->truesize += pkt_size;
  705. skb->ip_summed = CHECKSUM_UNNECESSARY;
  706. if (likely(!vlanf)) {
  707. napi_gro_frags(&eq_obj->napi);
  708. } else {
  709. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  710. vid = be16_to_cpu(vid);
  711. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  712. return;
  713. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  714. }
  715. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  716. return;
  717. }
  718. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  719. {
  720. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  721. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  722. return NULL;
  723. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  724. queue_tail_inc(&adapter->rx_obj.cq);
  725. return rxcp;
  726. }
  727. /* To reset the valid bit, we need to reset the whole word as
  728. * when walking the queue the valid entries are little-endian
  729. * and invalid entries are host endian
  730. */
  731. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  732. {
  733. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  734. }
  735. static inline struct page *be_alloc_pages(u32 size)
  736. {
  737. gfp_t alloc_flags = GFP_ATOMIC;
  738. u32 order = get_order(size);
  739. if (order > 0)
  740. alloc_flags |= __GFP_COMP;
  741. return alloc_pages(alloc_flags, order);
  742. }
  743. /*
  744. * Allocate a page, split it to fragments of size rx_frag_size and post as
  745. * receive buffers to BE
  746. */
  747. static void be_post_rx_frags(struct be_adapter *adapter)
  748. {
  749. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  750. struct be_rx_page_info *page_info = NULL;
  751. struct be_queue_info *rxq = &adapter->rx_obj.q;
  752. struct page *pagep = NULL;
  753. struct be_eth_rx_d *rxd;
  754. u64 page_dmaaddr = 0, frag_dmaaddr;
  755. u32 posted, page_offset = 0;
  756. page_info = &page_info_tbl[rxq->head];
  757. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  758. if (!pagep) {
  759. pagep = be_alloc_pages(adapter->big_page_size);
  760. if (unlikely(!pagep)) {
  761. drvr_stats(adapter)->be_ethrx_post_fail++;
  762. break;
  763. }
  764. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  765. adapter->big_page_size,
  766. PCI_DMA_FROMDEVICE);
  767. page_info->page_offset = 0;
  768. } else {
  769. get_page(pagep);
  770. page_info->page_offset = page_offset + rx_frag_size;
  771. }
  772. page_offset = page_info->page_offset;
  773. page_info->page = pagep;
  774. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  775. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  776. rxd = queue_head_node(rxq);
  777. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  778. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  779. queue_head_inc(rxq);
  780. /* Any space left in the current big page for another frag? */
  781. if ((page_offset + rx_frag_size + rx_frag_size) >
  782. adapter->big_page_size) {
  783. pagep = NULL;
  784. page_info->last_page_user = true;
  785. }
  786. page_info = &page_info_tbl[rxq->head];
  787. }
  788. if (pagep)
  789. page_info->last_page_user = true;
  790. if (posted) {
  791. atomic_add(posted, &rxq->used);
  792. be_rxq_notify(adapter, rxq->id, posted);
  793. } else if (atomic_read(&rxq->used) == 0) {
  794. /* Let be_worker replenish when memory is available */
  795. adapter->rx_post_starved = true;
  796. }
  797. return;
  798. }
  799. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  800. {
  801. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  802. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  803. return NULL;
  804. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  805. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  806. queue_tail_inc(tx_cq);
  807. return txcp;
  808. }
  809. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  810. {
  811. struct be_queue_info *txq = &adapter->tx_obj.q;
  812. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  813. struct sk_buff *sent_skb;
  814. u16 cur_index, num_wrbs = 0;
  815. cur_index = txq->tail;
  816. sent_skb = sent_skbs[cur_index];
  817. BUG_ON(!sent_skb);
  818. sent_skbs[cur_index] = NULL;
  819. do {
  820. cur_index = txq->tail;
  821. num_wrbs++;
  822. queue_tail_inc(txq);
  823. } while (cur_index != last_index);
  824. atomic_sub(num_wrbs, &txq->used);
  825. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  826. kfree_skb(sent_skb);
  827. }
  828. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  829. {
  830. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  831. if (!eqe->evt)
  832. return NULL;
  833. eqe->evt = le32_to_cpu(eqe->evt);
  834. queue_tail_inc(&eq_obj->q);
  835. return eqe;
  836. }
  837. static int event_handle(struct be_adapter *adapter,
  838. struct be_eq_obj *eq_obj)
  839. {
  840. struct be_eq_entry *eqe;
  841. u16 num = 0;
  842. while ((eqe = event_get(eq_obj)) != NULL) {
  843. eqe->evt = 0;
  844. num++;
  845. }
  846. /* Deal with any spurious interrupts that come
  847. * without events
  848. */
  849. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  850. if (num)
  851. napi_schedule(&eq_obj->napi);
  852. return num;
  853. }
  854. /* Just read and notify events without processing them.
  855. * Used at the time of destroying event queues */
  856. static void be_eq_clean(struct be_adapter *adapter,
  857. struct be_eq_obj *eq_obj)
  858. {
  859. struct be_eq_entry *eqe;
  860. u16 num = 0;
  861. while ((eqe = event_get(eq_obj)) != NULL) {
  862. eqe->evt = 0;
  863. num++;
  864. }
  865. if (num)
  866. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  867. }
  868. static void be_rx_q_clean(struct be_adapter *adapter)
  869. {
  870. struct be_rx_page_info *page_info;
  871. struct be_queue_info *rxq = &adapter->rx_obj.q;
  872. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  873. struct be_eth_rx_compl *rxcp;
  874. u16 tail;
  875. /* First cleanup pending rx completions */
  876. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  877. be_rx_compl_discard(adapter, rxcp);
  878. be_rx_compl_reset(rxcp);
  879. be_cq_notify(adapter, rx_cq->id, true, 1);
  880. }
  881. /* Then free posted rx buffer that were not used */
  882. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  883. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  884. page_info = get_rx_page_info(adapter, tail);
  885. put_page(page_info->page);
  886. memset(page_info, 0, sizeof(*page_info));
  887. }
  888. BUG_ON(atomic_read(&rxq->used));
  889. }
  890. static void be_tx_compl_clean(struct be_adapter *adapter)
  891. {
  892. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  893. struct be_queue_info *txq = &adapter->tx_obj.q;
  894. struct be_eth_tx_compl *txcp;
  895. u16 end_idx, cmpl = 0, timeo = 0;
  896. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  897. do {
  898. while ((txcp = be_tx_compl_get(tx_cq))) {
  899. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  900. wrb_index, txcp);
  901. be_tx_compl_process(adapter, end_idx);
  902. cmpl++;
  903. }
  904. if (cmpl) {
  905. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  906. cmpl = 0;
  907. }
  908. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  909. break;
  910. mdelay(1);
  911. } while (true);
  912. if (atomic_read(&txq->used))
  913. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  914. atomic_read(&txq->used));
  915. }
  916. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  917. {
  918. struct be_queue_info *q;
  919. q = &adapter->mcc_obj.q;
  920. if (q->created)
  921. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  922. be_queue_free(adapter, q);
  923. q = &adapter->mcc_obj.cq;
  924. if (q->created)
  925. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  926. be_queue_free(adapter, q);
  927. }
  928. /* Must be called only after TX qs are created as MCC shares TX EQ */
  929. static int be_mcc_queues_create(struct be_adapter *adapter)
  930. {
  931. struct be_queue_info *q, *cq;
  932. /* Alloc MCC compl queue */
  933. cq = &adapter->mcc_obj.cq;
  934. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  935. sizeof(struct be_mcc_compl)))
  936. goto err;
  937. /* Ask BE to create MCC compl queue; share TX's eq */
  938. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  939. goto mcc_cq_free;
  940. /* Alloc MCC queue */
  941. q = &adapter->mcc_obj.q;
  942. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  943. goto mcc_cq_destroy;
  944. /* Ask BE to create MCC queue */
  945. if (be_cmd_mccq_create(adapter, q, cq))
  946. goto mcc_q_free;
  947. return 0;
  948. mcc_q_free:
  949. be_queue_free(adapter, q);
  950. mcc_cq_destroy:
  951. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  952. mcc_cq_free:
  953. be_queue_free(adapter, cq);
  954. err:
  955. return -1;
  956. }
  957. static void be_tx_queues_destroy(struct be_adapter *adapter)
  958. {
  959. struct be_queue_info *q;
  960. q = &adapter->tx_obj.q;
  961. if (q->created)
  962. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  963. be_queue_free(adapter, q);
  964. q = &adapter->tx_obj.cq;
  965. if (q->created)
  966. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  967. be_queue_free(adapter, q);
  968. /* Clear any residual events */
  969. be_eq_clean(adapter, &adapter->tx_eq);
  970. q = &adapter->tx_eq.q;
  971. if (q->created)
  972. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  973. be_queue_free(adapter, q);
  974. }
  975. static int be_tx_queues_create(struct be_adapter *adapter)
  976. {
  977. struct be_queue_info *eq, *q, *cq;
  978. adapter->tx_eq.max_eqd = 0;
  979. adapter->tx_eq.min_eqd = 0;
  980. adapter->tx_eq.cur_eqd = 96;
  981. adapter->tx_eq.enable_aic = false;
  982. /* Alloc Tx Event queue */
  983. eq = &adapter->tx_eq.q;
  984. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  985. return -1;
  986. /* Ask BE to create Tx Event queue */
  987. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  988. goto tx_eq_free;
  989. /* Alloc TX eth compl queue */
  990. cq = &adapter->tx_obj.cq;
  991. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  992. sizeof(struct be_eth_tx_compl)))
  993. goto tx_eq_destroy;
  994. /* Ask BE to create Tx eth compl queue */
  995. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  996. goto tx_cq_free;
  997. /* Alloc TX eth queue */
  998. q = &adapter->tx_obj.q;
  999. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1000. goto tx_cq_destroy;
  1001. /* Ask BE to create Tx eth queue */
  1002. if (be_cmd_txq_create(adapter, q, cq))
  1003. goto tx_q_free;
  1004. return 0;
  1005. tx_q_free:
  1006. be_queue_free(adapter, q);
  1007. tx_cq_destroy:
  1008. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1009. tx_cq_free:
  1010. be_queue_free(adapter, cq);
  1011. tx_eq_destroy:
  1012. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1013. tx_eq_free:
  1014. be_queue_free(adapter, eq);
  1015. return -1;
  1016. }
  1017. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1018. {
  1019. struct be_queue_info *q;
  1020. q = &adapter->rx_obj.q;
  1021. if (q->created) {
  1022. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1023. be_rx_q_clean(adapter);
  1024. }
  1025. be_queue_free(adapter, q);
  1026. q = &adapter->rx_obj.cq;
  1027. if (q->created)
  1028. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1029. be_queue_free(adapter, q);
  1030. /* Clear any residual events */
  1031. be_eq_clean(adapter, &adapter->rx_eq);
  1032. q = &adapter->rx_eq.q;
  1033. if (q->created)
  1034. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1035. be_queue_free(adapter, q);
  1036. }
  1037. static int be_rx_queues_create(struct be_adapter *adapter)
  1038. {
  1039. struct be_queue_info *eq, *q, *cq;
  1040. int rc;
  1041. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1042. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1043. adapter->rx_eq.min_eqd = 0;
  1044. adapter->rx_eq.cur_eqd = 0;
  1045. adapter->rx_eq.enable_aic = true;
  1046. /* Alloc Rx Event queue */
  1047. eq = &adapter->rx_eq.q;
  1048. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1049. sizeof(struct be_eq_entry));
  1050. if (rc)
  1051. return rc;
  1052. /* Ask BE to create Rx Event queue */
  1053. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1054. if (rc)
  1055. goto rx_eq_free;
  1056. /* Alloc RX eth compl queue */
  1057. cq = &adapter->rx_obj.cq;
  1058. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1059. sizeof(struct be_eth_rx_compl));
  1060. if (rc)
  1061. goto rx_eq_destroy;
  1062. /* Ask BE to create Rx eth compl queue */
  1063. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1064. if (rc)
  1065. goto rx_cq_free;
  1066. /* Alloc RX eth queue */
  1067. q = &adapter->rx_obj.q;
  1068. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1069. if (rc)
  1070. goto rx_cq_destroy;
  1071. /* Ask BE to create Rx eth queue */
  1072. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1073. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1074. if (rc)
  1075. goto rx_q_free;
  1076. return 0;
  1077. rx_q_free:
  1078. be_queue_free(adapter, q);
  1079. rx_cq_destroy:
  1080. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1081. rx_cq_free:
  1082. be_queue_free(adapter, cq);
  1083. rx_eq_destroy:
  1084. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1085. rx_eq_free:
  1086. be_queue_free(adapter, eq);
  1087. return rc;
  1088. }
  1089. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1090. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1091. {
  1092. return eq_id - 8 * be_pci_func(adapter);
  1093. }
  1094. static irqreturn_t be_intx(int irq, void *dev)
  1095. {
  1096. struct be_adapter *adapter = dev;
  1097. int isr;
  1098. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1099. be_pci_func(adapter) * CEV_ISR_SIZE);
  1100. if (!isr)
  1101. return IRQ_NONE;
  1102. event_handle(adapter, &adapter->tx_eq);
  1103. event_handle(adapter, &adapter->rx_eq);
  1104. return IRQ_HANDLED;
  1105. }
  1106. static irqreturn_t be_msix_rx(int irq, void *dev)
  1107. {
  1108. struct be_adapter *adapter = dev;
  1109. event_handle(adapter, &adapter->rx_eq);
  1110. return IRQ_HANDLED;
  1111. }
  1112. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1113. {
  1114. struct be_adapter *adapter = dev;
  1115. event_handle(adapter, &adapter->tx_eq);
  1116. return IRQ_HANDLED;
  1117. }
  1118. static inline bool do_gro(struct be_adapter *adapter,
  1119. struct be_eth_rx_compl *rxcp)
  1120. {
  1121. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1122. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1123. if (err)
  1124. drvr_stats(adapter)->be_rxcp_err++;
  1125. return (tcp_frame && !err) ? true : false;
  1126. }
  1127. int be_poll_rx(struct napi_struct *napi, int budget)
  1128. {
  1129. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1130. struct be_adapter *adapter =
  1131. container_of(rx_eq, struct be_adapter, rx_eq);
  1132. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1133. struct be_eth_rx_compl *rxcp;
  1134. u32 work_done;
  1135. for (work_done = 0; work_done < budget; work_done++) {
  1136. rxcp = be_rx_compl_get(adapter);
  1137. if (!rxcp)
  1138. break;
  1139. if (do_gro(adapter, rxcp))
  1140. be_rx_compl_process_gro(adapter, rxcp);
  1141. else
  1142. be_rx_compl_process(adapter, rxcp);
  1143. be_rx_compl_reset(rxcp);
  1144. }
  1145. /* Refill the queue */
  1146. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1147. be_post_rx_frags(adapter);
  1148. /* All consumed */
  1149. if (work_done < budget) {
  1150. napi_complete(napi);
  1151. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1152. } else {
  1153. /* More to be consumed; continue with interrupts disabled */
  1154. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1155. }
  1156. return work_done;
  1157. }
  1158. void be_process_tx(struct be_adapter *adapter)
  1159. {
  1160. struct be_queue_info *txq = &adapter->tx_obj.q;
  1161. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1162. struct be_eth_tx_compl *txcp;
  1163. u32 num_cmpl = 0;
  1164. u16 end_idx;
  1165. while ((txcp = be_tx_compl_get(tx_cq))) {
  1166. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1167. wrb_index, txcp);
  1168. be_tx_compl_process(adapter, end_idx);
  1169. num_cmpl++;
  1170. }
  1171. if (num_cmpl) {
  1172. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1173. /* As Tx wrbs have been freed up, wake up netdev queue if
  1174. * it was stopped due to lack of tx wrbs.
  1175. */
  1176. if (netif_queue_stopped(adapter->netdev) &&
  1177. atomic_read(&txq->used) < txq->len / 2) {
  1178. netif_wake_queue(adapter->netdev);
  1179. }
  1180. drvr_stats(adapter)->be_tx_events++;
  1181. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1182. }
  1183. }
  1184. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1185. * For TX/MCC we don't honour budget; consume everything
  1186. */
  1187. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1188. {
  1189. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1190. struct be_adapter *adapter =
  1191. container_of(tx_eq, struct be_adapter, tx_eq);
  1192. napi_complete(napi);
  1193. be_process_tx(adapter);
  1194. be_process_mcc(adapter);
  1195. return 1;
  1196. }
  1197. static void be_worker(struct work_struct *work)
  1198. {
  1199. struct be_adapter *adapter =
  1200. container_of(work, struct be_adapter, work.work);
  1201. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1202. /* Set EQ delay */
  1203. be_rx_eqd_update(adapter);
  1204. be_tx_rate_update(adapter);
  1205. be_rx_rate_update(adapter);
  1206. if (adapter->rx_post_starved) {
  1207. adapter->rx_post_starved = false;
  1208. be_post_rx_frags(adapter);
  1209. }
  1210. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1211. }
  1212. static void be_msix_enable(struct be_adapter *adapter)
  1213. {
  1214. int i, status;
  1215. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1216. adapter->msix_entries[i].entry = i;
  1217. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1218. BE_NUM_MSIX_VECTORS);
  1219. if (status == 0)
  1220. adapter->msix_enabled = true;
  1221. return;
  1222. }
  1223. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1224. {
  1225. return adapter->msix_entries[
  1226. be_evt_bit_get(adapter, eq_id)].vector;
  1227. }
  1228. static int be_request_irq(struct be_adapter *adapter,
  1229. struct be_eq_obj *eq_obj,
  1230. void *handler, char *desc)
  1231. {
  1232. struct net_device *netdev = adapter->netdev;
  1233. int vec;
  1234. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1235. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1236. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1237. }
  1238. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1239. {
  1240. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1241. free_irq(vec, adapter);
  1242. }
  1243. static int be_msix_register(struct be_adapter *adapter)
  1244. {
  1245. int status;
  1246. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1247. if (status)
  1248. goto err;
  1249. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1250. if (status)
  1251. goto free_tx_irq;
  1252. return 0;
  1253. free_tx_irq:
  1254. be_free_irq(adapter, &adapter->tx_eq);
  1255. err:
  1256. dev_warn(&adapter->pdev->dev,
  1257. "MSIX Request IRQ failed - err %d\n", status);
  1258. pci_disable_msix(adapter->pdev);
  1259. adapter->msix_enabled = false;
  1260. return status;
  1261. }
  1262. static int be_irq_register(struct be_adapter *adapter)
  1263. {
  1264. struct net_device *netdev = adapter->netdev;
  1265. int status;
  1266. if (adapter->msix_enabled) {
  1267. status = be_msix_register(adapter);
  1268. if (status == 0)
  1269. goto done;
  1270. }
  1271. /* INTx */
  1272. netdev->irq = adapter->pdev->irq;
  1273. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1274. adapter);
  1275. if (status) {
  1276. dev_err(&adapter->pdev->dev,
  1277. "INTx request IRQ failed - err %d\n", status);
  1278. return status;
  1279. }
  1280. done:
  1281. adapter->isr_registered = true;
  1282. return 0;
  1283. }
  1284. static void be_irq_unregister(struct be_adapter *adapter)
  1285. {
  1286. struct net_device *netdev = adapter->netdev;
  1287. if (!adapter->isr_registered)
  1288. return;
  1289. /* INTx */
  1290. if (!adapter->msix_enabled) {
  1291. free_irq(netdev->irq, adapter);
  1292. goto done;
  1293. }
  1294. /* MSIx */
  1295. be_free_irq(adapter, &adapter->tx_eq);
  1296. be_free_irq(adapter, &adapter->rx_eq);
  1297. done:
  1298. adapter->isr_registered = false;
  1299. return;
  1300. }
  1301. static int be_open(struct net_device *netdev)
  1302. {
  1303. struct be_adapter *adapter = netdev_priv(netdev);
  1304. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1305. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1306. bool link_up;
  1307. int status;
  1308. /* First time posting */
  1309. be_post_rx_frags(adapter);
  1310. napi_enable(&rx_eq->napi);
  1311. napi_enable(&tx_eq->napi);
  1312. be_irq_register(adapter);
  1313. be_intr_set(adapter, true);
  1314. /* The evt queues are created in unarmed state; arm them */
  1315. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1316. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1317. /* Rx compl queue may be in unarmed state; rearm it */
  1318. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1319. status = be_cmd_link_status_query(adapter, &link_up);
  1320. if (status)
  1321. return status;
  1322. be_link_status_update(adapter, link_up);
  1323. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1324. return 0;
  1325. }
  1326. static int be_setup(struct be_adapter *adapter)
  1327. {
  1328. struct net_device *netdev = adapter->netdev;
  1329. u32 if_flags;
  1330. int status;
  1331. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1332. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1333. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1334. status = be_cmd_if_create(adapter, if_flags, netdev->dev_addr,
  1335. false/* pmac_invalid */, &adapter->if_handle,
  1336. &adapter->pmac_id);
  1337. if (status != 0)
  1338. goto do_none;
  1339. status = be_tx_queues_create(adapter);
  1340. if (status != 0)
  1341. goto if_destroy;
  1342. status = be_rx_queues_create(adapter);
  1343. if (status != 0)
  1344. goto tx_qs_destroy;
  1345. status = be_mcc_queues_create(adapter);
  1346. if (status != 0)
  1347. goto rx_qs_destroy;
  1348. status = be_vid_config(adapter);
  1349. if (status != 0)
  1350. goto mccqs_destroy;
  1351. status = be_cmd_set_flow_control(adapter, true, true);
  1352. if (status != 0)
  1353. goto mccqs_destroy;
  1354. return 0;
  1355. mccqs_destroy:
  1356. be_mcc_queues_destroy(adapter);
  1357. rx_qs_destroy:
  1358. be_rx_queues_destroy(adapter);
  1359. tx_qs_destroy:
  1360. be_tx_queues_destroy(adapter);
  1361. if_destroy:
  1362. be_cmd_if_destroy(adapter, adapter->if_handle);
  1363. do_none:
  1364. return status;
  1365. }
  1366. static int be_clear(struct be_adapter *adapter)
  1367. {
  1368. be_mcc_queues_destroy(adapter);
  1369. be_rx_queues_destroy(adapter);
  1370. be_tx_queues_destroy(adapter);
  1371. be_cmd_if_destroy(adapter, adapter->if_handle);
  1372. return 0;
  1373. }
  1374. static int be_close(struct net_device *netdev)
  1375. {
  1376. struct be_adapter *adapter = netdev_priv(netdev);
  1377. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1378. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1379. int vec;
  1380. cancel_delayed_work_sync(&adapter->work);
  1381. netif_stop_queue(netdev);
  1382. netif_carrier_off(netdev);
  1383. adapter->link_up = false;
  1384. be_intr_set(adapter, false);
  1385. if (adapter->msix_enabled) {
  1386. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1387. synchronize_irq(vec);
  1388. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1389. synchronize_irq(vec);
  1390. } else {
  1391. synchronize_irq(netdev->irq);
  1392. }
  1393. be_irq_unregister(adapter);
  1394. napi_disable(&rx_eq->napi);
  1395. napi_disable(&tx_eq->napi);
  1396. /* Wait for all pending tx completions to arrive so that
  1397. * all tx skbs are freed.
  1398. */
  1399. be_tx_compl_clean(adapter);
  1400. return 0;
  1401. }
  1402. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1403. char flash_cookie[2][16] = {"*** SE FLAS",
  1404. "H DIRECTORY *** "};
  1405. static int be_flash_image(struct be_adapter *adapter,
  1406. const struct firmware *fw,
  1407. struct be_dma_mem *flash_cmd, u32 flash_type)
  1408. {
  1409. int status;
  1410. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1411. int num_bytes;
  1412. const u8 *p = fw->data;
  1413. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1414. switch (flash_type) {
  1415. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1416. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1417. image_size = FLASH_IMAGE_MAX_SIZE;
  1418. break;
  1419. case FLASHROM_TYPE_ISCSI_BACKUP:
  1420. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1421. image_size = FLASH_IMAGE_MAX_SIZE;
  1422. break;
  1423. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1424. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1425. image_size = FLASH_IMAGE_MAX_SIZE;
  1426. break;
  1427. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1428. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1429. image_size = FLASH_IMAGE_MAX_SIZE;
  1430. break;
  1431. case FLASHROM_TYPE_BIOS:
  1432. image_offset = FLASH_iSCSI_BIOS_START;
  1433. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1434. break;
  1435. case FLASHROM_TYPE_FCOE_BIOS:
  1436. image_offset = FLASH_FCoE_BIOS_START;
  1437. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1438. break;
  1439. case FLASHROM_TYPE_PXE_BIOS:
  1440. image_offset = FLASH_PXE_BIOS_START;
  1441. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1442. break;
  1443. default:
  1444. return 0;
  1445. }
  1446. p += sizeof(struct flash_file_hdr) + image_offset;
  1447. if (p + image_size > fw->data + fw->size)
  1448. return -1;
  1449. total_bytes = image_size;
  1450. while (total_bytes) {
  1451. if (total_bytes > 32*1024)
  1452. num_bytes = 32*1024;
  1453. else
  1454. num_bytes = total_bytes;
  1455. total_bytes -= num_bytes;
  1456. if (!total_bytes)
  1457. flash_op = FLASHROM_OPER_FLASH;
  1458. else
  1459. flash_op = FLASHROM_OPER_SAVE;
  1460. memcpy(req->params.data_buf, p, num_bytes);
  1461. p += num_bytes;
  1462. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1463. flash_type, flash_op, num_bytes);
  1464. if (status) {
  1465. dev_err(&adapter->pdev->dev,
  1466. "cmd to write to flash rom failed. type/op %d/%d\n",
  1467. flash_type, flash_op);
  1468. return -1;
  1469. }
  1470. yield();
  1471. }
  1472. return 0;
  1473. }
  1474. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1475. {
  1476. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1477. const struct firmware *fw;
  1478. struct flash_file_hdr *fhdr;
  1479. struct flash_section_info *fsec = NULL;
  1480. struct be_dma_mem flash_cmd;
  1481. int status;
  1482. const u8 *p;
  1483. bool entry_found = false;
  1484. int flash_type;
  1485. char fw_ver[FW_VER_LEN];
  1486. char fw_cfg;
  1487. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1488. if (status)
  1489. return status;
  1490. fw_cfg = *(fw_ver + 2);
  1491. if (fw_cfg == '0')
  1492. fw_cfg = '1';
  1493. strcpy(fw_file, func);
  1494. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1495. if (status)
  1496. goto fw_exit;
  1497. p = fw->data;
  1498. fhdr = (struct flash_file_hdr *) p;
  1499. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1500. dev_err(&adapter->pdev->dev,
  1501. "Firmware(%s) load error (signature did not match)\n",
  1502. fw_file);
  1503. status = -1;
  1504. goto fw_exit;
  1505. }
  1506. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1507. p += sizeof(struct flash_file_hdr);
  1508. while (p < (fw->data + fw->size)) {
  1509. fsec = (struct flash_section_info *)p;
  1510. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1511. entry_found = true;
  1512. break;
  1513. }
  1514. p += 32;
  1515. }
  1516. if (!entry_found) {
  1517. status = -1;
  1518. dev_err(&adapter->pdev->dev,
  1519. "Flash cookie not found in firmware image\n");
  1520. goto fw_exit;
  1521. }
  1522. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1523. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1524. &flash_cmd.dma);
  1525. if (!flash_cmd.va) {
  1526. status = -ENOMEM;
  1527. dev_err(&adapter->pdev->dev,
  1528. "Memory allocation failure while flashing\n");
  1529. goto fw_exit;
  1530. }
  1531. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1532. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1533. status = be_flash_image(adapter, fw, &flash_cmd,
  1534. flash_type);
  1535. if (status)
  1536. break;
  1537. }
  1538. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1539. flash_cmd.dma);
  1540. if (status) {
  1541. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1542. goto fw_exit;
  1543. }
  1544. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1545. fw_exit:
  1546. release_firmware(fw);
  1547. return status;
  1548. }
  1549. static struct net_device_ops be_netdev_ops = {
  1550. .ndo_open = be_open,
  1551. .ndo_stop = be_close,
  1552. .ndo_start_xmit = be_xmit,
  1553. .ndo_get_stats = be_get_stats,
  1554. .ndo_set_rx_mode = be_set_multicast_list,
  1555. .ndo_set_mac_address = be_mac_addr_set,
  1556. .ndo_change_mtu = be_change_mtu,
  1557. .ndo_validate_addr = eth_validate_addr,
  1558. .ndo_vlan_rx_register = be_vlan_register,
  1559. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1560. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1561. };
  1562. static void be_netdev_init(struct net_device *netdev)
  1563. {
  1564. struct be_adapter *adapter = netdev_priv(netdev);
  1565. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1566. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1567. NETIF_F_IPV6_CSUM | NETIF_F_GRO;
  1568. netdev->flags |= IFF_MULTICAST;
  1569. adapter->rx_csum = true;
  1570. netif_set_gso_max_size(netdev, 65535);
  1571. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1572. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1573. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1574. BE_NAPI_WEIGHT);
  1575. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1576. BE_NAPI_WEIGHT);
  1577. netif_carrier_off(netdev);
  1578. netif_stop_queue(netdev);
  1579. }
  1580. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1581. {
  1582. if (adapter->csr)
  1583. iounmap(adapter->csr);
  1584. if (adapter->db)
  1585. iounmap(adapter->db);
  1586. if (adapter->pcicfg)
  1587. iounmap(adapter->pcicfg);
  1588. }
  1589. static int be_map_pci_bars(struct be_adapter *adapter)
  1590. {
  1591. u8 __iomem *addr;
  1592. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1593. pci_resource_len(adapter->pdev, 2));
  1594. if (addr == NULL)
  1595. return -ENOMEM;
  1596. adapter->csr = addr;
  1597. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1598. 128 * 1024);
  1599. if (addr == NULL)
  1600. goto pci_map_err;
  1601. adapter->db = addr;
  1602. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1603. pci_resource_len(adapter->pdev, 1));
  1604. if (addr == NULL)
  1605. goto pci_map_err;
  1606. adapter->pcicfg = addr;
  1607. return 0;
  1608. pci_map_err:
  1609. be_unmap_pci_bars(adapter);
  1610. return -ENOMEM;
  1611. }
  1612. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1613. {
  1614. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1615. be_unmap_pci_bars(adapter);
  1616. if (mem->va)
  1617. pci_free_consistent(adapter->pdev, mem->size,
  1618. mem->va, mem->dma);
  1619. }
  1620. static int be_ctrl_init(struct be_adapter *adapter)
  1621. {
  1622. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1623. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1624. int status;
  1625. status = be_map_pci_bars(adapter);
  1626. if (status)
  1627. return status;
  1628. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1629. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1630. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1631. if (!mbox_mem_alloc->va) {
  1632. be_unmap_pci_bars(adapter);
  1633. return -1;
  1634. }
  1635. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1636. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1637. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1638. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1639. spin_lock_init(&adapter->mbox_lock);
  1640. spin_lock_init(&adapter->mcc_lock);
  1641. spin_lock_init(&adapter->mcc_cq_lock);
  1642. return 0;
  1643. }
  1644. static void be_stats_cleanup(struct be_adapter *adapter)
  1645. {
  1646. struct be_stats_obj *stats = &adapter->stats;
  1647. struct be_dma_mem *cmd = &stats->cmd;
  1648. if (cmd->va)
  1649. pci_free_consistent(adapter->pdev, cmd->size,
  1650. cmd->va, cmd->dma);
  1651. }
  1652. static int be_stats_init(struct be_adapter *adapter)
  1653. {
  1654. struct be_stats_obj *stats = &adapter->stats;
  1655. struct be_dma_mem *cmd = &stats->cmd;
  1656. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1657. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1658. if (cmd->va == NULL)
  1659. return -1;
  1660. return 0;
  1661. }
  1662. static void __devexit be_remove(struct pci_dev *pdev)
  1663. {
  1664. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1665. if (!adapter)
  1666. return;
  1667. unregister_netdev(adapter->netdev);
  1668. be_clear(adapter);
  1669. be_stats_cleanup(adapter);
  1670. be_ctrl_cleanup(adapter);
  1671. if (adapter->msix_enabled) {
  1672. pci_disable_msix(adapter->pdev);
  1673. adapter->msix_enabled = false;
  1674. }
  1675. pci_set_drvdata(pdev, NULL);
  1676. pci_release_regions(pdev);
  1677. pci_disable_device(pdev);
  1678. free_netdev(adapter->netdev);
  1679. }
  1680. static int be_hw_up(struct be_adapter *adapter)
  1681. {
  1682. int status;
  1683. status = be_cmd_POST(adapter);
  1684. if (status)
  1685. return status;
  1686. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1687. if (status)
  1688. return status;
  1689. status = be_cmd_query_fw_cfg(adapter, &adapter->port_num);
  1690. return status;
  1691. }
  1692. static int __devinit be_probe(struct pci_dev *pdev,
  1693. const struct pci_device_id *pdev_id)
  1694. {
  1695. int status = 0;
  1696. struct be_adapter *adapter;
  1697. struct net_device *netdev;
  1698. u8 mac[ETH_ALEN];
  1699. status = pci_enable_device(pdev);
  1700. if (status)
  1701. goto do_none;
  1702. status = pci_request_regions(pdev, DRV_NAME);
  1703. if (status)
  1704. goto disable_dev;
  1705. pci_set_master(pdev);
  1706. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1707. if (netdev == NULL) {
  1708. status = -ENOMEM;
  1709. goto rel_reg;
  1710. }
  1711. adapter = netdev_priv(netdev);
  1712. adapter->pdev = pdev;
  1713. pci_set_drvdata(pdev, adapter);
  1714. adapter->netdev = netdev;
  1715. be_msix_enable(adapter);
  1716. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1717. if (!status) {
  1718. netdev->features |= NETIF_F_HIGHDMA;
  1719. } else {
  1720. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1721. if (status) {
  1722. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1723. goto free_netdev;
  1724. }
  1725. }
  1726. status = be_ctrl_init(adapter);
  1727. if (status)
  1728. goto free_netdev;
  1729. status = be_cmd_reset_function(adapter);
  1730. if (status)
  1731. goto ctrl_clean;
  1732. status = be_stats_init(adapter);
  1733. if (status)
  1734. goto ctrl_clean;
  1735. status = be_hw_up(adapter);
  1736. if (status)
  1737. goto stats_clean;
  1738. status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
  1739. true /* permanent */, 0);
  1740. if (status)
  1741. goto stats_clean;
  1742. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1743. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1744. be_netdev_init(netdev);
  1745. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1746. status = be_setup(adapter);
  1747. if (status)
  1748. goto stats_clean;
  1749. status = register_netdev(netdev);
  1750. if (status != 0)
  1751. goto unsetup;
  1752. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1753. return 0;
  1754. unsetup:
  1755. be_clear(adapter);
  1756. stats_clean:
  1757. be_stats_cleanup(adapter);
  1758. ctrl_clean:
  1759. be_ctrl_cleanup(adapter);
  1760. free_netdev:
  1761. free_netdev(adapter->netdev);
  1762. rel_reg:
  1763. pci_release_regions(pdev);
  1764. disable_dev:
  1765. pci_disable_device(pdev);
  1766. do_none:
  1767. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1768. return status;
  1769. }
  1770. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1771. {
  1772. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1773. struct net_device *netdev = adapter->netdev;
  1774. netif_device_detach(netdev);
  1775. if (netif_running(netdev)) {
  1776. rtnl_lock();
  1777. be_close(netdev);
  1778. rtnl_unlock();
  1779. }
  1780. be_clear(adapter);
  1781. pci_save_state(pdev);
  1782. pci_disable_device(pdev);
  1783. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1784. return 0;
  1785. }
  1786. static int be_resume(struct pci_dev *pdev)
  1787. {
  1788. int status = 0;
  1789. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1790. struct net_device *netdev = adapter->netdev;
  1791. netif_device_detach(netdev);
  1792. status = pci_enable_device(pdev);
  1793. if (status)
  1794. return status;
  1795. pci_set_power_state(pdev, 0);
  1796. pci_restore_state(pdev);
  1797. be_setup(adapter);
  1798. if (netif_running(netdev)) {
  1799. rtnl_lock();
  1800. be_open(netdev);
  1801. rtnl_unlock();
  1802. }
  1803. netif_device_attach(netdev);
  1804. return 0;
  1805. }
  1806. static struct pci_driver be_driver = {
  1807. .name = DRV_NAME,
  1808. .id_table = be_dev_ids,
  1809. .probe = be_probe,
  1810. .remove = be_remove,
  1811. .suspend = be_suspend,
  1812. .resume = be_resume
  1813. };
  1814. static int __init be_init_module(void)
  1815. {
  1816. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1817. && rx_frag_size != 2048) {
  1818. printk(KERN_WARNING DRV_NAME
  1819. " : Module param rx_frag_size must be 2048/4096/8192."
  1820. " Using 2048\n");
  1821. rx_frag_size = 2048;
  1822. }
  1823. return pci_register_driver(&be_driver);
  1824. }
  1825. module_init(be_init_module);
  1826. static void __exit be_exit_module(void)
  1827. {
  1828. pci_unregister_driver(&be_driver);
  1829. }
  1830. module_exit(be_exit_module);