cciss.c 119 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/delay.h>
  30. #include <linux/major.h>
  31. #include <linux/fs.h>
  32. #include <linux/bio.h>
  33. #include <linux/blkpg.h>
  34. #include <linux/timer.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/seq_file.h>
  37. #include <linux/init.h>
  38. #include <linux/hdreg.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/compat.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/io.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/blkdev.h>
  45. #include <linux/genhd.h>
  46. #include <linux/completion.h>
  47. #include <scsi/scsi.h>
  48. #include <scsi/sg.h>
  49. #include <scsi/scsi_ioctl.h>
  50. #include <linux/cdrom.h>
  51. #include <linux/scatterlist.h>
  52. #include <linux/kthread.h>
  53. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  54. #define DRIVER_NAME "HP CISS Driver (v 3.6.20)"
  55. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 20)
  56. /* Embedded module documentation macros - see modules.h */
  57. MODULE_AUTHOR("Hewlett-Packard Company");
  58. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  59. MODULE_SUPPORTED_DEVICE("HP SA5i SA5i+ SA532 SA5300 SA5312 SA641 SA642 SA6400"
  60. " SA6i P600 P800 P400 P400i E200 E200i E500 P700m"
  61. " Smart Array G2 Series SAS/SATA Controllers");
  62. MODULE_VERSION("3.6.20");
  63. MODULE_LICENSE("GPL");
  64. #include "cciss_cmd.h"
  65. #include "cciss.h"
  66. #include <linux/cciss_ioctl.h>
  67. /* define the PCI info for the cards we can control */
  68. static const struct pci_device_id cciss_pci_device_id[] = {
  69. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  96. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  97. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  98. {0,}
  99. };
  100. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  101. /* board_id = Subsystem Device ID & Vendor ID
  102. * product = Marketing Name for the board
  103. * access = Address of the struct of function pointers
  104. */
  105. static struct board_type products[] = {
  106. {0x40700E11, "Smart Array 5300", &SA5_access},
  107. {0x40800E11, "Smart Array 5i", &SA5B_access},
  108. {0x40820E11, "Smart Array 532", &SA5B_access},
  109. {0x40830E11, "Smart Array 5312", &SA5B_access},
  110. {0x409A0E11, "Smart Array 641", &SA5_access},
  111. {0x409B0E11, "Smart Array 642", &SA5_access},
  112. {0x409C0E11, "Smart Array 6400", &SA5_access},
  113. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  114. {0x40910E11, "Smart Array 6i", &SA5_access},
  115. {0x3225103C, "Smart Array P600", &SA5_access},
  116. {0x3223103C, "Smart Array P800", &SA5_access},
  117. {0x3234103C, "Smart Array P400", &SA5_access},
  118. {0x3235103C, "Smart Array P400i", &SA5_access},
  119. {0x3211103C, "Smart Array E200i", &SA5_access},
  120. {0x3212103C, "Smart Array E200", &SA5_access},
  121. {0x3213103C, "Smart Array E200i", &SA5_access},
  122. {0x3214103C, "Smart Array E200i", &SA5_access},
  123. {0x3215103C, "Smart Array E200i", &SA5_access},
  124. {0x3237103C, "Smart Array E500", &SA5_access},
  125. {0x323D103C, "Smart Array P700m", &SA5_access},
  126. {0x3241103C, "Smart Array P212", &SA5_access},
  127. {0x3243103C, "Smart Array P410", &SA5_access},
  128. {0x3245103C, "Smart Array P410i", &SA5_access},
  129. {0x3247103C, "Smart Array P411", &SA5_access},
  130. {0x3249103C, "Smart Array P812", &SA5_access},
  131. {0x324A103C, "Smart Array P712m", &SA5_access},
  132. {0x324B103C, "Smart Array P711m", &SA5_access},
  133. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  134. };
  135. /* How long to wait (in milliseconds) for board to go into simple mode */
  136. #define MAX_CONFIG_WAIT 30000
  137. #define MAX_IOCTL_CONFIG_WAIT 1000
  138. /*define how many times we will try a command because of bus resets */
  139. #define MAX_CMD_RETRIES 3
  140. #define MAX_CTLR 32
  141. /* Originally cciss driver only supports 8 major numbers */
  142. #define MAX_CTLR_ORIG 8
  143. static ctlr_info_t *hba[MAX_CTLR];
  144. static void do_cciss_request(struct request_queue *q);
  145. static irqreturn_t do_cciss_intr(int irq, void *dev_id);
  146. static int cciss_open(struct block_device *bdev, fmode_t mode);
  147. static int cciss_release(struct gendisk *disk, fmode_t mode);
  148. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  149. unsigned int cmd, unsigned long arg);
  150. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  151. static int cciss_revalidate(struct gendisk *disk);
  152. static int rebuild_lun_table(ctlr_info_t *h, int first_time);
  153. static int deregister_disk(ctlr_info_t *h, int drv_index,
  154. int clear_all);
  155. static void cciss_read_capacity(int ctlr, int logvol, int withirq,
  156. sector_t *total_size, unsigned int *block_size);
  157. static void cciss_read_capacity_16(int ctlr, int logvol, int withirq,
  158. sector_t *total_size, unsigned int *block_size);
  159. static void cciss_geometry_inquiry(int ctlr, int logvol,
  160. int withirq, sector_t total_size,
  161. unsigned int block_size, InquiryData_struct *inq_buff,
  162. drive_info_struct *drv);
  163. static void __devinit cciss_interrupt_mode(ctlr_info_t *, struct pci_dev *,
  164. __u32);
  165. static void start_io(ctlr_info_t *h);
  166. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  167. __u8 page_code, unsigned char *scsi3addr, int cmd_type);
  168. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  169. __u8 page_code, unsigned char scsi3addr[],
  170. int cmd_type);
  171. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  172. int attempt_retry);
  173. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  174. static void fail_all_cmds(unsigned long ctlr);
  175. static int scan_thread(void *data);
  176. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  177. #ifdef CONFIG_PROC_FS
  178. static void cciss_procinit(int i);
  179. #else
  180. static void cciss_procinit(int i)
  181. {
  182. }
  183. #endif /* CONFIG_PROC_FS */
  184. #ifdef CONFIG_COMPAT
  185. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  186. unsigned, unsigned long);
  187. #endif
  188. static const struct block_device_operations cciss_fops = {
  189. .owner = THIS_MODULE,
  190. .open = cciss_open,
  191. .release = cciss_release,
  192. .locked_ioctl = cciss_ioctl,
  193. .getgeo = cciss_getgeo,
  194. #ifdef CONFIG_COMPAT
  195. .compat_ioctl = cciss_compat_ioctl,
  196. #endif
  197. .revalidate_disk = cciss_revalidate,
  198. };
  199. /*
  200. * Enqueuing and dequeuing functions for cmdlists.
  201. */
  202. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  203. {
  204. hlist_add_head(&c->list, list);
  205. }
  206. static inline void removeQ(CommandList_struct *c)
  207. {
  208. /*
  209. * After kexec/dump some commands might still
  210. * be in flight, which the firmware will try
  211. * to complete. Resetting the firmware doesn't work
  212. * with old fw revisions, so we have to mark
  213. * them off as 'stale' to prevent the driver from
  214. * falling over.
  215. */
  216. if (WARN_ON(hlist_unhashed(&c->list))) {
  217. c->cmd_type = CMD_MSG_STALE;
  218. return;
  219. }
  220. hlist_del_init(&c->list);
  221. }
  222. #include "cciss_scsi.c" /* For SCSI tape support */
  223. #define RAID_UNKNOWN 6
  224. #ifdef CONFIG_PROC_FS
  225. /*
  226. * Report information about this controller.
  227. */
  228. #define ENG_GIG 1000000000
  229. #define ENG_GIG_FACTOR (ENG_GIG/512)
  230. #define ENGAGE_SCSI "engage scsi"
  231. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  232. "UNKNOWN"
  233. };
  234. static struct proc_dir_entry *proc_cciss;
  235. static void cciss_seq_show_header(struct seq_file *seq)
  236. {
  237. ctlr_info_t *h = seq->private;
  238. seq_printf(seq, "%s: HP %s Controller\n"
  239. "Board ID: 0x%08lx\n"
  240. "Firmware Version: %c%c%c%c\n"
  241. "IRQ: %d\n"
  242. "Logical drives: %d\n"
  243. "Current Q depth: %d\n"
  244. "Current # commands on controller: %d\n"
  245. "Max Q depth since init: %d\n"
  246. "Max # commands on controller since init: %d\n"
  247. "Max SG entries since init: %d\n",
  248. h->devname,
  249. h->product_name,
  250. (unsigned long)h->board_id,
  251. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  252. h->firm_ver[3], (unsigned int)h->intr[SIMPLE_MODE_INT],
  253. h->num_luns,
  254. h->Qdepth, h->commands_outstanding,
  255. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  256. #ifdef CONFIG_CISS_SCSI_TAPE
  257. cciss_seq_tape_report(seq, h->ctlr);
  258. #endif /* CONFIG_CISS_SCSI_TAPE */
  259. }
  260. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  261. {
  262. ctlr_info_t *h = seq->private;
  263. unsigned ctlr = h->ctlr;
  264. unsigned long flags;
  265. /* prevent displaying bogus info during configuration
  266. * or deconfiguration of a logical volume
  267. */
  268. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  269. if (h->busy_configuring) {
  270. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  271. return ERR_PTR(-EBUSY);
  272. }
  273. h->busy_configuring = 1;
  274. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  275. if (*pos == 0)
  276. cciss_seq_show_header(seq);
  277. return pos;
  278. }
  279. static int cciss_seq_show(struct seq_file *seq, void *v)
  280. {
  281. sector_t vol_sz, vol_sz_frac;
  282. ctlr_info_t *h = seq->private;
  283. unsigned ctlr = h->ctlr;
  284. loff_t *pos = v;
  285. drive_info_struct *drv = &h->drv[*pos];
  286. if (*pos > h->highest_lun)
  287. return 0;
  288. if (drv->heads == 0)
  289. return 0;
  290. vol_sz = drv->nr_blocks;
  291. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  292. vol_sz_frac *= 100;
  293. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  294. if (drv->raid_level > 5)
  295. drv->raid_level = RAID_UNKNOWN;
  296. seq_printf(seq, "cciss/c%dd%d:"
  297. "\t%4u.%02uGB\tRAID %s\n",
  298. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  299. raid_label[drv->raid_level]);
  300. return 0;
  301. }
  302. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  303. {
  304. ctlr_info_t *h = seq->private;
  305. if (*pos > h->highest_lun)
  306. return NULL;
  307. *pos += 1;
  308. return pos;
  309. }
  310. static void cciss_seq_stop(struct seq_file *seq, void *v)
  311. {
  312. ctlr_info_t *h = seq->private;
  313. /* Only reset h->busy_configuring if we succeeded in setting
  314. * it during cciss_seq_start. */
  315. if (v == ERR_PTR(-EBUSY))
  316. return;
  317. h->busy_configuring = 0;
  318. }
  319. static const struct seq_operations cciss_seq_ops = {
  320. .start = cciss_seq_start,
  321. .show = cciss_seq_show,
  322. .next = cciss_seq_next,
  323. .stop = cciss_seq_stop,
  324. };
  325. static int cciss_seq_open(struct inode *inode, struct file *file)
  326. {
  327. int ret = seq_open(file, &cciss_seq_ops);
  328. struct seq_file *seq = file->private_data;
  329. if (!ret)
  330. seq->private = PDE(inode)->data;
  331. return ret;
  332. }
  333. static ssize_t
  334. cciss_proc_write(struct file *file, const char __user *buf,
  335. size_t length, loff_t *ppos)
  336. {
  337. int err;
  338. char *buffer;
  339. #ifndef CONFIG_CISS_SCSI_TAPE
  340. return -EINVAL;
  341. #endif
  342. if (!buf || length > PAGE_SIZE - 1)
  343. return -EINVAL;
  344. buffer = (char *)__get_free_page(GFP_KERNEL);
  345. if (!buffer)
  346. return -ENOMEM;
  347. err = -EFAULT;
  348. if (copy_from_user(buffer, buf, length))
  349. goto out;
  350. buffer[length] = '\0';
  351. #ifdef CONFIG_CISS_SCSI_TAPE
  352. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  353. struct seq_file *seq = file->private_data;
  354. ctlr_info_t *h = seq->private;
  355. int rc;
  356. rc = cciss_engage_scsi(h->ctlr);
  357. if (rc != 0)
  358. err = -rc;
  359. else
  360. err = length;
  361. } else
  362. #endif /* CONFIG_CISS_SCSI_TAPE */
  363. err = -EINVAL;
  364. /* might be nice to have "disengage" too, but it's not
  365. safely possible. (only 1 module use count, lock issues.) */
  366. out:
  367. free_page((unsigned long)buffer);
  368. return err;
  369. }
  370. static struct file_operations cciss_proc_fops = {
  371. .owner = THIS_MODULE,
  372. .open = cciss_seq_open,
  373. .read = seq_read,
  374. .llseek = seq_lseek,
  375. .release = seq_release,
  376. .write = cciss_proc_write,
  377. };
  378. static void __devinit cciss_procinit(int i)
  379. {
  380. struct proc_dir_entry *pde;
  381. if (proc_cciss == NULL)
  382. proc_cciss = proc_mkdir("driver/cciss", NULL);
  383. if (!proc_cciss)
  384. return;
  385. pde = proc_create_data(hba[i]->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  386. S_IROTH, proc_cciss,
  387. &cciss_proc_fops, hba[i]);
  388. }
  389. #endif /* CONFIG_PROC_FS */
  390. #define MAX_PRODUCT_NAME_LEN 19
  391. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  392. #define to_drv(n) container_of(n, drive_info_struct, dev)
  393. static struct device_type cciss_host_type = {
  394. .name = "cciss_host",
  395. };
  396. static ssize_t dev_show_unique_id(struct device *dev,
  397. struct device_attribute *attr,
  398. char *buf)
  399. {
  400. drive_info_struct *drv = to_drv(dev);
  401. struct ctlr_info *h = to_hba(drv->dev.parent);
  402. __u8 sn[16];
  403. unsigned long flags;
  404. int ret = 0;
  405. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  406. if (h->busy_configuring)
  407. ret = -EBUSY;
  408. else
  409. memcpy(sn, drv->serial_no, sizeof(sn));
  410. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  411. if (ret)
  412. return ret;
  413. else
  414. return snprintf(buf, 16 * 2 + 2,
  415. "%02X%02X%02X%02X%02X%02X%02X%02X"
  416. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  417. sn[0], sn[1], sn[2], sn[3],
  418. sn[4], sn[5], sn[6], sn[7],
  419. sn[8], sn[9], sn[10], sn[11],
  420. sn[12], sn[13], sn[14], sn[15]);
  421. }
  422. DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  423. static ssize_t dev_show_vendor(struct device *dev,
  424. struct device_attribute *attr,
  425. char *buf)
  426. {
  427. drive_info_struct *drv = to_drv(dev);
  428. struct ctlr_info *h = to_hba(drv->dev.parent);
  429. char vendor[VENDOR_LEN + 1];
  430. unsigned long flags;
  431. int ret = 0;
  432. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  433. if (h->busy_configuring)
  434. ret = -EBUSY;
  435. else
  436. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  437. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  438. if (ret)
  439. return ret;
  440. else
  441. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  442. }
  443. DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  444. static ssize_t dev_show_model(struct device *dev,
  445. struct device_attribute *attr,
  446. char *buf)
  447. {
  448. drive_info_struct *drv = to_drv(dev);
  449. struct ctlr_info *h = to_hba(drv->dev.parent);
  450. char model[MODEL_LEN + 1];
  451. unsigned long flags;
  452. int ret = 0;
  453. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  454. if (h->busy_configuring)
  455. ret = -EBUSY;
  456. else
  457. memcpy(model, drv->model, MODEL_LEN + 1);
  458. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  459. if (ret)
  460. return ret;
  461. else
  462. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  463. }
  464. DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  465. static ssize_t dev_show_rev(struct device *dev,
  466. struct device_attribute *attr,
  467. char *buf)
  468. {
  469. drive_info_struct *drv = to_drv(dev);
  470. struct ctlr_info *h = to_hba(drv->dev.parent);
  471. char rev[REV_LEN + 1];
  472. unsigned long flags;
  473. int ret = 0;
  474. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  475. if (h->busy_configuring)
  476. ret = -EBUSY;
  477. else
  478. memcpy(rev, drv->rev, REV_LEN + 1);
  479. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  480. if (ret)
  481. return ret;
  482. else
  483. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  484. }
  485. DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  486. static struct attribute *cciss_dev_attrs[] = {
  487. &dev_attr_unique_id.attr,
  488. &dev_attr_model.attr,
  489. &dev_attr_vendor.attr,
  490. &dev_attr_rev.attr,
  491. NULL
  492. };
  493. static struct attribute_group cciss_dev_attr_group = {
  494. .attrs = cciss_dev_attrs,
  495. };
  496. static const struct attribute_group *cciss_dev_attr_groups[] = {
  497. &cciss_dev_attr_group,
  498. NULL
  499. };
  500. static struct device_type cciss_dev_type = {
  501. .name = "cciss_device",
  502. .groups = cciss_dev_attr_groups,
  503. };
  504. static struct bus_type cciss_bus_type = {
  505. .name = "cciss",
  506. };
  507. /*
  508. * Initialize sysfs entry for each controller. This sets up and registers
  509. * the 'cciss#' directory for each individual controller under
  510. * /sys/bus/pci/devices/<dev>/.
  511. */
  512. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  513. {
  514. device_initialize(&h->dev);
  515. h->dev.type = &cciss_host_type;
  516. h->dev.bus = &cciss_bus_type;
  517. dev_set_name(&h->dev, "%s", h->devname);
  518. h->dev.parent = &h->pdev->dev;
  519. return device_add(&h->dev);
  520. }
  521. /*
  522. * Remove sysfs entries for an hba.
  523. */
  524. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  525. {
  526. device_del(&h->dev);
  527. }
  528. /*
  529. * Initialize sysfs for each logical drive. This sets up and registers
  530. * the 'c#d#' directory for each individual logical drive under
  531. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  532. * /sys/block/cciss!c#d# to this entry.
  533. */
  534. static int cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  535. drive_info_struct *drv,
  536. int drv_index)
  537. {
  538. device_initialize(&drv->dev);
  539. drv->dev.type = &cciss_dev_type;
  540. drv->dev.bus = &cciss_bus_type;
  541. dev_set_name(&drv->dev, "c%dd%d", h->ctlr, drv_index);
  542. drv->dev.parent = &h->dev;
  543. return device_add(&drv->dev);
  544. }
  545. /*
  546. * Remove sysfs entries for a logical drive.
  547. */
  548. static void cciss_destroy_ld_sysfs_entry(drive_info_struct *drv)
  549. {
  550. device_del(&drv->dev);
  551. }
  552. /*
  553. * For operations that cannot sleep, a command block is allocated at init,
  554. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  555. * which ones are free or in use. For operations that can wait for kmalloc
  556. * to possible sleep, this routine can be called with get_from_pool set to 0.
  557. * cmd_free() MUST be called with a got_from_pool set to 0 if cmd_alloc was.
  558. */
  559. static CommandList_struct *cmd_alloc(ctlr_info_t *h, int get_from_pool)
  560. {
  561. CommandList_struct *c;
  562. int i;
  563. u64bit temp64;
  564. dma_addr_t cmd_dma_handle, err_dma_handle;
  565. if (!get_from_pool) {
  566. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  567. sizeof(CommandList_struct), &cmd_dma_handle);
  568. if (c == NULL)
  569. return NULL;
  570. memset(c, 0, sizeof(CommandList_struct));
  571. c->cmdindex = -1;
  572. c->err_info = (ErrorInfo_struct *)
  573. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  574. &err_dma_handle);
  575. if (c->err_info == NULL) {
  576. pci_free_consistent(h->pdev,
  577. sizeof(CommandList_struct), c, cmd_dma_handle);
  578. return NULL;
  579. }
  580. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  581. } else { /* get it out of the controllers pool */
  582. do {
  583. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  584. if (i == h->nr_cmds)
  585. return NULL;
  586. } while (test_and_set_bit
  587. (i & (BITS_PER_LONG - 1),
  588. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  589. #ifdef CCISS_DEBUG
  590. printk(KERN_DEBUG "cciss: using command buffer %d\n", i);
  591. #endif
  592. c = h->cmd_pool + i;
  593. memset(c, 0, sizeof(CommandList_struct));
  594. cmd_dma_handle = h->cmd_pool_dhandle
  595. + i * sizeof(CommandList_struct);
  596. c->err_info = h->errinfo_pool + i;
  597. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  598. err_dma_handle = h->errinfo_pool_dhandle
  599. + i * sizeof(ErrorInfo_struct);
  600. h->nr_allocs++;
  601. c->cmdindex = i;
  602. }
  603. INIT_HLIST_NODE(&c->list);
  604. c->busaddr = (__u32) cmd_dma_handle;
  605. temp64.val = (__u64) err_dma_handle;
  606. c->ErrDesc.Addr.lower = temp64.val32.lower;
  607. c->ErrDesc.Addr.upper = temp64.val32.upper;
  608. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  609. c->ctlr = h->ctlr;
  610. return c;
  611. }
  612. /*
  613. * Frees a command block that was previously allocated with cmd_alloc().
  614. */
  615. static void cmd_free(ctlr_info_t *h, CommandList_struct *c, int got_from_pool)
  616. {
  617. int i;
  618. u64bit temp64;
  619. if (!got_from_pool) {
  620. temp64.val32.lower = c->ErrDesc.Addr.lower;
  621. temp64.val32.upper = c->ErrDesc.Addr.upper;
  622. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  623. c->err_info, (dma_addr_t) temp64.val);
  624. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  625. c, (dma_addr_t) c->busaddr);
  626. } else {
  627. i = c - h->cmd_pool;
  628. clear_bit(i & (BITS_PER_LONG - 1),
  629. h->cmd_pool_bits + (i / BITS_PER_LONG));
  630. h->nr_frees++;
  631. }
  632. }
  633. static inline ctlr_info_t *get_host(struct gendisk *disk)
  634. {
  635. return disk->queue->queuedata;
  636. }
  637. static inline drive_info_struct *get_drv(struct gendisk *disk)
  638. {
  639. return disk->private_data;
  640. }
  641. /*
  642. * Open. Make sure the device is really there.
  643. */
  644. static int cciss_open(struct block_device *bdev, fmode_t mode)
  645. {
  646. ctlr_info_t *host = get_host(bdev->bd_disk);
  647. drive_info_struct *drv = get_drv(bdev->bd_disk);
  648. #ifdef CCISS_DEBUG
  649. printk(KERN_DEBUG "cciss_open %s\n", bdev->bd_disk->disk_name);
  650. #endif /* CCISS_DEBUG */
  651. if (host->busy_initializing || drv->busy_configuring)
  652. return -EBUSY;
  653. /*
  654. * Root is allowed to open raw volume zero even if it's not configured
  655. * so array config can still work. Root is also allowed to open any
  656. * volume that has a LUN ID, so it can issue IOCTL to reread the
  657. * disk information. I don't think I really like this
  658. * but I'm already using way to many device nodes to claim another one
  659. * for "raw controller".
  660. */
  661. if (drv->heads == 0) {
  662. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  663. /* if not node 0 make sure it is a partition = 0 */
  664. if (MINOR(bdev->bd_dev) & 0x0f) {
  665. return -ENXIO;
  666. /* if it is, make sure we have a LUN ID */
  667. } else if (drv->LunID == 0) {
  668. return -ENXIO;
  669. }
  670. }
  671. if (!capable(CAP_SYS_ADMIN))
  672. return -EPERM;
  673. }
  674. drv->usage_count++;
  675. host->usage_count++;
  676. return 0;
  677. }
  678. /*
  679. * Close. Sync first.
  680. */
  681. static int cciss_release(struct gendisk *disk, fmode_t mode)
  682. {
  683. ctlr_info_t *host = get_host(disk);
  684. drive_info_struct *drv = get_drv(disk);
  685. #ifdef CCISS_DEBUG
  686. printk(KERN_DEBUG "cciss_release %s\n", disk->disk_name);
  687. #endif /* CCISS_DEBUG */
  688. drv->usage_count--;
  689. host->usage_count--;
  690. return 0;
  691. }
  692. #ifdef CONFIG_COMPAT
  693. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  694. unsigned cmd, unsigned long arg)
  695. {
  696. int ret;
  697. lock_kernel();
  698. ret = cciss_ioctl(bdev, mode, cmd, arg);
  699. unlock_kernel();
  700. return ret;
  701. }
  702. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  703. unsigned cmd, unsigned long arg);
  704. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  705. unsigned cmd, unsigned long arg);
  706. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  707. unsigned cmd, unsigned long arg)
  708. {
  709. switch (cmd) {
  710. case CCISS_GETPCIINFO:
  711. case CCISS_GETINTINFO:
  712. case CCISS_SETINTINFO:
  713. case CCISS_GETNODENAME:
  714. case CCISS_SETNODENAME:
  715. case CCISS_GETHEARTBEAT:
  716. case CCISS_GETBUSTYPES:
  717. case CCISS_GETFIRMVER:
  718. case CCISS_GETDRIVVER:
  719. case CCISS_REVALIDVOLS:
  720. case CCISS_DEREGDISK:
  721. case CCISS_REGNEWDISK:
  722. case CCISS_REGNEWD:
  723. case CCISS_RESCANDISK:
  724. case CCISS_GETLUNINFO:
  725. return do_ioctl(bdev, mode, cmd, arg);
  726. case CCISS_PASSTHRU32:
  727. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  728. case CCISS_BIG_PASSTHRU32:
  729. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  730. default:
  731. return -ENOIOCTLCMD;
  732. }
  733. }
  734. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  735. unsigned cmd, unsigned long arg)
  736. {
  737. IOCTL32_Command_struct __user *arg32 =
  738. (IOCTL32_Command_struct __user *) arg;
  739. IOCTL_Command_struct arg64;
  740. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  741. int err;
  742. u32 cp;
  743. err = 0;
  744. err |=
  745. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  746. sizeof(arg64.LUN_info));
  747. err |=
  748. copy_from_user(&arg64.Request, &arg32->Request,
  749. sizeof(arg64.Request));
  750. err |=
  751. copy_from_user(&arg64.error_info, &arg32->error_info,
  752. sizeof(arg64.error_info));
  753. err |= get_user(arg64.buf_size, &arg32->buf_size);
  754. err |= get_user(cp, &arg32->buf);
  755. arg64.buf = compat_ptr(cp);
  756. err |= copy_to_user(p, &arg64, sizeof(arg64));
  757. if (err)
  758. return -EFAULT;
  759. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  760. if (err)
  761. return err;
  762. err |=
  763. copy_in_user(&arg32->error_info, &p->error_info,
  764. sizeof(arg32->error_info));
  765. if (err)
  766. return -EFAULT;
  767. return err;
  768. }
  769. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  770. unsigned cmd, unsigned long arg)
  771. {
  772. BIG_IOCTL32_Command_struct __user *arg32 =
  773. (BIG_IOCTL32_Command_struct __user *) arg;
  774. BIG_IOCTL_Command_struct arg64;
  775. BIG_IOCTL_Command_struct __user *p =
  776. compat_alloc_user_space(sizeof(arg64));
  777. int err;
  778. u32 cp;
  779. err = 0;
  780. err |=
  781. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  782. sizeof(arg64.LUN_info));
  783. err |=
  784. copy_from_user(&arg64.Request, &arg32->Request,
  785. sizeof(arg64.Request));
  786. err |=
  787. copy_from_user(&arg64.error_info, &arg32->error_info,
  788. sizeof(arg64.error_info));
  789. err |= get_user(arg64.buf_size, &arg32->buf_size);
  790. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  791. err |= get_user(cp, &arg32->buf);
  792. arg64.buf = compat_ptr(cp);
  793. err |= copy_to_user(p, &arg64, sizeof(arg64));
  794. if (err)
  795. return -EFAULT;
  796. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  797. if (err)
  798. return err;
  799. err |=
  800. copy_in_user(&arg32->error_info, &p->error_info,
  801. sizeof(arg32->error_info));
  802. if (err)
  803. return -EFAULT;
  804. return err;
  805. }
  806. #endif
  807. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  808. {
  809. drive_info_struct *drv = get_drv(bdev->bd_disk);
  810. if (!drv->cylinders)
  811. return -ENXIO;
  812. geo->heads = drv->heads;
  813. geo->sectors = drv->sectors;
  814. geo->cylinders = drv->cylinders;
  815. return 0;
  816. }
  817. static void check_ioctl_unit_attention(ctlr_info_t *host, CommandList_struct *c)
  818. {
  819. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  820. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  821. (void)check_for_unit_attention(host, c);
  822. }
  823. /*
  824. * ioctl
  825. */
  826. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  827. unsigned int cmd, unsigned long arg)
  828. {
  829. struct gendisk *disk = bdev->bd_disk;
  830. ctlr_info_t *host = get_host(disk);
  831. drive_info_struct *drv = get_drv(disk);
  832. int ctlr = host->ctlr;
  833. void __user *argp = (void __user *)arg;
  834. #ifdef CCISS_DEBUG
  835. printk(KERN_DEBUG "cciss_ioctl: Called with cmd=%x %lx\n", cmd, arg);
  836. #endif /* CCISS_DEBUG */
  837. switch (cmd) {
  838. case CCISS_GETPCIINFO:
  839. {
  840. cciss_pci_info_struct pciinfo;
  841. if (!arg)
  842. return -EINVAL;
  843. pciinfo.domain = pci_domain_nr(host->pdev->bus);
  844. pciinfo.bus = host->pdev->bus->number;
  845. pciinfo.dev_fn = host->pdev->devfn;
  846. pciinfo.board_id = host->board_id;
  847. if (copy_to_user
  848. (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  849. return -EFAULT;
  850. return 0;
  851. }
  852. case CCISS_GETINTINFO:
  853. {
  854. cciss_coalint_struct intinfo;
  855. if (!arg)
  856. return -EINVAL;
  857. intinfo.delay =
  858. readl(&host->cfgtable->HostWrite.CoalIntDelay);
  859. intinfo.count =
  860. readl(&host->cfgtable->HostWrite.CoalIntCount);
  861. if (copy_to_user
  862. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  863. return -EFAULT;
  864. return 0;
  865. }
  866. case CCISS_SETINTINFO:
  867. {
  868. cciss_coalint_struct intinfo;
  869. unsigned long flags;
  870. int i;
  871. if (!arg)
  872. return -EINVAL;
  873. if (!capable(CAP_SYS_ADMIN))
  874. return -EPERM;
  875. if (copy_from_user
  876. (&intinfo, argp, sizeof(cciss_coalint_struct)))
  877. return -EFAULT;
  878. if ((intinfo.delay == 0) && (intinfo.count == 0))
  879. {
  880. // printk("cciss_ioctl: delay and count cannot be 0\n");
  881. return -EINVAL;
  882. }
  883. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  884. /* Update the field, and then ring the doorbell */
  885. writel(intinfo.delay,
  886. &(host->cfgtable->HostWrite.CoalIntDelay));
  887. writel(intinfo.count,
  888. &(host->cfgtable->HostWrite.CoalIntCount));
  889. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  890. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  891. if (!(readl(host->vaddr + SA5_DOORBELL)
  892. & CFGTBL_ChangeReq))
  893. break;
  894. /* delay and try again */
  895. udelay(1000);
  896. }
  897. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  898. if (i >= MAX_IOCTL_CONFIG_WAIT)
  899. return -EAGAIN;
  900. return 0;
  901. }
  902. case CCISS_GETNODENAME:
  903. {
  904. NodeName_type NodeName;
  905. int i;
  906. if (!arg)
  907. return -EINVAL;
  908. for (i = 0; i < 16; i++)
  909. NodeName[i] =
  910. readb(&host->cfgtable->ServerName[i]);
  911. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  912. return -EFAULT;
  913. return 0;
  914. }
  915. case CCISS_SETNODENAME:
  916. {
  917. NodeName_type NodeName;
  918. unsigned long flags;
  919. int i;
  920. if (!arg)
  921. return -EINVAL;
  922. if (!capable(CAP_SYS_ADMIN))
  923. return -EPERM;
  924. if (copy_from_user
  925. (NodeName, argp, sizeof(NodeName_type)))
  926. return -EFAULT;
  927. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  928. /* Update the field, and then ring the doorbell */
  929. for (i = 0; i < 16; i++)
  930. writeb(NodeName[i],
  931. &host->cfgtable->ServerName[i]);
  932. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  933. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  934. if (!(readl(host->vaddr + SA5_DOORBELL)
  935. & CFGTBL_ChangeReq))
  936. break;
  937. /* delay and try again */
  938. udelay(1000);
  939. }
  940. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  941. if (i >= MAX_IOCTL_CONFIG_WAIT)
  942. return -EAGAIN;
  943. return 0;
  944. }
  945. case CCISS_GETHEARTBEAT:
  946. {
  947. Heartbeat_type heartbeat;
  948. if (!arg)
  949. return -EINVAL;
  950. heartbeat = readl(&host->cfgtable->HeartBeat);
  951. if (copy_to_user
  952. (argp, &heartbeat, sizeof(Heartbeat_type)))
  953. return -EFAULT;
  954. return 0;
  955. }
  956. case CCISS_GETBUSTYPES:
  957. {
  958. BusTypes_type BusTypes;
  959. if (!arg)
  960. return -EINVAL;
  961. BusTypes = readl(&host->cfgtable->BusTypes);
  962. if (copy_to_user
  963. (argp, &BusTypes, sizeof(BusTypes_type)))
  964. return -EFAULT;
  965. return 0;
  966. }
  967. case CCISS_GETFIRMVER:
  968. {
  969. FirmwareVer_type firmware;
  970. if (!arg)
  971. return -EINVAL;
  972. memcpy(firmware, host->firm_ver, 4);
  973. if (copy_to_user
  974. (argp, firmware, sizeof(FirmwareVer_type)))
  975. return -EFAULT;
  976. return 0;
  977. }
  978. case CCISS_GETDRIVVER:
  979. {
  980. DriverVer_type DriverVer = DRIVER_VERSION;
  981. if (!arg)
  982. return -EINVAL;
  983. if (copy_to_user
  984. (argp, &DriverVer, sizeof(DriverVer_type)))
  985. return -EFAULT;
  986. return 0;
  987. }
  988. case CCISS_DEREGDISK:
  989. case CCISS_REGNEWD:
  990. case CCISS_REVALIDVOLS:
  991. return rebuild_lun_table(host, 0);
  992. case CCISS_GETLUNINFO:{
  993. LogvolInfo_struct luninfo;
  994. luninfo.LunID = drv->LunID;
  995. luninfo.num_opens = drv->usage_count;
  996. luninfo.num_parts = 0;
  997. if (copy_to_user(argp, &luninfo,
  998. sizeof(LogvolInfo_struct)))
  999. return -EFAULT;
  1000. return 0;
  1001. }
  1002. case CCISS_PASSTHRU:
  1003. {
  1004. IOCTL_Command_struct iocommand;
  1005. CommandList_struct *c;
  1006. char *buff = NULL;
  1007. u64bit temp64;
  1008. unsigned long flags;
  1009. DECLARE_COMPLETION_ONSTACK(wait);
  1010. if (!arg)
  1011. return -EINVAL;
  1012. if (!capable(CAP_SYS_RAWIO))
  1013. return -EPERM;
  1014. if (copy_from_user
  1015. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1016. return -EFAULT;
  1017. if ((iocommand.buf_size < 1) &&
  1018. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1019. return -EINVAL;
  1020. }
  1021. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  1022. /* Check kmalloc limits */
  1023. if (iocommand.buf_size > 128000)
  1024. return -EINVAL;
  1025. #endif
  1026. if (iocommand.buf_size > 0) {
  1027. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1028. if (buff == NULL)
  1029. return -EFAULT;
  1030. }
  1031. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1032. /* Copy the data into the buffer we created */
  1033. if (copy_from_user
  1034. (buff, iocommand.buf, iocommand.buf_size)) {
  1035. kfree(buff);
  1036. return -EFAULT;
  1037. }
  1038. } else {
  1039. memset(buff, 0, iocommand.buf_size);
  1040. }
  1041. if ((c = cmd_alloc(host, 0)) == NULL) {
  1042. kfree(buff);
  1043. return -ENOMEM;
  1044. }
  1045. // Fill in the command type
  1046. c->cmd_type = CMD_IOCTL_PEND;
  1047. // Fill in Command Header
  1048. c->Header.ReplyQueue = 0; // unused in simple mode
  1049. if (iocommand.buf_size > 0) // buffer to fill
  1050. {
  1051. c->Header.SGList = 1;
  1052. c->Header.SGTotal = 1;
  1053. } else // no buffers to fill
  1054. {
  1055. c->Header.SGList = 0;
  1056. c->Header.SGTotal = 0;
  1057. }
  1058. c->Header.LUN = iocommand.LUN_info;
  1059. c->Header.Tag.lower = c->busaddr; // use the kernel address the cmd block for tag
  1060. // Fill in Request block
  1061. c->Request = iocommand.Request;
  1062. // Fill in the scatter gather information
  1063. if (iocommand.buf_size > 0) {
  1064. temp64.val = pci_map_single(host->pdev, buff,
  1065. iocommand.buf_size,
  1066. PCI_DMA_BIDIRECTIONAL);
  1067. c->SG[0].Addr.lower = temp64.val32.lower;
  1068. c->SG[0].Addr.upper = temp64.val32.upper;
  1069. c->SG[0].Len = iocommand.buf_size;
  1070. c->SG[0].Ext = 0; // we are not chaining
  1071. }
  1072. c->waiting = &wait;
  1073. /* Put the request on the tail of the request queue */
  1074. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1075. addQ(&host->reqQ, c);
  1076. host->Qdepth++;
  1077. start_io(host);
  1078. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1079. wait_for_completion(&wait);
  1080. /* unlock the buffers from DMA */
  1081. temp64.val32.lower = c->SG[0].Addr.lower;
  1082. temp64.val32.upper = c->SG[0].Addr.upper;
  1083. pci_unmap_single(host->pdev, (dma_addr_t) temp64.val,
  1084. iocommand.buf_size,
  1085. PCI_DMA_BIDIRECTIONAL);
  1086. check_ioctl_unit_attention(host, c);
  1087. /* Copy the error information out */
  1088. iocommand.error_info = *(c->err_info);
  1089. if (copy_to_user
  1090. (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1091. kfree(buff);
  1092. cmd_free(host, c, 0);
  1093. return -EFAULT;
  1094. }
  1095. if (iocommand.Request.Type.Direction == XFER_READ) {
  1096. /* Copy the data out of the buffer we created */
  1097. if (copy_to_user
  1098. (iocommand.buf, buff, iocommand.buf_size)) {
  1099. kfree(buff);
  1100. cmd_free(host, c, 0);
  1101. return -EFAULT;
  1102. }
  1103. }
  1104. kfree(buff);
  1105. cmd_free(host, c, 0);
  1106. return 0;
  1107. }
  1108. case CCISS_BIG_PASSTHRU:{
  1109. BIG_IOCTL_Command_struct *ioc;
  1110. CommandList_struct *c;
  1111. unsigned char **buff = NULL;
  1112. int *buff_size = NULL;
  1113. u64bit temp64;
  1114. unsigned long flags;
  1115. BYTE sg_used = 0;
  1116. int status = 0;
  1117. int i;
  1118. DECLARE_COMPLETION_ONSTACK(wait);
  1119. __u32 left;
  1120. __u32 sz;
  1121. BYTE __user *data_ptr;
  1122. if (!arg)
  1123. return -EINVAL;
  1124. if (!capable(CAP_SYS_RAWIO))
  1125. return -EPERM;
  1126. ioc = (BIG_IOCTL_Command_struct *)
  1127. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1128. if (!ioc) {
  1129. status = -ENOMEM;
  1130. goto cleanup1;
  1131. }
  1132. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1133. status = -EFAULT;
  1134. goto cleanup1;
  1135. }
  1136. if ((ioc->buf_size < 1) &&
  1137. (ioc->Request.Type.Direction != XFER_NONE)) {
  1138. status = -EINVAL;
  1139. goto cleanup1;
  1140. }
  1141. /* Check kmalloc limits using all SGs */
  1142. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1143. status = -EINVAL;
  1144. goto cleanup1;
  1145. }
  1146. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1147. status = -EINVAL;
  1148. goto cleanup1;
  1149. }
  1150. buff =
  1151. kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1152. if (!buff) {
  1153. status = -ENOMEM;
  1154. goto cleanup1;
  1155. }
  1156. buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
  1157. GFP_KERNEL);
  1158. if (!buff_size) {
  1159. status = -ENOMEM;
  1160. goto cleanup1;
  1161. }
  1162. left = ioc->buf_size;
  1163. data_ptr = ioc->buf;
  1164. while (left) {
  1165. sz = (left >
  1166. ioc->malloc_size) ? ioc->
  1167. malloc_size : left;
  1168. buff_size[sg_used] = sz;
  1169. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1170. if (buff[sg_used] == NULL) {
  1171. status = -ENOMEM;
  1172. goto cleanup1;
  1173. }
  1174. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1175. if (copy_from_user
  1176. (buff[sg_used], data_ptr, sz)) {
  1177. status = -EFAULT;
  1178. goto cleanup1;
  1179. }
  1180. } else {
  1181. memset(buff[sg_used], 0, sz);
  1182. }
  1183. left -= sz;
  1184. data_ptr += sz;
  1185. sg_used++;
  1186. }
  1187. if ((c = cmd_alloc(host, 0)) == NULL) {
  1188. status = -ENOMEM;
  1189. goto cleanup1;
  1190. }
  1191. c->cmd_type = CMD_IOCTL_PEND;
  1192. c->Header.ReplyQueue = 0;
  1193. if (ioc->buf_size > 0) {
  1194. c->Header.SGList = sg_used;
  1195. c->Header.SGTotal = sg_used;
  1196. } else {
  1197. c->Header.SGList = 0;
  1198. c->Header.SGTotal = 0;
  1199. }
  1200. c->Header.LUN = ioc->LUN_info;
  1201. c->Header.Tag.lower = c->busaddr;
  1202. c->Request = ioc->Request;
  1203. if (ioc->buf_size > 0) {
  1204. int i;
  1205. for (i = 0; i < sg_used; i++) {
  1206. temp64.val =
  1207. pci_map_single(host->pdev, buff[i],
  1208. buff_size[i],
  1209. PCI_DMA_BIDIRECTIONAL);
  1210. c->SG[i].Addr.lower =
  1211. temp64.val32.lower;
  1212. c->SG[i].Addr.upper =
  1213. temp64.val32.upper;
  1214. c->SG[i].Len = buff_size[i];
  1215. c->SG[i].Ext = 0; /* we are not chaining */
  1216. }
  1217. }
  1218. c->waiting = &wait;
  1219. /* Put the request on the tail of the request queue */
  1220. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1221. addQ(&host->reqQ, c);
  1222. host->Qdepth++;
  1223. start_io(host);
  1224. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1225. wait_for_completion(&wait);
  1226. /* unlock the buffers from DMA */
  1227. for (i = 0; i < sg_used; i++) {
  1228. temp64.val32.lower = c->SG[i].Addr.lower;
  1229. temp64.val32.upper = c->SG[i].Addr.upper;
  1230. pci_unmap_single(host->pdev,
  1231. (dma_addr_t) temp64.val, buff_size[i],
  1232. PCI_DMA_BIDIRECTIONAL);
  1233. }
  1234. check_ioctl_unit_attention(host, c);
  1235. /* Copy the error information out */
  1236. ioc->error_info = *(c->err_info);
  1237. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1238. cmd_free(host, c, 0);
  1239. status = -EFAULT;
  1240. goto cleanup1;
  1241. }
  1242. if (ioc->Request.Type.Direction == XFER_READ) {
  1243. /* Copy the data out of the buffer we created */
  1244. BYTE __user *ptr = ioc->buf;
  1245. for (i = 0; i < sg_used; i++) {
  1246. if (copy_to_user
  1247. (ptr, buff[i], buff_size[i])) {
  1248. cmd_free(host, c, 0);
  1249. status = -EFAULT;
  1250. goto cleanup1;
  1251. }
  1252. ptr += buff_size[i];
  1253. }
  1254. }
  1255. cmd_free(host, c, 0);
  1256. status = 0;
  1257. cleanup1:
  1258. if (buff) {
  1259. for (i = 0; i < sg_used; i++)
  1260. kfree(buff[i]);
  1261. kfree(buff);
  1262. }
  1263. kfree(buff_size);
  1264. kfree(ioc);
  1265. return status;
  1266. }
  1267. /* scsi_cmd_ioctl handles these, below, though some are not */
  1268. /* very meaningful for cciss. SG_IO is the main one people want. */
  1269. case SG_GET_VERSION_NUM:
  1270. case SG_SET_TIMEOUT:
  1271. case SG_GET_TIMEOUT:
  1272. case SG_GET_RESERVED_SIZE:
  1273. case SG_SET_RESERVED_SIZE:
  1274. case SG_EMULATED_HOST:
  1275. case SG_IO:
  1276. case SCSI_IOCTL_SEND_COMMAND:
  1277. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1278. /* scsi_cmd_ioctl would normally handle these, below, but */
  1279. /* they aren't a good fit for cciss, as CD-ROMs are */
  1280. /* not supported, and we don't have any bus/target/lun */
  1281. /* which we present to the kernel. */
  1282. case CDROM_SEND_PACKET:
  1283. case CDROMCLOSETRAY:
  1284. case CDROMEJECT:
  1285. case SCSI_IOCTL_GET_IDLUN:
  1286. case SCSI_IOCTL_GET_BUS_NUMBER:
  1287. default:
  1288. return -ENOTTY;
  1289. }
  1290. }
  1291. static void cciss_check_queues(ctlr_info_t *h)
  1292. {
  1293. int start_queue = h->next_to_run;
  1294. int i;
  1295. /* check to see if we have maxed out the number of commands that can
  1296. * be placed on the queue. If so then exit. We do this check here
  1297. * in case the interrupt we serviced was from an ioctl and did not
  1298. * free any new commands.
  1299. */
  1300. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1301. return;
  1302. /* We have room on the queue for more commands. Now we need to queue
  1303. * them up. We will also keep track of the next queue to run so
  1304. * that every queue gets a chance to be started first.
  1305. */
  1306. for (i = 0; i < h->highest_lun + 1; i++) {
  1307. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1308. /* make sure the disk has been added and the drive is real
  1309. * because this can be called from the middle of init_one.
  1310. */
  1311. if (!(h->drv[curr_queue].queue) || !(h->drv[curr_queue].heads))
  1312. continue;
  1313. blk_start_queue(h->gendisk[curr_queue]->queue);
  1314. /* check to see if we have maxed out the number of commands
  1315. * that can be placed on the queue.
  1316. */
  1317. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1318. if (curr_queue == start_queue) {
  1319. h->next_to_run =
  1320. (start_queue + 1) % (h->highest_lun + 1);
  1321. break;
  1322. } else {
  1323. h->next_to_run = curr_queue;
  1324. break;
  1325. }
  1326. }
  1327. }
  1328. }
  1329. static void cciss_softirq_done(struct request *rq)
  1330. {
  1331. CommandList_struct *cmd = rq->completion_data;
  1332. ctlr_info_t *h = hba[cmd->ctlr];
  1333. unsigned long flags;
  1334. u64bit temp64;
  1335. int i, ddir;
  1336. if (cmd->Request.Type.Direction == XFER_READ)
  1337. ddir = PCI_DMA_FROMDEVICE;
  1338. else
  1339. ddir = PCI_DMA_TODEVICE;
  1340. /* command did not need to be retried */
  1341. /* unmap the DMA mapping for all the scatter gather elements */
  1342. for (i = 0; i < cmd->Header.SGList; i++) {
  1343. temp64.val32.lower = cmd->SG[i].Addr.lower;
  1344. temp64.val32.upper = cmd->SG[i].Addr.upper;
  1345. pci_unmap_page(h->pdev, temp64.val, cmd->SG[i].Len, ddir);
  1346. }
  1347. #ifdef CCISS_DEBUG
  1348. printk("Done with %p\n", rq);
  1349. #endif /* CCISS_DEBUG */
  1350. /* set the residual count for pc requests */
  1351. if (blk_pc_request(rq))
  1352. rq->resid_len = cmd->err_info->ResidualCnt;
  1353. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1354. spin_lock_irqsave(&h->lock, flags);
  1355. cmd_free(h, cmd, 1);
  1356. cciss_check_queues(h);
  1357. spin_unlock_irqrestore(&h->lock, flags);
  1358. }
  1359. static void log_unit_to_scsi3addr(ctlr_info_t *h, unsigned char scsi3addr[],
  1360. uint32_t log_unit)
  1361. {
  1362. log_unit = h->drv[log_unit].LunID & 0x03fff;
  1363. memset(&scsi3addr[4], 0, 4);
  1364. memcpy(&scsi3addr[0], &log_unit, 4);
  1365. scsi3addr[3] |= 0x40;
  1366. }
  1367. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1368. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1369. * they cannot be read.
  1370. */
  1371. static void cciss_get_device_descr(int ctlr, int logvol, int withirq,
  1372. char *vendor, char *model, char *rev)
  1373. {
  1374. int rc;
  1375. InquiryData_struct *inq_buf;
  1376. unsigned char scsi3addr[8];
  1377. *vendor = '\0';
  1378. *model = '\0';
  1379. *rev = '\0';
  1380. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1381. if (!inq_buf)
  1382. return;
  1383. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1384. if (withirq)
  1385. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, inq_buf,
  1386. sizeof(InquiryData_struct), 0,
  1387. scsi3addr, TYPE_CMD);
  1388. else
  1389. rc = sendcmd(CISS_INQUIRY, ctlr, inq_buf,
  1390. sizeof(InquiryData_struct), 0,
  1391. scsi3addr, TYPE_CMD);
  1392. if (rc == IO_OK) {
  1393. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1394. vendor[VENDOR_LEN] = '\0';
  1395. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1396. model[MODEL_LEN] = '\0';
  1397. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1398. rev[REV_LEN] = '\0';
  1399. }
  1400. kfree(inq_buf);
  1401. return;
  1402. }
  1403. /* This function gets the serial number of a logical drive via
  1404. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1405. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1406. * are returned instead.
  1407. */
  1408. static void cciss_get_serial_no(int ctlr, int logvol, int withirq,
  1409. unsigned char *serial_no, int buflen)
  1410. {
  1411. #define PAGE_83_INQ_BYTES 64
  1412. int rc;
  1413. unsigned char *buf;
  1414. unsigned char scsi3addr[8];
  1415. if (buflen > 16)
  1416. buflen = 16;
  1417. memset(serial_no, 0xff, buflen);
  1418. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1419. if (!buf)
  1420. return;
  1421. memset(serial_no, 0, buflen);
  1422. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1423. if (withirq)
  1424. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, buf,
  1425. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1426. else
  1427. rc = sendcmd(CISS_INQUIRY, ctlr, buf,
  1428. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1429. if (rc == IO_OK)
  1430. memcpy(serial_no, &buf[8], buflen);
  1431. kfree(buf);
  1432. return;
  1433. }
  1434. static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1435. int drv_index)
  1436. {
  1437. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1438. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1439. disk->major = h->major;
  1440. disk->first_minor = drv_index << NWD_SHIFT;
  1441. disk->fops = &cciss_fops;
  1442. disk->private_data = &h->drv[drv_index];
  1443. disk->driverfs_dev = &h->drv[drv_index].dev;
  1444. /* Set up queue information */
  1445. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1446. /* This is a hardware imposed limit. */
  1447. blk_queue_max_hw_segments(disk->queue, MAXSGENTRIES);
  1448. /* This is a limit in the driver and could be eliminated. */
  1449. blk_queue_max_phys_segments(disk->queue, MAXSGENTRIES);
  1450. blk_queue_max_sectors(disk->queue, h->cciss_max_sectors);
  1451. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1452. disk->queue->queuedata = h;
  1453. blk_queue_logical_block_size(disk->queue,
  1454. h->drv[drv_index].block_size);
  1455. /* Make sure all queue data is written out before */
  1456. /* setting h->drv[drv_index].queue, as setting this */
  1457. /* allows the interrupt handler to start the queue */
  1458. wmb();
  1459. h->drv[drv_index].queue = disk->queue;
  1460. add_disk(disk);
  1461. }
  1462. /* This function will check the usage_count of the drive to be updated/added.
  1463. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1464. * the drive's capacity, geometry, or serial number has changed,
  1465. * then the drive information will be updated and the disk will be
  1466. * re-registered with the kernel. If these conditions don't hold,
  1467. * then it will be left alone for the next reboot. The exception to this
  1468. * is disk 0 which will always be left registered with the kernel since it
  1469. * is also the controller node. Any changes to disk 0 will show up on
  1470. * the next reboot.
  1471. */
  1472. static void cciss_update_drive_info(int ctlr, int drv_index, int first_time)
  1473. {
  1474. ctlr_info_t *h = hba[ctlr];
  1475. struct gendisk *disk;
  1476. InquiryData_struct *inq_buff = NULL;
  1477. unsigned int block_size;
  1478. sector_t total_size;
  1479. unsigned long flags = 0;
  1480. int ret = 0;
  1481. drive_info_struct *drvinfo;
  1482. int was_only_controller_node;
  1483. /* Get information about the disk and modify the driver structure */
  1484. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1485. drvinfo = kmalloc(sizeof(*drvinfo), GFP_KERNEL);
  1486. if (inq_buff == NULL || drvinfo == NULL)
  1487. goto mem_msg;
  1488. /* See if we're trying to update the "controller node"
  1489. * this will happen the when the first logical drive gets
  1490. * created by ACU.
  1491. */
  1492. was_only_controller_node = (drv_index == 0 &&
  1493. h->drv[0].raid_level == -1);
  1494. /* testing to see if 16-byte CDBs are already being used */
  1495. if (h->cciss_read == CCISS_READ_16) {
  1496. cciss_read_capacity_16(h->ctlr, drv_index, 1,
  1497. &total_size, &block_size);
  1498. } else {
  1499. cciss_read_capacity(ctlr, drv_index, 1,
  1500. &total_size, &block_size);
  1501. /* if read_capacity returns all F's this volume is >2TB */
  1502. /* in size so we switch to 16-byte CDB's for all */
  1503. /* read/write ops */
  1504. if (total_size == 0xFFFFFFFFULL) {
  1505. cciss_read_capacity_16(ctlr, drv_index, 1,
  1506. &total_size, &block_size);
  1507. h->cciss_read = CCISS_READ_16;
  1508. h->cciss_write = CCISS_WRITE_16;
  1509. } else {
  1510. h->cciss_read = CCISS_READ_10;
  1511. h->cciss_write = CCISS_WRITE_10;
  1512. }
  1513. }
  1514. cciss_geometry_inquiry(ctlr, drv_index, 1, total_size, block_size,
  1515. inq_buff, drvinfo);
  1516. drvinfo->block_size = block_size;
  1517. drvinfo->nr_blocks = total_size + 1;
  1518. cciss_get_device_descr(ctlr, drv_index, 1, drvinfo->vendor,
  1519. drvinfo->model, drvinfo->rev);
  1520. cciss_get_serial_no(ctlr, drv_index, 1, drvinfo->serial_no,
  1521. sizeof(drvinfo->serial_no));
  1522. /* Is it the same disk we already know, and nothing's changed? */
  1523. if (h->drv[drv_index].raid_level != -1 &&
  1524. ((memcmp(drvinfo->serial_no,
  1525. h->drv[drv_index].serial_no, 16) == 0) &&
  1526. drvinfo->block_size == h->drv[drv_index].block_size &&
  1527. drvinfo->nr_blocks == h->drv[drv_index].nr_blocks &&
  1528. drvinfo->heads == h->drv[drv_index].heads &&
  1529. drvinfo->sectors == h->drv[drv_index].sectors &&
  1530. drvinfo->cylinders == h->drv[drv_index].cylinders))
  1531. /* The disk is unchanged, nothing to update */
  1532. goto freeret;
  1533. /* If we get here it's not the same disk, or something's changed,
  1534. * so we need to * deregister it, and re-register it, if it's not
  1535. * in use.
  1536. * If the disk already exists then deregister it before proceeding
  1537. * (unless it's the first disk (for the controller node).
  1538. */
  1539. if (h->drv[drv_index].raid_level != -1 && drv_index != 0) {
  1540. printk(KERN_WARNING "disk %d has changed.\n", drv_index);
  1541. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1542. h->drv[drv_index].busy_configuring = 1;
  1543. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1544. /* deregister_disk sets h->drv[drv_index].queue = NULL
  1545. * which keeps the interrupt handler from starting
  1546. * the queue.
  1547. */
  1548. ret = deregister_disk(h, drv_index, 0);
  1549. h->drv[drv_index].busy_configuring = 0;
  1550. }
  1551. /* If the disk is in use return */
  1552. if (ret)
  1553. goto freeret;
  1554. /* Save the new information from cciss_geometry_inquiry
  1555. * and serial number inquiry.
  1556. */
  1557. h->drv[drv_index].block_size = drvinfo->block_size;
  1558. h->drv[drv_index].nr_blocks = drvinfo->nr_blocks;
  1559. h->drv[drv_index].heads = drvinfo->heads;
  1560. h->drv[drv_index].sectors = drvinfo->sectors;
  1561. h->drv[drv_index].cylinders = drvinfo->cylinders;
  1562. h->drv[drv_index].raid_level = drvinfo->raid_level;
  1563. memcpy(h->drv[drv_index].serial_no, drvinfo->serial_no, 16);
  1564. memcpy(h->drv[drv_index].vendor, drvinfo->vendor, VENDOR_LEN + 1);
  1565. memcpy(h->drv[drv_index].model, drvinfo->model, MODEL_LEN + 1);
  1566. memcpy(h->drv[drv_index].rev, drvinfo->rev, REV_LEN + 1);
  1567. ++h->num_luns;
  1568. disk = h->gendisk[drv_index];
  1569. set_capacity(disk, h->drv[drv_index].nr_blocks);
  1570. /* If it's not disk 0 (drv_index != 0)
  1571. * or if it was disk 0, but there was previously
  1572. * no actual corresponding configured logical drive
  1573. * (raid_leve == -1) then we want to update the
  1574. * logical drive's information.
  1575. */
  1576. if (drv_index || first_time)
  1577. cciss_add_disk(h, disk, drv_index);
  1578. freeret:
  1579. kfree(inq_buff);
  1580. kfree(drvinfo);
  1581. return;
  1582. mem_msg:
  1583. printk(KERN_ERR "cciss: out of memory\n");
  1584. goto freeret;
  1585. }
  1586. /* This function will find the first index of the controllers drive array
  1587. * that has a -1 for the raid_level and will return that index. This is
  1588. * where new drives will be added. If the index to be returned is greater
  1589. * than the highest_lun index for the controller then highest_lun is set
  1590. * to this new index. If there are no available indexes then -1 is returned.
  1591. * "controller_node" is used to know if this is a real logical drive, or just
  1592. * the controller node, which determines if this counts towards highest_lun.
  1593. */
  1594. static int cciss_find_free_drive_index(int ctlr, int controller_node)
  1595. {
  1596. int i;
  1597. for (i = 0; i < CISS_MAX_LUN; i++) {
  1598. if (hba[ctlr]->drv[i].raid_level == -1) {
  1599. if (i > hba[ctlr]->highest_lun)
  1600. if (!controller_node)
  1601. hba[ctlr]->highest_lun = i;
  1602. return i;
  1603. }
  1604. }
  1605. return -1;
  1606. }
  1607. /* cciss_add_gendisk finds a free hba[]->drv structure
  1608. * and allocates a gendisk if needed, and sets the lunid
  1609. * in the drvinfo structure. It returns the index into
  1610. * the ->drv[] array, or -1 if none are free.
  1611. * is_controller_node indicates whether highest_lun should
  1612. * count this disk, or if it's only being added to provide
  1613. * a means to talk to the controller in case no logical
  1614. * drives have yet been configured.
  1615. */
  1616. static int cciss_add_gendisk(ctlr_info_t *h, __u32 lunid, int controller_node)
  1617. {
  1618. int drv_index;
  1619. drv_index = cciss_find_free_drive_index(h->ctlr, controller_node);
  1620. if (drv_index == -1)
  1621. return -1;
  1622. /*Check if the gendisk needs to be allocated */
  1623. if (!h->gendisk[drv_index]) {
  1624. h->gendisk[drv_index] =
  1625. alloc_disk(1 << NWD_SHIFT);
  1626. if (!h->gendisk[drv_index]) {
  1627. printk(KERN_ERR "cciss%d: could not "
  1628. "allocate a new disk %d\n",
  1629. h->ctlr, drv_index);
  1630. return -1;
  1631. }
  1632. }
  1633. h->drv[drv_index].LunID = lunid;
  1634. if (cciss_create_ld_sysfs_entry(h, &h->drv[drv_index], drv_index))
  1635. goto err_free_disk;
  1636. /* Don't need to mark this busy because nobody */
  1637. /* else knows about this disk yet to contend */
  1638. /* for access to it. */
  1639. h->drv[drv_index].busy_configuring = 0;
  1640. wmb();
  1641. return drv_index;
  1642. err_free_disk:
  1643. put_disk(h->gendisk[drv_index]);
  1644. h->gendisk[drv_index] = NULL;
  1645. return -1;
  1646. }
  1647. /* This is for the special case of a controller which
  1648. * has no logical drives. In this case, we still need
  1649. * to register a disk so the controller can be accessed
  1650. * by the Array Config Utility.
  1651. */
  1652. static void cciss_add_controller_node(ctlr_info_t *h)
  1653. {
  1654. struct gendisk *disk;
  1655. int drv_index;
  1656. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1657. return;
  1658. drv_index = cciss_add_gendisk(h, 0, 1);
  1659. if (drv_index == -1) {
  1660. printk(KERN_WARNING "cciss%d: could not "
  1661. "add disk 0.\n", h->ctlr);
  1662. return;
  1663. }
  1664. h->drv[drv_index].block_size = 512;
  1665. h->drv[drv_index].nr_blocks = 0;
  1666. h->drv[drv_index].heads = 0;
  1667. h->drv[drv_index].sectors = 0;
  1668. h->drv[drv_index].cylinders = 0;
  1669. h->drv[drv_index].raid_level = -1;
  1670. memset(h->drv[drv_index].serial_no, 0, 16);
  1671. disk = h->gendisk[drv_index];
  1672. cciss_add_disk(h, disk, drv_index);
  1673. }
  1674. /* This function will add and remove logical drives from the Logical
  1675. * drive array of the controller and maintain persistency of ordering
  1676. * so that mount points are preserved until the next reboot. This allows
  1677. * for the removal of logical drives in the middle of the drive array
  1678. * without a re-ordering of those drives.
  1679. * INPUT
  1680. * h = The controller to perform the operations on
  1681. */
  1682. static int rebuild_lun_table(ctlr_info_t *h, int first_time)
  1683. {
  1684. int ctlr = h->ctlr;
  1685. int num_luns;
  1686. ReportLunData_struct *ld_buff = NULL;
  1687. int return_code;
  1688. int listlength = 0;
  1689. int i;
  1690. int drv_found;
  1691. int drv_index = 0;
  1692. __u32 lunid = 0;
  1693. unsigned long flags;
  1694. if (!capable(CAP_SYS_RAWIO))
  1695. return -EPERM;
  1696. /* Set busy_configuring flag for this operation */
  1697. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1698. if (h->busy_configuring) {
  1699. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1700. return -EBUSY;
  1701. }
  1702. h->busy_configuring = 1;
  1703. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1704. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1705. if (ld_buff == NULL)
  1706. goto mem_msg;
  1707. return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
  1708. sizeof(ReportLunData_struct),
  1709. 0, CTLR_LUNID, TYPE_CMD);
  1710. if (return_code == IO_OK)
  1711. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1712. else { /* reading number of logical volumes failed */
  1713. printk(KERN_WARNING "cciss: report logical volume"
  1714. " command failed\n");
  1715. listlength = 0;
  1716. goto freeret;
  1717. }
  1718. num_luns = listlength / 8; /* 8 bytes per entry */
  1719. if (num_luns > CISS_MAX_LUN) {
  1720. num_luns = CISS_MAX_LUN;
  1721. printk(KERN_WARNING "cciss: more luns configured"
  1722. " on controller than can be handled by"
  1723. " this driver.\n");
  1724. }
  1725. if (num_luns == 0)
  1726. cciss_add_controller_node(h);
  1727. /* Compare controller drive array to driver's drive array
  1728. * to see if any drives are missing on the controller due
  1729. * to action of Array Config Utility (user deletes drive)
  1730. * and deregister logical drives which have disappeared.
  1731. */
  1732. for (i = 0; i <= h->highest_lun; i++) {
  1733. int j;
  1734. drv_found = 0;
  1735. /* skip holes in the array from already deleted drives */
  1736. if (h->drv[i].raid_level == -1)
  1737. continue;
  1738. for (j = 0; j < num_luns; j++) {
  1739. memcpy(&lunid, &ld_buff->LUN[j][0], 4);
  1740. lunid = le32_to_cpu(lunid);
  1741. if (h->drv[i].LunID == lunid) {
  1742. drv_found = 1;
  1743. break;
  1744. }
  1745. }
  1746. if (!drv_found) {
  1747. /* Deregister it from the OS, it's gone. */
  1748. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1749. h->drv[i].busy_configuring = 1;
  1750. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1751. return_code = deregister_disk(h, i, 1);
  1752. cciss_destroy_ld_sysfs_entry(&h->drv[i]);
  1753. h->drv[i].busy_configuring = 0;
  1754. }
  1755. }
  1756. /* Compare controller drive array to driver's drive array.
  1757. * Check for updates in the drive information and any new drives
  1758. * on the controller due to ACU adding logical drives, or changing
  1759. * a logical drive's size, etc. Reregister any new/changed drives
  1760. */
  1761. for (i = 0; i < num_luns; i++) {
  1762. int j;
  1763. drv_found = 0;
  1764. memcpy(&lunid, &ld_buff->LUN[i][0], 4);
  1765. lunid = le32_to_cpu(lunid);
  1766. /* Find if the LUN is already in the drive array
  1767. * of the driver. If so then update its info
  1768. * if not in use. If it does not exist then find
  1769. * the first free index and add it.
  1770. */
  1771. for (j = 0; j <= h->highest_lun; j++) {
  1772. if (h->drv[j].raid_level != -1 &&
  1773. h->drv[j].LunID == lunid) {
  1774. drv_index = j;
  1775. drv_found = 1;
  1776. break;
  1777. }
  1778. }
  1779. /* check if the drive was found already in the array */
  1780. if (!drv_found) {
  1781. drv_index = cciss_add_gendisk(h, lunid, 0);
  1782. if (drv_index == -1)
  1783. goto freeret;
  1784. }
  1785. cciss_update_drive_info(ctlr, drv_index, first_time);
  1786. } /* end for */
  1787. freeret:
  1788. kfree(ld_buff);
  1789. h->busy_configuring = 0;
  1790. /* We return -1 here to tell the ACU that we have registered/updated
  1791. * all of the drives that we can and to keep it from calling us
  1792. * additional times.
  1793. */
  1794. return -1;
  1795. mem_msg:
  1796. printk(KERN_ERR "cciss: out of memory\n");
  1797. h->busy_configuring = 0;
  1798. goto freeret;
  1799. }
  1800. /* This function will deregister the disk and it's queue from the
  1801. * kernel. It must be called with the controller lock held and the
  1802. * drv structures busy_configuring flag set. It's parameters are:
  1803. *
  1804. * disk = This is the disk to be deregistered
  1805. * drv = This is the drive_info_struct associated with the disk to be
  1806. * deregistered. It contains information about the disk used
  1807. * by the driver.
  1808. * clear_all = This flag determines whether or not the disk information
  1809. * is going to be completely cleared out and the highest_lun
  1810. * reset. Sometimes we want to clear out information about
  1811. * the disk in preparation for re-adding it. In this case
  1812. * the highest_lun should be left unchanged and the LunID
  1813. * should not be cleared.
  1814. */
  1815. static int deregister_disk(ctlr_info_t *h, int drv_index,
  1816. int clear_all)
  1817. {
  1818. int i;
  1819. struct gendisk *disk;
  1820. drive_info_struct *drv;
  1821. if (!capable(CAP_SYS_RAWIO))
  1822. return -EPERM;
  1823. drv = &h->drv[drv_index];
  1824. disk = h->gendisk[drv_index];
  1825. /* make sure logical volume is NOT is use */
  1826. if (clear_all || (h->gendisk[0] == disk)) {
  1827. if (drv->usage_count > 1)
  1828. return -EBUSY;
  1829. } else if (drv->usage_count > 0)
  1830. return -EBUSY;
  1831. /* invalidate the devices and deregister the disk. If it is disk
  1832. * zero do not deregister it but just zero out it's values. This
  1833. * allows us to delete disk zero but keep the controller registered.
  1834. */
  1835. if (h->gendisk[0] != disk) {
  1836. struct request_queue *q = disk->queue;
  1837. if (disk->flags & GENHD_FL_UP)
  1838. del_gendisk(disk);
  1839. if (q) {
  1840. blk_cleanup_queue(q);
  1841. /* Set drv->queue to NULL so that we do not try
  1842. * to call blk_start_queue on this queue in the
  1843. * interrupt handler
  1844. */
  1845. drv->queue = NULL;
  1846. }
  1847. /* If clear_all is set then we are deleting the logical
  1848. * drive, not just refreshing its info. For drives
  1849. * other than disk 0 we will call put_disk. We do not
  1850. * do this for disk 0 as we need it to be able to
  1851. * configure the controller.
  1852. */
  1853. if (clear_all){
  1854. /* This isn't pretty, but we need to find the
  1855. * disk in our array and NULL our the pointer.
  1856. * This is so that we will call alloc_disk if
  1857. * this index is used again later.
  1858. */
  1859. for (i=0; i < CISS_MAX_LUN; i++){
  1860. if (h->gendisk[i] == disk) {
  1861. h->gendisk[i] = NULL;
  1862. break;
  1863. }
  1864. }
  1865. put_disk(disk);
  1866. }
  1867. } else {
  1868. set_capacity(disk, 0);
  1869. }
  1870. --h->num_luns;
  1871. /* zero out the disk size info */
  1872. drv->nr_blocks = 0;
  1873. drv->block_size = 0;
  1874. drv->heads = 0;
  1875. drv->sectors = 0;
  1876. drv->cylinders = 0;
  1877. drv->raid_level = -1; /* This can be used as a flag variable to
  1878. * indicate that this element of the drive
  1879. * array is free.
  1880. */
  1881. if (clear_all) {
  1882. /* check to see if it was the last disk */
  1883. if (drv == h->drv + h->highest_lun) {
  1884. /* if so, find the new hightest lun */
  1885. int i, newhighest = -1;
  1886. for (i = 0; i <= h->highest_lun; i++) {
  1887. /* if the disk has size > 0, it is available */
  1888. if (h->drv[i].heads)
  1889. newhighest = i;
  1890. }
  1891. h->highest_lun = newhighest;
  1892. }
  1893. drv->LunID = 0;
  1894. }
  1895. return 0;
  1896. }
  1897. static int fill_cmd(CommandList_struct *c, __u8 cmd, int ctlr, void *buff,
  1898. size_t size, __u8 page_code, unsigned char *scsi3addr,
  1899. int cmd_type)
  1900. {
  1901. ctlr_info_t *h = hba[ctlr];
  1902. u64bit buff_dma_handle;
  1903. int status = IO_OK;
  1904. c->cmd_type = CMD_IOCTL_PEND;
  1905. c->Header.ReplyQueue = 0;
  1906. if (buff != NULL) {
  1907. c->Header.SGList = 1;
  1908. c->Header.SGTotal = 1;
  1909. } else {
  1910. c->Header.SGList = 0;
  1911. c->Header.SGTotal = 0;
  1912. }
  1913. c->Header.Tag.lower = c->busaddr;
  1914. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  1915. c->Request.Type.Type = cmd_type;
  1916. if (cmd_type == TYPE_CMD) {
  1917. switch (cmd) {
  1918. case CISS_INQUIRY:
  1919. /* are we trying to read a vital product page */
  1920. if (page_code != 0) {
  1921. c->Request.CDB[1] = 0x01;
  1922. c->Request.CDB[2] = page_code;
  1923. }
  1924. c->Request.CDBLen = 6;
  1925. c->Request.Type.Attribute = ATTR_SIMPLE;
  1926. c->Request.Type.Direction = XFER_READ;
  1927. c->Request.Timeout = 0;
  1928. c->Request.CDB[0] = CISS_INQUIRY;
  1929. c->Request.CDB[4] = size & 0xFF;
  1930. break;
  1931. case CISS_REPORT_LOG:
  1932. case CISS_REPORT_PHYS:
  1933. /* Talking to controller so It's a physical command
  1934. mode = 00 target = 0. Nothing to write.
  1935. */
  1936. c->Request.CDBLen = 12;
  1937. c->Request.Type.Attribute = ATTR_SIMPLE;
  1938. c->Request.Type.Direction = XFER_READ;
  1939. c->Request.Timeout = 0;
  1940. c->Request.CDB[0] = cmd;
  1941. c->Request.CDB[6] = (size >> 24) & 0xFF; //MSB
  1942. c->Request.CDB[7] = (size >> 16) & 0xFF;
  1943. c->Request.CDB[8] = (size >> 8) & 0xFF;
  1944. c->Request.CDB[9] = size & 0xFF;
  1945. break;
  1946. case CCISS_READ_CAPACITY:
  1947. c->Request.CDBLen = 10;
  1948. c->Request.Type.Attribute = ATTR_SIMPLE;
  1949. c->Request.Type.Direction = XFER_READ;
  1950. c->Request.Timeout = 0;
  1951. c->Request.CDB[0] = cmd;
  1952. break;
  1953. case CCISS_READ_CAPACITY_16:
  1954. c->Request.CDBLen = 16;
  1955. c->Request.Type.Attribute = ATTR_SIMPLE;
  1956. c->Request.Type.Direction = XFER_READ;
  1957. c->Request.Timeout = 0;
  1958. c->Request.CDB[0] = cmd;
  1959. c->Request.CDB[1] = 0x10;
  1960. c->Request.CDB[10] = (size >> 24) & 0xFF;
  1961. c->Request.CDB[11] = (size >> 16) & 0xFF;
  1962. c->Request.CDB[12] = (size >> 8) & 0xFF;
  1963. c->Request.CDB[13] = size & 0xFF;
  1964. c->Request.Timeout = 0;
  1965. c->Request.CDB[0] = cmd;
  1966. break;
  1967. case CCISS_CACHE_FLUSH:
  1968. c->Request.CDBLen = 12;
  1969. c->Request.Type.Attribute = ATTR_SIMPLE;
  1970. c->Request.Type.Direction = XFER_WRITE;
  1971. c->Request.Timeout = 0;
  1972. c->Request.CDB[0] = BMIC_WRITE;
  1973. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  1974. break;
  1975. case TEST_UNIT_READY:
  1976. c->Request.CDBLen = 6;
  1977. c->Request.Type.Attribute = ATTR_SIMPLE;
  1978. c->Request.Type.Direction = XFER_NONE;
  1979. c->Request.Timeout = 0;
  1980. break;
  1981. default:
  1982. printk(KERN_WARNING
  1983. "cciss%d: Unknown Command 0x%c\n", ctlr, cmd);
  1984. return IO_ERROR;
  1985. }
  1986. } else if (cmd_type == TYPE_MSG) {
  1987. switch (cmd) {
  1988. case 0: /* ABORT message */
  1989. c->Request.CDBLen = 12;
  1990. c->Request.Type.Attribute = ATTR_SIMPLE;
  1991. c->Request.Type.Direction = XFER_WRITE;
  1992. c->Request.Timeout = 0;
  1993. c->Request.CDB[0] = cmd; /* abort */
  1994. c->Request.CDB[1] = 0; /* abort a command */
  1995. /* buff contains the tag of the command to abort */
  1996. memcpy(&c->Request.CDB[4], buff, 8);
  1997. break;
  1998. case 1: /* RESET message */
  1999. c->Request.CDBLen = 16;
  2000. c->Request.Type.Attribute = ATTR_SIMPLE;
  2001. c->Request.Type.Direction = XFER_NONE;
  2002. c->Request.Timeout = 0;
  2003. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2004. c->Request.CDB[0] = cmd; /* reset */
  2005. c->Request.CDB[1] = 0x03; /* reset a target */
  2006. break;
  2007. case 3: /* No-Op message */
  2008. c->Request.CDBLen = 1;
  2009. c->Request.Type.Attribute = ATTR_SIMPLE;
  2010. c->Request.Type.Direction = XFER_WRITE;
  2011. c->Request.Timeout = 0;
  2012. c->Request.CDB[0] = cmd;
  2013. break;
  2014. default:
  2015. printk(KERN_WARNING
  2016. "cciss%d: unknown message type %d\n", ctlr, cmd);
  2017. return IO_ERROR;
  2018. }
  2019. } else {
  2020. printk(KERN_WARNING
  2021. "cciss%d: unknown command type %d\n", ctlr, cmd_type);
  2022. return IO_ERROR;
  2023. }
  2024. /* Fill in the scatter gather information */
  2025. if (size > 0) {
  2026. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2027. buff, size,
  2028. PCI_DMA_BIDIRECTIONAL);
  2029. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2030. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2031. c->SG[0].Len = size;
  2032. c->SG[0].Ext = 0; /* we are not chaining */
  2033. }
  2034. return status;
  2035. }
  2036. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2037. {
  2038. switch (c->err_info->ScsiStatus) {
  2039. case SAM_STAT_GOOD:
  2040. return IO_OK;
  2041. case SAM_STAT_CHECK_CONDITION:
  2042. switch (0xf & c->err_info->SenseInfo[2]) {
  2043. case 0: return IO_OK; /* no sense */
  2044. case 1: return IO_OK; /* recovered error */
  2045. default:
  2046. printk(KERN_WARNING "cciss%d: cmd 0x%02x "
  2047. "check condition, sense key = 0x%02x\n",
  2048. h->ctlr, c->Request.CDB[0],
  2049. c->err_info->SenseInfo[2]);
  2050. }
  2051. break;
  2052. default:
  2053. printk(KERN_WARNING "cciss%d: cmd 0x%02x"
  2054. "scsi status = 0x%02x\n", h->ctlr,
  2055. c->Request.CDB[0], c->err_info->ScsiStatus);
  2056. break;
  2057. }
  2058. return IO_ERROR;
  2059. }
  2060. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2061. {
  2062. int return_status = IO_OK;
  2063. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2064. return IO_OK;
  2065. switch (c->err_info->CommandStatus) {
  2066. case CMD_TARGET_STATUS:
  2067. return_status = check_target_status(h, c);
  2068. break;
  2069. case CMD_DATA_UNDERRUN:
  2070. case CMD_DATA_OVERRUN:
  2071. /* expected for inquiry and report lun commands */
  2072. break;
  2073. case CMD_INVALID:
  2074. printk(KERN_WARNING "cciss: cmd 0x%02x is "
  2075. "reported invalid\n", c->Request.CDB[0]);
  2076. return_status = IO_ERROR;
  2077. break;
  2078. case CMD_PROTOCOL_ERR:
  2079. printk(KERN_WARNING "cciss: cmd 0x%02x has "
  2080. "protocol error \n", c->Request.CDB[0]);
  2081. return_status = IO_ERROR;
  2082. break;
  2083. case CMD_HARDWARE_ERR:
  2084. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2085. " hardware error\n", c->Request.CDB[0]);
  2086. return_status = IO_ERROR;
  2087. break;
  2088. case CMD_CONNECTION_LOST:
  2089. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2090. "connection lost\n", c->Request.CDB[0]);
  2091. return_status = IO_ERROR;
  2092. break;
  2093. case CMD_ABORTED:
  2094. printk(KERN_WARNING "cciss: cmd 0x%02x was "
  2095. "aborted\n", c->Request.CDB[0]);
  2096. return_status = IO_ERROR;
  2097. break;
  2098. case CMD_ABORT_FAILED:
  2099. printk(KERN_WARNING "cciss: cmd 0x%02x reports "
  2100. "abort failed\n", c->Request.CDB[0]);
  2101. return_status = IO_ERROR;
  2102. break;
  2103. case CMD_UNSOLICITED_ABORT:
  2104. printk(KERN_WARNING
  2105. "cciss%d: unsolicited abort 0x%02x\n", h->ctlr,
  2106. c->Request.CDB[0]);
  2107. return_status = IO_NEEDS_RETRY;
  2108. break;
  2109. default:
  2110. printk(KERN_WARNING "cciss: cmd 0x%02x returned "
  2111. "unknown status %x\n", c->Request.CDB[0],
  2112. c->err_info->CommandStatus);
  2113. return_status = IO_ERROR;
  2114. }
  2115. return return_status;
  2116. }
  2117. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2118. int attempt_retry)
  2119. {
  2120. DECLARE_COMPLETION_ONSTACK(wait);
  2121. u64bit buff_dma_handle;
  2122. unsigned long flags;
  2123. int return_status = IO_OK;
  2124. resend_cmd2:
  2125. c->waiting = &wait;
  2126. /* Put the request on the tail of the queue and send it */
  2127. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2128. addQ(&h->reqQ, c);
  2129. h->Qdepth++;
  2130. start_io(h);
  2131. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2132. wait_for_completion(&wait);
  2133. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2134. goto command_done;
  2135. return_status = process_sendcmd_error(h, c);
  2136. if (return_status == IO_NEEDS_RETRY &&
  2137. c->retry_count < MAX_CMD_RETRIES) {
  2138. printk(KERN_WARNING "cciss%d: retrying 0x%02x\n", h->ctlr,
  2139. c->Request.CDB[0]);
  2140. c->retry_count++;
  2141. /* erase the old error information */
  2142. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2143. return_status = IO_OK;
  2144. INIT_COMPLETION(wait);
  2145. goto resend_cmd2;
  2146. }
  2147. command_done:
  2148. /* unlock the buffers from DMA */
  2149. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2150. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2151. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2152. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2153. return return_status;
  2154. }
  2155. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  2156. __u8 page_code, unsigned char scsi3addr[],
  2157. int cmd_type)
  2158. {
  2159. ctlr_info_t *h = hba[ctlr];
  2160. CommandList_struct *c;
  2161. int return_status;
  2162. c = cmd_alloc(h, 0);
  2163. if (!c)
  2164. return -ENOMEM;
  2165. return_status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2166. scsi3addr, cmd_type);
  2167. if (return_status == IO_OK)
  2168. return_status = sendcmd_withirq_core(h, c, 1);
  2169. cmd_free(h, c, 0);
  2170. return return_status;
  2171. }
  2172. static void cciss_geometry_inquiry(int ctlr, int logvol,
  2173. int withirq, sector_t total_size,
  2174. unsigned int block_size,
  2175. InquiryData_struct *inq_buff,
  2176. drive_info_struct *drv)
  2177. {
  2178. int return_code;
  2179. unsigned long t;
  2180. unsigned char scsi3addr[8];
  2181. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2182. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2183. if (withirq)
  2184. return_code = sendcmd_withirq(CISS_INQUIRY, ctlr,
  2185. inq_buff, sizeof(*inq_buff),
  2186. 0xC1, scsi3addr, TYPE_CMD);
  2187. else
  2188. return_code = sendcmd(CISS_INQUIRY, ctlr, inq_buff,
  2189. sizeof(*inq_buff), 0xC1, scsi3addr,
  2190. TYPE_CMD);
  2191. if (return_code == IO_OK) {
  2192. if (inq_buff->data_byte[8] == 0xFF) {
  2193. printk(KERN_WARNING
  2194. "cciss: reading geometry failed, volume "
  2195. "does not support reading geometry\n");
  2196. drv->heads = 255;
  2197. drv->sectors = 32; // Sectors per track
  2198. drv->cylinders = total_size + 1;
  2199. drv->raid_level = RAID_UNKNOWN;
  2200. } else {
  2201. drv->heads = inq_buff->data_byte[6];
  2202. drv->sectors = inq_buff->data_byte[7];
  2203. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2204. drv->cylinders += inq_buff->data_byte[5];
  2205. drv->raid_level = inq_buff->data_byte[8];
  2206. }
  2207. drv->block_size = block_size;
  2208. drv->nr_blocks = total_size + 1;
  2209. t = drv->heads * drv->sectors;
  2210. if (t > 1) {
  2211. sector_t real_size = total_size + 1;
  2212. unsigned long rem = sector_div(real_size, t);
  2213. if (rem)
  2214. real_size++;
  2215. drv->cylinders = real_size;
  2216. }
  2217. } else { /* Get geometry failed */
  2218. printk(KERN_WARNING "cciss: reading geometry failed\n");
  2219. }
  2220. printk(KERN_INFO " heads=%d, sectors=%d, cylinders=%d\n\n",
  2221. drv->heads, drv->sectors, drv->cylinders);
  2222. }
  2223. static void
  2224. cciss_read_capacity(int ctlr, int logvol, int withirq, sector_t *total_size,
  2225. unsigned int *block_size)
  2226. {
  2227. ReadCapdata_struct *buf;
  2228. int return_code;
  2229. unsigned char scsi3addr[8];
  2230. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2231. if (!buf) {
  2232. printk(KERN_WARNING "cciss: out of memory\n");
  2233. return;
  2234. }
  2235. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2236. if (withirq)
  2237. return_code = sendcmd_withirq(CCISS_READ_CAPACITY,
  2238. ctlr, buf, sizeof(ReadCapdata_struct),
  2239. 0, scsi3addr, TYPE_CMD);
  2240. else
  2241. return_code = sendcmd(CCISS_READ_CAPACITY,
  2242. ctlr, buf, sizeof(ReadCapdata_struct),
  2243. 0, scsi3addr, TYPE_CMD);
  2244. if (return_code == IO_OK) {
  2245. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2246. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2247. } else { /* read capacity command failed */
  2248. printk(KERN_WARNING "cciss: read capacity failed\n");
  2249. *total_size = 0;
  2250. *block_size = BLOCK_SIZE;
  2251. }
  2252. if (*total_size != 0)
  2253. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2254. (unsigned long long)*total_size+1, *block_size);
  2255. kfree(buf);
  2256. }
  2257. static void
  2258. cciss_read_capacity_16(int ctlr, int logvol, int withirq, sector_t *total_size, unsigned int *block_size)
  2259. {
  2260. ReadCapdata_struct_16 *buf;
  2261. int return_code;
  2262. unsigned char scsi3addr[8];
  2263. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2264. if (!buf) {
  2265. printk(KERN_WARNING "cciss: out of memory\n");
  2266. return;
  2267. }
  2268. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2269. if (withirq) {
  2270. return_code = sendcmd_withirq(CCISS_READ_CAPACITY_16,
  2271. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2272. 0, scsi3addr, TYPE_CMD);
  2273. }
  2274. else {
  2275. return_code = sendcmd(CCISS_READ_CAPACITY_16,
  2276. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2277. 0, scsi3addr, TYPE_CMD);
  2278. }
  2279. if (return_code == IO_OK) {
  2280. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2281. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2282. } else { /* read capacity command failed */
  2283. printk(KERN_WARNING "cciss: read capacity failed\n");
  2284. *total_size = 0;
  2285. *block_size = BLOCK_SIZE;
  2286. }
  2287. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2288. (unsigned long long)*total_size+1, *block_size);
  2289. kfree(buf);
  2290. }
  2291. static int cciss_revalidate(struct gendisk *disk)
  2292. {
  2293. ctlr_info_t *h = get_host(disk);
  2294. drive_info_struct *drv = get_drv(disk);
  2295. int logvol;
  2296. int FOUND = 0;
  2297. unsigned int block_size;
  2298. sector_t total_size;
  2299. InquiryData_struct *inq_buff = NULL;
  2300. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2301. if (h->drv[logvol].LunID == drv->LunID) {
  2302. FOUND = 1;
  2303. break;
  2304. }
  2305. }
  2306. if (!FOUND)
  2307. return 1;
  2308. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2309. if (inq_buff == NULL) {
  2310. printk(KERN_WARNING "cciss: out of memory\n");
  2311. return 1;
  2312. }
  2313. if (h->cciss_read == CCISS_READ_10) {
  2314. cciss_read_capacity(h->ctlr, logvol, 1,
  2315. &total_size, &block_size);
  2316. } else {
  2317. cciss_read_capacity_16(h->ctlr, logvol, 1,
  2318. &total_size, &block_size);
  2319. }
  2320. cciss_geometry_inquiry(h->ctlr, logvol, 1, total_size, block_size,
  2321. inq_buff, drv);
  2322. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2323. set_capacity(disk, drv->nr_blocks);
  2324. kfree(inq_buff);
  2325. return 0;
  2326. }
  2327. /*
  2328. * Wait polling for a command to complete.
  2329. * The memory mapped FIFO is polled for the completion.
  2330. * Used only at init time, interrupts from the HBA are disabled.
  2331. */
  2332. static unsigned long pollcomplete(int ctlr)
  2333. {
  2334. unsigned long done;
  2335. int i;
  2336. /* Wait (up to 20 seconds) for a command to complete */
  2337. for (i = 20 * HZ; i > 0; i--) {
  2338. done = hba[ctlr]->access.command_completed(hba[ctlr]);
  2339. if (done == FIFO_EMPTY)
  2340. schedule_timeout_uninterruptible(1);
  2341. else
  2342. return done;
  2343. }
  2344. /* Invalid address to tell caller we ran out of time */
  2345. return 1;
  2346. }
  2347. /* Send command c to controller h and poll for it to complete.
  2348. * Turns interrupts off on the board. Used at driver init time
  2349. * and during SCSI error recovery.
  2350. */
  2351. static int sendcmd_core(ctlr_info_t *h, CommandList_struct *c)
  2352. {
  2353. int i;
  2354. unsigned long complete;
  2355. int status = IO_ERROR;
  2356. u64bit buff_dma_handle;
  2357. resend_cmd1:
  2358. /* Disable interrupt on the board. */
  2359. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  2360. /* Make sure there is room in the command FIFO */
  2361. /* Actually it should be completely empty at this time */
  2362. /* unless we are in here doing error handling for the scsi */
  2363. /* tape side of the driver. */
  2364. for (i = 200000; i > 0; i--) {
  2365. /* if fifo isn't full go */
  2366. if (!(h->access.fifo_full(h)))
  2367. break;
  2368. udelay(10);
  2369. printk(KERN_WARNING "cciss cciss%d: SendCmd FIFO full,"
  2370. " waiting!\n", h->ctlr);
  2371. }
  2372. h->access.submit_command(h, c); /* Send the cmd */
  2373. do {
  2374. complete = pollcomplete(h->ctlr);
  2375. #ifdef CCISS_DEBUG
  2376. printk(KERN_DEBUG "cciss: command completed\n");
  2377. #endif /* CCISS_DEBUG */
  2378. if (complete == 1) {
  2379. printk(KERN_WARNING
  2380. "cciss cciss%d: SendCmd Timeout out, "
  2381. "No command list address returned!\n", h->ctlr);
  2382. status = IO_ERROR;
  2383. break;
  2384. }
  2385. /* Make sure it's the command we're expecting. */
  2386. if ((complete & ~CISS_ERROR_BIT) != c->busaddr) {
  2387. printk(KERN_WARNING "cciss%d: Unexpected command "
  2388. "completion.\n", h->ctlr);
  2389. continue;
  2390. }
  2391. /* It is our command. If no error, we're done. */
  2392. if (!(complete & CISS_ERROR_BIT)) {
  2393. status = IO_OK;
  2394. break;
  2395. }
  2396. /* There is an error... */
  2397. /* if data overrun or underun on Report command ignore it */
  2398. if (((c->Request.CDB[0] == CISS_REPORT_LOG) ||
  2399. (c->Request.CDB[0] == CISS_REPORT_PHYS) ||
  2400. (c->Request.CDB[0] == CISS_INQUIRY)) &&
  2401. ((c->err_info->CommandStatus == CMD_DATA_OVERRUN) ||
  2402. (c->err_info->CommandStatus == CMD_DATA_UNDERRUN))) {
  2403. complete = c->busaddr;
  2404. status = IO_OK;
  2405. break;
  2406. }
  2407. if (c->err_info->CommandStatus == CMD_UNSOLICITED_ABORT) {
  2408. printk(KERN_WARNING "cciss%d: unsolicited abort %p\n",
  2409. h->ctlr, c);
  2410. if (c->retry_count < MAX_CMD_RETRIES) {
  2411. printk(KERN_WARNING "cciss%d: retrying %p\n",
  2412. h->ctlr, c);
  2413. c->retry_count++;
  2414. /* erase the old error information */
  2415. memset(c->err_info, 0, sizeof(c->err_info));
  2416. goto resend_cmd1;
  2417. }
  2418. printk(KERN_WARNING "cciss%d: retried %p too many "
  2419. "times\n", h->ctlr, c);
  2420. status = IO_ERROR;
  2421. break;
  2422. }
  2423. if (c->err_info->CommandStatus == CMD_UNABORTABLE) {
  2424. printk(KERN_WARNING "cciss%d: command could not be "
  2425. "aborted.\n", h->ctlr);
  2426. status = IO_ERROR;
  2427. break;
  2428. }
  2429. if (c->err_info->CommandStatus == CMD_TARGET_STATUS) {
  2430. status = check_target_status(h, c);
  2431. break;
  2432. }
  2433. printk(KERN_WARNING "cciss%d: sendcmd error\n", h->ctlr);
  2434. printk(KERN_WARNING "cmd = 0x%02x, CommandStatus = 0x%02x\n",
  2435. c->Request.CDB[0], c->err_info->CommandStatus);
  2436. status = IO_ERROR;
  2437. break;
  2438. } while (1);
  2439. /* unlock the data buffer from DMA */
  2440. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2441. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2442. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2443. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2444. return status;
  2445. }
  2446. /*
  2447. * Send a command to the controller, and wait for it to complete.
  2448. * Used at init time, and during SCSI error recovery.
  2449. */
  2450. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  2451. __u8 page_code, unsigned char *scsi3addr, int cmd_type)
  2452. {
  2453. CommandList_struct *c;
  2454. int status;
  2455. c = cmd_alloc(hba[ctlr], 1);
  2456. if (!c) {
  2457. printk(KERN_WARNING "cciss: unable to get memory");
  2458. return IO_ERROR;
  2459. }
  2460. status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2461. scsi3addr, cmd_type);
  2462. if (status == IO_OK)
  2463. status = sendcmd_core(hba[ctlr], c);
  2464. cmd_free(hba[ctlr], c, 1);
  2465. return status;
  2466. }
  2467. /*
  2468. * Map (physical) PCI mem into (virtual) kernel space
  2469. */
  2470. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2471. {
  2472. ulong page_base = ((ulong) base) & PAGE_MASK;
  2473. ulong page_offs = ((ulong) base) - page_base;
  2474. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2475. return page_remapped ? (page_remapped + page_offs) : NULL;
  2476. }
  2477. /*
  2478. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2479. * the Q to wait for completion.
  2480. */
  2481. static void start_io(ctlr_info_t *h)
  2482. {
  2483. CommandList_struct *c;
  2484. while (!hlist_empty(&h->reqQ)) {
  2485. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2486. /* can't do anything if fifo is full */
  2487. if ((h->access.fifo_full(h))) {
  2488. printk(KERN_WARNING "cciss: fifo full\n");
  2489. break;
  2490. }
  2491. /* Get the first entry from the Request Q */
  2492. removeQ(c);
  2493. h->Qdepth--;
  2494. /* Tell the controller execute command */
  2495. h->access.submit_command(h, c);
  2496. /* Put job onto the completed Q */
  2497. addQ(&h->cmpQ, c);
  2498. }
  2499. }
  2500. /* Assumes that CCISS_LOCK(h->ctlr) is held. */
  2501. /* Zeros out the error record and then resends the command back */
  2502. /* to the controller */
  2503. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2504. {
  2505. /* erase the old error information */
  2506. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2507. /* add it to software queue and then send it to the controller */
  2508. addQ(&h->reqQ, c);
  2509. h->Qdepth++;
  2510. if (h->Qdepth > h->maxQsinceinit)
  2511. h->maxQsinceinit = h->Qdepth;
  2512. start_io(h);
  2513. }
  2514. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2515. unsigned int msg_byte, unsigned int host_byte,
  2516. unsigned int driver_byte)
  2517. {
  2518. /* inverse of macros in scsi.h */
  2519. return (scsi_status_byte & 0xff) |
  2520. ((msg_byte & 0xff) << 8) |
  2521. ((host_byte & 0xff) << 16) |
  2522. ((driver_byte & 0xff) << 24);
  2523. }
  2524. static inline int evaluate_target_status(ctlr_info_t *h,
  2525. CommandList_struct *cmd, int *retry_cmd)
  2526. {
  2527. unsigned char sense_key;
  2528. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2529. int error_value;
  2530. *retry_cmd = 0;
  2531. /* If we get in here, it means we got "target status", that is, scsi status */
  2532. status_byte = cmd->err_info->ScsiStatus;
  2533. driver_byte = DRIVER_OK;
  2534. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2535. if (blk_pc_request(cmd->rq))
  2536. host_byte = DID_PASSTHROUGH;
  2537. else
  2538. host_byte = DID_OK;
  2539. error_value = make_status_bytes(status_byte, msg_byte,
  2540. host_byte, driver_byte);
  2541. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2542. if (!blk_pc_request(cmd->rq))
  2543. printk(KERN_WARNING "cciss: cmd %p "
  2544. "has SCSI Status 0x%x\n",
  2545. cmd, cmd->err_info->ScsiStatus);
  2546. return error_value;
  2547. }
  2548. /* check the sense key */
  2549. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2550. /* no status or recovered error */
  2551. if (((sense_key == 0x0) || (sense_key == 0x1)) && !blk_pc_request(cmd->rq))
  2552. error_value = 0;
  2553. if (check_for_unit_attention(h, cmd)) {
  2554. *retry_cmd = !blk_pc_request(cmd->rq);
  2555. return 0;
  2556. }
  2557. if (!blk_pc_request(cmd->rq)) { /* Not SG_IO or similar? */
  2558. if (error_value != 0)
  2559. printk(KERN_WARNING "cciss: cmd %p has CHECK CONDITION"
  2560. " sense key = 0x%x\n", cmd, sense_key);
  2561. return error_value;
  2562. }
  2563. /* SG_IO or similar, copy sense data back */
  2564. if (cmd->rq->sense) {
  2565. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2566. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2567. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2568. cmd->rq->sense_len);
  2569. } else
  2570. cmd->rq->sense_len = 0;
  2571. return error_value;
  2572. }
  2573. /* checks the status of the job and calls complete buffers to mark all
  2574. * buffers for the completed job. Note that this function does not need
  2575. * to hold the hba/queue lock.
  2576. */
  2577. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2578. int timeout)
  2579. {
  2580. int retry_cmd = 0;
  2581. struct request *rq = cmd->rq;
  2582. rq->errors = 0;
  2583. if (timeout)
  2584. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2585. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2586. goto after_error_processing;
  2587. switch (cmd->err_info->CommandStatus) {
  2588. case CMD_TARGET_STATUS:
  2589. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2590. break;
  2591. case CMD_DATA_UNDERRUN:
  2592. if (blk_fs_request(cmd->rq)) {
  2593. printk(KERN_WARNING "cciss: cmd %p has"
  2594. " completed with data underrun "
  2595. "reported\n", cmd);
  2596. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2597. }
  2598. break;
  2599. case CMD_DATA_OVERRUN:
  2600. if (blk_fs_request(cmd->rq))
  2601. printk(KERN_WARNING "cciss: cmd %p has"
  2602. " completed with data overrun "
  2603. "reported\n", cmd);
  2604. break;
  2605. case CMD_INVALID:
  2606. printk(KERN_WARNING "cciss: cmd %p is "
  2607. "reported invalid\n", cmd);
  2608. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2609. cmd->err_info->CommandStatus, DRIVER_OK,
  2610. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2611. break;
  2612. case CMD_PROTOCOL_ERR:
  2613. printk(KERN_WARNING "cciss: cmd %p has "
  2614. "protocol error \n", cmd);
  2615. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2616. cmd->err_info->CommandStatus, DRIVER_OK,
  2617. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2618. break;
  2619. case CMD_HARDWARE_ERR:
  2620. printk(KERN_WARNING "cciss: cmd %p had "
  2621. " hardware error\n", cmd);
  2622. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2623. cmd->err_info->CommandStatus, DRIVER_OK,
  2624. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2625. break;
  2626. case CMD_CONNECTION_LOST:
  2627. printk(KERN_WARNING "cciss: cmd %p had "
  2628. "connection lost\n", cmd);
  2629. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2630. cmd->err_info->CommandStatus, DRIVER_OK,
  2631. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2632. break;
  2633. case CMD_ABORTED:
  2634. printk(KERN_WARNING "cciss: cmd %p was "
  2635. "aborted\n", cmd);
  2636. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2637. cmd->err_info->CommandStatus, DRIVER_OK,
  2638. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2639. break;
  2640. case CMD_ABORT_FAILED:
  2641. printk(KERN_WARNING "cciss: cmd %p reports "
  2642. "abort failed\n", cmd);
  2643. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2644. cmd->err_info->CommandStatus, DRIVER_OK,
  2645. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2646. break;
  2647. case CMD_UNSOLICITED_ABORT:
  2648. printk(KERN_WARNING "cciss%d: unsolicited "
  2649. "abort %p\n", h->ctlr, cmd);
  2650. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2651. retry_cmd = 1;
  2652. printk(KERN_WARNING
  2653. "cciss%d: retrying %p\n", h->ctlr, cmd);
  2654. cmd->retry_count++;
  2655. } else
  2656. printk(KERN_WARNING
  2657. "cciss%d: %p retried too "
  2658. "many times\n", h->ctlr, cmd);
  2659. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2660. cmd->err_info->CommandStatus, DRIVER_OK,
  2661. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2662. break;
  2663. case CMD_TIMEOUT:
  2664. printk(KERN_WARNING "cciss: cmd %p timedout\n", cmd);
  2665. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2666. cmd->err_info->CommandStatus, DRIVER_OK,
  2667. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2668. break;
  2669. default:
  2670. printk(KERN_WARNING "cciss: cmd %p returned "
  2671. "unknown status %x\n", cmd,
  2672. cmd->err_info->CommandStatus);
  2673. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2674. cmd->err_info->CommandStatus, DRIVER_OK,
  2675. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2676. }
  2677. after_error_processing:
  2678. /* We need to return this command */
  2679. if (retry_cmd) {
  2680. resend_cciss_cmd(h, cmd);
  2681. return;
  2682. }
  2683. cmd->rq->completion_data = cmd;
  2684. blk_complete_request(cmd->rq);
  2685. }
  2686. /*
  2687. * Get a request and submit it to the controller.
  2688. */
  2689. static void do_cciss_request(struct request_queue *q)
  2690. {
  2691. ctlr_info_t *h = q->queuedata;
  2692. CommandList_struct *c;
  2693. sector_t start_blk;
  2694. int seg;
  2695. struct request *creq;
  2696. u64bit temp64;
  2697. struct scatterlist tmp_sg[MAXSGENTRIES];
  2698. drive_info_struct *drv;
  2699. int i, dir;
  2700. /* We call start_io here in case there is a command waiting on the
  2701. * queue that has not been sent.
  2702. */
  2703. if (blk_queue_plugged(q))
  2704. goto startio;
  2705. queue:
  2706. creq = blk_peek_request(q);
  2707. if (!creq)
  2708. goto startio;
  2709. BUG_ON(creq->nr_phys_segments > MAXSGENTRIES);
  2710. if ((c = cmd_alloc(h, 1)) == NULL)
  2711. goto full;
  2712. blk_start_request(creq);
  2713. spin_unlock_irq(q->queue_lock);
  2714. c->cmd_type = CMD_RWREQ;
  2715. c->rq = creq;
  2716. /* fill in the request */
  2717. drv = creq->rq_disk->private_data;
  2718. c->Header.ReplyQueue = 0; // unused in simple mode
  2719. /* got command from pool, so use the command block index instead */
  2720. /* for direct lookups. */
  2721. /* The first 2 bits are reserved for controller error reporting. */
  2722. c->Header.Tag.lower = (c->cmdindex << 3);
  2723. c->Header.Tag.lower |= 0x04; /* flag for direct lookup. */
  2724. c->Header.LUN.LogDev.VolId = drv->LunID;
  2725. c->Header.LUN.LogDev.Mode = 1;
  2726. c->Request.CDBLen = 10; // 12 byte commands not in FW yet;
  2727. c->Request.Type.Type = TYPE_CMD; // It is a command.
  2728. c->Request.Type.Attribute = ATTR_SIMPLE;
  2729. c->Request.Type.Direction =
  2730. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2731. c->Request.Timeout = 0; // Don't time out
  2732. c->Request.CDB[0] =
  2733. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2734. start_blk = blk_rq_pos(creq);
  2735. #ifdef CCISS_DEBUG
  2736. printk(KERN_DEBUG "ciss: sector =%d nr_sectors=%d\n",
  2737. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2738. #endif /* CCISS_DEBUG */
  2739. sg_init_table(tmp_sg, MAXSGENTRIES);
  2740. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2741. /* get the DMA records for the setup */
  2742. if (c->Request.Type.Direction == XFER_READ)
  2743. dir = PCI_DMA_FROMDEVICE;
  2744. else
  2745. dir = PCI_DMA_TODEVICE;
  2746. for (i = 0; i < seg; i++) {
  2747. c->SG[i].Len = tmp_sg[i].length;
  2748. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2749. tmp_sg[i].offset,
  2750. tmp_sg[i].length, dir);
  2751. c->SG[i].Addr.lower = temp64.val32.lower;
  2752. c->SG[i].Addr.upper = temp64.val32.upper;
  2753. c->SG[i].Ext = 0; // we are not chaining
  2754. }
  2755. /* track how many SG entries we are using */
  2756. if (seg > h->maxSG)
  2757. h->maxSG = seg;
  2758. #ifdef CCISS_DEBUG
  2759. printk(KERN_DEBUG "cciss: Submitting %u sectors in %d segments\n",
  2760. blk_rq_sectors(creq), seg);
  2761. #endif /* CCISS_DEBUG */
  2762. c->Header.SGList = c->Header.SGTotal = seg;
  2763. if (likely(blk_fs_request(creq))) {
  2764. if(h->cciss_read == CCISS_READ_10) {
  2765. c->Request.CDB[1] = 0;
  2766. c->Request.CDB[2] = (start_blk >> 24) & 0xff; //MSB
  2767. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2768. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2769. c->Request.CDB[5] = start_blk & 0xff;
  2770. c->Request.CDB[6] = 0; // (sect >> 24) & 0xff; MSB
  2771. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2772. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2773. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2774. } else {
  2775. u32 upper32 = upper_32_bits(start_blk);
  2776. c->Request.CDBLen = 16;
  2777. c->Request.CDB[1]= 0;
  2778. c->Request.CDB[2]= (upper32 >> 24) & 0xff; //MSB
  2779. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2780. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2781. c->Request.CDB[5]= upper32 & 0xff;
  2782. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2783. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2784. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2785. c->Request.CDB[9]= start_blk & 0xff;
  2786. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2787. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2788. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2789. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2790. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2791. }
  2792. } else if (blk_pc_request(creq)) {
  2793. c->Request.CDBLen = creq->cmd_len;
  2794. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2795. } else {
  2796. printk(KERN_WARNING "cciss%d: bad request type %d\n", h->ctlr, creq->cmd_type);
  2797. BUG();
  2798. }
  2799. spin_lock_irq(q->queue_lock);
  2800. addQ(&h->reqQ, c);
  2801. h->Qdepth++;
  2802. if (h->Qdepth > h->maxQsinceinit)
  2803. h->maxQsinceinit = h->Qdepth;
  2804. goto queue;
  2805. full:
  2806. blk_stop_queue(q);
  2807. startio:
  2808. /* We will already have the driver lock here so not need
  2809. * to lock it.
  2810. */
  2811. start_io(h);
  2812. }
  2813. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2814. {
  2815. return h->access.command_completed(h);
  2816. }
  2817. static inline int interrupt_pending(ctlr_info_t *h)
  2818. {
  2819. return h->access.intr_pending(h);
  2820. }
  2821. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2822. {
  2823. return (((h->access.intr_pending(h) == 0) ||
  2824. (h->interrupts_enabled == 0)));
  2825. }
  2826. static irqreturn_t do_cciss_intr(int irq, void *dev_id)
  2827. {
  2828. ctlr_info_t *h = dev_id;
  2829. CommandList_struct *c;
  2830. unsigned long flags;
  2831. __u32 a, a1, a2;
  2832. if (interrupt_not_for_us(h))
  2833. return IRQ_NONE;
  2834. /*
  2835. * If there are completed commands in the completion queue,
  2836. * we had better do something about it.
  2837. */
  2838. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2839. while (interrupt_pending(h)) {
  2840. while ((a = get_next_completion(h)) != FIFO_EMPTY) {
  2841. a1 = a;
  2842. if ((a & 0x04)) {
  2843. a2 = (a >> 3);
  2844. if (a2 >= h->nr_cmds) {
  2845. printk(KERN_WARNING
  2846. "cciss: controller cciss%d failed, stopping.\n",
  2847. h->ctlr);
  2848. fail_all_cmds(h->ctlr);
  2849. return IRQ_HANDLED;
  2850. }
  2851. c = h->cmd_pool + a2;
  2852. a = c->busaddr;
  2853. } else {
  2854. struct hlist_node *tmp;
  2855. a &= ~3;
  2856. c = NULL;
  2857. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2858. if (c->busaddr == a)
  2859. break;
  2860. }
  2861. }
  2862. /*
  2863. * If we've found the command, take it off the
  2864. * completion Q and free it
  2865. */
  2866. if (c && c->busaddr == a) {
  2867. removeQ(c);
  2868. if (c->cmd_type == CMD_RWREQ) {
  2869. complete_command(h, c, 0);
  2870. } else if (c->cmd_type == CMD_IOCTL_PEND) {
  2871. complete(c->waiting);
  2872. }
  2873. # ifdef CONFIG_CISS_SCSI_TAPE
  2874. else if (c->cmd_type == CMD_SCSI)
  2875. complete_scsi_command(c, 0, a1);
  2876. # endif
  2877. continue;
  2878. }
  2879. }
  2880. }
  2881. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2882. return IRQ_HANDLED;
  2883. }
  2884. static int scan_thread(void *data)
  2885. {
  2886. ctlr_info_t *h = data;
  2887. int rc;
  2888. DECLARE_COMPLETION_ONSTACK(wait);
  2889. h->rescan_wait = &wait;
  2890. for (;;) {
  2891. rc = wait_for_completion_interruptible(&wait);
  2892. if (kthread_should_stop())
  2893. break;
  2894. if (!rc)
  2895. rebuild_lun_table(h, 0);
  2896. }
  2897. return 0;
  2898. }
  2899. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  2900. {
  2901. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  2902. return 0;
  2903. switch (c->err_info->SenseInfo[12]) {
  2904. case STATE_CHANGED:
  2905. printk(KERN_WARNING "cciss%d: a state change "
  2906. "detected, command retried\n", h->ctlr);
  2907. return 1;
  2908. break;
  2909. case LUN_FAILED:
  2910. printk(KERN_WARNING "cciss%d: LUN failure "
  2911. "detected, action required\n", h->ctlr);
  2912. return 1;
  2913. break;
  2914. case REPORT_LUNS_CHANGED:
  2915. printk(KERN_WARNING "cciss%d: report LUN data "
  2916. "changed\n", h->ctlr);
  2917. if (h->rescan_wait)
  2918. complete(h->rescan_wait);
  2919. return 1;
  2920. break;
  2921. case POWER_OR_RESET:
  2922. printk(KERN_WARNING "cciss%d: a power on "
  2923. "or device reset detected\n", h->ctlr);
  2924. return 1;
  2925. break;
  2926. case UNIT_ATTENTION_CLEARED:
  2927. printk(KERN_WARNING "cciss%d: unit attention "
  2928. "cleared by another initiator\n", h->ctlr);
  2929. return 1;
  2930. break;
  2931. default:
  2932. printk(KERN_WARNING "cciss%d: unknown "
  2933. "unit attention detected\n", h->ctlr);
  2934. return 1;
  2935. }
  2936. }
  2937. /*
  2938. * We cannot read the structure directly, for portability we must use
  2939. * the io functions.
  2940. * This is for debug only.
  2941. */
  2942. #ifdef CCISS_DEBUG
  2943. static void print_cfg_table(CfgTable_struct *tb)
  2944. {
  2945. int i;
  2946. char temp_name[17];
  2947. printk("Controller Configuration information\n");
  2948. printk("------------------------------------\n");
  2949. for (i = 0; i < 4; i++)
  2950. temp_name[i] = readb(&(tb->Signature[i]));
  2951. temp_name[4] = '\0';
  2952. printk(" Signature = %s\n", temp_name);
  2953. printk(" Spec Number = %d\n", readl(&(tb->SpecValence)));
  2954. printk(" Transport methods supported = 0x%x\n",
  2955. readl(&(tb->TransportSupport)));
  2956. printk(" Transport methods active = 0x%x\n",
  2957. readl(&(tb->TransportActive)));
  2958. printk(" Requested transport Method = 0x%x\n",
  2959. readl(&(tb->HostWrite.TransportRequest)));
  2960. printk(" Coalesce Interrupt Delay = 0x%x\n",
  2961. readl(&(tb->HostWrite.CoalIntDelay)));
  2962. printk(" Coalesce Interrupt Count = 0x%x\n",
  2963. readl(&(tb->HostWrite.CoalIntCount)));
  2964. printk(" Max outstanding commands = 0x%d\n",
  2965. readl(&(tb->CmdsOutMax)));
  2966. printk(" Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2967. for (i = 0; i < 16; i++)
  2968. temp_name[i] = readb(&(tb->ServerName[i]));
  2969. temp_name[16] = '\0';
  2970. printk(" Server Name = %s\n", temp_name);
  2971. printk(" Heartbeat Counter = 0x%x\n\n\n", readl(&(tb->HeartBeat)));
  2972. }
  2973. #endif /* CCISS_DEBUG */
  2974. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2975. {
  2976. int i, offset, mem_type, bar_type;
  2977. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2978. return 0;
  2979. offset = 0;
  2980. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2981. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2982. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2983. offset += 4;
  2984. else {
  2985. mem_type = pci_resource_flags(pdev, i) &
  2986. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2987. switch (mem_type) {
  2988. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2989. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2990. offset += 4; /* 32 bit */
  2991. break;
  2992. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2993. offset += 8;
  2994. break;
  2995. default: /* reserved in PCI 2.2 */
  2996. printk(KERN_WARNING
  2997. "Base address is invalid\n");
  2998. return -1;
  2999. break;
  3000. }
  3001. }
  3002. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3003. return i + 1;
  3004. }
  3005. return -1;
  3006. }
  3007. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3008. * controllers that are capable. If not, we use IO-APIC mode.
  3009. */
  3010. static void __devinit cciss_interrupt_mode(ctlr_info_t *c,
  3011. struct pci_dev *pdev, __u32 board_id)
  3012. {
  3013. #ifdef CONFIG_PCI_MSI
  3014. int err;
  3015. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3016. {0, 2}, {0, 3}
  3017. };
  3018. /* Some boards advertise MSI but don't really support it */
  3019. if ((board_id == 0x40700E11) ||
  3020. (board_id == 0x40800E11) ||
  3021. (board_id == 0x40820E11) || (board_id == 0x40830E11))
  3022. goto default_int_mode;
  3023. if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
  3024. err = pci_enable_msix(pdev, cciss_msix_entries, 4);
  3025. if (!err) {
  3026. c->intr[0] = cciss_msix_entries[0].vector;
  3027. c->intr[1] = cciss_msix_entries[1].vector;
  3028. c->intr[2] = cciss_msix_entries[2].vector;
  3029. c->intr[3] = cciss_msix_entries[3].vector;
  3030. c->msix_vector = 1;
  3031. return;
  3032. }
  3033. if (err > 0) {
  3034. printk(KERN_WARNING "cciss: only %d MSI-X vectors "
  3035. "available\n", err);
  3036. goto default_int_mode;
  3037. } else {
  3038. printk(KERN_WARNING "cciss: MSI-X init failed %d\n",
  3039. err);
  3040. goto default_int_mode;
  3041. }
  3042. }
  3043. if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
  3044. if (!pci_enable_msi(pdev)) {
  3045. c->msi_vector = 1;
  3046. } else {
  3047. printk(KERN_WARNING "cciss: MSI init failed\n");
  3048. }
  3049. }
  3050. default_int_mode:
  3051. #endif /* CONFIG_PCI_MSI */
  3052. /* if we get here we're going to use the default interrupt mode */
  3053. c->intr[SIMPLE_MODE_INT] = pdev->irq;
  3054. return;
  3055. }
  3056. static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
  3057. {
  3058. ushort subsystem_vendor_id, subsystem_device_id, command;
  3059. __u32 board_id, scratchpad = 0;
  3060. __u64 cfg_offset;
  3061. __u32 cfg_base_addr;
  3062. __u64 cfg_base_addr_index;
  3063. int i, err;
  3064. /* check to see if controller has been disabled */
  3065. /* BEFORE trying to enable it */
  3066. (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
  3067. if (!(command & 0x02)) {
  3068. printk(KERN_WARNING
  3069. "cciss: controller appears to be disabled\n");
  3070. return -ENODEV;
  3071. }
  3072. err = pci_enable_device(pdev);
  3073. if (err) {
  3074. printk(KERN_ERR "cciss: Unable to Enable PCI device\n");
  3075. return err;
  3076. }
  3077. err = pci_request_regions(pdev, "cciss");
  3078. if (err) {
  3079. printk(KERN_ERR "cciss: Cannot obtain PCI resources, "
  3080. "aborting\n");
  3081. return err;
  3082. }
  3083. subsystem_vendor_id = pdev->subsystem_vendor;
  3084. subsystem_device_id = pdev->subsystem_device;
  3085. board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
  3086. subsystem_vendor_id);
  3087. #ifdef CCISS_DEBUG
  3088. printk("command = %x\n", command);
  3089. printk("irq = %x\n", pdev->irq);
  3090. printk("board_id = %x\n", board_id);
  3091. #endif /* CCISS_DEBUG */
  3092. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3093. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3094. */
  3095. cciss_interrupt_mode(c, pdev, board_id);
  3096. /* find the memory BAR */
  3097. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3098. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
  3099. break;
  3100. }
  3101. if (i == DEVICE_COUNT_RESOURCE) {
  3102. printk(KERN_WARNING "cciss: No memory BAR found\n");
  3103. err = -ENODEV;
  3104. goto err_out_free_res;
  3105. }
  3106. c->paddr = pci_resource_start(pdev, i); /* addressing mode bits
  3107. * already removed
  3108. */
  3109. #ifdef CCISS_DEBUG
  3110. printk("address 0 = %lx\n", c->paddr);
  3111. #endif /* CCISS_DEBUG */
  3112. c->vaddr = remap_pci_mem(c->paddr, 0x250);
  3113. /* Wait for the board to become ready. (PCI hotplug needs this.)
  3114. * We poll for up to 120 secs, once per 100ms. */
  3115. for (i = 0; i < 1200; i++) {
  3116. scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
  3117. if (scratchpad == CCISS_FIRMWARE_READY)
  3118. break;
  3119. set_current_state(TASK_INTERRUPTIBLE);
  3120. schedule_timeout(HZ / 10); /* wait 100ms */
  3121. }
  3122. if (scratchpad != CCISS_FIRMWARE_READY) {
  3123. printk(KERN_WARNING "cciss: Board not ready. Timed out.\n");
  3124. err = -ENODEV;
  3125. goto err_out_free_res;
  3126. }
  3127. /* get the address index number */
  3128. cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
  3129. cfg_base_addr &= (__u32) 0x0000ffff;
  3130. #ifdef CCISS_DEBUG
  3131. printk("cfg base address = %x\n", cfg_base_addr);
  3132. #endif /* CCISS_DEBUG */
  3133. cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
  3134. #ifdef CCISS_DEBUG
  3135. printk("cfg base address index = %llx\n",
  3136. (unsigned long long)cfg_base_addr_index);
  3137. #endif /* CCISS_DEBUG */
  3138. if (cfg_base_addr_index == -1) {
  3139. printk(KERN_WARNING "cciss: Cannot find cfg_base_addr_index\n");
  3140. err = -ENODEV;
  3141. goto err_out_free_res;
  3142. }
  3143. cfg_offset = readl(c->vaddr + SA5_CTMEM_OFFSET);
  3144. #ifdef CCISS_DEBUG
  3145. printk("cfg offset = %llx\n", (unsigned long long)cfg_offset);
  3146. #endif /* CCISS_DEBUG */
  3147. c->cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3148. cfg_base_addr_index) +
  3149. cfg_offset, sizeof(CfgTable_struct));
  3150. c->board_id = board_id;
  3151. #ifdef CCISS_DEBUG
  3152. print_cfg_table(c->cfgtable);
  3153. #endif /* CCISS_DEBUG */
  3154. /* Some controllers support Zero Memory Raid (ZMR).
  3155. * When configured in ZMR mode the number of supported
  3156. * commands drops to 64. So instead of just setting an
  3157. * arbitrary value we make the driver a little smarter.
  3158. * We read the config table to tell us how many commands
  3159. * are supported on the controller then subtract 4 to
  3160. * leave a little room for ioctl calls.
  3161. */
  3162. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3163. for (i = 0; i < ARRAY_SIZE(products); i++) {
  3164. if (board_id == products[i].board_id) {
  3165. c->product_name = products[i].product_name;
  3166. c->access = *(products[i].access);
  3167. c->nr_cmds = c->max_commands - 4;
  3168. break;
  3169. }
  3170. }
  3171. if ((readb(&c->cfgtable->Signature[0]) != 'C') ||
  3172. (readb(&c->cfgtable->Signature[1]) != 'I') ||
  3173. (readb(&c->cfgtable->Signature[2]) != 'S') ||
  3174. (readb(&c->cfgtable->Signature[3]) != 'S')) {
  3175. printk("Does not appear to be a valid CISS config table\n");
  3176. err = -ENODEV;
  3177. goto err_out_free_res;
  3178. }
  3179. /* We didn't find the controller in our list. We know the
  3180. * signature is valid. If it's an HP device let's try to
  3181. * bind to the device and fire it up. Otherwise we bail.
  3182. */
  3183. if (i == ARRAY_SIZE(products)) {
  3184. if (subsystem_vendor_id == PCI_VENDOR_ID_HP) {
  3185. c->product_name = products[i-1].product_name;
  3186. c->access = *(products[i-1].access);
  3187. c->nr_cmds = c->max_commands - 4;
  3188. printk(KERN_WARNING "cciss: This is an unknown "
  3189. "Smart Array controller.\n"
  3190. "cciss: Please update to the latest driver "
  3191. "available from www.hp.com.\n");
  3192. } else {
  3193. printk(KERN_WARNING "cciss: Sorry, I don't know how"
  3194. " to access the Smart Array controller %08lx\n"
  3195. , (unsigned long)board_id);
  3196. err = -ENODEV;
  3197. goto err_out_free_res;
  3198. }
  3199. }
  3200. #ifdef CONFIG_X86
  3201. {
  3202. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3203. __u32 prefetch;
  3204. prefetch = readl(&(c->cfgtable->SCSI_Prefetch));
  3205. prefetch |= 0x100;
  3206. writel(prefetch, &(c->cfgtable->SCSI_Prefetch));
  3207. }
  3208. #endif
  3209. /* Disabling DMA prefetch and refetch for the P600.
  3210. * An ASIC bug may result in accesses to invalid memory addresses.
  3211. * We've disabled prefetch for some time now. Testing with XEN
  3212. * kernels revealed a bug in the refetch if dom0 resides on a P600.
  3213. */
  3214. if(board_id == 0x3225103C) {
  3215. __u32 dma_prefetch;
  3216. __u32 dma_refetch;
  3217. dma_prefetch = readl(c->vaddr + I2O_DMA1_CFG);
  3218. dma_prefetch |= 0x8000;
  3219. writel(dma_prefetch, c->vaddr + I2O_DMA1_CFG);
  3220. pci_read_config_dword(pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3221. dma_refetch |= 0x1;
  3222. pci_write_config_dword(pdev, PCI_COMMAND_PARITY, dma_refetch);
  3223. }
  3224. #ifdef CCISS_DEBUG
  3225. printk("Trying to put board into Simple mode\n");
  3226. #endif /* CCISS_DEBUG */
  3227. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3228. /* Update the field, and then ring the doorbell */
  3229. writel(CFGTBL_Trans_Simple, &(c->cfgtable->HostWrite.TransportRequest));
  3230. writel(CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
  3231. /* under certain very rare conditions, this can take awhile.
  3232. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3233. * as we enter this code.) */
  3234. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3235. if (!(readl(c->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3236. break;
  3237. /* delay and try again */
  3238. set_current_state(TASK_INTERRUPTIBLE);
  3239. schedule_timeout(10);
  3240. }
  3241. #ifdef CCISS_DEBUG
  3242. printk(KERN_DEBUG "I counter got to %d %x\n", i,
  3243. readl(c->vaddr + SA5_DOORBELL));
  3244. #endif /* CCISS_DEBUG */
  3245. #ifdef CCISS_DEBUG
  3246. print_cfg_table(c->cfgtable);
  3247. #endif /* CCISS_DEBUG */
  3248. if (!(readl(&(c->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3249. printk(KERN_WARNING "cciss: unable to get board into"
  3250. " simple mode\n");
  3251. err = -ENODEV;
  3252. goto err_out_free_res;
  3253. }
  3254. return 0;
  3255. err_out_free_res:
  3256. /*
  3257. * Deliberately omit pci_disable_device(): it does something nasty to
  3258. * Smart Array controllers that pci_enable_device does not undo
  3259. */
  3260. pci_release_regions(pdev);
  3261. return err;
  3262. }
  3263. /* Function to find the first free pointer into our hba[] array
  3264. * Returns -1 if no free entries are left.
  3265. */
  3266. static int alloc_cciss_hba(void)
  3267. {
  3268. int i;
  3269. for (i = 0; i < MAX_CTLR; i++) {
  3270. if (!hba[i]) {
  3271. ctlr_info_t *p;
  3272. p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3273. if (!p)
  3274. goto Enomem;
  3275. hba[i] = p;
  3276. return i;
  3277. }
  3278. }
  3279. printk(KERN_WARNING "cciss: This driver supports a maximum"
  3280. " of %d controllers.\n", MAX_CTLR);
  3281. return -1;
  3282. Enomem:
  3283. printk(KERN_ERR "cciss: out of memory.\n");
  3284. return -1;
  3285. }
  3286. static void free_hba(int i)
  3287. {
  3288. ctlr_info_t *p = hba[i];
  3289. int n;
  3290. hba[i] = NULL;
  3291. for (n = 0; n < CISS_MAX_LUN; n++)
  3292. put_disk(p->gendisk[n]);
  3293. kfree(p);
  3294. }
  3295. /* Send a message CDB to the firmware. */
  3296. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3297. {
  3298. typedef struct {
  3299. CommandListHeader_struct CommandHeader;
  3300. RequestBlock_struct Request;
  3301. ErrDescriptor_struct ErrorDescriptor;
  3302. } Command;
  3303. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3304. Command *cmd;
  3305. dma_addr_t paddr64;
  3306. uint32_t paddr32, tag;
  3307. void __iomem *vaddr;
  3308. int i, err;
  3309. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3310. if (vaddr == NULL)
  3311. return -ENOMEM;
  3312. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3313. CCISS commands, so they must be allocated from the lower 4GiB of
  3314. memory. */
  3315. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3316. if (err) {
  3317. iounmap(vaddr);
  3318. return -ENOMEM;
  3319. }
  3320. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3321. if (cmd == NULL) {
  3322. iounmap(vaddr);
  3323. return -ENOMEM;
  3324. }
  3325. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3326. although there's no guarantee, we assume that the address is at
  3327. least 4-byte aligned (most likely, it's page-aligned). */
  3328. paddr32 = paddr64;
  3329. cmd->CommandHeader.ReplyQueue = 0;
  3330. cmd->CommandHeader.SGList = 0;
  3331. cmd->CommandHeader.SGTotal = 0;
  3332. cmd->CommandHeader.Tag.lower = paddr32;
  3333. cmd->CommandHeader.Tag.upper = 0;
  3334. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3335. cmd->Request.CDBLen = 16;
  3336. cmd->Request.Type.Type = TYPE_MSG;
  3337. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3338. cmd->Request.Type.Direction = XFER_NONE;
  3339. cmd->Request.Timeout = 0; /* Don't time out */
  3340. cmd->Request.CDB[0] = opcode;
  3341. cmd->Request.CDB[1] = type;
  3342. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3343. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3344. cmd->ErrorDescriptor.Addr.upper = 0;
  3345. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3346. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3347. for (i = 0; i < 10; i++) {
  3348. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3349. if ((tag & ~3) == paddr32)
  3350. break;
  3351. schedule_timeout_uninterruptible(HZ);
  3352. }
  3353. iounmap(vaddr);
  3354. /* we leak the DMA buffer here ... no choice since the controller could
  3355. still complete the command. */
  3356. if (i == 10) {
  3357. printk(KERN_ERR "cciss: controller message %02x:%02x timed out\n",
  3358. opcode, type);
  3359. return -ETIMEDOUT;
  3360. }
  3361. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3362. if (tag & 2) {
  3363. printk(KERN_ERR "cciss: controller message %02x:%02x failed\n",
  3364. opcode, type);
  3365. return -EIO;
  3366. }
  3367. printk(KERN_INFO "cciss: controller message %02x:%02x succeeded\n",
  3368. opcode, type);
  3369. return 0;
  3370. }
  3371. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3372. #define cciss_noop(p) cciss_message(p, 3, 0)
  3373. static __devinit int cciss_reset_msi(struct pci_dev *pdev)
  3374. {
  3375. /* the #defines are stolen from drivers/pci/msi.h. */
  3376. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  3377. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  3378. int pos;
  3379. u16 control = 0;
  3380. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  3381. if (pos) {
  3382. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3383. if (control & PCI_MSI_FLAGS_ENABLE) {
  3384. printk(KERN_INFO "cciss: resetting MSI\n");
  3385. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
  3386. }
  3387. }
  3388. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  3389. if (pos) {
  3390. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3391. if (control & PCI_MSIX_FLAGS_ENABLE) {
  3392. printk(KERN_INFO "cciss: resetting MSI-X\n");
  3393. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
  3394. }
  3395. }
  3396. return 0;
  3397. }
  3398. /* This does a hard reset of the controller using PCI power management
  3399. * states. */
  3400. static __devinit int cciss_hard_reset_controller(struct pci_dev *pdev)
  3401. {
  3402. u16 pmcsr, saved_config_space[32];
  3403. int i, pos;
  3404. printk(KERN_INFO "cciss: using PCI PM to reset controller\n");
  3405. /* This is very nearly the same thing as
  3406. pci_save_state(pci_dev);
  3407. pci_set_power_state(pci_dev, PCI_D3hot);
  3408. pci_set_power_state(pci_dev, PCI_D0);
  3409. pci_restore_state(pci_dev);
  3410. but we can't use these nice canned kernel routines on
  3411. kexec, because they also check the MSI/MSI-X state in PCI
  3412. configuration space and do the wrong thing when it is
  3413. set/cleared. Also, the pci_save/restore_state functions
  3414. violate the ordering requirements for restoring the
  3415. configuration space from the CCISS document (see the
  3416. comment below). So we roll our own .... */
  3417. for (i = 0; i < 32; i++)
  3418. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  3419. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3420. if (pos == 0) {
  3421. printk(KERN_ERR "cciss_reset_controller: PCI PM not supported\n");
  3422. return -ENODEV;
  3423. }
  3424. /* Quoting from the Open CISS Specification: "The Power
  3425. * Management Control/Status Register (CSR) controls the power
  3426. * state of the device. The normal operating state is D0,
  3427. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3428. * the controller, place the interface device in D3 then to
  3429. * D0, this causes a secondary PCI reset which will reset the
  3430. * controller." */
  3431. /* enter the D3hot power management state */
  3432. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3433. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3434. pmcsr |= PCI_D3hot;
  3435. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3436. schedule_timeout_uninterruptible(HZ >> 1);
  3437. /* enter the D0 power management state */
  3438. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3439. pmcsr |= PCI_D0;
  3440. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3441. schedule_timeout_uninterruptible(HZ >> 1);
  3442. /* Restore the PCI configuration space. The Open CISS
  3443. * Specification says, "Restore the PCI Configuration
  3444. * Registers, offsets 00h through 60h. It is important to
  3445. * restore the command register, 16-bits at offset 04h,
  3446. * last. Do not restore the configuration status register,
  3447. * 16-bits at offset 06h." Note that the offset is 2*i. */
  3448. for (i = 0; i < 32; i++) {
  3449. if (i == 2 || i == 3)
  3450. continue;
  3451. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  3452. }
  3453. wmb();
  3454. pci_write_config_word(pdev, 4, saved_config_space[2]);
  3455. return 0;
  3456. }
  3457. /*
  3458. * This is it. Find all the controllers and register them. I really hate
  3459. * stealing all these major device numbers.
  3460. * returns the number of block devices registered.
  3461. */
  3462. static int __devinit cciss_init_one(struct pci_dev *pdev,
  3463. const struct pci_device_id *ent)
  3464. {
  3465. int i;
  3466. int j = 0;
  3467. int rc;
  3468. int dac, return_code;
  3469. InquiryData_struct *inq_buff;
  3470. if (reset_devices) {
  3471. /* Reset the controller with a PCI power-cycle */
  3472. if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
  3473. return -ENODEV;
  3474. /* Now try to get the controller to respond to a no-op. Some
  3475. devices (notably the HP Smart Array 5i Controller) need
  3476. up to 30 seconds to respond. */
  3477. for (i=0; i<30; i++) {
  3478. if (cciss_noop(pdev) == 0)
  3479. break;
  3480. schedule_timeout_uninterruptible(HZ);
  3481. }
  3482. if (i == 30) {
  3483. printk(KERN_ERR "cciss: controller seems dead\n");
  3484. return -EBUSY;
  3485. }
  3486. }
  3487. i = alloc_cciss_hba();
  3488. if (i < 0)
  3489. return -1;
  3490. hba[i]->busy_initializing = 1;
  3491. INIT_HLIST_HEAD(&hba[i]->cmpQ);
  3492. INIT_HLIST_HEAD(&hba[i]->reqQ);
  3493. if (cciss_pci_init(hba[i], pdev) != 0)
  3494. goto clean0;
  3495. sprintf(hba[i]->devname, "cciss%d", i);
  3496. hba[i]->ctlr = i;
  3497. hba[i]->pdev = pdev;
  3498. if (cciss_create_hba_sysfs_entry(hba[i]))
  3499. goto clean0;
  3500. /* configure PCI DMA stuff */
  3501. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  3502. dac = 1;
  3503. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  3504. dac = 0;
  3505. else {
  3506. printk(KERN_ERR "cciss: no suitable DMA available\n");
  3507. goto clean1;
  3508. }
  3509. /*
  3510. * register with the major number, or get a dynamic major number
  3511. * by passing 0 as argument. This is done for greater than
  3512. * 8 controller support.
  3513. */
  3514. if (i < MAX_CTLR_ORIG)
  3515. hba[i]->major = COMPAQ_CISS_MAJOR + i;
  3516. rc = register_blkdev(hba[i]->major, hba[i]->devname);
  3517. if (rc == -EBUSY || rc == -EINVAL) {
  3518. printk(KERN_ERR
  3519. "cciss: Unable to get major number %d for %s "
  3520. "on hba %d\n", hba[i]->major, hba[i]->devname, i);
  3521. goto clean1;
  3522. } else {
  3523. if (i >= MAX_CTLR_ORIG)
  3524. hba[i]->major = rc;
  3525. }
  3526. /* make sure the board interrupts are off */
  3527. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
  3528. if (request_irq(hba[i]->intr[SIMPLE_MODE_INT], do_cciss_intr,
  3529. IRQF_DISABLED | IRQF_SHARED, hba[i]->devname, hba[i])) {
  3530. printk(KERN_ERR "cciss: Unable to get irq %d for %s\n",
  3531. hba[i]->intr[SIMPLE_MODE_INT], hba[i]->devname);
  3532. goto clean2;
  3533. }
  3534. printk(KERN_INFO "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  3535. hba[i]->devname, pdev->device, pci_name(pdev),
  3536. hba[i]->intr[SIMPLE_MODE_INT], dac ? "" : " not");
  3537. hba[i]->cmd_pool_bits =
  3538. kmalloc(DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3539. * sizeof(unsigned long), GFP_KERNEL);
  3540. hba[i]->cmd_pool = (CommandList_struct *)
  3541. pci_alloc_consistent(hba[i]->pdev,
  3542. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3543. &(hba[i]->cmd_pool_dhandle));
  3544. hba[i]->errinfo_pool = (ErrorInfo_struct *)
  3545. pci_alloc_consistent(hba[i]->pdev,
  3546. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3547. &(hba[i]->errinfo_pool_dhandle));
  3548. if ((hba[i]->cmd_pool_bits == NULL)
  3549. || (hba[i]->cmd_pool == NULL)
  3550. || (hba[i]->errinfo_pool == NULL)) {
  3551. printk(KERN_ERR "cciss: out of memory");
  3552. goto clean4;
  3553. }
  3554. spin_lock_init(&hba[i]->lock);
  3555. /* Initialize the pdev driver private data.
  3556. have it point to hba[i]. */
  3557. pci_set_drvdata(pdev, hba[i]);
  3558. /* command and error info recs zeroed out before
  3559. they are used */
  3560. memset(hba[i]->cmd_pool_bits, 0,
  3561. DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3562. * sizeof(unsigned long));
  3563. hba[i]->num_luns = 0;
  3564. hba[i]->highest_lun = -1;
  3565. for (j = 0; j < CISS_MAX_LUN; j++) {
  3566. hba[i]->drv[j].raid_level = -1;
  3567. hba[i]->drv[j].queue = NULL;
  3568. hba[i]->gendisk[j] = NULL;
  3569. }
  3570. cciss_scsi_setup(i);
  3571. /* Turn the interrupts on so we can service requests */
  3572. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
  3573. /* Get the firmware version */
  3574. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  3575. if (inq_buff == NULL) {
  3576. printk(KERN_ERR "cciss: out of memory\n");
  3577. goto clean4;
  3578. }
  3579. return_code = sendcmd_withirq(CISS_INQUIRY, i, inq_buff,
  3580. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  3581. if (return_code == IO_OK) {
  3582. hba[i]->firm_ver[0] = inq_buff->data_byte[32];
  3583. hba[i]->firm_ver[1] = inq_buff->data_byte[33];
  3584. hba[i]->firm_ver[2] = inq_buff->data_byte[34];
  3585. hba[i]->firm_ver[3] = inq_buff->data_byte[35];
  3586. } else { /* send command failed */
  3587. printk(KERN_WARNING "cciss: unable to determine firmware"
  3588. " version of controller\n");
  3589. }
  3590. kfree(inq_buff);
  3591. cciss_procinit(i);
  3592. hba[i]->cciss_max_sectors = 2048;
  3593. hba[i]->busy_initializing = 0;
  3594. rebuild_lun_table(hba[i], 1);
  3595. hba[i]->cciss_scan_thread = kthread_run(scan_thread, hba[i],
  3596. "cciss_scan%02d", i);
  3597. if (IS_ERR(hba[i]->cciss_scan_thread))
  3598. return PTR_ERR(hba[i]->cciss_scan_thread);
  3599. return 1;
  3600. clean4:
  3601. kfree(hba[i]->cmd_pool_bits);
  3602. if (hba[i]->cmd_pool)
  3603. pci_free_consistent(hba[i]->pdev,
  3604. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3605. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3606. if (hba[i]->errinfo_pool)
  3607. pci_free_consistent(hba[i]->pdev,
  3608. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3609. hba[i]->errinfo_pool,
  3610. hba[i]->errinfo_pool_dhandle);
  3611. free_irq(hba[i]->intr[SIMPLE_MODE_INT], hba[i]);
  3612. clean2:
  3613. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3614. clean1:
  3615. cciss_destroy_hba_sysfs_entry(hba[i]);
  3616. clean0:
  3617. hba[i]->busy_initializing = 0;
  3618. /* cleanup any queues that may have been initialized */
  3619. for (j=0; j <= hba[i]->highest_lun; j++){
  3620. drive_info_struct *drv = &(hba[i]->drv[j]);
  3621. if (drv->queue)
  3622. blk_cleanup_queue(drv->queue);
  3623. }
  3624. /*
  3625. * Deliberately omit pci_disable_device(): it does something nasty to
  3626. * Smart Array controllers that pci_enable_device does not undo
  3627. */
  3628. pci_release_regions(pdev);
  3629. pci_set_drvdata(pdev, NULL);
  3630. free_hba(i);
  3631. return -1;
  3632. }
  3633. static void cciss_shutdown(struct pci_dev *pdev)
  3634. {
  3635. ctlr_info_t *tmp_ptr;
  3636. int i;
  3637. char flush_buf[4];
  3638. int return_code;
  3639. tmp_ptr = pci_get_drvdata(pdev);
  3640. if (tmp_ptr == NULL)
  3641. return;
  3642. i = tmp_ptr->ctlr;
  3643. if (hba[i] == NULL)
  3644. return;
  3645. /* Turn board interrupts off and send the flush cache command */
  3646. /* sendcmd will turn off interrupt, and send the flush...
  3647. * To write all data in the battery backed cache to disks */
  3648. memset(flush_buf, 0, 4);
  3649. return_code = sendcmd(CCISS_CACHE_FLUSH, i, flush_buf, 4, 0,
  3650. CTLR_LUNID, TYPE_CMD);
  3651. if (return_code == IO_OK) {
  3652. printk(KERN_INFO "Completed flushing cache on controller %d\n", i);
  3653. } else {
  3654. printk(KERN_WARNING "Error flushing cache on controller %d\n", i);
  3655. }
  3656. free_irq(hba[i]->intr[2], hba[i]);
  3657. }
  3658. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  3659. {
  3660. ctlr_info_t *tmp_ptr;
  3661. int i, j;
  3662. if (pci_get_drvdata(pdev) == NULL) {
  3663. printk(KERN_ERR "cciss: Unable to remove device \n");
  3664. return;
  3665. }
  3666. tmp_ptr = pci_get_drvdata(pdev);
  3667. i = tmp_ptr->ctlr;
  3668. if (hba[i] == NULL) {
  3669. printk(KERN_ERR "cciss: device appears to "
  3670. "already be removed \n");
  3671. return;
  3672. }
  3673. kthread_stop(hba[i]->cciss_scan_thread);
  3674. remove_proc_entry(hba[i]->devname, proc_cciss);
  3675. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3676. /* remove it from the disk list */
  3677. for (j = 0; j < CISS_MAX_LUN; j++) {
  3678. struct gendisk *disk = hba[i]->gendisk[j];
  3679. if (disk) {
  3680. struct request_queue *q = disk->queue;
  3681. if (disk->flags & GENHD_FL_UP)
  3682. del_gendisk(disk);
  3683. if (q)
  3684. blk_cleanup_queue(q);
  3685. }
  3686. }
  3687. #ifdef CONFIG_CISS_SCSI_TAPE
  3688. cciss_unregister_scsi(i); /* unhook from SCSI subsystem */
  3689. #endif
  3690. cciss_shutdown(pdev);
  3691. #ifdef CONFIG_PCI_MSI
  3692. if (hba[i]->msix_vector)
  3693. pci_disable_msix(hba[i]->pdev);
  3694. else if (hba[i]->msi_vector)
  3695. pci_disable_msi(hba[i]->pdev);
  3696. #endif /* CONFIG_PCI_MSI */
  3697. iounmap(hba[i]->vaddr);
  3698. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(CommandList_struct),
  3699. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3700. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3701. hba[i]->errinfo_pool, hba[i]->errinfo_pool_dhandle);
  3702. kfree(hba[i]->cmd_pool_bits);
  3703. /*
  3704. * Deliberately omit pci_disable_device(): it does something nasty to
  3705. * Smart Array controllers that pci_enable_device does not undo
  3706. */
  3707. pci_release_regions(pdev);
  3708. pci_set_drvdata(pdev, NULL);
  3709. cciss_destroy_hba_sysfs_entry(hba[i]);
  3710. free_hba(i);
  3711. }
  3712. static struct pci_driver cciss_pci_driver = {
  3713. .name = "cciss",
  3714. .probe = cciss_init_one,
  3715. .remove = __devexit_p(cciss_remove_one),
  3716. .id_table = cciss_pci_device_id, /* id_table */
  3717. .shutdown = cciss_shutdown,
  3718. };
  3719. /*
  3720. * This is it. Register the PCI driver information for the cards we control
  3721. * the OS will call our registered routines when it finds one of our cards.
  3722. */
  3723. static int __init cciss_init(void)
  3724. {
  3725. int err;
  3726. /*
  3727. * The hardware requires that commands are aligned on a 64-bit
  3728. * boundary. Given that we use pci_alloc_consistent() to allocate an
  3729. * array of them, the size must be a multiple of 8 bytes.
  3730. */
  3731. BUILD_BUG_ON(sizeof(CommandList_struct) % 8);
  3732. printk(KERN_INFO DRIVER_NAME "\n");
  3733. err = bus_register(&cciss_bus_type);
  3734. if (err)
  3735. return err;
  3736. /* Register for our PCI devices */
  3737. err = pci_register_driver(&cciss_pci_driver);
  3738. if (err)
  3739. goto err_bus_register;
  3740. return 0;
  3741. err_bus_register:
  3742. bus_unregister(&cciss_bus_type);
  3743. return err;
  3744. }
  3745. static void __exit cciss_cleanup(void)
  3746. {
  3747. int i;
  3748. pci_unregister_driver(&cciss_pci_driver);
  3749. /* double check that all controller entrys have been removed */
  3750. for (i = 0; i < MAX_CTLR; i++) {
  3751. if (hba[i] != NULL) {
  3752. printk(KERN_WARNING "cciss: had to remove"
  3753. " controller %d\n", i);
  3754. cciss_remove_one(hba[i]->pdev);
  3755. }
  3756. }
  3757. remove_proc_entry("driver/cciss", NULL);
  3758. bus_unregister(&cciss_bus_type);
  3759. }
  3760. static void fail_all_cmds(unsigned long ctlr)
  3761. {
  3762. /* If we get here, the board is apparently dead. */
  3763. ctlr_info_t *h = hba[ctlr];
  3764. CommandList_struct *c;
  3765. unsigned long flags;
  3766. printk(KERN_WARNING "cciss%d: controller not responding.\n", h->ctlr);
  3767. h->alive = 0; /* the controller apparently died... */
  3768. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  3769. pci_disable_device(h->pdev); /* Make sure it is really dead. */
  3770. /* move everything off the request queue onto the completed queue */
  3771. while (!hlist_empty(&h->reqQ)) {
  3772. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  3773. removeQ(c);
  3774. h->Qdepth--;
  3775. addQ(&h->cmpQ, c);
  3776. }
  3777. /* Now, fail everything on the completed queue with a HW error */
  3778. while (!hlist_empty(&h->cmpQ)) {
  3779. c = hlist_entry(h->cmpQ.first, CommandList_struct, list);
  3780. removeQ(c);
  3781. if (c->cmd_type != CMD_MSG_STALE)
  3782. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3783. if (c->cmd_type == CMD_RWREQ) {
  3784. complete_command(h, c, 0);
  3785. } else if (c->cmd_type == CMD_IOCTL_PEND)
  3786. complete(c->waiting);
  3787. #ifdef CONFIG_CISS_SCSI_TAPE
  3788. else if (c->cmd_type == CMD_SCSI)
  3789. complete_scsi_command(c, 0, 0);
  3790. #endif
  3791. }
  3792. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  3793. return;
  3794. }
  3795. module_init(cciss_init);
  3796. module_exit(cciss_cleanup);