pgtable_32.h 2.6 KB

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  1. #ifndef _ASM_X86_PGTABLE_32_H
  2. #define _ASM_X86_PGTABLE_32_H
  3. #include <asm/pgtable_32_types.h>
  4. /*
  5. * The Linux memory management assumes a three-level page table setup. On
  6. * the i386, we use that, but "fold" the mid level into the top-level page
  7. * table, so that we physically have the same two-level page table as the
  8. * i386 mmu expects.
  9. *
  10. * This file contains the functions and defines necessary to modify and use
  11. * the i386 page table tree.
  12. */
  13. #ifndef __ASSEMBLY__
  14. #include <asm/processor.h>
  15. #include <asm/fixmap.h>
  16. #include <linux/threads.h>
  17. #include <asm/paravirt.h>
  18. #include <linux/bitops.h>
  19. #include <linux/slab.h>
  20. #include <linux/list.h>
  21. #include <linux/spinlock.h>
  22. struct mm_struct;
  23. struct vm_area_struct;
  24. extern pgd_t swapper_pg_dir[1024];
  25. static inline void pgtable_cache_init(void) { }
  26. static inline void check_pgt_cache(void) { }
  27. void paging_init(void);
  28. extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
  29. /*
  30. * Define this if things work differently on an i386 and an i486:
  31. * it will (on an i486) warn about kernel memory accesses that are
  32. * done without a 'access_ok(VERIFY_WRITE,..)'
  33. */
  34. #undef TEST_ACCESS_OK
  35. #ifdef CONFIG_X86_PAE
  36. # include <asm/pgtable-3level.h>
  37. #else
  38. # include <asm/pgtable-2level.h>
  39. #endif
  40. #if defined(CONFIG_HIGHPTE)
  41. #define __KM_PTE \
  42. (in_nmi() ? KM_NMI_PTE : \
  43. in_irq() ? KM_IRQ_PTE : \
  44. KM_PTE0)
  45. #define pte_offset_map(dir, address) \
  46. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), __KM_PTE) + \
  47. pte_index((address)))
  48. #define pte_offset_map_nested(dir, address) \
  49. ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
  50. pte_index((address)))
  51. #define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE)
  52. #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
  53. #else
  54. #define pte_offset_map(dir, address) \
  55. ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
  56. #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
  57. #define pte_unmap(pte) do { } while (0)
  58. #define pte_unmap_nested(pte) do { } while (0)
  59. #endif
  60. /* Clear a kernel PTE and flush it from the TLB */
  61. #define kpte_clear_flush(ptep, vaddr) \
  62. do { \
  63. pte_clear(&init_mm, (vaddr), (ptep)); \
  64. __flush_tlb_one((vaddr)); \
  65. } while (0)
  66. /*
  67. * The i386 doesn't have any external MMU info: the kernel page
  68. * tables contain all the necessary information.
  69. */
  70. #define update_mmu_cache(vma, address, pte) do { } while (0)
  71. #endif /* !__ASSEMBLY__ */
  72. /*
  73. * kern_addr_valid() is (1) for FLATMEM and (0) for
  74. * SPARSEMEM and DISCONTIGMEM
  75. */
  76. #ifdef CONFIG_FLATMEM
  77. #define kern_addr_valid(addr) (1)
  78. #else
  79. #define kern_addr_valid(kaddr) (0)
  80. #endif
  81. #endif /* _ASM_X86_PGTABLE_32_H */